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* [igt-dev] [PATCH i-g-t] lib/rendercopy_gen9: Set rw domains to zero for GEN12
@ 2019-11-28  9:12 Mika Kahola
  2019-11-28  9:16 ` Chris Wilson
                   ` (3 more replies)
  0 siblings, 4 replies; 11+ messages in thread
From: Mika Kahola @ 2019-11-28  9:12 UTC (permalink / raw)
  To: igt-dev

GEN12 doesn't need read and write domains to be set. Let's set
these to zero in case of GEN12.

Signed-off-by: Mika Kahola <mika.kahola@intel.com>
---
 lib/rendercopy_gen9.c | 36 ++++++++++++++++++++++--------------
 1 file changed, 22 insertions(+), 14 deletions(-)

diff --git a/lib/rendercopy_gen9.c b/lib/rendercopy_gen9.c
index 3189594f..891b7ff1 100644
--- a/lib/rendercopy_gen9.c
+++ b/lib/rendercopy_gen9.c
@@ -194,7 +194,7 @@ gen6_render_flush(struct intel_batchbuffer *batch,
 /* Mostly copy+paste from gen6, except height, width, pitch moved */
 static uint32_t
 gen8_bind_buf(struct intel_batchbuffer *batch, const struct igt_buf *buf,
-	      int is_dst) {
+	      int is_dst, unsigned gen) {
 	struct gen9_surface_state *ss;
 	uint32_t write_domain, read_domain, offset;
 	int ret;
@@ -210,6 +210,12 @@ gen8_bind_buf(struct intel_batchbuffer *batch, const struct igt_buf *buf,
 		read_domain = I915_GEM_DOMAIN_SAMPLER;
 	}
 
+	/* domains not needed for GEN12 */
+	if (gen == 12) {
+		write_domain = 0;
+		read_domain = 0;
+	}
+
 	ss = intel_batchbuffer_subdata_alloc(batch, sizeof(*ss), 64);
 	offset = intel_batchbuffer_subdata_offset(batch, ss);
 	annotation_add_state(&aub_annotations, AUB_TRACE_SURFACE_STATE,
@@ -277,7 +283,8 @@ gen8_bind_buf(struct intel_batchbuffer *batch, const struct igt_buf *buf,
 static uint32_t
 gen8_bind_surfaces(struct intel_batchbuffer *batch,
 		   const struct igt_buf *src,
-		   const struct igt_buf *dst)
+		   const struct igt_buf *dst,
+		   unsigned gen)
 {
 	uint32_t *binding_table, offset;
 
@@ -286,8 +293,8 @@ gen8_bind_surfaces(struct intel_batchbuffer *batch,
 	annotation_add_state(&aub_annotations, AUB_TRACE_BINDING_TABLE,
 			     offset, 8);
 
-	binding_table[0] = gen8_bind_buf(batch, dst, 1);
-	binding_table[1] = gen8_bind_buf(batch, src, 0);
+	binding_table[0] = gen8_bind_buf(batch, dst, 1, gen);
+	binding_table[1] = gen8_bind_buf(batch, src, 0, gen);
 
 	return offset;
 }
@@ -1187,7 +1194,8 @@ void _gen9_render_copyfunc(struct intel_batchbuffer *batch,
 			  unsigned dst_y,
 			  drm_intel_bo *aux_pgtable_bo,
 			  const uint32_t ps_kernel[][4],
-			  uint32_t ps_kernel_size)
+			  uint32_t ps_kernel_size,
+			  unsigned gen)
 {
 	uint32_t ps_sampler_state, ps_kernel_off, ps_binding_table;
 	uint32_t scissor_state;
@@ -1204,7 +1212,7 @@ void _gen9_render_copyfunc(struct intel_batchbuffer *batch,
 
 	annotation_init(&aub_annotations);
 
-	ps_binding_table  = gen8_bind_surfaces(batch, src, dst);
+	ps_binding_table  = gen8_bind_surfaces(batch, src, dst, gen);
 	ps_sampler_state  = gen8_create_sampler(batch);
 	ps_kernel_off = gen8_fill_ps(batch, ps_kernel, ps_kernel_size);
 	vertex_buffer = gen7_fill_vertex_buffer_data(batch, src,
@@ -1307,8 +1315,8 @@ void gen9_render_copyfunc(struct intel_batchbuffer *batch,
 
 {
 	_gen9_render_copyfunc(batch, context, src, src_x, src_y,
-			  width, height, dst, dst_x, dst_y, NULL,
-			  ps_kernel_gen9, sizeof(ps_kernel_gen9));
+			      width, height, dst, dst_x, dst_y, NULL,
+			      ps_kernel_gen9, sizeof(ps_kernel_gen9), 9);
 }
 
 void gen11_render_copyfunc(struct intel_batchbuffer *batch,
@@ -1319,8 +1327,8 @@ void gen11_render_copyfunc(struct intel_batchbuffer *batch,
 
 {
 	_gen9_render_copyfunc(batch, context, src, src_x, src_y,
-			  width, height, dst, dst_x, dst_y, NULL,
-			  ps_kernel_gen11, sizeof(ps_kernel_gen11));
+			      width, height, dst, dst_x, dst_y, NULL,
+			      ps_kernel_gen11, sizeof(ps_kernel_gen11), 11);
 }
 
 void gen12_render_copyfunc(struct intel_batchbuffer *batch,
@@ -1335,10 +1343,10 @@ void gen12_render_copyfunc(struct intel_batchbuffer *batch,
 	gen12_aux_pgtable_init(&pgtable_info, batch->bufmgr, src, dst);
 
 	_gen9_render_copyfunc(batch, context, src, src_x, src_y,
-			  width, height, dst, dst_x, dst_y,
-			  pgtable_info.pgtable_bo,
-			  gen12_render_copy,
-			  sizeof(gen12_render_copy));
+			      width, height, dst, dst_x, dst_y,
+			      pgtable_info.pgtable_bo,
+			      gen12_render_copy,
+			      sizeof(gen12_render_copy), 12);
 
 	gen12_aux_pgtable_cleanup(&pgtable_info);
 }
-- 
2.17.1

_______________________________________________
igt-dev mailing list
igt-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/igt-dev

^ permalink raw reply related	[flat|nested] 11+ messages in thread

* Re: [igt-dev] [PATCH i-g-t] lib/rendercopy_gen9: Set rw domains to zero for GEN12
  2019-11-28  9:12 [igt-dev] [PATCH i-g-t] lib/rendercopy_gen9: Set rw domains to zero for GEN12 Mika Kahola
@ 2019-11-28  9:16 ` Chris Wilson
  2019-11-28 10:32   ` Imre Deak
  2019-11-28 10:24 ` [igt-dev] ✗ GitLab.Pipeline: warning for " Patchwork
                   ` (2 subsequent siblings)
  3 siblings, 1 reply; 11+ messages in thread
From: Chris Wilson @ 2019-11-28  9:16 UTC (permalink / raw)
  To: Mika Kahola, igt-dev

Quoting Mika Kahola (2019-11-28 09:12:28)
> GEN12 doesn't need read and write domains to be set. Let's set
> these to zero in case of GEN12.

Why gen12? For the entire file the only bit that is significant is
write_domain != 0
-Chris
_______________________________________________
igt-dev mailing list
igt-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/igt-dev

^ permalink raw reply	[flat|nested] 11+ messages in thread

* [igt-dev] ✗ GitLab.Pipeline: warning for lib/rendercopy_gen9: Set rw domains to zero for GEN12
  2019-11-28  9:12 [igt-dev] [PATCH i-g-t] lib/rendercopy_gen9: Set rw domains to zero for GEN12 Mika Kahola
  2019-11-28  9:16 ` Chris Wilson
@ 2019-11-28 10:24 ` Patchwork
  2019-11-28 11:08   ` Petri Latvala
  2019-11-28 10:39 ` [igt-dev] ✓ Fi.CI.BAT: success " Patchwork
  2019-11-29 15:14 ` [igt-dev] ✗ Fi.CI.IGT: failure " Patchwork
  3 siblings, 1 reply; 11+ messages in thread
From: Patchwork @ 2019-11-28 10:24 UTC (permalink / raw)
  To: Mika Kahola; +Cc: igt-dev

== Series Details ==

Series: lib/rendercopy_gen9: Set rw domains to zero for GEN12
URL   : https://patchwork.freedesktop.org/series/70152/
State : warning

== Summary ==

Did not get list of undocumented tests for this run, something is wrong!

Other than that, pipeline status: FAILED.

see https://gitlab.freedesktop.org/gfx-ci/igt-ci-tags/pipelines/83626 for the overview.

== Logs ==

For more details see: https://gitlab.freedesktop.org/gfx-ci/igt-ci-tags/pipelines/83626
_______________________________________________
igt-dev mailing list
igt-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/igt-dev

^ permalink raw reply	[flat|nested] 11+ messages in thread

* Re: [igt-dev] [PATCH i-g-t] lib/rendercopy_gen9: Set rw domains to zero for GEN12
  2019-11-28  9:16 ` Chris Wilson
@ 2019-11-28 10:32   ` Imre Deak
  2019-11-28 10:39     ` Chris Wilson
  0 siblings, 1 reply; 11+ messages in thread
From: Imre Deak @ 2019-11-28 10:32 UTC (permalink / raw)
  To: Chris Wilson; +Cc: igt-dev

On Thu, Nov 28, 2019 at 09:16:20AM +0000, Chris Wilson wrote:
> Quoting Mika Kahola (2019-11-28 09:12:28)
> > GEN12 doesn't need read and write domains to be set. Let's set
> > these to zero in case of GEN12.
> 
> Why gen12? For the entire file the only bit that is significant is
> write_domain != 0

Err, that idea was mine, but then it was wrong. Mika needs to add a
relocation on this surface state to the color key data that's where this
change comes from.

Didn't think about the write domain being significant even on LLC
platforms, so let's just drop my idea for now (was only for clarity when
emitting relocations on GEN12) and use the same read/write domains as on
other platforms.

For reference could you explain how the write domain is signicant on LLC
platforms? (My guess now is that the kernel can wait for writes on the
surface to finnish, but it doesn't need it to flush caches, which is not
necessary on LLC.)

Thanks,
Imre
_______________________________________________
igt-dev mailing list
igt-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/igt-dev

^ permalink raw reply	[flat|nested] 11+ messages in thread

* [igt-dev] ✓ Fi.CI.BAT: success for lib/rendercopy_gen9: Set rw domains to zero for GEN12
  2019-11-28  9:12 [igt-dev] [PATCH i-g-t] lib/rendercopy_gen9: Set rw domains to zero for GEN12 Mika Kahola
  2019-11-28  9:16 ` Chris Wilson
  2019-11-28 10:24 ` [igt-dev] ✗ GitLab.Pipeline: warning for " Patchwork
@ 2019-11-28 10:39 ` Patchwork
  2019-11-29 15:14 ` [igt-dev] ✗ Fi.CI.IGT: failure " Patchwork
  3 siblings, 0 replies; 11+ messages in thread
From: Patchwork @ 2019-11-28 10:39 UTC (permalink / raw)
  To: Mika Kahola; +Cc: igt-dev

== Series Details ==

Series: lib/rendercopy_gen9: Set rw domains to zero for GEN12
URL   : https://patchwork.freedesktop.org/series/70152/
State : success

== Summary ==

CI Bug Log - changes from IGT_5313 -> IGTPW_3776
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3776/index.html

Known issues
------------

  Here are the changes found in IGTPW_3776 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@i915_pm_rpm@module-reload:
    - fi-skl-6770hq:      [PASS][1] -> [FAIL][2] ([fdo#108511])
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5313/fi-skl-6770hq/igt@i915_pm_rpm@module-reload.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3776/fi-skl-6770hq/igt@i915_pm_rpm@module-reload.html

  * igt@i915_selftest@live_blt:
    - fi-bsw-nick:        [PASS][3] -> [DMESG-FAIL][4] ([fdo#112176])
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5313/fi-bsw-nick/igt@i915_selftest@live_blt.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3776/fi-bsw-nick/igt@i915_selftest@live_blt.html

  * igt@kms_frontbuffer_tracking@basic:
    - fi-icl-u2:          [PASS][5] -> [FAIL][6] ([fdo#103167])
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5313/fi-icl-u2/igt@kms_frontbuffer_tracking@basic.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3776/fi-icl-u2/igt@kms_frontbuffer_tracking@basic.html

  
#### Possible fixes ####

  * igt@gem_exec_suspend@basic-s0:
    - fi-icl-u3:          [DMESG-WARN][7] -> [PASS][8]
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5313/fi-icl-u3/igt@gem_exec_suspend@basic-s0.html
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3776/fi-icl-u3/igt@gem_exec_suspend@basic-s0.html

  * igt@i915_module_load@reload-with-fault-injection:
    - fi-skl-guc:         [INCOMPLETE][9] -> [PASS][10]
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5313/fi-skl-guc/igt@i915_module_load@reload-with-fault-injection.html
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3776/fi-skl-guc/igt@i915_module_load@reload-with-fault-injection.html

  * igt@i915_pm_rpm@module-reload:
    - fi-skl-lmem:        [DMESG-WARN][11] ([fdo#112261]) -> [PASS][12]
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5313/fi-skl-lmem/igt@i915_pm_rpm@module-reload.html
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3776/fi-skl-lmem/igt@i915_pm_rpm@module-reload.html

  
#### Warnings ####

  * igt@gem_exec_suspend@basic-s4-devices:
    - fi-kbl-x1275:       [DMESG-WARN][13] ([fdo#103558] / [fdo#105602] / [fdo#105763] / [fdo#107139]) -> [DMESG-WARN][14] ([fdo#103558] / [fdo#105602] / [fdo#107139])
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5313/fi-kbl-x1275/igt@gem_exec_suspend@basic-s4-devices.html
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3776/fi-kbl-x1275/igt@gem_exec_suspend@basic-s4-devices.html

  * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy:
    - fi-kbl-x1275:       [DMESG-WARN][15] ([fdo#103558] / [fdo#105602]) -> [DMESG-WARN][16] ([fdo#103558] / [fdo#105602] / [fdo#105763]) +5 similar issues
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5313/fi-kbl-x1275/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy.html
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3776/fi-kbl-x1275/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy.html

  * igt@kms_flip@basic-flip-vs-modeset:
    - fi-kbl-x1275:       [DMESG-WARN][17] ([fdo#103558] / [fdo#105602] / [fdo#105763]) -> [DMESG-WARN][18] ([fdo#103558] / [fdo#105602]) +8 similar issues
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5313/fi-kbl-x1275/igt@kms_flip@basic-flip-vs-modeset.html
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3776/fi-kbl-x1275/igt@kms_flip@basic-flip-vs-modeset.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167
  [fdo#103558]: https://bugs.freedesktop.org/show_bug.cgi?id=103558
  [fdo#105602]: https://bugs.freedesktop.org/show_bug.cgi?id=105602
  [fdo#105763]: https://bugs.freedesktop.org/show_bug.cgi?id=105763
  [fdo#107139]: https://bugs.freedesktop.org/show_bug.cgi?id=107139
  [fdo#108511]: https://bugs.freedesktop.org/show_bug.cgi?id=108511
  [fdo#111735]: https://bugs.freedesktop.org/show_bug.cgi?id=111735
  [fdo#112176]: https://bugs.freedesktop.org/show_bug.cgi?id=112176
  [fdo#112261]: https://bugs.freedesktop.org/show_bug.cgi?id=112261


Participating hosts (50 -> 43)
------------------------------

  Additional (1): fi-snb-2600 
  Missing    (8): fi-kbl-soraka fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-ctg-p8600 fi-byt-clapper fi-bdw-samus 


Build changes
-------------

  * CI: CI-20190529 -> None
  * IGT: IGT_5313 -> IGTPW_3776

  CI-20190529: 20190529
  CI_DRM_7435: 20edef7d4f0a1d2672d47e6bb4febf019f4e6580 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGTPW_3776: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3776/index.html
  IGT_5313: 92caadb4e551ba05aa6e6e567ef69da96ca7e328 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3776/index.html
_______________________________________________
igt-dev mailing list
igt-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/igt-dev

^ permalink raw reply	[flat|nested] 11+ messages in thread

* Re: [igt-dev] [PATCH i-g-t] lib/rendercopy_gen9: Set rw domains to zero for GEN12
  2019-11-28 10:32   ` Imre Deak
@ 2019-11-28 10:39     ` Chris Wilson
  2019-11-28 10:45       ` Kahola, Mika
  2019-11-28 10:58       ` Imre Deak
  0 siblings, 2 replies; 11+ messages in thread
From: Chris Wilson @ 2019-11-28 10:39 UTC (permalink / raw)
  To: Imre Deak; +Cc: igt-dev

Quoting Imre Deak (2019-11-28 10:32:05)
> On Thu, Nov 28, 2019 at 09:16:20AM +0000, Chris Wilson wrote:
> > Quoting Mika Kahola (2019-11-28 09:12:28)
> > > GEN12 doesn't need read and write domains to be set. Let's set
> > > these to zero in case of GEN12.
> > 
> > Why gen12? For the entire file the only bit that is significant is
> > write_domain != 0
> 
> Err, that idea was mine, but then it was wrong. Mika needs to add a
> relocation on this surface state to the color key data that's where this
> change comes from.
> 
> Didn't think about the write domain being significant even on LLC
> platforms, so let's just drop my idea for now (was only for clarity when
> emitting relocations on GEN12) and use the same read/write domains as on
> other platforms.
> 
> For reference could you explain how the write domain is signicant on LLC
> platforms? (My guess now is that the kernel can wait for writes on the
> surface to finnish, but it doesn't need it to flush caches, which is not
> necessary on LLC.)

Every buffer passed to execbuf is put on a list of active buffers, so we
do not discard memory being used by the GPU too early.

If you declare a buffer is written to by execbuf, a write hazard/fence
is placed on that buffer in addition to the normal fence. The write into
that buffer is then scheduled after all previous reads, and all future
reads are performed after this write. Any user access to the buffer via
GEM (gem_read, gem_set_domain) will also wait until the GPU write is
complete before returning.

So the write_domain is significant for implicit ordering of operations.
You can of course do everything with explicit fencing instead.
-Chris
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^ permalink raw reply	[flat|nested] 11+ messages in thread

* Re: [igt-dev] [PATCH i-g-t] lib/rendercopy_gen9: Set rw domains to zero for GEN12
  2019-11-28 10:39     ` Chris Wilson
@ 2019-11-28 10:45       ` Kahola, Mika
  2019-11-28 10:58       ` Imre Deak
  1 sibling, 0 replies; 11+ messages in thread
From: Kahola, Mika @ 2019-11-28 10:45 UTC (permalink / raw)
  To: Deak, Imre, chris; +Cc: igt-dev

On Thu, 2019-11-28 at 10:39 +0000, Chris Wilson wrote:
> Quoting Imre Deak (2019-11-28 10:32:05)
> > On Thu, Nov 28, 2019 at 09:16:20AM +0000, Chris Wilson wrote:
> > > Quoting Mika Kahola (2019-11-28 09:12:28)
> > > > GEN12 doesn't need read and write domains to be set. Let's set
> > > > these to zero in case of GEN12.
> > > 
> > > Why gen12? For the entire file the only bit that is significant
> > > is
> > > write_domain != 0
> > 
> > Err, that idea was mine, but then it was wrong. Mika needs to add a
> > relocation on this surface state to the color key data that's where
> > this
> > change comes from.
> > 
> > Didn't think about the write domain being significant even on LLC
> > platforms, so let's just drop my idea for now (was only for clarity
> > when
> > emitting relocations on GEN12) and use the same read/write domains
> > as on
> > other platforms.
> > 
> > For reference could you explain how the write domain is signicant
> > on LLC
> > platforms? (My guess now is that the kernel can wait for writes on
> > the
> > surface to finnish, but it doesn't need it to flush caches, which
> > is not
> > necessary on LLC.)
> 
> Every buffer passed to execbuf is put on a list of active buffers, so
> we
> do not discard memory being used by the GPU too early.
> 
> If you declare a buffer is written to by execbuf, a write
> hazard/fence
> is placed on that buffer in addition to the normal fence. The write
> into
> that buffer is then scheduled after all previous reads, and all
> future
> reads are performed after this write. Any user access to the buffer
> via
> GEM (gem_read, gem_set_domain) will also wait until the GPU write is
> complete before returning.
> 
> So the write_domain is significant for implicit ordering of
> operations.
> You can of course do everything with explicit fencing instead.
> -Chris
Ok, let's ignore this patch and carry on with clear color.

-Mika-

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^ permalink raw reply	[flat|nested] 11+ messages in thread

* Re: [igt-dev] [PATCH i-g-t] lib/rendercopy_gen9: Set rw domains to zero for GEN12
  2019-11-28 10:39     ` Chris Wilson
  2019-11-28 10:45       ` Kahola, Mika
@ 2019-11-28 10:58       ` Imre Deak
  1 sibling, 0 replies; 11+ messages in thread
From: Imre Deak @ 2019-11-28 10:58 UTC (permalink / raw)
  To: Chris Wilson; +Cc: igt-dev

On Thu, Nov 28, 2019 at 10:39:44AM +0000, Chris Wilson wrote:
> Quoting Imre Deak (2019-11-28 10:32:05)
> > On Thu, Nov 28, 2019 at 09:16:20AM +0000, Chris Wilson wrote:
> > > Quoting Mika Kahola (2019-11-28 09:12:28)
> > > > GEN12 doesn't need read and write domains to be set. Let's set
> > > > these to zero in case of GEN12.
> > > 
> > > Why gen12? For the entire file the only bit that is significant is
> > > write_domain != 0
> > 
> > Err, that idea was mine, but then it was wrong. Mika needs to add a
> > relocation on this surface state to the color key data that's where this
> > change comes from.
> > 
> > Didn't think about the write domain being significant even on LLC
> > platforms, so let's just drop my idea for now (was only for clarity when
> > emitting relocations on GEN12) and use the same read/write domains as on
> > other platforms.
> > 
> > For reference could you explain how the write domain is signicant on LLC
> > platforms? (My guess now is that the kernel can wait for writes on the
> > surface to finnish, but it doesn't need it to flush caches, which is not
> > necessary on LLC.)
> 
> Every buffer passed to execbuf is put on a list of active buffers, so we
> do not discard memory being used by the GPU too early.
> 
> If you declare a buffer is written to by execbuf, a write hazard/fence
> is placed on that buffer in addition to the normal fence. The write into
> that buffer is then scheduled after all previous reads, and all future
> reads are performed after this write. Any user access to the buffer via
> GEM (gem_read, gem_set_domain) will also wait until the GPU write is
> complete before returning.
> 
> So the write_domain is significant for implicit ordering of operations.
> You can of course do everything with explicit fencing instead.

Ok makes sense now, thanks.

> -Chris
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^ permalink raw reply	[flat|nested] 11+ messages in thread

* Re: [igt-dev] ✗ GitLab.Pipeline: warning for lib/rendercopy_gen9: Set rw domains to zero for GEN12
  2019-11-28 10:24 ` [igt-dev] ✗ GitLab.Pipeline: warning for " Patchwork
@ 2019-11-28 11:08   ` Petri Latvala
  2019-11-28 12:50     ` Arkadiusz Hiler
  0 siblings, 1 reply; 11+ messages in thread
From: Petri Latvala @ 2019-11-28 11:08 UTC (permalink / raw)
  To: Arkadiusz Hiler; +Cc: igt-dev

On Thu, Nov 28, 2019 at 10:24:52AM +0000, Patchwork wrote:
> == Series Details ==
> 
> Series: lib/rendercopy_gen9: Set rw domains to zero for GEN12
> URL   : https://patchwork.freedesktop.org/series/70152/
> State : warning
> 
> == Summary ==
> 
> Did not get list of undocumented tests for this run, something is wrong!
> 
> Other than that, pipeline status: FAILED.
> 
> see https://gitlab.freedesktop.org/gfx-ci/igt-ci-tags/pipelines/83626 for the overview.
> 
> == Logs ==
> 
> For more details see: https://gitlab.freedesktop.org/gfx-ci/igt-ci-tags/pipelines/83626


Arek, why are we not seeing the logs here?

(For the record, it's a test timeout, this time on mips)


-- 
Petri Latvala
_______________________________________________
igt-dev mailing list
igt-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/igt-dev

^ permalink raw reply	[flat|nested] 11+ messages in thread

* Re: [igt-dev] ✗ GitLab.Pipeline: warning for lib/rendercopy_gen9: Set rw domains to zero for GEN12
  2019-11-28 11:08   ` Petri Latvala
@ 2019-11-28 12:50     ` Arkadiusz Hiler
  0 siblings, 0 replies; 11+ messages in thread
From: Arkadiusz Hiler @ 2019-11-28 12:50 UTC (permalink / raw)
  To: Petri Latvala; +Cc: igt-dev

On Thu, Nov 28, 2019 at 01:08:43PM +0200, Petri Latvala wrote:
> On Thu, Nov 28, 2019 at 10:24:52AM +0000, Patchwork wrote:
> > == Series Details ==
> > 
> > Series: lib/rendercopy_gen9: Set rw domains to zero for GEN12
> > URL   : https://patchwork.freedesktop.org/series/70152/
> > State : warning
> > 
> > == Summary ==
> > 
> > Did not get list of undocumented tests for this run, something is wrong!
> > 
> > Other than that, pipeline status: FAILED.
> > 
> > see https://gitlab.freedesktop.org/gfx-ci/igt-ci-tags/pipelines/83626 for the overview.
> > 
> > == Logs ==
> > 
> > For more details see: https://gitlab.freedesktop.org/gfx-ci/igt-ci-tags/pipelines/83626
> 
> 
> Arek, why are we not seeing the logs here?
> 
> (For the record, it's a test timeout, this time on mips)

https://gitlab.freedesktop.org/gfx-ci/i915-infra/merge_requests/64
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^ permalink raw reply	[flat|nested] 11+ messages in thread

* [igt-dev] ✗ Fi.CI.IGT: failure for lib/rendercopy_gen9: Set rw domains to zero for GEN12
  2019-11-28  9:12 [igt-dev] [PATCH i-g-t] lib/rendercopy_gen9: Set rw domains to zero for GEN12 Mika Kahola
                   ` (2 preceding siblings ...)
  2019-11-28 10:39 ` [igt-dev] ✓ Fi.CI.BAT: success " Patchwork
@ 2019-11-29 15:14 ` Patchwork
  3 siblings, 0 replies; 11+ messages in thread
From: Patchwork @ 2019-11-29 15:14 UTC (permalink / raw)
  To: Mika Kahola; +Cc: igt-dev

== Series Details ==

Series: lib/rendercopy_gen9: Set rw domains to zero for GEN12
URL   : https://patchwork.freedesktop.org/series/70152/
State : failure

== Summary ==

CI Bug Log - changes from IGT_5313_full -> IGTPW_3776_full
====================================================

Summary
-------

  **FAILURE**

  Serious unknown changes coming with IGTPW_3776_full absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in IGTPW_3776_full, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3776/index.html

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in IGTPW_3776_full:

### IGT changes ###

#### Possible regressions ####

  * igt@gem_exec_schedule@wide-bsd:
    - shard-iclb:         [PASS][1] -> [DMESG-WARN][2]
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5313/shard-iclb3/igt@gem_exec_schedule@wide-bsd.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3776/shard-iclb7/igt@gem_exec_schedule@wide-bsd.html

  * igt@gem_render_tiled_blits@basic:
    - shard-tglb:         [PASS][3] -> [FAIL][4] +1 similar issue
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5313/shard-tglb1/igt@gem_render_tiled_blits@basic.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3776/shard-tglb5/igt@gem_render_tiled_blits@basic.html

  * igt@kms_psr@cursor_render:
    - shard-tglb:         NOTRUN -> [FAIL][5] +2 similar issues
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3776/shard-tglb5/igt@kms_psr@cursor_render.html

  
Known issues
------------

  Here are the changes found in IGTPW_3776_full that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@gem_userptr_blits@map-fixed-invalidate-busy-gup:
    - shard-hsw:          [PASS][6] -> [DMESG-WARN][7] ([fdo#111870])
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5313/shard-hsw6/igt@gem_userptr_blits@map-fixed-invalidate-busy-gup.html
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3776/shard-hsw6/igt@gem_userptr_blits@map-fixed-invalidate-busy-gup.html

  * igt@gem_userptr_blits@sync-unmap-after-close:
    - shard-snb:          [PASS][8] -> [DMESG-WARN][9] ([fdo#111870]) +1 similar issue
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5313/shard-snb5/igt@gem_userptr_blits@sync-unmap-after-close.html
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3776/shard-snb1/igt@gem_userptr_blits@sync-unmap-after-close.html

  * igt@gem_wait@await-vcs1:
    - shard-iclb:         [PASS][10] -> [SKIP][11] ([fdo#112080])
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5313/shard-iclb4/igt@gem_wait@await-vcs1.html
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3776/shard-iclb5/igt@gem_wait@await-vcs1.html

  * igt@gem_workarounds@suspend-resume-context:
    - shard-iclb:         [PASS][12] -> [INCOMPLETE][13] ([fdo#107713])
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5313/shard-iclb5/igt@gem_workarounds@suspend-resume-context.html
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3776/shard-iclb3/igt@gem_workarounds@suspend-resume-context.html

  * igt@i915_pm_rpm@system-suspend-execbuf:
    - shard-tglb:         [PASS][14] -> [INCOMPLETE][15] ([fdo#111832] / [fdo#111850]) +1 similar issue
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5313/shard-tglb1/igt@i915_pm_rpm@system-suspend-execbuf.html
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3776/shard-tglb7/igt@i915_pm_rpm@system-suspend-execbuf.html

  * igt@i915_suspend@sysfs-reader:
    - shard-apl:          [PASS][16] -> [DMESG-WARN][17] ([fdo#108566])
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5313/shard-apl6/igt@i915_suspend@sysfs-reader.html
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3776/shard-apl6/igt@i915_suspend@sysfs-reader.html

  * igt@kms_frontbuffer_tracking@fbc-1p-indfb-fliptrack:
    - shard-tglb:         [PASS][18] -> [FAIL][19] ([fdo#103167])
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5313/shard-tglb3/igt@kms_frontbuffer_tracking@fbc-1p-indfb-fliptrack.html
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3776/shard-tglb1/igt@kms_frontbuffer_tracking@fbc-1p-indfb-fliptrack.html

  * igt@kms_frontbuffer_tracking@fbc-shrfb-scaledprimary:
    - shard-kbl:          [PASS][20] -> [FAIL][21] ([fdo#103167])
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5313/shard-kbl2/igt@kms_frontbuffer_tracking@fbc-shrfb-scaledprimary.html
   [21]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3776/shard-kbl7/igt@kms_frontbuffer_tracking@fbc-shrfb-scaledprimary.html
    - shard-glk:          [PASS][22] -> [FAIL][23] ([fdo#103167])
   [22]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5313/shard-glk1/igt@kms_frontbuffer_tracking@fbc-shrfb-scaledprimary.html
   [23]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3776/shard-glk3/igt@kms_frontbuffer_tracking@fbc-shrfb-scaledprimary.html
    - shard-apl:          [PASS][24] -> [FAIL][25] ([fdo#103167])
   [24]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5313/shard-apl7/igt@kms_frontbuffer_tracking@fbc-shrfb-scaledprimary.html
   [25]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3776/shard-apl6/igt@kms_frontbuffer_tracking@fbc-shrfb-scaledprimary.html

  * igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-cur-indfb-draw-mmap-cpu:
    - shard-tglb:         [PASS][26] -> [INCOMPLETE][27] ([fdo#111884])
   [26]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5313/shard-tglb2/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-cur-indfb-draw-mmap-cpu.html
   [27]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3776/shard-tglb9/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-cur-indfb-draw-mmap-cpu.html

  * igt@kms_frontbuffer_tracking@psr-1p-primscrn-cur-indfb-draw-mmap-wc:
    - shard-tglb:         [PASS][28] -> [INCOMPLETE][29] ([fdo#111747] / [fdo#112393])
   [28]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5313/shard-tglb2/igt@kms_frontbuffer_tracking@psr-1p-primscrn-cur-indfb-draw-mmap-wc.html
   [29]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3776/shard-tglb9/igt@kms_frontbuffer_tracking@psr-1p-primscrn-cur-indfb-draw-mmap-wc.html

  * igt@kms_plane@plane-panning-bottom-right-suspend-pipe-b-planes:
    - shard-kbl:          [PASS][30] -> [DMESG-WARN][31] ([fdo#108566]) +2 similar issues
   [30]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5313/shard-kbl7/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-b-planes.html
   [31]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3776/shard-kbl7/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-b-planes.html

  
#### Possible fixes ####

  * igt@gem_ctx_isolation@rcs0-s3:
    - shard-kbl:          [DMESG-WARN][32] ([fdo#108566]) -> [PASS][33] +5 similar issues
   [32]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5313/shard-kbl6/igt@gem_ctx_isolation@rcs0-s3.html
   [33]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3776/shard-kbl7/igt@gem_ctx_isolation@rcs0-s3.html

  * igt@gem_ctx_shared@q-promotion-bsd2:
    - shard-iclb:         [SKIP][34] ([fdo#109276]) -> [PASS][35]
   [34]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5313/shard-iclb8/igt@gem_ctx_shared@q-promotion-bsd2.html
   [35]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3776/shard-iclb4/igt@gem_ctx_shared@q-promotion-bsd2.html

  * igt@gem_eio@suspend:
    - shard-tglb:         [INCOMPLETE][36] ([fdo#111850]) -> [PASS][37] +1 similar issue
   [36]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5313/shard-tglb7/igt@gem_eio@suspend.html
   [37]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3776/shard-tglb7/igt@gem_eio@suspend.html

  * {igt@gem_exec_parse_blt@bb-start-cmd}:
    - shard-glk:          [TIMEOUT][38] ([fdo#112271]) -> [PASS][39]
   [38]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5313/shard-glk2/igt@gem_exec_parse_blt@bb-start-cmd.html
   [39]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3776/shard-glk8/igt@gem_exec_parse_blt@bb-start-cmd.html

  * igt@gem_persistent_relocs@forked-interruptible-thrash-inactive:
    - shard-kbl:          [TIMEOUT][40] ([fdo#112068]) -> [PASS][41]
   [40]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5313/shard-kbl1/igt@gem_persistent_relocs@forked-interruptible-thrash-inactive.html
   [41]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3776/shard-kbl6/igt@gem_persistent_relocs@forked-interruptible-thrash-inactive.html

  * igt@gem_softpin@noreloc-s3:
    - shard-apl:          [DMESG-WARN][42] ([fdo#108566]) -> [PASS][43] +1 similar issue
   [42]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5313/shard-apl1/igt@gem_softpin@noreloc-s3.html
   [43]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3776/shard-apl2/igt@gem_softpin@noreloc-s3.html

  * igt@gem_sync@basic-store-each:
    - shard-tglb:         [INCOMPLETE][44] ([fdo#111747] / [fdo#111880]) -> [PASS][45]
   [44]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5313/shard-tglb5/igt@gem_sync@basic-store-each.html
   [45]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3776/shard-tglb2/igt@gem_sync@basic-store-each.html

  * igt@gem_userptr_blits@sync-unmap-after-close:
    - shard-hsw:          [DMESG-WARN][46] ([fdo#111870]) -> [PASS][47]
   [46]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5313/shard-hsw5/igt@gem_userptr_blits@sync-unmap-after-close.html
   [47]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3776/shard-hsw5/igt@gem_userptr_blits@sync-unmap-after-close.html
    - shard-kbl:          [INCOMPLETE][48] ([fdo#103665]) -> [PASS][49] +2 similar issues
   [48]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5313/shard-kbl1/igt@gem_userptr_blits@sync-unmap-after-close.html
   [49]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3776/shard-kbl6/igt@gem_userptr_blits@sync-unmap-after-close.html

  * igt@gem_userptr_blits@sync-unmap-cycles:
    - shard-snb:          [DMESG-WARN][50] ([fdo#111870]) -> [PASS][51] +2 similar issues
   [50]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5313/shard-snb2/igt@gem_userptr_blits@sync-unmap-cycles.html
   [51]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3776/shard-snb2/igt@gem_userptr_blits@sync-unmap-cycles.html

  * igt@gem_workarounds@suspend-resume-fd:
    - shard-tglb:         [INCOMPLETE][52] ([fdo#111832] / [fdo#111850]) -> [PASS][53] +1 similar issue
   [52]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5313/shard-tglb5/igt@gem_workarounds@suspend-resume-fd.html
   [53]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3776/shard-tglb4/igt@gem_workarounds@suspend-resume-fd.html

  * igt@i915_selftest@live_gt_timelines:
    - shard-tglb:         [INCOMPLETE][54] ([fdo#111831]) -> [PASS][55]
   [54]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5313/shard-tglb6/igt@i915_selftest@live_gt_timelines.html
   [55]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3776/shard-tglb1/igt@i915_selftest@live_gt_timelines.html

  * igt@kms_cursor_crc@pipe-b-cursor-128x42-random:
    - shard-apl:          [FAIL][56] ([fdo#103232]) -> [PASS][57]
   [56]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5313/shard-apl6/igt@kms_cursor_crc@pipe-b-cursor-128x42-random.html
   [57]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3776/shard-apl6/igt@kms_cursor_crc@pipe-b-cursor-128x42-random.html
    - shard-kbl:          [FAIL][58] ([fdo#103232]) -> [PASS][59]
   [58]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5313/shard-kbl7/igt@kms_cursor_crc@pipe-b-cursor-128x42-random.html
   [59]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3776/shard-kbl4/igt@kms_cursor_crc@pipe-b-cursor-128x42-random.html

  * igt@kms_draw_crc@draw-method-xrgb8888-render-ytiled:
    - shard-tglb:         [INCOMPLETE][60] ([fdo#112393]) -> [PASS][61]
   [60]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5313/shard-tglb9/igt@kms_draw_crc@draw-method-xrgb8888-render-ytiled.html
   [61]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3776/shard-tglb2/igt@kms_draw_crc@draw-method-xrgb8888-render-ytiled.html

  * igt@kms_flip@flip-vs-suspend:
    - shard-hsw:          [INCOMPLETE][62] ([fdo#103540]) -> [PASS][63]
   [62]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5313/shard-hsw2/igt@kms_flip@flip-vs-suspend.html
   [63]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3776/shard-hsw2/igt@kms_flip@flip-vs-suspend.html

  * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-indfb-draw-render:
    - shard-tglb:         [FAIL][64] ([fdo#103167]) -> [PASS][65]
   [64]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5313/shard-tglb8/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-indfb-draw-render.html
   [65]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3776/shard-tglb3/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-indfb-draw-render.html

  * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-render:
    - shard-iclb:         [FAIL][66] ([fdo#103167]) -> [PASS][67] +2 similar issues
   [66]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5313/shard-iclb3/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-render.html
   [67]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3776/shard-iclb3/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-render.html

  * igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-cur-indfb-draw-mmap-wc:
    - shard-iclb:         [INCOMPLETE][68] ([fdo#106978] / [fdo#107713]) -> [PASS][69]
   [68]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5313/shard-iclb6/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-cur-indfb-draw-mmap-wc.html
   [69]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3776/shard-iclb5/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-cur-indfb-draw-mmap-wc.html

  * igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-indfb-plflip-blt:
    - shard-tglb:         [INCOMPLETE][70] ([fdo#111884]) -> [PASS][71] +1 similar issue
   [70]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5313/shard-tglb2/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-indfb-plflip-blt.html
   [71]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3776/shard-tglb1/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-indfb-plflip-blt.html

  * igt@kms_psr@psr2_suspend:
    - shard-tglb:         [DMESG-WARN][72] ([fdo#111600]) -> [PASS][73]
   [72]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5313/shard-tglb7/igt@kms_psr@psr2_suspend.html
   [73]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3776/shard-tglb6/igt@kms_psr@psr2_suspend.html

  * igt@perf_pmu@render-node-busy-idle-vcs1:
    - shard-iclb:         [SKIP][74] ([fdo#112080]) -> [PASS][75] +1 similar issue
   [74]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5313/shard-iclb5/igt@perf_pmu@render-node-busy-idle-vcs1.html
   [75]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3776/shard-iclb1/igt@perf_pmu@render-node-busy-idle-vcs1.html

  
#### Warnings ####

  * igt@gem_userptr_blits@map-fixed-invalidate-overlap-busy:
    - shard-snb:          [DMESG-WARN][76] ([fdo#110789] / [fdo#111870]) -> [DMESG-WARN][77] ([fdo#111870])
   [76]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5313/shard-snb1/igt@gem_userptr_blits@map-fixed-invalidate-overlap-busy.html
   [77]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3776/shard-snb2/igt@gem_userptr_blits@map-fixed-invalidate-overlap-busy.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167
  [fdo#103232]: https://bugs.freedesktop.org/show_bug.cgi?id=103232
  [fdo#103540]: https://bugs.freedesktop.org/show_bug.cgi?id=103540
  [fdo#103665]: https://bugs.freedesktop.org/show_bug.cgi?id=103665
  [fdo#106978]: https://bugs.freedesktop.org/show_bug.cgi?id=106978
  [fdo#107713]: https://bugs.freedesktop.org/show_bug.cgi?id=107713
  [fdo#108566]: https://bugs.freedesktop.org/show_bug.cgi?id=108566
  [fdo#109276]: https://bugs.freedesktop.org/show_bug.cgi?id=109276
  [fdo#110789]: https://bugs.freedesktop.org/show_bug.cgi?id=110789
  [fdo#111600]: https://bugs.freedesktop.org/show_bug.cgi?id=111600
  [fdo#111747]: https://bugs.freedesktop.org/show_bug.cgi?id=111747
  [fdo#111831]: https://bugs.freedesktop.org/show_bug.cgi?id=111831
  [fdo#111832]: https://bugs.freedesktop.org/show_bug.cgi?id=111832
  [fdo#111850]: https://bugs.freedesktop.org/show_bug.cgi?id=111850
  [fdo#111870]: https://bugs.freedesktop.org/show_bug.cgi?id=111870
  [fdo#111880]: https://bugs.freedesktop.org/show_bug.cgi?id=111880
  [fdo#111884]: https://bugs.freedesktop.org/show_bug.cgi?id=111884
  [fdo#112068]: https://bugs.freedesktop.org/show_bug.cgi?id=112068
  [fdo#112080]: https://bugs.freedesktop.org/show_bug.cgi?id=112080
  [fdo#112271]: https://bugs.freedesktop.org/show_bug.cgi?id=112271
  [fdo#112393]: https://bugs.freedesktop.org/show_bug.cgi?id=112393


Participating hosts (8 -> 8)
------------------------------

  No changes in participating hosts


Build changes
-------------

  * CI: CI-20190529 -> None
  * IGT: IGT_5313 -> IGTPW_3776

  CI-20190529: 20190529
  CI_DRM_7435: 20edef7d4f0a1d2672d47e6bb4febf019f4e6580 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGTPW_3776: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3776/index.html
  IGT_5313: 92caadb4e551ba05aa6e6e567ef69da96ca7e328 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3776/index.html
_______________________________________________
igt-dev mailing list
igt-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/igt-dev

^ permalink raw reply	[flat|nested] 11+ messages in thread

end of thread, other threads:[~2019-11-29 15:14 UTC | newest]

Thread overview: 11+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2019-11-28  9:12 [igt-dev] [PATCH i-g-t] lib/rendercopy_gen9: Set rw domains to zero for GEN12 Mika Kahola
2019-11-28  9:16 ` Chris Wilson
2019-11-28 10:32   ` Imre Deak
2019-11-28 10:39     ` Chris Wilson
2019-11-28 10:45       ` Kahola, Mika
2019-11-28 10:58       ` Imre Deak
2019-11-28 10:24 ` [igt-dev] ✗ GitLab.Pipeline: warning for " Patchwork
2019-11-28 11:08   ` Petri Latvala
2019-11-28 12:50     ` Arkadiusz Hiler
2019-11-28 10:39 ` [igt-dev] ✓ Fi.CI.BAT: success " Patchwork
2019-11-29 15:14 ` [igt-dev] ✗ Fi.CI.IGT: failure " Patchwork

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