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From: <mikita.lipski@amd.com>
To: <amd-gfx@lists.freedesktop.org>
Cc: David Francis <David.Francis@amd.com>,
	Mikita Lipski <mikita.lipski@amd.com>,
	dri-devel@lists.freedesktop.org
Subject: [PATCH v8 01/17] drm/dp_mst: Add PBN calculation for DSC modes
Date: Tue, 3 Dec 2019 09:35:14 -0500	[thread overview]
Message-ID: <20191203143530.27262-2-mikita.lipski@amd.com> (raw)
In-Reply-To: <20191203143530.27262-1-mikita.lipski@amd.com>

From: David Francis <David.Francis@amd.com>

With DSC, bpp can be fractional in multiples of 1/16.

Change drm_dp_calc_pbn_mode to reflect this, adding a new
parameter bool dsc. When this parameter is true, treat the
bpp parameter as having units not of bits per pixel, but
1/16 of a bit per pixel

v2: Don't add separate function for this

v3: Keep the calculation in a single equation

Cc: Lyude Paul <lyude@redhat.com>
Reviewed-by: Manasi Navare <manasi.d.navare@intel.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>
Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: David Francis <David.Francis@amd.com>
Signed-off-by: Mikita Lipski <mikita.lipski@amd.com>
---
 .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c |  2 +-
 drivers/gpu/drm/drm_dp_mst_topology.c         | 38 ++++++++++++++++++-
 drivers/gpu/drm/i915/display/intel_dp_mst.c   |  3 +-
 drivers/gpu/drm/nouveau/dispnv50/disp.c       |  2 +-
 drivers/gpu/drm/radeon/radeon_dp_mst.c        |  2 +-
 include/drm/drm_dp_mst_helper.h               |  3 +-
 6 files changed, 43 insertions(+), 7 deletions(-)

diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
index 455c51c38720..9fc03fc1017d 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
@@ -4967,7 +4967,7 @@ static int dm_encoder_helper_atomic_check(struct drm_encoder *encoder,
 								    is_y420);
 		bpp = convert_dc_color_depth_into_bpc(color_depth) * 3;
 		clock = adjusted_mode->clock;
-		dm_new_connector_state->pbn = drm_dp_calc_pbn_mode(clock, bpp);
+		dm_new_connector_state->pbn = drm_dp_calc_pbn_mode(clock, bpp, false);
 	}
 	dm_new_connector_state->vcpi_slots = drm_dp_atomic_find_vcpi_slots(state,
 									   mst_mgr,
diff --git a/drivers/gpu/drm/drm_dp_mst_topology.c b/drivers/gpu/drm/drm_dp_mst_topology.c
index ae5809a1f19a..261e2c1828c6 100644
--- a/drivers/gpu/drm/drm_dp_mst_topology.c
+++ b/drivers/gpu/drm/drm_dp_mst_topology.c
@@ -4342,10 +4342,11 @@ EXPORT_SYMBOL(drm_dp_check_act_status);
  * drm_dp_calc_pbn_mode() - Calculate the PBN for a mode.
  * @clock: dot clock for the mode
  * @bpp: bpp for the mode.
+ * @dsc: DSC mode. If true, bpp has units of 1/16 of a bit per pixel
  *
  * This uses the formula in the spec to calculate the PBN value for a mode.
  */
-int drm_dp_calc_pbn_mode(int clock, int bpp)
+int drm_dp_calc_pbn_mode(int clock, int bpp, bool dsc)
 {
 	/*
 	 * margin 5300ppm + 300ppm ~ 0.6% as per spec, factor is 1.006
@@ -4356,12 +4357,47 @@ int drm_dp_calc_pbn_mode(int clock, int bpp)
 	 * peak_kbps *= (1006/1000)
 	 * peak_kbps *= (64/54)
 	 * peak_kbps *= 8    convert to bytes
+	 *
+	 * If the bpp is in units of 1/16, further divide by 16. Put this
+	 * factor in the numerator rather than the denominator to avoid
+	 * integer overflow
 	 */
+
+	if (dsc)
+		return DIV_ROUND_UP_ULL(mul_u32_u32(clock * bpp, 64 * 1006 / 16),
+					8 * 54 * 1000 * 1000);
+
 	return DIV_ROUND_UP_ULL(mul_u32_u32(clock * bpp, 64 * 1006),
 				8 * 54 * 1000 * 1000);
+
 }
 EXPORT_SYMBOL(drm_dp_calc_pbn_mode);
 
+static int test_calc_pbn_mode(void)
+{
+	int ret;
+	ret = drm_dp_calc_pbn_mode(154000, 30, false);
+	if (ret != 689) {
+		DRM_ERROR("PBN calculation test failed - clock %d, bpp %d, expected PBN %d, actual PBN %d.\n",
+				154000, 30, 689, ret);
+		return -EINVAL;
+	}
+	ret = drm_dp_calc_pbn_mode(234000, 30, false);
+	if (ret != 1047) {
+		DRM_ERROR("PBN calculation test failed - clock %d, bpp %d, expected PBN %d, actual PBN %d.\n",
+				234000, 30, 1047, ret);
+		return -EINVAL;
+	}
+	ret = drm_dp_calc_pbn_mode(297000, 24, false);
+	if (ret != 1063) {
+		DRM_ERROR("PBN calculation test failed - clock %d, bpp %d, expected PBN %d, actual PBN %d.\n",
+				297000, 24, 1063, ret);
+		return -EINVAL;
+	}
+	return 0;
+}
+
+
 /* we want to kick the TX after we've ack the up/down IRQs. */
 static void drm_dp_mst_kick_tx(struct drm_dp_mst_topology_mgr *mgr)
 {
diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c b/drivers/gpu/drm/i915/display/intel_dp_mst.c
index 03d1cba0b696..92be17711287 100644
--- a/drivers/gpu/drm/i915/display/intel_dp_mst.c
+++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c
@@ -61,7 +61,8 @@ static int intel_dp_mst_compute_link_config(struct intel_encoder *encoder,
 		crtc_state->pipe_bpp = bpp;
 
 		crtc_state->pbn = drm_dp_calc_pbn_mode(adjusted_mode->crtc_clock,
-						       crtc_state->pipe_bpp);
+						       crtc_state->pipe_bpp,
+						       false);
 
 		slots = drm_dp_atomic_find_vcpi_slots(state, &intel_dp->mst_mgr,
 						      port, crtc_state->pbn);
diff --git a/drivers/gpu/drm/nouveau/dispnv50/disp.c b/drivers/gpu/drm/nouveau/dispnv50/disp.c
index 549486f1d937..1c9e23d5a6fd 100644
--- a/drivers/gpu/drm/nouveau/dispnv50/disp.c
+++ b/drivers/gpu/drm/nouveau/dispnv50/disp.c
@@ -782,7 +782,7 @@ nv50_msto_atomic_check(struct drm_encoder *encoder,
 			const int bpp = connector->display_info.bpc * 3;
 			const int clock = crtc_state->adjusted_mode.clock;
 
-			asyh->dp.pbn = drm_dp_calc_pbn_mode(clock, bpp);
+			asyh->dp.pbn = drm_dp_calc_pbn_mode(clock, bpp, false);
 		}
 
 		slots = drm_dp_atomic_find_vcpi_slots(state, &mstm->mgr,
diff --git a/drivers/gpu/drm/radeon/radeon_dp_mst.c b/drivers/gpu/drm/radeon/radeon_dp_mst.c
index ee28f5b3785e..28eef9282874 100644
--- a/drivers/gpu/drm/radeon/radeon_dp_mst.c
+++ b/drivers/gpu/drm/radeon/radeon_dp_mst.c
@@ -518,7 +518,7 @@ static bool radeon_mst_mode_fixup(struct drm_encoder *encoder,
 
 	mst_enc = radeon_encoder->enc_priv;
 
-	mst_enc->pbn = drm_dp_calc_pbn_mode(adjusted_mode->clock, bpp);
+	mst_enc->pbn = drm_dp_calc_pbn_mode(adjusted_mode->clock, bpp, false);
 
 	mst_enc->primary->active_device = mst_enc->primary->devices & mst_enc->connector->devices;
 	DRM_DEBUG_KMS("setting active device to %08x from %08x %08x for encoder %d\n",
diff --git a/include/drm/drm_dp_mst_helper.h b/include/drm/drm_dp_mst_helper.h
index d5fc90b30487..68656913cfe5 100644
--- a/include/drm/drm_dp_mst_helper.h
+++ b/include/drm/drm_dp_mst_helper.h
@@ -719,8 +719,7 @@ bool drm_dp_mst_port_has_audio(struct drm_dp_mst_topology_mgr *mgr,
 struct edid *drm_dp_mst_get_edid(struct drm_connector *connector, struct drm_dp_mst_topology_mgr *mgr, struct drm_dp_mst_port *port);
 
 
-int drm_dp_calc_pbn_mode(int clock, int bpp);
-
+int drm_dp_calc_pbn_mode(int clock, int bpp, bool dsc);
 
 bool drm_dp_mst_allocate_vcpi(struct drm_dp_mst_topology_mgr *mgr,
 			      struct drm_dp_mst_port *port, int pbn, int slots);
-- 
2.17.1

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dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel

WARNING: multiple messages have this Message-ID (diff)
From: <mikita.lipski@amd.com>
To: <amd-gfx@lists.freedesktop.org>
Cc: David Francis <David.Francis@amd.com>,
	Mikita Lipski <mikita.lipski@amd.com>,
	dri-devel@lists.freedesktop.org
Subject: [PATCH v8 01/17] drm/dp_mst: Add PBN calculation for DSC modes
Date: Tue, 3 Dec 2019 09:35:14 -0500	[thread overview]
Message-ID: <20191203143530.27262-2-mikita.lipski@amd.com> (raw)
In-Reply-To: <20191203143530.27262-1-mikita.lipski@amd.com>

From: David Francis <David.Francis@amd.com>

With DSC, bpp can be fractional in multiples of 1/16.

Change drm_dp_calc_pbn_mode to reflect this, adding a new
parameter bool dsc. When this parameter is true, treat the
bpp parameter as having units not of bits per pixel, but
1/16 of a bit per pixel

v2: Don't add separate function for this

v3: Keep the calculation in a single equation

Cc: Lyude Paul <lyude@redhat.com>
Reviewed-by: Manasi Navare <manasi.d.navare@intel.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>
Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: David Francis <David.Francis@amd.com>
Signed-off-by: Mikita Lipski <mikita.lipski@amd.com>
---
 .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c |  2 +-
 drivers/gpu/drm/drm_dp_mst_topology.c         | 38 ++++++++++++++++++-
 drivers/gpu/drm/i915/display/intel_dp_mst.c   |  3 +-
 drivers/gpu/drm/nouveau/dispnv50/disp.c       |  2 +-
 drivers/gpu/drm/radeon/radeon_dp_mst.c        |  2 +-
 include/drm/drm_dp_mst_helper.h               |  3 +-
 6 files changed, 43 insertions(+), 7 deletions(-)

diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
index 455c51c38720..9fc03fc1017d 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
@@ -4967,7 +4967,7 @@ static int dm_encoder_helper_atomic_check(struct drm_encoder *encoder,
 								    is_y420);
 		bpp = convert_dc_color_depth_into_bpc(color_depth) * 3;
 		clock = adjusted_mode->clock;
-		dm_new_connector_state->pbn = drm_dp_calc_pbn_mode(clock, bpp);
+		dm_new_connector_state->pbn = drm_dp_calc_pbn_mode(clock, bpp, false);
 	}
 	dm_new_connector_state->vcpi_slots = drm_dp_atomic_find_vcpi_slots(state,
 									   mst_mgr,
diff --git a/drivers/gpu/drm/drm_dp_mst_topology.c b/drivers/gpu/drm/drm_dp_mst_topology.c
index ae5809a1f19a..261e2c1828c6 100644
--- a/drivers/gpu/drm/drm_dp_mst_topology.c
+++ b/drivers/gpu/drm/drm_dp_mst_topology.c
@@ -4342,10 +4342,11 @@ EXPORT_SYMBOL(drm_dp_check_act_status);
  * drm_dp_calc_pbn_mode() - Calculate the PBN for a mode.
  * @clock: dot clock for the mode
  * @bpp: bpp for the mode.
+ * @dsc: DSC mode. If true, bpp has units of 1/16 of a bit per pixel
  *
  * This uses the formula in the spec to calculate the PBN value for a mode.
  */
-int drm_dp_calc_pbn_mode(int clock, int bpp)
+int drm_dp_calc_pbn_mode(int clock, int bpp, bool dsc)
 {
 	/*
 	 * margin 5300ppm + 300ppm ~ 0.6% as per spec, factor is 1.006
@@ -4356,12 +4357,47 @@ int drm_dp_calc_pbn_mode(int clock, int bpp)
 	 * peak_kbps *= (1006/1000)
 	 * peak_kbps *= (64/54)
 	 * peak_kbps *= 8    convert to bytes
+	 *
+	 * If the bpp is in units of 1/16, further divide by 16. Put this
+	 * factor in the numerator rather than the denominator to avoid
+	 * integer overflow
 	 */
+
+	if (dsc)
+		return DIV_ROUND_UP_ULL(mul_u32_u32(clock * bpp, 64 * 1006 / 16),
+					8 * 54 * 1000 * 1000);
+
 	return DIV_ROUND_UP_ULL(mul_u32_u32(clock * bpp, 64 * 1006),
 				8 * 54 * 1000 * 1000);
+
 }
 EXPORT_SYMBOL(drm_dp_calc_pbn_mode);
 
+static int test_calc_pbn_mode(void)
+{
+	int ret;
+	ret = drm_dp_calc_pbn_mode(154000, 30, false);
+	if (ret != 689) {
+		DRM_ERROR("PBN calculation test failed - clock %d, bpp %d, expected PBN %d, actual PBN %d.\n",
+				154000, 30, 689, ret);
+		return -EINVAL;
+	}
+	ret = drm_dp_calc_pbn_mode(234000, 30, false);
+	if (ret != 1047) {
+		DRM_ERROR("PBN calculation test failed - clock %d, bpp %d, expected PBN %d, actual PBN %d.\n",
+				234000, 30, 1047, ret);
+		return -EINVAL;
+	}
+	ret = drm_dp_calc_pbn_mode(297000, 24, false);
+	if (ret != 1063) {
+		DRM_ERROR("PBN calculation test failed - clock %d, bpp %d, expected PBN %d, actual PBN %d.\n",
+				297000, 24, 1063, ret);
+		return -EINVAL;
+	}
+	return 0;
+}
+
+
 /* we want to kick the TX after we've ack the up/down IRQs. */
 static void drm_dp_mst_kick_tx(struct drm_dp_mst_topology_mgr *mgr)
 {
diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c b/drivers/gpu/drm/i915/display/intel_dp_mst.c
index 03d1cba0b696..92be17711287 100644
--- a/drivers/gpu/drm/i915/display/intel_dp_mst.c
+++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c
@@ -61,7 +61,8 @@ static int intel_dp_mst_compute_link_config(struct intel_encoder *encoder,
 		crtc_state->pipe_bpp = bpp;
 
 		crtc_state->pbn = drm_dp_calc_pbn_mode(adjusted_mode->crtc_clock,
-						       crtc_state->pipe_bpp);
+						       crtc_state->pipe_bpp,
+						       false);
 
 		slots = drm_dp_atomic_find_vcpi_slots(state, &intel_dp->mst_mgr,
 						      port, crtc_state->pbn);
diff --git a/drivers/gpu/drm/nouveau/dispnv50/disp.c b/drivers/gpu/drm/nouveau/dispnv50/disp.c
index 549486f1d937..1c9e23d5a6fd 100644
--- a/drivers/gpu/drm/nouveau/dispnv50/disp.c
+++ b/drivers/gpu/drm/nouveau/dispnv50/disp.c
@@ -782,7 +782,7 @@ nv50_msto_atomic_check(struct drm_encoder *encoder,
 			const int bpp = connector->display_info.bpc * 3;
 			const int clock = crtc_state->adjusted_mode.clock;
 
-			asyh->dp.pbn = drm_dp_calc_pbn_mode(clock, bpp);
+			asyh->dp.pbn = drm_dp_calc_pbn_mode(clock, bpp, false);
 		}
 
 		slots = drm_dp_atomic_find_vcpi_slots(state, &mstm->mgr,
diff --git a/drivers/gpu/drm/radeon/radeon_dp_mst.c b/drivers/gpu/drm/radeon/radeon_dp_mst.c
index ee28f5b3785e..28eef9282874 100644
--- a/drivers/gpu/drm/radeon/radeon_dp_mst.c
+++ b/drivers/gpu/drm/radeon/radeon_dp_mst.c
@@ -518,7 +518,7 @@ static bool radeon_mst_mode_fixup(struct drm_encoder *encoder,
 
 	mst_enc = radeon_encoder->enc_priv;
 
-	mst_enc->pbn = drm_dp_calc_pbn_mode(adjusted_mode->clock, bpp);
+	mst_enc->pbn = drm_dp_calc_pbn_mode(adjusted_mode->clock, bpp, false);
 
 	mst_enc->primary->active_device = mst_enc->primary->devices & mst_enc->connector->devices;
 	DRM_DEBUG_KMS("setting active device to %08x from %08x %08x for encoder %d\n",
diff --git a/include/drm/drm_dp_mst_helper.h b/include/drm/drm_dp_mst_helper.h
index d5fc90b30487..68656913cfe5 100644
--- a/include/drm/drm_dp_mst_helper.h
+++ b/include/drm/drm_dp_mst_helper.h
@@ -719,8 +719,7 @@ bool drm_dp_mst_port_has_audio(struct drm_dp_mst_topology_mgr *mgr,
 struct edid *drm_dp_mst_get_edid(struct drm_connector *connector, struct drm_dp_mst_topology_mgr *mgr, struct drm_dp_mst_port *port);
 
 
-int drm_dp_calc_pbn_mode(int clock, int bpp);
-
+int drm_dp_calc_pbn_mode(int clock, int bpp, bool dsc);
 
 bool drm_dp_mst_allocate_vcpi(struct drm_dp_mst_topology_mgr *mgr,
 			      struct drm_dp_mst_port *port, int pbn, int slots);
-- 
2.17.1

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https://lists.freedesktop.org/mailman/listinfo/amd-gfx

  reply	other threads:[~2019-12-03 14:35 UTC|newest]

Thread overview: 70+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-12-03 14:35 [PATCH v8 00/17] DSC MST support for DRM and AMDGPU mikita.lipski
2019-12-03 14:35 ` mikita.lipski
2019-12-03 14:35 ` mikita.lipski [this message]
2019-12-03 14:35   ` [PATCH v8 01/17] drm/dp_mst: Add PBN calculation for DSC modes mikita.lipski
2019-12-06  0:22   ` kbuild test robot
2019-12-06  0:22     ` kbuild test robot
2019-12-06  0:22     ` kbuild test robot
2019-12-07  0:17   ` Lyude Paul
2019-12-07  0:17     ` Lyude Paul
2019-12-07 22:13     ` Lipski, Mikita
2019-12-07 22:13       ` Lipski, Mikita
2019-12-03 14:35 ` [PATCH v8 02/17] drm/dp_mst: Parse FEC capability on MST ports mikita.lipski
2019-12-03 14:35   ` mikita.lipski
2019-12-03 21:09   ` kbuild test robot
2019-12-03 21:09     ` kbuild test robot
2019-12-03 21:09     ` kbuild test robot
2019-12-03 14:35 ` [PATCH v8 03/17] drm/dp_mst: Add MST support to DP DPCD R/W functions mikita.lipski
2019-12-03 14:35   ` mikita.lipski
2019-12-03 14:35 ` [PATCH v8 04/17] drm/dp_mst: Fill branch->num_ports mikita.lipski
2019-12-03 14:35   ` mikita.lipski
2019-12-06  4:30   ` Harry Wentland
2019-12-06  4:30     ` Harry Wentland
2019-12-03 14:35 ` [PATCH v8 05/17] drm/dp_mst: Add helpers for MST DSC and virtual DPCD aux mikita.lipski
2019-12-03 14:35   ` mikita.lipski
2019-12-03 14:35 ` [PATCH v8 06/17] drm/dp_mst: Add new quirk for Synaptics MST hubs mikita.lipski
2019-12-03 14:35   ` mikita.lipski
2019-12-03 14:35 ` [PATCH v8 07/17] drm/amd/display: Initialize DSC PPS variables to 0 mikita.lipski
2019-12-03 14:35   ` mikita.lipski
2019-12-03 14:35 ` [PATCH v8 08/17] drm/amd/display: Validate DSC caps on MST endpoints mikita.lipski
2019-12-03 14:35   ` mikita.lipski
2019-12-03 14:35 ` [PATCH v8 09/17] drm/amd/display: Write DSC enable to MST DPCD mikita.lipski
2019-12-03 14:35   ` mikita.lipski
2019-12-03 14:35 ` [PATCH v8 10/17] drm/dp_mst: Manually overwrite PBN divider for calculating timeslots mikita.lipski
2019-12-03 14:35   ` mikita.lipski
2019-12-03 14:35 ` [PATCH v8 11/17] drm/dp_mst: Add DSC enablement helpers to DRM mikita.lipski
2019-12-03 14:35   ` mikita.lipski
2019-12-03 21:52   ` kbuild test robot
2019-12-03 21:52     ` kbuild test robot
2019-12-03 21:52     ` kbuild test robot
2019-12-07  0:24   ` Lyude Paul
2019-12-07  0:24     ` Lyude Paul
2019-12-09 14:07     ` Mikita Lipski
2019-12-09 14:07       ` Mikita Lipski
2019-12-03 14:35 ` [PATCH v8 12/17] drm/dp_mst: Add branch bandwidth validation to MST atomic check mikita.lipski
2019-12-03 14:35   ` mikita.lipski
2019-12-05 19:28   ` Harry Wentland
2019-12-05 19:28     ` Harry Wentland
2019-12-07  0:30   ` Lyude Paul
2019-12-07  0:30     ` Lyude Paul
2019-12-03 14:35 ` [PATCH v8 13/17] drm/amd/display: Add PBN per slot calculation for DSC mikita.lipski
2019-12-03 14:35   ` mikita.lipski
2019-12-03 14:35 ` [PATCH v8 14/17] drm/amd/display: MST DSC compute fair share mikita.lipski
2019-12-03 14:35   ` mikita.lipski
2019-12-07  0:53   ` Lyude Paul
2019-12-07  0:53     ` Lyude Paul
2019-12-03 14:35 ` [PATCH v8 15/17] drm/amd/display: Recalculate VCPI slots for new DSC connectors mikita.lipski
2019-12-03 14:35   ` mikita.lipski
2019-12-07  0:52   ` Lyude Paul
2019-12-07  0:52     ` Lyude Paul
2019-12-03 14:35 ` [PATCH v8 16/17] drm/dp_mst: Add helper to trigger modeset on affected DSC MST CRTCs mikita.lipski
2019-12-03 14:35   ` mikita.lipski
2019-12-03 22:40   ` kbuild test robot
2019-12-03 22:40     ` kbuild test robot
2019-12-03 22:40     ` kbuild test robot
2019-12-07  0:51   ` Lyude Paul
2019-12-07  0:51     ` Lyude Paul
2019-12-03 14:35 ` [PATCH v8 17/17] drm/amd/display: Trigger modesets on MST DSC connectors mikita.lipski
2019-12-03 14:35   ` mikita.lipski
2019-12-07  0:53   ` Lyude Paul
2019-12-07  0:53     ` Lyude Paul

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