From: Andrew Murray <andrew.murray@arm.com> To: Eric Auger <eric.auger@redhat.com> Cc: eric.auger.pro@gmail.com, maz@kernel.org, linux-kernel@vger.kernel.org, kvmarm@lists.cs.columbia.edu, james.morse@arm.com, suzuki.poulose@arm.com, drjones@redhat.com Subject: Re: [RFC 1/3] KVM: arm64: pmu: Don't increment SW_INCR if PMCR.E is unset Date: Fri, 6 Dec 2019 10:35:05 +0000 [thread overview] Message-ID: <20191206103505.GM18399@e119886-lin.cambridge.arm.com> (raw) In-Reply-To: <20191204204426.9628-2-eric.auger@redhat.com> On Wed, Dec 04, 2019 at 09:44:24PM +0100, Eric Auger wrote: > The specification says PMSWINC increments PMEVCNTR<n>_EL1 by 1 > if PMEVCNTR<n>_EL0 is enabled and configured to count SW_INCR. > > For PMEVCNTR<n>_EL0 to be enabled, we need both PMCNTENSET to > be set for the corresponding event counter but we also need > the PMCR.E bit to be set. > > Fixes: 7a0adc7064b8 ("arm64: KVM: Add access handler for PMSWINC register") > Signed-off-by: Eric Auger <eric.auger@redhat.com> > --- > virt/kvm/arm/pmu.c | 3 +++ > 1 file changed, 3 insertions(+) > > diff --git a/virt/kvm/arm/pmu.c b/virt/kvm/arm/pmu.c > index 8731dfeced8b..c3f8b059881e 100644 > --- a/virt/kvm/arm/pmu.c > +++ b/virt/kvm/arm/pmu.c > @@ -486,6 +486,9 @@ void kvm_pmu_software_increment(struct kvm_vcpu *vcpu, u64 val) > if (val == 0) > return; > > + if (!(__vcpu_sys_reg(vcpu, PMCR_EL0) & ARMV8_PMU_PMCR_E)) > + return; > + Reviewed-by: Andrew Murray <andrew.murray@arm.com> > enable = __vcpu_sys_reg(vcpu, PMCNTENSET_EL0); > for (i = 0; i < ARMV8_PMU_CYCLE_IDX; i++) { > if (!(val & BIT(i))) > -- > 2.20.1 >
WARNING: multiple messages have this Message-ID (diff)
From: Andrew Murray <andrew.murray@arm.com> To: Eric Auger <eric.auger@redhat.com> Cc: maz@kernel.org, linux-kernel@vger.kernel.org, kvmarm@lists.cs.columbia.edu, eric.auger.pro@gmail.com Subject: Re: [RFC 1/3] KVM: arm64: pmu: Don't increment SW_INCR if PMCR.E is unset Date: Fri, 6 Dec 2019 10:35:05 +0000 [thread overview] Message-ID: <20191206103505.GM18399@e119886-lin.cambridge.arm.com> (raw) In-Reply-To: <20191204204426.9628-2-eric.auger@redhat.com> On Wed, Dec 04, 2019 at 09:44:24PM +0100, Eric Auger wrote: > The specification says PMSWINC increments PMEVCNTR<n>_EL1 by 1 > if PMEVCNTR<n>_EL0 is enabled and configured to count SW_INCR. > > For PMEVCNTR<n>_EL0 to be enabled, we need both PMCNTENSET to > be set for the corresponding event counter but we also need > the PMCR.E bit to be set. > > Fixes: 7a0adc7064b8 ("arm64: KVM: Add access handler for PMSWINC register") > Signed-off-by: Eric Auger <eric.auger@redhat.com> > --- > virt/kvm/arm/pmu.c | 3 +++ > 1 file changed, 3 insertions(+) > > diff --git a/virt/kvm/arm/pmu.c b/virt/kvm/arm/pmu.c > index 8731dfeced8b..c3f8b059881e 100644 > --- a/virt/kvm/arm/pmu.c > +++ b/virt/kvm/arm/pmu.c > @@ -486,6 +486,9 @@ void kvm_pmu_software_increment(struct kvm_vcpu *vcpu, u64 val) > if (val == 0) > return; > > + if (!(__vcpu_sys_reg(vcpu, PMCR_EL0) & ARMV8_PMU_PMCR_E)) > + return; > + Reviewed-by: Andrew Murray <andrew.murray@arm.com> > enable = __vcpu_sys_reg(vcpu, PMCNTENSET_EL0); > for (i = 0; i < ARMV8_PMU_CYCLE_IDX; i++) { > if (!(val & BIT(i))) > -- > 2.20.1 > _______________________________________________ kvmarm mailing list kvmarm@lists.cs.columbia.edu https://lists.cs.columbia.edu/mailman/listinfo/kvmarm
next prev parent reply other threads:[~2019-12-06 10:35 UTC|newest] Thread overview: 38+ messages / expand[flat|nested] mbox.gz Atom feed top 2019-12-04 20:44 [RFC 0/3] KVM/ARM: Misc PMU fixes Eric Auger 2019-12-04 20:44 ` Eric Auger 2019-12-04 20:44 ` [RFC 1/3] KVM: arm64: pmu: Don't increment SW_INCR if PMCR.E is unset Eric Auger 2019-12-04 20:44 ` Eric Auger 2019-12-05 9:54 ` Marc Zyngier 2019-12-05 9:54 ` Marc Zyngier 2019-12-06 10:35 ` Andrew Murray [this message] 2019-12-06 10:35 ` Andrew Murray 2019-12-04 20:44 ` [RFC 2/3] KVM: arm64: pmu: Fix chained SW_INCR counters Eric Auger 2019-12-04 20:44 ` Eric Auger 2019-12-05 9:43 ` Marc Zyngier 2019-12-05 9:43 ` Marc Zyngier 2019-12-05 14:06 ` Auger Eric 2019-12-05 14:06 ` Auger Eric 2019-12-05 14:52 ` Marc Zyngier 2019-12-05 14:52 ` Marc Zyngier 2019-12-05 19:01 ` Auger Eric 2019-12-05 19:01 ` Auger Eric 2019-12-06 9:56 ` Auger Eric 2019-12-06 9:56 ` Auger Eric 2019-12-06 15:48 ` Andrew Murray 2019-12-06 15:48 ` Andrew Murray 2020-01-19 17:58 ` Marc Zyngier 2020-01-19 17:58 ` Marc Zyngier 2020-01-20 13:30 ` Auger Eric 2020-01-20 13:30 ` Auger Eric 2019-12-06 15:21 ` Andrew Murray 2019-12-06 15:21 ` Andrew Murray 2019-12-06 15:35 ` Marc Zyngier 2019-12-06 15:35 ` Marc Zyngier 2019-12-06 16:02 ` Andrew Murray 2019-12-06 16:02 ` Andrew Murray 2019-12-04 20:44 ` [RFC 3/3] KVM: arm64: pmu: Enforce PMEVTYPER evtCount size Eric Auger 2019-12-04 20:44 ` Eric Auger 2019-12-05 9:02 ` Will Deacon 2019-12-05 9:02 ` Will Deacon 2019-12-05 9:37 ` Auger Eric 2019-12-05 9:37 ` Auger Eric
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