* [Intel-gfx] [PATCH 1/5] drm/i915/gem: Flush the pwrite through the chipset before signaling
@ 2019-12-06 10:55 Chris Wilson
2019-12-06 10:55 ` [Intel-gfx] [PATCH 2/5] drm/i915: Claim vma while under closed_lock in i915_vma_parked() Chris Wilson
` (7 more replies)
0 siblings, 8 replies; 14+ messages in thread
From: Chris Wilson @ 2019-12-06 10:55 UTC (permalink / raw)
To: intel-gfx; +Cc: matthew.auld
Before we signal the fence to indicate completion, ensure the pwrite
through the indirect GGTT is coherent (as best as we know) in memory.
Any listeners to the fence may start immediately and sample from the
backing store prior to the writes being posted, thus seeing stale data.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
---
drivers/gpu/drm/i915/i915_gem.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 98b65b718e1a..919d3a723c50 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -670,11 +670,12 @@ i915_gem_gtt_pwrite_fast(struct drm_i915_gem_object *obj,
user_data += page_length;
offset += page_length;
}
+
+ intel_gt_flush_ggtt_writes(ggtt->vm.gt);
intel_frontbuffer_flush(obj->frontbuffer, ORIGIN_CPU);
i915_gem_object_unlock_fence(obj, fence);
out_unpin:
- intel_gt_flush_ggtt_writes(ggtt->vm.gt);
if (drm_mm_node_allocated(&node)) {
ggtt->vm.clear_range(&ggtt->vm, node.start, node.size);
remove_mappable_node(ggtt, &node);
--
2.24.0
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https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 14+ messages in thread
* [Intel-gfx] [PATCH 2/5] drm/i915: Claim vma while under closed_lock in i915_vma_parked()
2019-12-06 10:55 [Intel-gfx] [PATCH 1/5] drm/i915/gem: Flush the pwrite through the chipset before signaling Chris Wilson
@ 2019-12-06 10:55 ` Chris Wilson
2019-12-06 10:55 ` [Intel-gfx] [PATCH 3/5] drm/i915/gt: Acquire a GT wakeref for the breadcrumb interrupt Chris Wilson
` (6 subsequent siblings)
7 siblings, 0 replies; 14+ messages in thread
From: Chris Wilson @ 2019-12-06 10:55 UTC (permalink / raw)
To: intel-gfx; +Cc: matthew.auld
Remove the vma we wish to destroy from the gt->closed_list to avoid
having two i915_vma_parked() try and free it.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
---
drivers/gpu/drm/i915/i915_vma.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/i915_vma.c b/drivers/gpu/drm/i915/i915_vma.c
index 6db35b9dead8..9ca6664c190c 100644
--- a/drivers/gpu/drm/i915/i915_vma.c
+++ b/drivers/gpu/drm/i915/i915_vma.c
@@ -1053,7 +1053,9 @@ void i915_vma_parked(struct intel_gt *gt)
if (!kref_get_unless_zero(&obj->base.refcount))
continue;
- if (!i915_vm_tryopen(vm)) {
+ if (i915_vm_tryopen(vm)) {
+ list_del_init(&vma->closed_link);
+ } else {
i915_gem_object_put(obj);
obj = NULL;
}
--
2.24.0
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^ permalink raw reply related [flat|nested] 14+ messages in thread
* [Intel-gfx] [PATCH 3/5] drm/i915/gt: Acquire a GT wakeref for the breadcrumb interrupt
2019-12-06 10:55 [Intel-gfx] [PATCH 1/5] drm/i915/gem: Flush the pwrite through the chipset before signaling Chris Wilson
2019-12-06 10:55 ` [Intel-gfx] [PATCH 2/5] drm/i915: Claim vma while under closed_lock in i915_vma_parked() Chris Wilson
@ 2019-12-06 10:55 ` Chris Wilson
2019-12-06 10:55 ` [Intel-gfx] [PATCH 4/5] drm/i915/gem: Pin gen6_ppgtt prior to constructing the request Chris Wilson
` (5 subsequent siblings)
7 siblings, 0 replies; 14+ messages in thread
From: Chris Wilson @ 2019-12-06 10:55 UTC (permalink / raw)
To: intel-gfx; +Cc: matthew.auld
Take a wakeref on the intel_gt specifically for the enabled breadcrumb
interrupt so that we can safely process the mmio. If the intel_gt is
already asleep by the time we try and setup the breadcrumb interrupt, by
a process of elimination we know the request must have been completed
and we can skip its enablement!
<4> [1518.350005] Unclaimed write to register 0x220a8
<4> [1518.350323] WARNING: CPU: 2 PID: 3685 at drivers/gpu/drm/i915/intel_uncore.c:1163 __unclaimed_reg_debug+0x40/0x50 [i915]
<4> [1518.350393] Modules linked in: vgem snd_hda_codec_hdmi x86_pkg_temp_thermal i915 coretemp crct10dif_pclmul crc32_pclmul ghash_clmulni_intel snd_hda_intel snd_intel_dspcfg snd_hda_codec snd_hwdep snd_hda_core btusb cdc_ether btrtl usbnet btbcm btintel r8152 snd_pcm mii bluetooth ecdh_generic ecc i2c_hid pinctrl_sunrisepoint pinctrl_intel intel_lpss_pci prime_numbers [last unloaded: vgem]
<4> [1518.350646] CPU: 2 PID: 3685 Comm: gem_exec_parse_ Tainted: G U 5.4.0-rc8-CI-CI_DRM_7490+ #1
<4> [1518.350708] Hardware name: Google Caroline/Caroline, BIOS MrChromebox 08/27/2018
<4> [1518.350946] RIP: 0010:__unclaimed_reg_debug+0x40/0x50 [i915]
<4> [1518.350992] Code: 74 05 5b 5d 41 5c c3 45 84 e4 48 c7 c0 95 8d 47 a0 48 c7 c6 8b 8d 47 a0 48 0f 44 f0 89 ea 48 c7 c7 9e 8d 47 a0 e8 40 45 e3 e0 <0f> 0b 83 2d 27 4f 2a 00 01 5b 5d 41 5c c3 66 90 41 55 41 54 55 53
<4> [1518.351100] RSP: 0018:ffffc900007f39c8 EFLAGS: 00010086
<4> [1518.351140] RAX: 0000000000000000 RBX: 0000000000000000 RCX: 0000000000000006
<4> [1518.351202] RDX: 0000000080000006 RSI: 0000000000000000 RDI: 00000000ffffffff
<4> [1518.351249] RBP: 00000000000220a8 R08: 0000000000000000 R09: 0000000000000000
<4> [1518.351296] R10: ffffc900007f3990 R11: ffffc900007f3868 R12: 0000000000000000
<4> [1518.351342] R13: 00000000fefeffff R14: 0000000000000092 R15: ffff888155fea000
<4> [1518.351391] FS: 00007fc255abfe40(0000) GS:ffff88817ab00000(0000) knlGS:0000000000000000
<4> [1518.351445] CS: 0010 DS: 0000 ES: 0000 CR0: 0000000080050033
<4> [1518.351485] CR2: 00007fc2554882d0 CR3: 0000000168ca2005 CR4: 00000000003606e0
<4> [1518.351529] Call Trace:
<4> [1518.351746] fwtable_write32+0x114/0x1d0 [i915]
<4> [1518.351795] ? sync_file_alloc+0x80/0x80
<4> [1518.352039] gen8_logical_ring_enable_irq+0x30/0x50 [i915]
<4> [1518.352295] irq_enable.part.10+0x23/0x40 [i915]
<4> [1518.352523] i915_request_enable_breadcrumb+0xb5/0x330 [i915]
<4> [1518.352575] ? sync_file_alloc+0x80/0x80
<4> [1518.352612] __dma_fence_enable_signaling+0x60/0x160
<4> [1518.352653] ? sync_file_alloc+0x80/0x80
<4> [1518.352685] dma_fence_add_callback+0x44/0xd0
<4> [1518.352726] sync_file_poll+0x95/0xc0
<4> [1518.352767] do_sys_poll+0x24d/0x570
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
---
drivers/gpu/drm/i915/gt/intel_breadcrumbs.c | 22 +++++++++++++++------
1 file changed, 16 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_breadcrumbs.c b/drivers/gpu/drm/i915/gt/intel_breadcrumbs.c
index 55317081d48b..8a9facf4f3b6 100644
--- a/drivers/gpu/drm/i915/gt/intel_breadcrumbs.c
+++ b/drivers/gpu/drm/i915/gt/intel_breadcrumbs.c
@@ -28,6 +28,7 @@
#include "i915_drv.h"
#include "i915_trace.h"
+#include "intel_gt_pm.h"
static void irq_enable(struct intel_engine_cs *engine)
{
@@ -53,15 +54,17 @@ static void irq_disable(struct intel_engine_cs *engine)
static void __intel_breadcrumbs_disarm_irq(struct intel_breadcrumbs *b)
{
+ struct intel_engine_cs *engine =
+ container_of(b, struct intel_engine_cs, breadcrumbs);
+
lockdep_assert_held(&b->irq_lock);
GEM_BUG_ON(!b->irq_enabled);
if (!--b->irq_enabled)
- irq_disable(container_of(b,
- struct intel_engine_cs,
- breadcrumbs));
+ irq_disable(engine);
b->irq_armed = false;
+ intel_gt_pm_put_async(engine->gt);
}
void intel_engine_disarm_breadcrumbs(struct intel_engine_cs *engine)
@@ -207,14 +210,17 @@ static void signal_irq_work(struct irq_work *work)
intel_engine_breadcrumbs_irq(engine);
}
-static void __intel_breadcrumbs_arm_irq(struct intel_breadcrumbs *b)
+static bool __intel_breadcrumbs_arm_irq(struct intel_breadcrumbs *b)
{
struct intel_engine_cs *engine =
container_of(b, struct intel_engine_cs, breadcrumbs);
lockdep_assert_held(&b->irq_lock);
if (b->irq_armed)
- return;
+ return true;
+
+ if (!intel_gt_pm_get_if_awake(engine->gt))
+ return false;
/*
* The breadcrumb irq will be disarmed on the interrupt after the
@@ -234,6 +240,8 @@ static void __intel_breadcrumbs_arm_irq(struct intel_breadcrumbs *b)
if (!b->irq_enabled++)
irq_enable(engine);
+
+ return true;
}
void intel_engine_init_breadcrumbs(struct intel_engine_cs *engine)
@@ -277,7 +285,8 @@ bool i915_request_enable_breadcrumb(struct i915_request *rq)
spin_lock(&b->irq_lock);
GEM_BUG_ON(test_bit(I915_FENCE_FLAG_SIGNAL, &rq->fence.flags));
- __intel_breadcrumbs_arm_irq(b);
+ if (!__intel_breadcrumbs_arm_irq(b))
+ goto unlock;
/*
* We keep the seqno in retirement order, so we can break
@@ -306,6 +315,7 @@ bool i915_request_enable_breadcrumb(struct i915_request *rq)
GEM_BUG_ON(!check_signal_order(ce, rq));
set_bit(I915_FENCE_FLAG_SIGNAL, &rq->fence.flags);
+unlock:
spin_unlock(&b->irq_lock);
}
--
2.24.0
_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 14+ messages in thread
* [Intel-gfx] [PATCH 4/5] drm/i915/gem: Pin gen6_ppgtt prior to constructing the request
2019-12-06 10:55 [Intel-gfx] [PATCH 1/5] drm/i915/gem: Flush the pwrite through the chipset before signaling Chris Wilson
2019-12-06 10:55 ` [Intel-gfx] [PATCH 2/5] drm/i915: Claim vma while under closed_lock in i915_vma_parked() Chris Wilson
2019-12-06 10:55 ` [Intel-gfx] [PATCH 3/5] drm/i915/gt: Acquire a GT wakeref for the breadcrumb interrupt Chris Wilson
@ 2019-12-06 10:55 ` Chris Wilson
2019-12-06 23:31 ` Andi Shyti
2019-12-06 10:55 ` [Intel-gfx] [PATCH 5/5] drm/i915: Avoid calling i915_gem_object_unbind holding object lock Chris Wilson
` (4 subsequent siblings)
7 siblings, 1 reply; 14+ messages in thread
From: Chris Wilson @ 2019-12-06 10:55 UTC (permalink / raw)
To: intel-gfx; +Cc: matthew.auld
All pinning must be done prior to i915_request_create, to avoid
timeline->mutex inversions.
Here we slightly abuse the context_barrier_task stages to utilise the
'skip' decision as an opportunity to acquire the pin on the new ppgtt.
Consider it s/skip/prepare/. At the moment, we only have on user of
context_barrier_task, so it might be worth breaking it down for the
specific task of set-vm and refactor it later if we find a second
purpose.
<4> [402.377487] WARNING: possible circular locking dependency detected
<4> [402.377493] 5.4.0-rc8-CI-CI_DRM_7491+ #1 Tainted: G U
<4> [402.377497] ------------------------------------------------------
<4> [402.377502] gem_exec_parall/2506 is trying to acquire lock:
<4> [402.377507] ffff888403cdac70 (&kernel#2){+.+.}, at: i915_request_create+0x16/0x1c0 [i915]
<4> [402.377593]
but task is already holding lock:
<4> [402.377597] ffff88835efad550 (&ppgtt->pin_mutex){+.+.}, at: gen6_ppgtt_pin+0x4d/0x110 [i915]
<4> [402.377660]
which lock already depends on the new lock.
<4> [402.377664]
the existing dependency chain (in reverse order) is:
<4> [402.377668]
-> #1 (&ppgtt->pin_mutex){+.+.}:
<4> [402.377674] __mutex_lock+0x9a/0x9d0
<4> [402.377713] gen6_ppgtt_pin+0x4d/0x110 [i915]
<4> [402.377756] emit_ppgtt_update+0x1dc/0x370 [i915]
<4> [402.377801] context_barrier_task+0x176/0x310 [i915]
<4> [402.377844] ctx_setparam+0x400/0xb10 [i915]
<4> [402.377886] i915_gem_context_setparam_ioctl+0xc8/0x160 [i915]
<4> [402.377891] drm_ioctl_kernel+0xa7/0xf0
<4> [402.377895] drm_ioctl+0x2e1/0x390
<4> [402.377899] do_vfs_ioctl+0xa0/0x6f0
<4> [402.377903] ksys_ioctl+0x35/0x60
<4> [402.377906] __x64_sys_ioctl+0x11/0x20
<4> [402.377910] do_syscall_64+0x4f/0x210
<4> [402.377914] entry_SYSCALL_64_after_hwframe+0x49/0xbe
<4> [402.377917]
-> #0 (&kernel#2){+.+.}:
<4> [402.377923] __lock_acquire+0x1328/0x15d0
<4> [402.377926] lock_acquire+0xa7/0x1c0
<4> [402.377930] __mutex_lock+0x9a/0x9d0
<4> [402.377977] i915_request_create+0x16/0x1c0 [i915]
<4> [402.378013] intel_engine_flush_barriers+0x4c/0x100 [i915]
<4> [402.378062] i915_ggtt_pin+0x7d/0x130 [i915]
<4> [402.378108] gen6_ppgtt_pin+0x9c/0x110 [i915]
<4> [402.378148] ring_context_pin+0x2e/0xc0 [i915]
<4> [402.378183] __intel_context_do_pin+0x6b/0x190 [i915]
<4> [402.378226] i915_gem_do_execbuffer+0x180c/0x26b0 [i915]
<4> [402.378268] i915_gem_execbuffer2_ioctl+0x11b/0x460 [i915]
<4> [402.378272] drm_ioctl_kernel+0xa7/0xf0
<4> [402.378275] drm_ioctl+0x2e1/0x390
<4> [402.378279] do_vfs_ioctl+0xa0/0x6f0
<4> [402.378282] ksys_ioctl+0x35/0x60
<4> [402.378286] __x64_sys_ioctl+0x11/0x20
<4> [402.378289] do_syscall_64+0x4f/0x210
<4> [402.378292] entry_SYSCALL_64_after_hwframe+0x49/0xbe
<4> [402.378295]
other info that might help us debug this:
<4> [402.378299] Possible unsafe locking scenario:
<4> [402.378302] CPU0 CPU1
<4> [402.378305] ---- ----
<4> [402.378307] lock(&ppgtt->pin_mutex);
<4> [402.378310] lock(&kernel#2);
<4> [402.378314] lock(&ppgtt->pin_mutex);
<4> [402.378317] lock(&kernel#2);
<4> [402.378320]
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
---
drivers/gpu/drm/i915/gem/i915_gem_context.c | 18 +++++++++++++-----
1 file changed, 13 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_context.c b/drivers/gpu/drm/i915/gem/i915_gem_context.c
index 9f1dc96b10a6..9d8d75765ee4 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_context.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_context.c
@@ -1141,8 +1141,6 @@ static int emit_ppgtt_update(struct i915_request *rq, void *data)
*cs++ = MI_NOOP;
intel_ring_advance(rq, cs);
} else {
- /* ppGTT is not part of the legacy context image */
- gen6_ppgtt_pin(i915_vm_to_ppgtt(vm));
}
return 0;
@@ -1150,10 +1148,20 @@ static int emit_ppgtt_update(struct i915_request *rq, void *data)
static bool skip_ppgtt_update(struct intel_context *ce, void *data)
{
+ if (!test_bit(CONTEXT_ALLOC_BIT, &ce->flags))
+ return true;
+
if (HAS_LOGICAL_RING_CONTEXTS(ce->engine->i915))
- return !ce->state;
- else
- return !atomic_read(&ce->pin_count);
+ return false;
+
+ if (!atomic_read(&ce->pin_count))
+ return true;
+
+ /* ppGTT is not part of the legacy context image */
+ if (gen6_ppgtt_pin(i915_vm_to_ppgtt(ce->vm)))
+ return true;
+
+ return false;
}
static int set_ppgtt(struct drm_i915_file_private *file_priv,
--
2.24.0
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 14+ messages in thread
* [Intel-gfx] [PATCH 5/5] drm/i915: Avoid calling i915_gem_object_unbind holding object lock
2019-12-06 10:55 [Intel-gfx] [PATCH 1/5] drm/i915/gem: Flush the pwrite through the chipset before signaling Chris Wilson
` (2 preceding siblings ...)
2019-12-06 10:55 ` [Intel-gfx] [PATCH 4/5] drm/i915/gem: Pin gen6_ppgtt prior to constructing the request Chris Wilson
@ 2019-12-06 10:55 ` Chris Wilson
2019-12-07 0:03 ` Andi Shyti
2019-12-06 11:02 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/5] drm/i915/gem: Flush the pwrite through the chipset before signaling Patchwork
` (3 subsequent siblings)
7 siblings, 1 reply; 14+ messages in thread
From: Chris Wilson @ 2019-12-06 10:55 UTC (permalink / raw)
To: intel-gfx; +Cc: matthew.auld
In the extreme case, we may wish to wait on an rcu-barrier to reap stale
vm to purge the last of the object bindings. However, we are not allowed
to use rcu_barrier() beneath the dma_resv (i.e. object) lock and do not
take lightly the prospect of unlocking a mutex deep in the bowels of the
routine. i915_gem_object_unbind() itself does not need the object lock,
and it turns out the callers do not need to the unbind as part of a
locked sequence around set-cache-level, so rearrange the code to avoid
taking the object lock in the callers.
<4> [186.816311] ======================================================
<4> [186.816313] WARNING: possible circular locking dependency detected
<4> [186.816316] 5.4.0-rc8-CI-CI_DRM_7486+ #1 Tainted: G U
<4> [186.816318] ------------------------------------------------------
<4> [186.816320] perf_pmu/1321 is trying to acquire lock:
<4> [186.816322] ffff88849487c4d8 (&mm->mmap_sem#2){++++}, at: __might_fault+0x39/0x90
<4> [186.816331]
but task is already holding lock:
<4> [186.816333] ffffe8ffffa05008 (&cpuctx_mutex){+.+.}, at: perf_event_ctx_lock_nested+0xa9/0x1b0
<4> [186.816339]
which lock already depends on the new lock.
<4> [186.816341]
the existing dependency chain (in reverse order) is:
<4> [186.816343]
-> #6 (&cpuctx_mutex){+.+.}:
<4> [186.816349] __mutex_lock+0x9a/0x9d0
<4> [186.816352] perf_event_init_cpu+0xa4/0x140
<4> [186.816357] perf_event_init+0x19d/0x1cd
<4> [186.816362] start_kernel+0x372/0x4f4
<4> [186.816365] secondary_startup_64+0xa4/0xb0
<4> [186.816381]
-> #5 (pmus_lock){+.+.}:
<4> [186.816385] __mutex_lock+0x9a/0x9d0
<4> [186.816387] perf_event_init_cpu+0x6b/0x140
<4> [186.816404] cpuhp_invoke_callback+0x9b/0x9d0
<4> [186.816406] _cpu_up+0xa2/0x140
<4> [186.816409] do_cpu_up+0x61/0xa0
<4> [186.816411] smp_init+0x57/0x96
<4> [186.816413] kernel_init_freeable+0xac/0x1c7
<4> [186.816416] kernel_init+0x5/0x100
<4> [186.816419] ret_from_fork+0x24/0x50
<4> [186.816421]
-> #4 (cpu_hotplug_lock.rw_sem){++++}:
<4> [186.816424] cpus_read_lock+0x34/0xd0
<4> [186.816427] rcu_barrier+0xaa/0x190
<4> [186.816429] kernel_init+0x21/0x100
<4> [186.816431] ret_from_fork+0x24/0x50
<4> [186.816433]
-> #3 (rcu_state.barrier_mutex){+.+.}:
<4> [186.816436] __mutex_lock+0x9a/0x9d0
<4> [186.816438] rcu_barrier+0x23/0x190
<4> [186.816502] i915_gem_object_unbind+0x3a6/0x400 [i915]
<4> [186.816537] i915_gem_object_set_cache_level+0x32/0x90 [i915]
<4> [186.816571] i915_gem_object_pin_to_display_plane+0x5d/0x160 [i915]
<4> [186.816612] intel_pin_and_fence_fb_obj+0x9e/0x200 [i915]
<4> [186.816679] intel_plane_pin_fb+0x3f/0xd0 [i915]
<4> [186.816717] intel_prepare_plane_fb+0x130/0x520 [i915]
<4> [186.816722] drm_atomic_helper_prepare_planes+0x85/0x110
<4> [186.816761] intel_atomic_commit+0xc6/0x350 [i915]
<4> [186.816764] drm_atomic_helper_update_plane+0xed/0x110
<4> [186.816768] setplane_internal+0x97/0x190
<4> [186.816770] drm_mode_setplane+0xcd/0x190
<4> [186.816773] drm_ioctl_kernel+0xa7/0xf0
<4> [186.816775] drm_ioctl+0x2e1/0x390
<4> [186.816778] do_vfs_ioctl+0xa0/0x6f0
<4> [186.816780] ksys_ioctl+0x35/0x60
<4> [186.816782] __x64_sys_ioctl+0x11/0x20
<4> [186.816785] do_syscall_64+0x4f/0x210
<4> [186.816787] entry_SYSCALL_64_after_hwframe+0x49/0xbe
<4> [186.816789]
-> #2 (reservation_ww_class_mutex){+.+.}:
<4> [186.816793] __ww_mutex_lock.constprop.15+0xc3/0x1090
<4> [186.816795] ww_mutex_lock+0x39/0x70
<4> [186.816798] dma_resv_lockdep+0x10e/0x1f7
<4> [186.816800] do_one_initcall+0x58/0x2ff
<4> [186.816802] kernel_init_freeable+0x137/0x1c7
<4> [186.816804] kernel_init+0x5/0x100
<4> [186.816806] ret_from_fork+0x24/0x50
<4> [186.816808]
-> #1 (reservation_ww_class_acquire){+.+.}:
<4> [186.816811] dma_resv_lockdep+0xec/0x1f7
<4> [186.816813] do_one_initcall+0x58/0x2ff
<4> [186.816815] kernel_init_freeable+0x137/0x1c7
<4> [186.816817] kernel_init+0x5/0x100
<4> [186.816819] ret_from_fork+0x24/0x50
<4> [186.816820]
-> #0 (&mm->mmap_sem#2){++++}:
<4> [186.816824] __lock_acquire+0x1328/0x15d0
<4> [186.816826] lock_acquire+0xa7/0x1c0
<4> [186.816828] __might_fault+0x63/0x90
<4> [186.816831] _copy_to_user+0x1e/0x80
<4> [186.816834] perf_read+0x200/0x2b0
<4> [186.816836] vfs_read+0x96/0x160
<4> [186.816838] ksys_read+0x9f/0xe0
<4> [186.816839] do_syscall_64+0x4f/0x210
<4> [186.816841] entry_SYSCALL_64_after_hwframe+0x49/0xbe
<4> [186.816843]
other info that might help us debug this:
<4> [186.816846] Chain exists of:
&mm->mmap_sem#2 --> pmus_lock --> &cpuctx_mutex
<4> [186.816849] Possible unsafe locking scenario:
<4> [186.816851] CPU0 CPU1
<4> [186.816853] ---- ----
<4> [186.816854] lock(&cpuctx_mutex);
<4> [186.816856] lock(pmus_lock);
<4> [186.816858] lock(&cpuctx_mutex);
<4> [186.816860] lock(&mm->mmap_sem#2);
<4> [186.816861]
*** DEADLOCK ***
Closes: https://gitlab.freedesktop.org/drm/intel/issues/728
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
---
drivers/gpu/drm/i915/display/intel_display.c | 12 +++---
drivers/gpu/drm/i915/display/intel_overlay.c | 2 -
drivers/gpu/drm/i915/gem/i915_gem_domain.c | 41 ++++++--------------
3 files changed, 16 insertions(+), 39 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index eb0505a66ea8..cc57482436d4 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -2159,19 +2159,18 @@ intel_pin_and_fence_fb_obj(struct drm_framebuffer *fb,
* pin/unpin/fence and not more.
*/
wakeref = intel_runtime_pm_get(&dev_priv->runtime_pm);
- i915_gem_object_lock(obj);
atomic_inc(&dev_priv->gpu_error.pending_fb_pin);
- pinctl = 0;
-
- /* Valleyview is definitely limited to scanning out the first
+ /*
+ * Valleyview is definitely limited to scanning out the first
* 512MiB. Lets presume this behaviour was inherited from the
* g4x display engine and that all earlier gen are similarly
* limited. Testing suggests that it is a little more
* complicated than this. For example, Cherryview appears quite
* happy to scanout from anywhere within its global aperture.
*/
+ pinctl = 0;
if (HAS_GMCH(dev_priv))
pinctl |= PIN_MAPPABLE;
@@ -2183,7 +2182,8 @@ intel_pin_and_fence_fb_obj(struct drm_framebuffer *fb,
if (uses_fence && i915_vma_is_map_and_fenceable(vma)) {
int ret;
- /* Install a fence for tiled scan-out. Pre-i965 always needs a
+ /*
+ * Install a fence for tiled scan-out. Pre-i965 always needs a
* fence, whereas 965+ only requires a fence if using
* framebuffer compression. For simplicity, we always, when
* possible, install a fence as the cost is not that onerous.
@@ -2213,8 +2213,6 @@ intel_pin_and_fence_fb_obj(struct drm_framebuffer *fb,
i915_vma_get(vma);
err:
atomic_dec(&dev_priv->gpu_error.pending_fb_pin);
-
- i915_gem_object_unlock(obj);
intel_runtime_pm_put(&dev_priv->runtime_pm, wakeref);
return vma;
}
diff --git a/drivers/gpu/drm/i915/display/intel_overlay.c b/drivers/gpu/drm/i915/display/intel_overlay.c
index 8cfb785e761c..2a44b3be2600 100644
--- a/drivers/gpu/drm/i915/display/intel_overlay.c
+++ b/drivers/gpu/drm/i915/display/intel_overlay.c
@@ -758,10 +758,8 @@ static int intel_overlay_do_put_image(struct intel_overlay *overlay,
atomic_inc(&dev_priv->gpu_error.pending_fb_pin);
- i915_gem_object_lock(new_bo);
vma = i915_gem_object_pin_to_display_plane(new_bo,
0, NULL, PIN_MAPPABLE);
- i915_gem_object_unlock(new_bo);
if (IS_ERR(vma)) {
ret = PTR_ERR(vma);
goto out_pin_section;
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_domain.c b/drivers/gpu/drm/i915/gem/i915_gem_domain.c
index 808eb327a29b..53e28e417cc9 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_domain.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_domain.c
@@ -187,21 +187,23 @@ int i915_gem_object_set_cache_level(struct drm_i915_gem_object *obj,
{
int ret;
- assert_object_held(obj);
-
if (obj->cache_level == cache_level)
return 0;
- ret = i915_gem_object_unbind(obj, I915_GEM_OBJECT_UNBIND_ACTIVE);
+ ret = i915_gem_object_lock_interruptible(obj);
if (ret)
return ret;
- /* The cache-level will be applied when each vma is rebound. */
+ /* Always invalidate stale cachelines */
+ if (obj->cache_level != cache_level) {
+ i915_gem_object_set_cache_coherency(obj, cache_level);
+ obj->cache_dirty = true;
+ }
- i915_gem_object_set_cache_coherency(obj, cache_level);
- obj->cache_dirty = true; /* Always invalidate stale cachelines */
+ i915_gem_object_unlock(obj);
- return 0;
+ /* The cache-level will be applied when each vma is rebound. */
+ return i915_gem_object_unbind(obj, I915_GEM_OBJECT_UNBIND_ACTIVE);
}
int i915_gem_get_caching_ioctl(struct drm_device *dev, void *data,
@@ -282,20 +284,7 @@ int i915_gem_set_caching_ioctl(struct drm_device *dev, void *data,
goto out;
}
- if (obj->cache_level == level)
- goto out;
-
- ret = i915_gem_object_wait(obj,
- I915_WAIT_INTERRUPTIBLE,
- MAX_SCHEDULE_TIMEOUT);
- if (ret)
- goto out;
-
- ret = i915_gem_object_lock_interruptible(obj);
- if (ret == 0) {
- ret = i915_gem_object_set_cache_level(obj, level);
- i915_gem_object_unlock(obj);
- }
+ ret = i915_gem_object_set_cache_level(obj, level);
out:
i915_gem_object_put(obj);
@@ -318,8 +307,6 @@ i915_gem_object_pin_to_display_plane(struct drm_i915_gem_object *obj,
struct i915_vma *vma;
int ret;
- assert_object_held(obj);
-
/* Frame buffer must be in LMEM (no migration yet) */
if (HAS_LMEM(i915) && !i915_gem_object_is_lmem(obj))
return ERR_PTR(-EINVAL);
@@ -362,13 +349,7 @@ i915_gem_object_pin_to_display_plane(struct drm_i915_gem_object *obj,
vma->display_alignment = max_t(u64, vma->display_alignment, alignment);
- __i915_gem_object_flush_for_display(obj);
-
- /*
- * It should now be out of any other write domains, and we can update
- * the domain values for our changes.
- */
- obj->read_domains |= I915_GEM_DOMAIN_GTT;
+ i915_gem_object_flush_if_display(obj);
return vma;
}
--
2.24.0
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 14+ messages in thread
* [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/5] drm/i915/gem: Flush the pwrite through the chipset before signaling
2019-12-06 10:55 [Intel-gfx] [PATCH 1/5] drm/i915/gem: Flush the pwrite through the chipset before signaling Chris Wilson
` (3 preceding siblings ...)
2019-12-06 10:55 ` [Intel-gfx] [PATCH 5/5] drm/i915: Avoid calling i915_gem_object_unbind holding object lock Chris Wilson
@ 2019-12-06 11:02 ` Patchwork
2019-12-06 11:23 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
` (2 subsequent siblings)
7 siblings, 0 replies; 14+ messages in thread
From: Patchwork @ 2019-12-06 11:02 UTC (permalink / raw)
To: Chris Wilson; +Cc: intel-gfx
== Series Details ==
Series: series starting with [1/5] drm/i915/gem: Flush the pwrite through the chipset before signaling
URL : https://patchwork.freedesktop.org/series/70560/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
d30716cc3331 drm/i915/gem: Flush the pwrite through the chipset before signaling
03977ec92114 drm/i915: Claim vma while under closed_lock in i915_vma_parked()
455a865e304f drm/i915/gt: Acquire a GT wakeref for the breadcrumb interrupt
-:14: WARNING:COMMIT_LOG_LONG_LINE: Possible unwrapped commit description (prefer a maximum 75 chars per line)
#14:
<4> [1518.350323] WARNING: CPU: 2 PID: 3685 at drivers/gpu/drm/i915/intel_uncore.c:1163 __unclaimed_reg_debug+0x40/0x50 [i915]
total: 0 errors, 1 warnings, 0 checks, 70 lines checked
2831603c698c drm/i915/gem: Pin gen6_ppgtt prior to constructing the request
-:21: WARNING:COMMIT_LOG_LONG_LINE: Possible unwrapped commit description (prefer a maximum 75 chars per line)
#21:
<4> [402.377507] ffff888403cdac70 (&kernel#2){+.+.}, at: i915_request_create+0x16/0x1c0 [i915]
total: 0 errors, 1 warnings, 0 checks, 31 lines checked
aa923d9edbfd drm/i915: Avoid calling i915_gem_object_unbind holding object lock
-:21: WARNING:COMMIT_LOG_LONG_LINE: Possible unwrapped commit description (prefer a maximum 75 chars per line)
#21:
<4> [186.816322] ffff88849487c4d8 (&mm->mmap_sem#2){++++}, at: __might_fault+0x39/0x90
total: 0 errors, 1 warnings, 0 checks, 122 lines checked
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 14+ messages in thread
* [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/5] drm/i915/gem: Flush the pwrite through the chipset before signaling
2019-12-06 10:55 [Intel-gfx] [PATCH 1/5] drm/i915/gem: Flush the pwrite through the chipset before signaling Chris Wilson
` (4 preceding siblings ...)
2019-12-06 11:02 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/5] drm/i915/gem: Flush the pwrite through the chipset before signaling Patchwork
@ 2019-12-06 11:23 ` Patchwork
2019-12-06 11:34 ` [Intel-gfx] [PATCH 1/5] " Tvrtko Ursulin
2019-12-06 22:38 ` [Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [1/5] " Patchwork
7 siblings, 0 replies; 14+ messages in thread
From: Patchwork @ 2019-12-06 11:23 UTC (permalink / raw)
To: Chris Wilson; +Cc: intel-gfx
== Series Details ==
Series: series starting with [1/5] drm/i915/gem: Flush the pwrite through the chipset before signaling
URL : https://patchwork.freedesktop.org/series/70560/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7496 -> Patchwork_15628
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15628/index.html
Known issues
------------
Here are the changes found in Patchwork_15628 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@i915_selftest@live_blt:
- fi-hsw-4770: [PASS][1] -> [DMESG-FAIL][2] ([i915#725])
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7496/fi-hsw-4770/igt@i915_selftest@live_blt.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15628/fi-hsw-4770/igt@i915_selftest@live_blt.html
* igt@kms_busy@basic-flip-pipe-a:
- fi-icl-u2: [PASS][3] -> [INCOMPLETE][4] ([i915#140])
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7496/fi-icl-u2/igt@kms_busy@basic-flip-pipe-a.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15628/fi-icl-u2/igt@kms_busy@basic-flip-pipe-a.html
#### Possible fixes ####
* igt@i915_selftest@live_blt:
- fi-hsw-4770r: [DMESG-FAIL][5] ([i915#725]) -> [PASS][6]
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7496/fi-hsw-4770r/igt@i915_selftest@live_blt.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15628/fi-hsw-4770r/igt@i915_selftest@live_blt.html
- fi-ivb-3770: [DMESG-FAIL][7] ([i915#725]) -> [PASS][8]
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7496/fi-ivb-3770/igt@i915_selftest@live_blt.html
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15628/fi-ivb-3770/igt@i915_selftest@live_blt.html
- fi-byt-j1900: [DMESG-FAIL][9] ([i915#725]) -> [PASS][10]
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7496/fi-byt-j1900/igt@i915_selftest@live_blt.html
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15628/fi-byt-j1900/igt@i915_selftest@live_blt.html
* igt@i915_selftest@live_gem_contexts:
- fi-byt-j1900: [DMESG-FAIL][11] ([i915#722]) -> [PASS][12]
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7496/fi-byt-j1900/igt@i915_selftest@live_gem_contexts.html
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15628/fi-byt-j1900/igt@i915_selftest@live_gem_contexts.html
* igt@kms_frontbuffer_tracking@basic:
- fi-icl-guc: [FAIL][13] ([i915#49]) -> [PASS][14]
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7496/fi-icl-guc/igt@kms_frontbuffer_tracking@basic.html
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15628/fi-icl-guc/igt@kms_frontbuffer_tracking@basic.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#111593]: https://bugs.freedesktop.org/show_bug.cgi?id=111593
[i915#109]: https://gitlab.freedesktop.org/drm/intel/issues/109
[i915#140]: https://gitlab.freedesktop.org/drm/intel/issues/140
[i915#49]: https://gitlab.freedesktop.org/drm/intel/issues/49
[i915#710]: https://gitlab.freedesktop.org/drm/intel/issues/710
[i915#722]: https://gitlab.freedesktop.org/drm/intel/issues/722
[i915#725]: https://gitlab.freedesktop.org/drm/intel/issues/725
[i915#92]: https://gitlab.freedesktop.org/drm/intel/issues/92
Participating hosts (41 -> 35)
------------------------------
Missing (6): fi-ilk-m540 fi-hsw-4200u fi-bsw-cyan fi-ctg-p8600 fi-byt-clapper fi-bdw-samus
Build changes
-------------
* CI: CI-20190529 -> None
* Linux: CI_DRM_7496 -> Patchwork_15628
CI-20190529: 20190529
CI_DRM_7496: 41c8cb5a21adff7221b0a1b2ac2b8c5fa5cb6e51 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_5333: e08522bb09ff1b9720359b3867da7e4aca0bd5f1 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_15628: aa923d9edbfd959285244b5979d9b23da5f2a6ba @ git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
aa923d9edbfd drm/i915: Avoid calling i915_gem_object_unbind holding object lock
2831603c698c drm/i915/gem: Pin gen6_ppgtt prior to constructing the request
455a865e304f drm/i915/gt: Acquire a GT wakeref for the breadcrumb interrupt
03977ec92114 drm/i915: Claim vma while under closed_lock in i915_vma_parked()
d30716cc3331 drm/i915/gem: Flush the pwrite through the chipset before signaling
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15628/index.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [Intel-gfx] [PATCH 1/5] drm/i915/gem: Flush the pwrite through the chipset before signaling
2019-12-06 10:55 [Intel-gfx] [PATCH 1/5] drm/i915/gem: Flush the pwrite through the chipset before signaling Chris Wilson
` (5 preceding siblings ...)
2019-12-06 11:23 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
@ 2019-12-06 11:34 ` Tvrtko Ursulin
2019-12-06 22:38 ` [Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [1/5] " Patchwork
7 siblings, 0 replies; 14+ messages in thread
From: Tvrtko Ursulin @ 2019-12-06 11:34 UTC (permalink / raw)
To: Chris Wilson, intel-gfx; +Cc: matthew.auld
On 06/12/2019 10:55, Chris Wilson wrote:
> Before we signal the fence to indicate completion, ensure the pwrite
> through the indirect GGTT is coherent (as best as we know) in memory.
> Any listeners to the fence may start immediately and sample from the
> backing store prior to the writes being posted, thus seeing stale data.
>
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> ---
> drivers/gpu/drm/i915/i915_gem.c | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
> index 98b65b718e1a..919d3a723c50 100644
> --- a/drivers/gpu/drm/i915/i915_gem.c
> +++ b/drivers/gpu/drm/i915/i915_gem.c
> @@ -670,11 +670,12 @@ i915_gem_gtt_pwrite_fast(struct drm_i915_gem_object *obj,
> user_data += page_length;
> offset += page_length;
> }
> +
> + intel_gt_flush_ggtt_writes(ggtt->vm.gt);
> intel_frontbuffer_flush(obj->frontbuffer, ORIGIN_CPU);
>
> i915_gem_object_unlock_fence(obj, fence);
> out_unpin:
> - intel_gt_flush_ggtt_writes(ggtt->vm.gt);
> if (drm_mm_node_allocated(&node)) {
> ggtt->vm.clear_range(&ggtt->vm, node.start, node.size);
> remove_mappable_node(ggtt, &node);
>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Regards,
Tvrtko
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 14+ messages in thread
* [Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [1/5] drm/i915/gem: Flush the pwrite through the chipset before signaling
2019-12-06 10:55 [Intel-gfx] [PATCH 1/5] drm/i915/gem: Flush the pwrite through the chipset before signaling Chris Wilson
` (6 preceding siblings ...)
2019-12-06 11:34 ` [Intel-gfx] [PATCH 1/5] " Tvrtko Ursulin
@ 2019-12-06 22:38 ` Patchwork
7 siblings, 0 replies; 14+ messages in thread
From: Patchwork @ 2019-12-06 22:38 UTC (permalink / raw)
To: Chris Wilson; +Cc: intel-gfx
== Series Details ==
Series: series starting with [1/5] drm/i915/gem: Flush the pwrite through the chipset before signaling
URL : https://patchwork.freedesktop.org/series/70560/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_7496_full -> Patchwork_15628_full
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with Patchwork_15628_full absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_15628_full, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in Patchwork_15628_full:
### IGT changes ###
#### Possible regressions ####
* igt@gem_ctx_persistence@processes:
- shard-iclb: [PASS][1] -> [FAIL][2]
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7496/shard-iclb5/igt@gem_ctx_persistence@processes.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15628/shard-iclb2/igt@gem_ctx_persistence@processes.html
Known issues
------------
Here are the changes found in Patchwork_15628_full that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@gem_ctx_isolation@rcs0-s3:
- shard-apl: [PASS][3] -> [DMESG-WARN][4] ([i915#180])
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7496/shard-apl4/igt@gem_ctx_isolation@rcs0-s3.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15628/shard-apl1/igt@gem_ctx_isolation@rcs0-s3.html
* igt@gem_ctx_persistence@processes:
- shard-apl: [PASS][5] -> [FAIL][6] ([i915#570])
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7496/shard-apl7/igt@gem_ctx_persistence@processes.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15628/shard-apl4/igt@gem_ctx_persistence@processes.html
* igt@gem_ctx_persistence@vcs1-mixed-process:
- shard-iclb: [PASS][7] -> [SKIP][8] ([fdo#109276] / [fdo#112080]) +2 similar issues
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7496/shard-iclb4/igt@gem_ctx_persistence@vcs1-mixed-process.html
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15628/shard-iclb5/igt@gem_ctx_persistence@vcs1-mixed-process.html
* igt@gem_exec_capture@capture-bsd2:
- shard-iclb: [PASS][9] -> [SKIP][10] ([fdo#109276]) +6 similar issues
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7496/shard-iclb4/igt@gem_exec_capture@capture-bsd2.html
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15628/shard-iclb5/igt@gem_exec_capture@capture-bsd2.html
* igt@gem_exec_schedule@preempt-queue-bsd:
- shard-iclb: [PASS][11] -> [SKIP][12] ([fdo#112146]) +2 similar issues
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7496/shard-iclb5/igt@gem_exec_schedule@preempt-queue-bsd.html
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15628/shard-iclb1/igt@gem_exec_schedule@preempt-queue-bsd.html
* igt@gem_exec_schedule@preempt-queue-contexts-blt:
- shard-tglb: [PASS][13] -> [INCOMPLETE][14] ([fdo#111606] / [fdo#111677])
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7496/shard-tglb1/igt@gem_exec_schedule@preempt-queue-contexts-blt.html
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15628/shard-tglb6/igt@gem_exec_schedule@preempt-queue-contexts-blt.html
* igt@gem_exec_schedule@smoketest-vebox:
- shard-tglb: [PASS][15] -> [INCOMPLETE][16] ([i915#707])
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7496/shard-tglb1/igt@gem_exec_schedule@smoketest-vebox.html
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15628/shard-tglb6/igt@gem_exec_schedule@smoketest-vebox.html
* igt@gem_persistent_relocs@forked-interruptible-faulting-reloc-thrashing:
- shard-iclb: [PASS][17] -> [TIMEOUT][18] ([i915#530])
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7496/shard-iclb5/igt@gem_persistent_relocs@forked-interruptible-faulting-reloc-thrashing.html
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15628/shard-iclb1/igt@gem_persistent_relocs@forked-interruptible-faulting-reloc-thrashing.html
* igt@gem_ppgtt@flink-and-close-vma-leak:
- shard-glk: [PASS][19] -> [FAIL][20] ([i915#644])
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7496/shard-glk9/igt@gem_ppgtt@flink-and-close-vma-leak.html
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15628/shard-glk7/igt@gem_ppgtt@flink-and-close-vma-leak.html
* igt@gem_sync@basic-all:
- shard-tglb: [PASS][21] -> [INCOMPLETE][22] ([i915#470] / [i915#472])
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7496/shard-tglb3/igt@gem_sync@basic-all.html
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15628/shard-tglb8/igt@gem_sync@basic-all.html
* igt@gem_userptr_blits@map-fixed-invalidate-busy-gup:
- shard-snb: [PASS][23] -> [DMESG-WARN][24] ([fdo#111870]) +2 similar issues
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7496/shard-snb5/igt@gem_userptr_blits@map-fixed-invalidate-busy-gup.html
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15628/shard-snb4/igt@gem_userptr_blits@map-fixed-invalidate-busy-gup.html
* igt@i915_pm_dc@dc6-psr:
- shard-iclb: [PASS][25] -> [FAIL][26] ([i915#454])
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7496/shard-iclb5/igt@i915_pm_dc@dc6-psr.html
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15628/shard-iclb4/igt@i915_pm_dc@dc6-psr.html
* igt@i915_pm_rpm@legacy-planes:
- shard-glk: [PASS][27] -> [INCOMPLETE][28] ([i915#58] / [k.org#198133])
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7496/shard-glk8/igt@i915_pm_rpm@legacy-planes.html
[28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15628/shard-glk5/igt@i915_pm_rpm@legacy-planes.html
* igt@i915_pm_rpm@system-suspend-execbuf:
- shard-tglb: [PASS][29] -> [INCOMPLETE][30] ([i915#456] / [i915#460]) +1 similar issue
[29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7496/shard-tglb6/igt@i915_pm_rpm@system-suspend-execbuf.html
[30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15628/shard-tglb8/igt@i915_pm_rpm@system-suspend-execbuf.html
* igt@kms_color@pipe-b-legacy-gamma:
- shard-kbl: [PASS][31] -> [FAIL][32] ([i915#71])
[31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7496/shard-kbl3/igt@kms_color@pipe-b-legacy-gamma.html
[32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15628/shard-kbl4/igt@kms_color@pipe-b-legacy-gamma.html
* igt@kms_cursor_crc@pipe-a-cursor-suspend:
- shard-kbl: [PASS][33] -> [DMESG-WARN][34] ([i915#180]) +3 similar issues
[33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7496/shard-kbl6/igt@kms_cursor_crc@pipe-a-cursor-suspend.html
[34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15628/shard-kbl4/igt@kms_cursor_crc@pipe-a-cursor-suspend.html
- shard-skl: [PASS][35] -> [INCOMPLETE][36] ([i915#300])
[35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7496/shard-skl9/igt@kms_cursor_crc@pipe-a-cursor-suspend.html
[36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15628/shard-skl9/igt@kms_cursor_crc@pipe-a-cursor-suspend.html
* igt@kms_cursor_crc@pipe-b-cursor-128x128-sliding:
- shard-skl: [PASS][37] -> [FAIL][38] ([i915#54]) +1 similar issue
[37]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7496/shard-skl6/igt@kms_cursor_crc@pipe-b-cursor-128x128-sliding.html
[38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15628/shard-skl1/igt@kms_cursor_crc@pipe-b-cursor-128x128-sliding.html
* igt@kms_cursor_crc@pipe-c-cursor-256x85-sliding:
- shard-apl: [PASS][39] -> [FAIL][40] ([i915#54])
[39]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7496/shard-apl3/igt@kms_cursor_crc@pipe-c-cursor-256x85-sliding.html
[40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15628/shard-apl6/igt@kms_cursor_crc@pipe-c-cursor-256x85-sliding.html
* igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions:
- shard-skl: [PASS][41] -> [FAIL][42] ([IGT#5])
[41]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7496/shard-skl4/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions.html
[42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15628/shard-skl10/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions.html
* igt@kms_draw_crc@draw-method-rgb565-blt-ytiled:
- shard-skl: [PASS][43] -> [INCOMPLETE][44] ([i915#435])
[43]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7496/shard-skl3/igt@kms_draw_crc@draw-method-rgb565-blt-ytiled.html
[44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15628/shard-skl6/igt@kms_draw_crc@draw-method-rgb565-blt-ytiled.html
* igt@kms_draw_crc@draw-method-xrgb2101010-blt-untiled:
- shard-skl: [PASS][45] -> [INCOMPLETE][46] ([i915#646])
[45]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7496/shard-skl10/igt@kms_draw_crc@draw-method-xrgb2101010-blt-untiled.html
[46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15628/shard-skl5/igt@kms_draw_crc@draw-method-xrgb2101010-blt-untiled.html
* igt@kms_flip@2x-plain-flip:
- shard-hsw: [PASS][47] -> [INCOMPLETE][48] ([i915#61]) +1 similar issue
[47]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7496/shard-hsw5/igt@kms_flip@2x-plain-flip.html
[48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15628/shard-hsw8/igt@kms_flip@2x-plain-flip.html
* igt@kms_flip@flip-vs-expired-vblank-interruptible:
- shard-skl: [PASS][49] -> [FAIL][50] ([i915#79])
[49]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7496/shard-skl6/igt@kms_flip@flip-vs-expired-vblank-interruptible.html
[50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15628/shard-skl1/igt@kms_flip@flip-vs-expired-vblank-interruptible.html
* igt@kms_flip@flip-vs-suspend:
- shard-snb: [PASS][51] -> [INCOMPLETE][52] ([i915#82])
[51]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7496/shard-snb7/igt@kms_flip@flip-vs-suspend.html
[52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15628/shard-snb1/igt@kms_flip@flip-vs-suspend.html
* igt@kms_plane@plane-panning-bottom-right-suspend-pipe-c-planes:
- shard-skl: [PASS][53] -> [INCOMPLETE][54] ([i915#69])
[53]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7496/shard-skl2/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-c-planes.html
[54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15628/shard-skl6/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-c-planes.html
* igt@kms_psr@psr2_cursor_mmap_cpu:
- shard-iclb: [PASS][55] -> [SKIP][56] ([fdo#109441]) +1 similar issue
[55]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7496/shard-iclb2/igt@kms_psr@psr2_cursor_mmap_cpu.html
[56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15628/shard-iclb4/igt@kms_psr@psr2_cursor_mmap_cpu.html
* igt@kms_setmode@basic:
- shard-kbl: [PASS][57] -> [FAIL][58] ([i915#31])
[57]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7496/shard-kbl4/igt@kms_setmode@basic.html
[58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15628/shard-kbl3/igt@kms_setmode@basic.html
* igt@perf_pmu@busy-double-start-vcs1:
- shard-iclb: [PASS][59] -> [SKIP][60] ([fdo#112080])
[59]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7496/shard-iclb4/igt@perf_pmu@busy-double-start-vcs1.html
[60]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15628/shard-iclb3/igt@perf_pmu@busy-double-start-vcs1.html
#### Possible fixes ####
* igt@gem_ctx_isolation@rcs0-s3:
- shard-kbl: [DMESG-WARN][61] ([i915#180]) -> [PASS][62] +4 similar issues
[61]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7496/shard-kbl4/igt@gem_ctx_isolation@rcs0-s3.html
[62]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15628/shard-kbl3/igt@gem_ctx_isolation@rcs0-s3.html
* igt@gem_exec_create@forked:
- shard-tglb: [INCOMPLETE][63] ([fdo#108838] / [i915#435]) -> [PASS][64]
[63]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7496/shard-tglb5/igt@gem_exec_create@forked.html
[64]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15628/shard-tglb1/igt@gem_exec_create@forked.html
* igt@gem_exec_create@madvise:
- shard-tglb: [INCOMPLETE][65] ([i915#435]) -> [PASS][66]
[65]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7496/shard-tglb6/igt@gem_exec_create@madvise.html
[66]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15628/shard-tglb2/igt@gem_exec_create@madvise.html
* igt@gem_exec_parallel@rcs0-contexts:
- shard-hsw: [DMESG-WARN][67] -> [PASS][68] +1 similar issue
[67]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7496/shard-hsw5/igt@gem_exec_parallel@rcs0-contexts.html
[68]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15628/shard-hsw7/igt@gem_exec_parallel@rcs0-contexts.html
* igt@gem_exec_schedule@preempt-queue-contexts-bsd1:
- shard-tglb: [INCOMPLETE][69] ([fdo#111606] / [fdo#111677]) -> [PASS][70]
[69]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7496/shard-tglb6/igt@gem_exec_schedule@preempt-queue-contexts-bsd1.html
[70]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15628/shard-tglb5/igt@gem_exec_schedule@preempt-queue-contexts-bsd1.html
* igt@gem_exec_schedule@wide-bsd:
- shard-iclb: [SKIP][71] ([fdo#112146]) -> [PASS][72] +1 similar issue
[71]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7496/shard-iclb4/igt@gem_exec_schedule@wide-bsd.html
[72]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15628/shard-iclb3/igt@gem_exec_schedule@wide-bsd.html
* igt@gem_persistent_relocs@forked-thrashing:
- shard-kbl: [FAIL][73] ([i915#520]) -> [PASS][74]
[73]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7496/shard-kbl4/igt@gem_persistent_relocs@forked-thrashing.html
[74]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15628/shard-kbl6/igt@gem_persistent_relocs@forked-thrashing.html
- shard-snb: [FAIL][75] ([i915#520]) -> [PASS][76]
[75]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7496/shard-snb7/igt@gem_persistent_relocs@forked-thrashing.html
[76]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15628/shard-snb2/igt@gem_persistent_relocs@forked-thrashing.html
* igt@gem_softpin@noreloc-s3:
- shard-skl: [INCOMPLETE][77] ([i915#69]) -> [PASS][78]
[77]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7496/shard-skl5/igt@gem_softpin@noreloc-s3.html
[78]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15628/shard-skl5/igt@gem_softpin@noreloc-s3.html
* igt@gem_userptr_blits@sync-unmap-cycles:
- shard-snb: [DMESG-WARN][79] ([fdo#111870]) -> [PASS][80] +2 similar issues
[79]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7496/shard-snb4/igt@gem_userptr_blits@sync-unmap-cycles.html
[80]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15628/shard-snb6/igt@gem_userptr_blits@sync-unmap-cycles.html
* igt@i915_selftest@live_gt_timelines:
- shard-tglb: [INCOMPLETE][81] ([i915#455]) -> [PASS][82]
[81]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7496/shard-tglb4/igt@i915_selftest@live_gt_timelines.html
[82]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15628/shard-tglb1/igt@i915_selftest@live_gt_timelines.html
* igt@kms_big_fb@y-tiled-16bpp-rotate-0:
- shard-tglb: [INCOMPLETE][83] ([i915#667]) -> [PASS][84]
[83]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7496/shard-tglb6/igt@kms_big_fb@y-tiled-16bpp-rotate-0.html
[84]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15628/shard-tglb2/igt@kms_big_fb@y-tiled-16bpp-rotate-0.html
* igt@kms_big_fb@yf-tiled-32bpp-rotate-0:
- shard-skl: [INCOMPLETE][85] -> [PASS][86] +1 similar issue
[85]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7496/shard-skl1/igt@kms_big_fb@yf-tiled-32bpp-rotate-0.html
[86]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15628/shard-skl4/igt@kms_big_fb@yf-tiled-32bpp-rotate-0.html
* igt@kms_ccs@pipe-a-crc-primary-basic:
- shard-skl: [INCOMPLETE][87] ([i915#667]) -> [PASS][88]
[87]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7496/shard-skl9/igt@kms_ccs@pipe-a-crc-primary-basic.html
[88]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15628/shard-skl8/igt@kms_ccs@pipe-a-crc-primary-basic.html
* igt@kms_color@pipe-a-ctm-0-5:
- shard-skl: [DMESG-WARN][89] ([i915#109]) -> [PASS][90] +1 similar issue
[89]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7496/shard-skl3/igt@kms_color@pipe-a-ctm-0-5.html
[90]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15628/shard-skl2/igt@kms_color@pipe-a-ctm-0-5.html
* igt@kms_color@pipe-c-ctm-max:
- shard-apl: [FAIL][91] ([i915#168]) -> [PASS][92]
[91]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7496/shard-apl1/igt@kms_color@pipe-c-ctm-max.html
[92]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15628/shard-apl7/igt@kms_color@pipe-c-ctm-max.html
* igt@kms_draw_crc@draw-method-xrgb8888-render-xtiled:
- shard-skl: [INCOMPLETE][93] ([fdo#112347] / [i915#646]) -> [PASS][94]
[93]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7496/shard-skl6/igt@kms_draw_crc@draw-method-xrgb8888-render-xtiled.html
[94]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15628/shard-skl1/igt@kms_draw_crc@draw-method-xrgb8888-render-xtiled.html
* igt@kms_flip@flip-vs-suspend-interruptible:
- shard-apl: [DMESG-WARN][95] ([i915#180]) -> [PASS][96] +2 similar issues
[95]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7496/shard-apl4/igt@kms_flip@flip-vs-suspend-interruptible.html
[96]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15628/shard-apl2/igt@kms_flip@flip-vs-suspend-interruptible.html
* igt@kms_frontbuffer_tracking@fbc-1p-offscren-pri-shrfb-draw-blt:
- shard-kbl: [DMESG-WARN][97] ([i915#728]) -> [PASS][98] +3 similar issues
[97]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7496/shard-kbl3/igt@kms_frontbuffer_tracking@fbc-1p-offscren-pri-shrfb-draw-blt.html
[98]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15628/shard-kbl2/igt@kms_frontbuffer_tracking@fbc-1p-offscren-pri-shrfb-draw-blt.html
* igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-mmap-cpu:
- shard-iclb: [FAIL][99] ([i915#49]) -> [PASS][100] +7 similar issues
[99]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7496/shard-iclb6/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-mmap-cpu.html
[100]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15628/shard-iclb5/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-mmap-cpu.html
* igt@kms_frontbuffer_tracking@fbcpsr-rgb565-draw-render:
- shard-tglb: [FAIL][101] ([i915#49]) -> [PASS][102]
[101]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7496/shard-tglb6/igt@kms_frontbuffer_tracking@fbcpsr-rgb565-draw-render.html
[102]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15628/shard-tglb2/igt@kms_frontbuffer_tracking@fbcpsr-rgb565-draw-render.html
* igt@kms_frontbuffer_tracking@psr-1p-primscrn-cur-indfb-move:
- shard-iclb: [INCOMPLETE][103] ([i915#123] / [i915#140]) -> [PASS][104]
[103]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7496/shard-iclb8/igt@kms_frontbuffer_tracking@psr-1p-primscrn-cur-indfb-move.html
[104]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15628/shard-iclb5/igt@kms_frontbuffer_tracking@psr-1p-primscrn-cur-indfb-move.html
* igt@kms_frontbuffer_tracking@psr-1p-primscrn-shrfb-pgflip-blt:
- shard-skl: [DMESG-WARN][105] ([i915#728]) -> [PASS][106] +1 similar issue
[105]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7496/shard-skl4/igt@kms_frontbuffer_tracking@psr-1p-primscrn-shrfb-pgflip-blt.html
[106]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15628/shard-skl4/igt@kms_frontbuffer_tracking@psr-1p-primscrn-shrfb-pgflip-blt.html
* igt@kms_plane@pixel-format-pipe-a-planes:
- shard-iclb: [INCOMPLETE][107] ([i915#140] / [i915#246]) -> [PASS][108]
[107]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7496/shard-iclb4/igt@kms_plane@pixel-format-pipe-a-planes.html
[108]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15628/shard-iclb3/igt@kms_plane@pixel-format-pipe-a-planes.html
- shard-kbl: [INCOMPLETE][109] ([fdo#103665]) -> [PASS][110] +1 similar issue
[109]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7496/shard-kbl6/igt@kms_plane@pixel-format-pipe-a-planes.html
[110]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15628/shard-kbl7/igt@kms_plane@pixel-format-pipe-a-planes.html
- shard-skl: [INCOMPLETE][111] ([i915#648]) -> [PASS][112]
[111]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7496/shard-skl10/igt@kms_plane@pixel-format-pipe-a-planes.html
[112]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15628/shard-skl10/igt@kms_plane@pixel-format-pipe-a-planes.html
* igt@kms_plane_alpha_blend@pipe-c-constant-alpha-min:
- shard-skl: [FAIL][113] ([fdo#108145]) -> [PASS][114]
[113]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7496/shard-skl7/igt@kms_plane_alpha_blend@pipe-c-constant-alpha-min.html
[114]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15628/shard-skl7/igt@kms_plane_alpha_blend@pipe-c-constant-alpha-min.html
* igt@kms_psr2_su@frontbuffer:
- shard-tglb: [FAIL][115] ([fdo#111842]) -> [PASS][116]
[115]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7496/shard-tglb6/igt@kms_psr2_su@frontbuffer.html
[116]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15628/shard-tglb8/igt@kms_psr2_su@frontbuffer.html
- shard-iclb: [SKIP][117] ([fdo#109642] / [fdo#111068]) -> [PASS][118]
[117]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7496/shard-iclb1/igt@kms_psr2_su@frontbuffer.html
[118]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15628/shard-iclb2/igt@kms_psr2_su@frontbuffer.html
* igt@kms_psr@psr2_sprite_blt:
- shard-iclb: [SKIP][119] ([fdo#109441]) -> [PASS][120]
[119]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7496/shard-iclb6/igt@kms_psr@psr2_sprite_blt.html
[120]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15628/shard-iclb2/igt@kms_psr@psr2_sprite_blt.html
* igt@kms_setmode@basic:
- shard-skl: [FAIL][121] ([i915#31]) -> [PASS][122]
[121]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7496/shard-skl5/igt@kms_setmode@basic.html
[122]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15628/shard-skl8/igt@kms_setmode@basic.html
* igt@kms_vblank@pipe-d-ts-continuation-dpms-suspend:
- shard-tglb: [INCOMPLETE][123] ([i915#460]) -> [PASS][124]
[123]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7496/shard-tglb3/igt@kms_vblank@pipe-d-ts-continuation-dpms-suspend.html
[124]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15628/shard-tglb7/igt@kms_vblank@pipe-d-ts-continuation-dpms-suspend.html
* igt@perf_pmu@busy-check-all-vcs1:
- shard-iclb: [SKIP][125] ([fdo#112080]) -> [PASS][126] +4 similar issues
[125]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7496/shard-iclb5/igt@perf_pmu@busy-check-all-vcs1.html
[126]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15628/shard-iclb4/igt@perf_pmu@busy-check-all-vcs1.html
* igt@perf_pmu@render-node-busy-vcs1:
- shard-tglb: [DMESG-WARN][127] ([i915#728]) -> [PASS][128] +4 similar issues
[127]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7496/shard-tglb7/igt@perf_pmu@render-node-busy-vcs1.html
[128]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15628/shard-tglb4/igt@perf_pmu@render-node-busy-vcs1.html
* igt@perf_pmu@semaphore-wait-vcs0:
- shard-iclb: [DMESG-WARN][129] ([i915#728]) -> [PASS][130] +4 similar issues
[129]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7496/shard-iclb4/igt@perf_pmu@semaphore-wait-vcs0.html
[130]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15628/shard-iclb1/igt@perf_pmu@semaphore-wait-vcs0.html
* igt@prime_busy@hang-bsd2:
- shard-iclb: [SKIP][131] ([fdo#109276]) -> [PASS][132] +9 similar issues
[131]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7496/shard-iclb8/igt@prime_busy@hang-bsd2.html
[132]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15628/shard-iclb4/igt@prime_busy@hang-bsd2.html
#### Warnings ####
* igt@i915_pm_dc@dc6-psr:
- shard-tglb: [FAIL][133] ([i915#454]) -> [SKIP][134] ([i915#468])
[133]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7496/shard-tglb1/igt@i915_pm_dc@dc6-psr.html
[134]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15628/shard-tglb6/igt@i915_pm_dc@dc6-psr.html
* igt@i915_selftest@live_blt:
- shard-hsw: [DMESG-FAIL][135] ([i915#725]) -> [DMESG-FAIL][136] ([i915#553] / [i915#725])
[135]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7496/shard-hsw7/igt@i915_selftest@live_blt.html
[136]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15628/shard-hsw2/igt@i915_selftest@live_blt.html
* igt@kms_cursor_crc@pipe-b-cursor-suspend:
- shard-kbl: [FAIL][137] ([i915#54]) -> [DMESG-FAIL][138] ([i915#180] / [i915#54])
[137]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7496/shard-kbl4/igt@kms_cursor_crc@pipe-b-cursor-suspend.html
[138]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15628/shard-kbl4/igt@kms_cursor_crc@pipe-b-cursor-suspend.html
* igt@kms_plane@pixel-format-pipe-b-planes-source-clamping:
- shard-skl: [DMESG-WARN][139] ([i915#728]) -> [INCOMPLETE][140] ([fdo#112391] / [i915#648])
[139]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7496/shard-skl2/igt@kms_plane@pixel-format-pipe-b-planes-source-clamping.html
[140]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15628/shard-skl7/igt@kms_plane@pixel-format-pipe-b-planes-source-clamping.html
* igt@kms_plane@plane-panning-bottom-right-suspend-pipe-a-planes:
- shard-kbl: [INCOMPLETE][141] ([fdo#103665]) -> [DMESG-WARN][142] ([i915#180])
[141]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7496/shard-kbl2/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-a-planes.html
[142]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15628/shard-kbl7/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-a-planes.html
* igt@kms_psr@psr2_suspend:
- shard-iclb: [SKIP][143] ([fdo#109441]) -> [DMESG-WARN][144] ([fdo#107724])
[143]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7496/shard-iclb5/igt@kms_psr@psr2_suspend.html
[144]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15628/shard-iclb2/igt@kms_psr@psr2_suspend.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[IGT#5]: https://gitlab.freedesktop.org/drm/igt-gpu-tools/issues/5
[fdo#103665]: https://bugs.freedesktop.org/show_bug.cgi?id=103665
[fdo#107724]: https://bugs.freedesktop.org/show_bug.cgi?id=107724
[fdo#108145]: https://bugs.freedesktop.org/show_bug.cgi?id=108145
[fdo#108838]: https://bugs.freedesktop.org/show_bug.cgi?id=108838
[fdo#109276]: https://bugs.freedesktop.org/show_bug.cgi?id=109276
[fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441
[fdo#109642]: https://bugs.freedesktop.org/show_bug.cgi?id=109642
[fdo#111068]: https://bugs.freedesktop.org/show_bug.cgi?id=111068
[fdo#111606]: https://bugs.freedesktop.org/show_bug.cgi?id=111606
[fdo#111677]: https://bugs.freedesktop.org/show_bug.cgi?id=111677
[fdo#111842]: https://bugs.freedesktop.org/show_bug.cgi?id=111842
[fdo#111870]: https://bugs.freedesktop.org/show_bug.cgi?id=111870
[fdo#112080]: https://bugs.freedesktop.org/show_bug.cgi?id=112080
[fdo#112146]: https://bugs.freedesktop.org/show_bug.cgi?id=112146
[fdo#112347]: https://bugs.freedesktop.org/show_bug.cgi?id=112347
[fdo#112391]: https://bugs.freedesktop.org/show_bug.cgi?id=112391
[i915#109]: https://gitlab.freedesktop.org/drm/intel/issues/109
[i915#123]: https://gitlab.freedesktop.org/drm/intel/issues/123
[i915#140]: https://gitlab.freedesktop.org/drm/intel/issues/140
[i915#168]: https://gitlab.freedesktop.org/drm/intel/issues/168
[i915#180]: https://gitlab.freedesktop.org/drm/intel/issues/180
[i915#246]: https://gitlab.freedesktop.org/drm/intel/issues/246
[i915#300]: https://gitlab.freedesktop.org/drm/intel/issues/300
[i915#31]: https://gitlab.freedesktop.org/drm/intel/issues/31
[i915#435]: https://gitlab.freedesktop.org/drm/intel/issues/435
[i915#454]: https://gitlab.freedesktop.org/drm/intel/issues/454
[i915#455]: https://gitlab.freedesktop.org/drm/intel/issues/455
[i915#456]: https://gitlab.freedesktop.org/drm/intel/issues/456
[i915#460]: https://gitlab.freedesktop.org/drm/intel/issues/460
[i915#468]: https://gitlab.freedesktop.org/drm/intel/issues/468
[i915#470]: https://gitlab.freedesktop.org/drm/intel/issues/470
[i915#472]: https://gitlab.freedesktop.org/drm/intel/issues/472
[i915#49]: https://gitlab.freedesktop.org/drm/intel/issues/49
[i915#520]: https://gitlab.freedesktop.org/drm/intel/issues/520
[i915#530]: https://gitlab.freedesktop.org/drm/intel/issues/530
[i915#54]: https://gitlab.freedesktop.org/drm/intel/issues/54
[i915#553]: https://gitlab.freedesktop.org/drm/intel/issues/553
[i915#570]: https://gitlab.freedesktop.org/drm/intel/issues/570
[i915#58]: https://gitlab.freedesktop.org/drm/intel/issues/58
[i915#61]: https://gitlab.freedesktop.org/drm/intel/issues/61
[i915#644]: https://gitlab.freedesktop.org/drm/intel/issues/644
[i915#646]: https://gitlab.freedesktop.org/drm/intel/issues/646
[i915#648]: https://gitlab.freedesktop.org/drm/intel/is
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15628/index.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [Intel-gfx] [PATCH 4/5] drm/i915/gem: Pin gen6_ppgtt prior to constructing the request
2019-12-06 10:55 ` [Intel-gfx] [PATCH 4/5] drm/i915/gem: Pin gen6_ppgtt prior to constructing the request Chris Wilson
@ 2019-12-06 23:31 ` Andi Shyti
2019-12-06 23:35 ` Chris Wilson
0 siblings, 1 reply; 14+ messages in thread
From: Andi Shyti @ 2019-12-06 23:31 UTC (permalink / raw)
To: Chris Wilson; +Cc: intel-gfx, matthew.auld
Hi Chris,
> All pinning must be done prior to i915_request_create, to avoid
> timeline->mutex inversions.
>
> Here we slightly abuse the context_barrier_task stages to utilise the
> 'skip' decision as an opportunity to acquire the pin on the new ppgtt.
> Consider it s/skip/prepare/. At the moment, we only have on user of
> context_barrier_task, so it might be worth breaking it down for the
> specific task of set-vm and refactor it later if we find a second
> purpose.
[...]
> diff --git a/drivers/gpu/drm/i915/gem/i915_gem_context.c b/drivers/gpu/drm/i915/gem/i915_gem_context.c
> index 9f1dc96b10a6..9d8d75765ee4 100644
> --- a/drivers/gpu/drm/i915/gem/i915_gem_context.c
> +++ b/drivers/gpu/drm/i915/gem/i915_gem_context.c
> @@ -1141,8 +1141,6 @@ static int emit_ppgtt_update(struct i915_request *rq, void *data)
> *cs++ = MI_NOOP;
> intel_ring_advance(rq, cs);
> } else {
> - /* ppGTT is not part of the legacy context image */
> - gen6_ppgtt_pin(i915_vm_to_ppgtt(vm));
> }
mh? Am I not seeing something obvious? Can we remove the else?
>
> return 0;
> @@ -1150,10 +1148,20 @@ static int emit_ppgtt_update(struct i915_request *rq, void *data)
>
> static bool skip_ppgtt_update(struct intel_context *ce, void *data)
> {
> + if (!test_bit(CONTEXT_ALLOC_BIT, &ce->flags))
> + return true;
> +
> if (HAS_LOGICAL_RING_CONTEXTS(ce->engine->i915))
> - return !ce->state;
> - else
> - return !atomic_read(&ce->pin_count);
> + return false;
> +
> + if (!atomic_read(&ce->pin_count))
> + return true;
> +
> + /* ppGTT is not part of the legacy context image */
> + if (gen6_ppgtt_pin(i915_vm_to_ppgtt(ce->vm)))
> + return true;
> +
> + return false;
looks correct, a bit tricky, but I don't see any issue.
Reviewed-by: Andi Shyti <andi.shyti@intel.com>
Andi
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [Intel-gfx] [PATCH 4/5] drm/i915/gem: Pin gen6_ppgtt prior to constructing the request
2019-12-06 23:31 ` Andi Shyti
@ 2019-12-06 23:35 ` Chris Wilson
0 siblings, 0 replies; 14+ messages in thread
From: Chris Wilson @ 2019-12-06 23:35 UTC (permalink / raw)
To: Andi Shyti; +Cc: intel-gfx, matthew.auld
Quoting Andi Shyti (2019-12-06 23:31:26)
> Hi Chris,
>
> > All pinning must be done prior to i915_request_create, to avoid
> > timeline->mutex inversions.
> >
> > Here we slightly abuse the context_barrier_task stages to utilise the
> > 'skip' decision as an opportunity to acquire the pin on the new ppgtt.
> > Consider it s/skip/prepare/. At the moment, we only have on user of
> > context_barrier_task, so it might be worth breaking it down for the
> > specific task of set-vm and refactor it later if we find a second
> > purpose.
>
> [...]
>
> > diff --git a/drivers/gpu/drm/i915/gem/i915_gem_context.c b/drivers/gpu/drm/i915/gem/i915_gem_context.c
> > index 9f1dc96b10a6..9d8d75765ee4 100644
> > --- a/drivers/gpu/drm/i915/gem/i915_gem_context.c
> > +++ b/drivers/gpu/drm/i915/gem/i915_gem_context.c
> > @@ -1141,8 +1141,6 @@ static int emit_ppgtt_update(struct i915_request *rq, void *data)
> > *cs++ = MI_NOOP;
> > intel_ring_advance(rq, cs);
> > } else {
> > - /* ppGTT is not part of the legacy context image */
> > - gen6_ppgtt_pin(i915_vm_to_ppgtt(vm));
> > }
>
> mh? Am I not seeing something obvious? Can we remove the else?
Sure, I just have this thing about if() else if() that feels unbalanced
Just feels odd not to have something there. :)
>
> >
> > return 0;
> > @@ -1150,10 +1148,20 @@ static int emit_ppgtt_update(struct i915_request *rq, void *data)
> >
> > static bool skip_ppgtt_update(struct intel_context *ce, void *data)
> > {
> > + if (!test_bit(CONTEXT_ALLOC_BIT, &ce->flags))
> > + return true;
> > +
> > if (HAS_LOGICAL_RING_CONTEXTS(ce->engine->i915))
> > - return !ce->state;
> > - else
> > - return !atomic_read(&ce->pin_count);
> > + return false;
> > +
> > + if (!atomic_read(&ce->pin_count))
> > + return true;
> > +
> > + /* ppGTT is not part of the legacy context image */
> > + if (gen6_ppgtt_pin(i915_vm_to_ppgtt(ce->vm)))
> > + return true;
> > +
> > + return false;
>
> looks correct, a bit tricky, but I don't see any issue.
The issue is the code is creaking beyond its design tolerances. :)
-Chris
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [Intel-gfx] [PATCH 5/5] drm/i915: Avoid calling i915_gem_object_unbind holding object lock
2019-12-06 10:55 ` [Intel-gfx] [PATCH 5/5] drm/i915: Avoid calling i915_gem_object_unbind holding object lock Chris Wilson
@ 2019-12-07 0:03 ` Andi Shyti
2019-12-07 0:20 ` Chris Wilson
0 siblings, 1 reply; 14+ messages in thread
From: Andi Shyti @ 2019-12-07 0:03 UTC (permalink / raw)
To: Chris Wilson; +Cc: intel-gfx, matthew.auld
Hi Chris,
[...]
> diff --git a/drivers/gpu/drm/i915/gem/i915_gem_domain.c b/drivers/gpu/drm/i915/gem/i915_gem_domain.c
> index 808eb327a29b..53e28e417cc9 100644
> --- a/drivers/gpu/drm/i915/gem/i915_gem_domain.c
> +++ b/drivers/gpu/drm/i915/gem/i915_gem_domain.c
> @@ -187,21 +187,23 @@ int i915_gem_object_set_cache_level(struct drm_i915_gem_object *obj,
> {
> int ret;
>
> - assert_object_held(obj);
> -
> if (obj->cache_level == cache_level)
you're checking here...
> return 0;
>
> - ret = i915_gem_object_unbind(obj, I915_GEM_OBJECT_UNBIND_ACTIVE);
> + ret = i915_gem_object_lock_interruptible(obj);
> if (ret)
> return ret;
>
> - /* The cache-level will be applied when each vma is rebound. */
> + /* Always invalidate stale cachelines */
> + if (obj->cache_level != cache_level) {
... and here... you might want to get rid of this one?
Andi
> + i915_gem_object_set_cache_coherency(obj, cache_level);
> + obj->cache_dirty = true;
> + }
>
> - i915_gem_object_set_cache_coherency(obj, cache_level);
> - obj->cache_dirty = true; /* Always invalidate stale cachelines */
> + i915_gem_object_unlock(obj);
>
> - return 0;
> + /* The cache-level will be applied when each vma is rebound. */
> + return i915_gem_object_unbind(obj, I915_GEM_OBJECT_UNBIND_ACTIVE);
> }
_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [Intel-gfx] [PATCH 5/5] drm/i915: Avoid calling i915_gem_object_unbind holding object lock
2019-12-07 0:03 ` Andi Shyti
@ 2019-12-07 0:20 ` Chris Wilson
2019-12-07 19:24 ` Andi Shyti
0 siblings, 1 reply; 14+ messages in thread
From: Chris Wilson @ 2019-12-07 0:20 UTC (permalink / raw)
To: Andi Shyti; +Cc: intel-gfx, matthew.auld
Quoting Andi Shyti (2019-12-07 00:03:27)
> Hi Chris,
>
> [...]
>
> > diff --git a/drivers/gpu/drm/i915/gem/i915_gem_domain.c b/drivers/gpu/drm/i915/gem/i915_gem_domain.c
> > index 808eb327a29b..53e28e417cc9 100644
> > --- a/drivers/gpu/drm/i915/gem/i915_gem_domain.c
> > +++ b/drivers/gpu/drm/i915/gem/i915_gem_domain.c
> > @@ -187,21 +187,23 @@ int i915_gem_object_set_cache_level(struct drm_i915_gem_object *obj,
> > {
> > int ret;
> >
> > - assert_object_held(obj);
> > -
> > if (obj->cache_level == cache_level)
>
> you're checking here...
>
> > return 0;
> >
> > - ret = i915_gem_object_unbind(obj, I915_GEM_OBJECT_UNBIND_ACTIVE);
> > + ret = i915_gem_object_lock_interruptible(obj);
> > if (ret)
> > return ret;
> >
> > - /* The cache-level will be applied when each vma is rebound. */
> > + /* Always invalidate stale cachelines */
> > + if (obj->cache_level != cache_level) {
>
> ... and here... you might want to get rid of this one?
One outside, one inside the lock.
-Chris
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^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [Intel-gfx] [PATCH 5/5] drm/i915: Avoid calling i915_gem_object_unbind holding object lock
2019-12-07 0:20 ` Chris Wilson
@ 2019-12-07 19:24 ` Andi Shyti
0 siblings, 0 replies; 14+ messages in thread
From: Andi Shyti @ 2019-12-07 19:24 UTC (permalink / raw)
To: Chris Wilson; +Cc: intel-gfx, matthew.auld
Hi Chris,
> > > diff --git a/drivers/gpu/drm/i915/gem/i915_gem_domain.c b/drivers/gpu/drm/i915/gem/i915_gem_domain.c
> > > index 808eb327a29b..53e28e417cc9 100644
> > > --- a/drivers/gpu/drm/i915/gem/i915_gem_domain.c
> > > +++ b/drivers/gpu/drm/i915/gem/i915_gem_domain.c
> > > @@ -187,21 +187,23 @@ int i915_gem_object_set_cache_level(struct drm_i915_gem_object *obj,
> > > {
> > > int ret;
> > >
> > > - assert_object_held(obj);
> > > -
> > > if (obj->cache_level == cache_level)
> >
> > you're checking here...
> >
> > > return 0;
> > >
> > > - ret = i915_gem_object_unbind(obj, I915_GEM_OBJECT_UNBIND_ACTIVE);
> > > + ret = i915_gem_object_lock_interruptible(obj);
> > > if (ret)
> > > return ret;
> > >
> > > - /* The cache-level will be applied when each vma is rebound. */
> > > + /* Always invalidate stale cachelines */
> > > + if (obj->cache_level != cache_level) {
> >
> > ... and here... you might want to get rid of this one?
>
> One outside, one inside the lock.
OK!
Anyway, I don't see any issues with the code,
Reviewed-by: Andi Shyti <andi.shyti@intel.com>
Andi
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^ permalink raw reply [flat|nested] 14+ messages in thread
end of thread, other threads:[~2019-12-07 20:41 UTC | newest]
Thread overview: 14+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2019-12-06 10:55 [Intel-gfx] [PATCH 1/5] drm/i915/gem: Flush the pwrite through the chipset before signaling Chris Wilson
2019-12-06 10:55 ` [Intel-gfx] [PATCH 2/5] drm/i915: Claim vma while under closed_lock in i915_vma_parked() Chris Wilson
2019-12-06 10:55 ` [Intel-gfx] [PATCH 3/5] drm/i915/gt: Acquire a GT wakeref for the breadcrumb interrupt Chris Wilson
2019-12-06 10:55 ` [Intel-gfx] [PATCH 4/5] drm/i915/gem: Pin gen6_ppgtt prior to constructing the request Chris Wilson
2019-12-06 23:31 ` Andi Shyti
2019-12-06 23:35 ` Chris Wilson
2019-12-06 10:55 ` [Intel-gfx] [PATCH 5/5] drm/i915: Avoid calling i915_gem_object_unbind holding object lock Chris Wilson
2019-12-07 0:03 ` Andi Shyti
2019-12-07 0:20 ` Chris Wilson
2019-12-07 19:24 ` Andi Shyti
2019-12-06 11:02 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/5] drm/i915/gem: Flush the pwrite through the chipset before signaling Patchwork
2019-12-06 11:23 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2019-12-06 11:34 ` [Intel-gfx] [PATCH 1/5] " Tvrtko Ursulin
2019-12-06 22:38 ` [Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [1/5] " Patchwork
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