* [PATCH 1/2] drm/amdgpu: add invalidate semaphore limit for SRIOV and picasso in gmc9
@ 2019-12-11 7:36 Changfeng.Zhu
2019-12-11 12:19 ` Christian König
0 siblings, 1 reply; 2+ messages in thread
From: Changfeng.Zhu @ 2019-12-11 7:36 UTC (permalink / raw)
To: amd-gfx, Christian.Koenig, Ray.Huang, Xinmei.Huang, Alexander.Deucher
Cc: changzhu
From: changzhu <Changfeng.Zhu@amd.com>
It may fail to load guest driver in round 2 or cause Xstart problem
when using invalidate semaphore for SRIOV or picasso. So it needs avoid
using invalidate semaphore for SRIOV and picasso.
Change-Id: I806f8e99ec97be84e6aed0f5c499a53b1931b490
Signed-off-by: changzhu <Changfeng.Zhu@amd.com>
---
drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c | 44 +++++++++++++++------------
1 file changed, 24 insertions(+), 20 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
index 601667246a1c..efa55e9676be 100644
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
@@ -412,6 +412,24 @@ static uint32_t gmc_v9_0_get_invalidate_req(unsigned int vmid,
return req;
}
+/**
+ * gmc_v9_0_use_invalidate_semaphore - judge whether to use semaphore
+ *
+ * @adev: amdgpu_device pointer
+ * @vmhub: vmhub type
+ *
+ */
+static bool gmc_v9_0_use_invalidate_semaphore(struct amdgpu_device *adev,
+ uint32_t vmhub)
+{
+ return ((vmhub == AMDGPU_MMHUB_0 ||
+ vmhub == AMDGPU_MMHUB_1) &&
+ (!amdgpu_sriov_vf(adev)) &&
+ (!(adev->asic_type == CHIP_RAVEN &&
+ adev->rev_id < 0x8 &&
+ adev->pdev->device == 0x15d8)));
+}
+
/*
* GART
* VMID 0 is the physical GPU addresses as used by the kernel.
@@ -431,6 +449,7 @@ static uint32_t gmc_v9_0_get_invalidate_req(unsigned int vmid,
static void gmc_v9_0_flush_gpu_tlb(struct amdgpu_device *adev, uint32_t vmid,
uint32_t vmhub, uint32_t flush_type)
{
+ bool use_semaphore = gmc_v9_0_use_invalidate_semaphore(adev, vmhub);
const unsigned eng = 17;
u32 j, tmp;
struct amdgpu_vmhub *hub;
@@ -464,11 +483,7 @@ static void gmc_v9_0_flush_gpu_tlb(struct amdgpu_device *adev, uint32_t vmid,
*/
/* TODO: It needs to continue working on debugging with semaphore for GFXHUB as well. */
- if ((vmhub == AMDGPU_MMHUB_0 ||
- vmhub == AMDGPU_MMHUB_1) &&
- (!(adev->asic_type == CHIP_RAVEN &&
- adev->rev_id < 0x8 &&
- adev->pdev->device == 0x15d8))) {
+ if (use_semaphore) {
for (j = 0; j < adev->usec_timeout; j++) {
/* a read return value of 1 means semaphore acuqire */
tmp = RREG32_NO_KIQ(hub->vm_inv_eng0_sem + eng);
@@ -498,11 +513,7 @@ static void gmc_v9_0_flush_gpu_tlb(struct amdgpu_device *adev, uint32_t vmid,
}
/* TODO: It needs to continue working on debugging with semaphore for GFXHUB as well. */
- if ((vmhub == AMDGPU_MMHUB_0 ||
- vmhub == AMDGPU_MMHUB_1) &&
- (!(adev->asic_type == CHIP_RAVEN &&
- adev->rev_id < 0x8 &&
- adev->pdev->device == 0x15d8)))
+ if (use_semaphore)
/*
* add semaphore release after invalidation,
* write with 0 means semaphore release
@@ -520,6 +531,7 @@ static void gmc_v9_0_flush_gpu_tlb(struct amdgpu_device *adev, uint32_t vmid,
static uint64_t gmc_v9_0_emit_flush_gpu_tlb(struct amdgpu_ring *ring,
unsigned vmid, uint64_t pd_addr)
{
+ bool use_semaphore = gmc_v9_0_use_invalidate_semaphore(ring->adev, ring->funcs->vmhub);
struct amdgpu_device *adev = ring->adev;
struct amdgpu_vmhub *hub = &adev->vmhub[ring->funcs->vmhub];
uint32_t req = gmc_v9_0_get_invalidate_req(vmid, 0);
@@ -533,11 +545,7 @@ static uint64_t gmc_v9_0_emit_flush_gpu_tlb(struct amdgpu_ring *ring,
*/
/* TODO: It needs to continue working on debugging with semaphore for GFXHUB as well. */
- if ((ring->funcs->vmhub == AMDGPU_MMHUB_0 ||
- ring->funcs->vmhub == AMDGPU_MMHUB_1) &&
- (!(adev->asic_type == CHIP_RAVEN &&
- adev->rev_id < 0x8 &&
- adev->pdev->device == 0x15d8)))
+ if (use_semaphore)
/* a read return value of 1 means semaphore acuqire */
amdgpu_ring_emit_reg_wait(ring,
hub->vm_inv_eng0_sem + eng, 0x1, 0x1);
@@ -553,11 +561,7 @@ static uint64_t gmc_v9_0_emit_flush_gpu_tlb(struct amdgpu_ring *ring,
req, 1 << vmid);
/* TODO: It needs to continue working on debugging with semaphore for GFXHUB as well. */
- if ((ring->funcs->vmhub == AMDGPU_MMHUB_0 ||
- ring->funcs->vmhub == AMDGPU_MMHUB_1) &&
- (!(adev->asic_type == CHIP_RAVEN &&
- adev->rev_id < 0x8 &&
- adev->pdev->device == 0x15d8)))
+ if (use_semaphore)
/*
* add semaphore release after invalidation,
* write with 0 means semaphore release
--
2.17.1
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply related [flat|nested] 2+ messages in thread
* Re: [PATCH 1/2] drm/amdgpu: add invalidate semaphore limit for SRIOV and picasso in gmc9
2019-12-11 7:36 [PATCH 1/2] drm/amdgpu: add invalidate semaphore limit for SRIOV and picasso in gmc9 Changfeng.Zhu
@ 2019-12-11 12:19 ` Christian König
0 siblings, 0 replies; 2+ messages in thread
From: Christian König @ 2019-12-11 12:19 UTC (permalink / raw)
To: Changfeng.Zhu, amd-gfx, Ray.Huang, Xinmei.Huang, Alexander.Deucher
Am 11.12.19 um 08:36 schrieb Changfeng.Zhu:
> From: changzhu <Changfeng.Zhu@amd.com>
>
> It may fail to load guest driver in round 2 or cause Xstart problem
> when using invalidate semaphore for SRIOV or picasso. So it needs avoid
> using invalidate semaphore for SRIOV and picasso.
>
> Change-Id: I806f8e99ec97be84e6aed0f5c499a53b1931b490
> Signed-off-by: changzhu <Changfeng.Zhu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com> for the series.
> ---
> drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c | 44 +++++++++++++++------------
> 1 file changed, 24 insertions(+), 20 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
> index 601667246a1c..efa55e9676be 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
> @@ -412,6 +412,24 @@ static uint32_t gmc_v9_0_get_invalidate_req(unsigned int vmid,
> return req;
> }
>
> +/**
> + * gmc_v9_0_use_invalidate_semaphore - judge whether to use semaphore
> + *
> + * @adev: amdgpu_device pointer
> + * @vmhub: vmhub type
> + *
> + */
> +static bool gmc_v9_0_use_invalidate_semaphore(struct amdgpu_device *adev,
> + uint32_t vmhub)
> +{
> + return ((vmhub == AMDGPU_MMHUB_0 ||
> + vmhub == AMDGPU_MMHUB_1) &&
> + (!amdgpu_sriov_vf(adev)) &&
> + (!(adev->asic_type == CHIP_RAVEN &&
> + adev->rev_id < 0x8 &&
> + adev->pdev->device == 0x15d8)));
> +}
> +
> /*
> * GART
> * VMID 0 is the physical GPU addresses as used by the kernel.
> @@ -431,6 +449,7 @@ static uint32_t gmc_v9_0_get_invalidate_req(unsigned int vmid,
> static void gmc_v9_0_flush_gpu_tlb(struct amdgpu_device *adev, uint32_t vmid,
> uint32_t vmhub, uint32_t flush_type)
> {
> + bool use_semaphore = gmc_v9_0_use_invalidate_semaphore(adev, vmhub);
> const unsigned eng = 17;
> u32 j, tmp;
> struct amdgpu_vmhub *hub;
> @@ -464,11 +483,7 @@ static void gmc_v9_0_flush_gpu_tlb(struct amdgpu_device *adev, uint32_t vmid,
> */
>
> /* TODO: It needs to continue working on debugging with semaphore for GFXHUB as well. */
> - if ((vmhub == AMDGPU_MMHUB_0 ||
> - vmhub == AMDGPU_MMHUB_1) &&
> - (!(adev->asic_type == CHIP_RAVEN &&
> - adev->rev_id < 0x8 &&
> - adev->pdev->device == 0x15d8))) {
> + if (use_semaphore) {
> for (j = 0; j < adev->usec_timeout; j++) {
> /* a read return value of 1 means semaphore acuqire */
> tmp = RREG32_NO_KIQ(hub->vm_inv_eng0_sem + eng);
> @@ -498,11 +513,7 @@ static void gmc_v9_0_flush_gpu_tlb(struct amdgpu_device *adev, uint32_t vmid,
> }
>
> /* TODO: It needs to continue working on debugging with semaphore for GFXHUB as well. */
> - if ((vmhub == AMDGPU_MMHUB_0 ||
> - vmhub == AMDGPU_MMHUB_1) &&
> - (!(adev->asic_type == CHIP_RAVEN &&
> - adev->rev_id < 0x8 &&
> - adev->pdev->device == 0x15d8)))
> + if (use_semaphore)
> /*
> * add semaphore release after invalidation,
> * write with 0 means semaphore release
> @@ -520,6 +531,7 @@ static void gmc_v9_0_flush_gpu_tlb(struct amdgpu_device *adev, uint32_t vmid,
> static uint64_t gmc_v9_0_emit_flush_gpu_tlb(struct amdgpu_ring *ring,
> unsigned vmid, uint64_t pd_addr)
> {
> + bool use_semaphore = gmc_v9_0_use_invalidate_semaphore(ring->adev, ring->funcs->vmhub);
> struct amdgpu_device *adev = ring->adev;
> struct amdgpu_vmhub *hub = &adev->vmhub[ring->funcs->vmhub];
> uint32_t req = gmc_v9_0_get_invalidate_req(vmid, 0);
> @@ -533,11 +545,7 @@ static uint64_t gmc_v9_0_emit_flush_gpu_tlb(struct amdgpu_ring *ring,
> */
>
> /* TODO: It needs to continue working on debugging with semaphore for GFXHUB as well. */
> - if ((ring->funcs->vmhub == AMDGPU_MMHUB_0 ||
> - ring->funcs->vmhub == AMDGPU_MMHUB_1) &&
> - (!(adev->asic_type == CHIP_RAVEN &&
> - adev->rev_id < 0x8 &&
> - adev->pdev->device == 0x15d8)))
> + if (use_semaphore)
> /* a read return value of 1 means semaphore acuqire */
> amdgpu_ring_emit_reg_wait(ring,
> hub->vm_inv_eng0_sem + eng, 0x1, 0x1);
> @@ -553,11 +561,7 @@ static uint64_t gmc_v9_0_emit_flush_gpu_tlb(struct amdgpu_ring *ring,
> req, 1 << vmid);
>
> /* TODO: It needs to continue working on debugging with semaphore for GFXHUB as well. */
> - if ((ring->funcs->vmhub == AMDGPU_MMHUB_0 ||
> - ring->funcs->vmhub == AMDGPU_MMHUB_1) &&
> - (!(adev->asic_type == CHIP_RAVEN &&
> - adev->rev_id < 0x8 &&
> - adev->pdev->device == 0x15d8)))
> + if (use_semaphore)
> /*
> * add semaphore release after invalidation,
> * write with 0 means semaphore release
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply [flat|nested] 2+ messages in thread
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2019-12-11 7:36 [PATCH 1/2] drm/amdgpu: add invalidate semaphore limit for SRIOV and picasso in gmc9 Changfeng.Zhu
2019-12-11 12:19 ` Christian König
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