* [PATCH 0/2] media: cedrus: hevc: Minor fixes @ 2019-12-13 16:15 ` Jernej Skrabec 0 siblings, 0 replies; 18+ messages in thread From: Jernej Skrabec @ 2019-12-13 16:15 UTC (permalink / raw) To: mchehab, mripard, paul.kocialkowski, hverkuil Cc: gregkh, wens, linux-media, linux-kernel, devel, linux-arm-kernel I noticed that some HEVC videos are not decoded correctly. It turns out that same workaround which works for H264 also works for HEVC. Crash is in HEVC more noticable. Any HEVC video decoding afterwards produces only green screen. Second patch just adds missing luma bit depth which was probably overlooked in initial HEVC driver. This was developed on top of: https://patchwork.linuxtv.org/cover/60729/ Best regards, Jernej Jernej Skrabec (2): media: cedrus: Fix decoding for some HEVC videos media: cedrus: hevc: Add luma bit depth .../staging/media/sunxi/cedrus/cedrus_h265.c | 26 ++++++++++++++++--- .../staging/media/sunxi/cedrus/cedrus_regs.h | 1 + 2 files changed, 24 insertions(+), 3 deletions(-) -- 2.24.0 ^ permalink raw reply [flat|nested] 18+ messages in thread
* [PATCH 0/2] media: cedrus: hevc: Minor fixes @ 2019-12-13 16:15 ` Jernej Skrabec 0 siblings, 0 replies; 18+ messages in thread From: Jernej Skrabec @ 2019-12-13 16:15 UTC (permalink / raw) To: mchehab, mripard, paul.kocialkowski, hverkuil Cc: devel, gregkh, linux-kernel, wens, linux-arm-kernel, linux-media I noticed that some HEVC videos are not decoded correctly. It turns out that same workaround which works for H264 also works for HEVC. Crash is in HEVC more noticable. Any HEVC video decoding afterwards produces only green screen. Second patch just adds missing luma bit depth which was probably overlooked in initial HEVC driver. This was developed on top of: https://patchwork.linuxtv.org/cover/60729/ Best regards, Jernej Jernej Skrabec (2): media: cedrus: Fix decoding for some HEVC videos media: cedrus: hevc: Add luma bit depth .../staging/media/sunxi/cedrus/cedrus_h265.c | 26 ++++++++++++++++--- .../staging/media/sunxi/cedrus/cedrus_regs.h | 1 + 2 files changed, 24 insertions(+), 3 deletions(-) -- 2.24.0 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply [flat|nested] 18+ messages in thread
* [PATCH 0/2] media: cedrus: hevc: Minor fixes @ 2019-12-13 16:15 ` Jernej Skrabec 0 siblings, 0 replies; 18+ messages in thread From: Jernej Skrabec @ 2019-12-13 16:15 UTC (permalink / raw) To: mchehab, mripard, paul.kocialkowski, hverkuil Cc: devel, gregkh, linux-kernel, wens, linux-arm-kernel, linux-media I noticed that some HEVC videos are not decoded correctly. It turns out that same workaround which works for H264 also works for HEVC. Crash is in HEVC more noticable. Any HEVC video decoding afterwards produces only green screen. Second patch just adds missing luma bit depth which was probably overlooked in initial HEVC driver. This was developed on top of: https://patchwork.linuxtv.org/cover/60729/ Best regards, Jernej Jernej Skrabec (2): media: cedrus: Fix decoding for some HEVC videos media: cedrus: hevc: Add luma bit depth .../staging/media/sunxi/cedrus/cedrus_h265.c | 26 ++++++++++++++++--- .../staging/media/sunxi/cedrus/cedrus_regs.h | 1 + 2 files changed, 24 insertions(+), 3 deletions(-) -- 2.24.0 _______________________________________________ devel mailing list devel@linuxdriverproject.org http://driverdev.linuxdriverproject.org/mailman/listinfo/driverdev-devel ^ permalink raw reply [flat|nested] 18+ messages in thread
* [PATCH 1/2] media: cedrus: Fix decoding for some HEVC videos 2019-12-13 16:15 ` Jernej Skrabec (?) @ 2019-12-13 16:15 ` Jernej Skrabec -1 siblings, 0 replies; 18+ messages in thread From: Jernej Skrabec @ 2019-12-13 16:15 UTC (permalink / raw) To: mchehab, mripard, paul.kocialkowski, hverkuil Cc: gregkh, wens, linux-media, linux-kernel, devel, linux-arm-kernel It seems that for some HEVC videos at least one bitstream parsing trigger must be called in order to be decoded correctly. There is no explanation why this helps, but it was observed that several videos with this fix are now decoded correctly and there is no regression with others. Without this fix, those same videos totally crash HEVC decoder (other decoder engines are unaffected). After decoding those problematic videos, HEVC decoder always returns only green image (all zeros). Only complete HW reset helps. This fix is similar to that for H264. Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> --- .../staging/media/sunxi/cedrus/cedrus_h265.c | 25 ++++++++++++++++--- .../staging/media/sunxi/cedrus/cedrus_regs.h | 1 + 2 files changed, 23 insertions(+), 3 deletions(-) diff --git a/drivers/staging/media/sunxi/cedrus/cedrus_h265.c b/drivers/staging/media/sunxi/cedrus/cedrus_h265.c index 109d3289418c..5a207f1e137c 100644 --- a/drivers/staging/media/sunxi/cedrus/cedrus_h265.c +++ b/drivers/staging/media/sunxi/cedrus/cedrus_h265.c @@ -7,6 +7,7 @@ * Copyright (C) 2018 Bootlin */ +#include <linux/delay.h> #include <linux/types.h> #include <media/videobuf2-dma-contig.h> @@ -283,6 +284,23 @@ static void cedrus_h265_write_scaling_list(struct cedrus_ctx *ctx, } } +static void cedrus_h265_skip_bits(struct cedrus_dev *dev, int num) +{ + int count = 0; + + while (count < num) { + int tmp = min(num - count, 32); + + cedrus_write(dev, VE_DEC_H265_TRIGGER, + VE_DEC_H265_TRIGGER_FLUSH_BITS | + VE_DEC_H265_TRIGGER_TYPE_N_BITS(tmp)); + while (cedrus_read(dev, VE_DEC_H265_STATUS) & VE_DEC_H265_STATUS_VLD_BUSY) + udelay(1); + + count += tmp; + } +} + static void cedrus_h265_setup(struct cedrus_ctx *ctx, struct cedrus_run *run) { @@ -347,10 +365,9 @@ static void cedrus_h265_setup(struct cedrus_ctx *ctx, /* Source offset and length in bits. */ - reg = slice_params->data_bit_offset; - cedrus_write(dev, VE_DEC_H265_BITS_OFFSET, reg); + cedrus_write(dev, VE_DEC_H265_BITS_OFFSET, 0); - reg = slice_params->bit_size - slice_params->data_bit_offset; + reg = slice_params->bit_size; cedrus_write(dev, VE_DEC_H265_BITS_LEN, reg); /* Source beginning and end addresses. */ @@ -385,6 +402,8 @@ static void cedrus_h265_setup(struct cedrus_ctx *ctx, /* Initialize bitstream access. */ cedrus_write(dev, VE_DEC_H265_TRIGGER, VE_DEC_H265_TRIGGER_INIT_SWDEC); + cedrus_h265_skip_bits(dev, slice_params->data_bit_offset); + /* Bitstream parameters. */ reg = VE_DEC_H265_DEC_NAL_HDR_NAL_UNIT_TYPE(slice_params->nal_unit_type) | diff --git a/drivers/staging/media/sunxi/cedrus/cedrus_regs.h b/drivers/staging/media/sunxi/cedrus/cedrus_regs.h index 0d9449fe2b28..df1cceef8d93 100644 --- a/drivers/staging/media/sunxi/cedrus/cedrus_regs.h +++ b/drivers/staging/media/sunxi/cedrus/cedrus_regs.h @@ -424,6 +424,7 @@ #define VE_DEC_H265_TRIGGER (VE_ENGINE_DEC_H265 + 0x34) +#define VE_DEC_H265_TRIGGER_TYPE_N_BITS(x) (((x) & 0x3f) << 8) #define VE_DEC_H265_TRIGGER_STCD_VC1 (0x02 << 4) #define VE_DEC_H265_TRIGGER_STCD_AVS (0x01 << 4) #define VE_DEC_H265_TRIGGER_STCD_HEVC (0x00 << 4) -- 2.24.0 ^ permalink raw reply related [flat|nested] 18+ messages in thread
* [PATCH 1/2] media: cedrus: Fix decoding for some HEVC videos @ 2019-12-13 16:15 ` Jernej Skrabec 0 siblings, 0 replies; 18+ messages in thread From: Jernej Skrabec @ 2019-12-13 16:15 UTC (permalink / raw) To: mchehab, mripard, paul.kocialkowski, hverkuil Cc: devel, gregkh, linux-kernel, wens, linux-arm-kernel, linux-media It seems that for some HEVC videos at least one bitstream parsing trigger must be called in order to be decoded correctly. There is no explanation why this helps, but it was observed that several videos with this fix are now decoded correctly and there is no regression with others. Without this fix, those same videos totally crash HEVC decoder (other decoder engines are unaffected). After decoding those problematic videos, HEVC decoder always returns only green image (all zeros). Only complete HW reset helps. This fix is similar to that for H264. Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> --- .../staging/media/sunxi/cedrus/cedrus_h265.c | 25 ++++++++++++++++--- .../staging/media/sunxi/cedrus/cedrus_regs.h | 1 + 2 files changed, 23 insertions(+), 3 deletions(-) diff --git a/drivers/staging/media/sunxi/cedrus/cedrus_h265.c b/drivers/staging/media/sunxi/cedrus/cedrus_h265.c index 109d3289418c..5a207f1e137c 100644 --- a/drivers/staging/media/sunxi/cedrus/cedrus_h265.c +++ b/drivers/staging/media/sunxi/cedrus/cedrus_h265.c @@ -7,6 +7,7 @@ * Copyright (C) 2018 Bootlin */ +#include <linux/delay.h> #include <linux/types.h> #include <media/videobuf2-dma-contig.h> @@ -283,6 +284,23 @@ static void cedrus_h265_write_scaling_list(struct cedrus_ctx *ctx, } } +static void cedrus_h265_skip_bits(struct cedrus_dev *dev, int num) +{ + int count = 0; + + while (count < num) { + int tmp = min(num - count, 32); + + cedrus_write(dev, VE_DEC_H265_TRIGGER, + VE_DEC_H265_TRIGGER_FLUSH_BITS | + VE_DEC_H265_TRIGGER_TYPE_N_BITS(tmp)); + while (cedrus_read(dev, VE_DEC_H265_STATUS) & VE_DEC_H265_STATUS_VLD_BUSY) + udelay(1); + + count += tmp; + } +} + static void cedrus_h265_setup(struct cedrus_ctx *ctx, struct cedrus_run *run) { @@ -347,10 +365,9 @@ static void cedrus_h265_setup(struct cedrus_ctx *ctx, /* Source offset and length in bits. */ - reg = slice_params->data_bit_offset; - cedrus_write(dev, VE_DEC_H265_BITS_OFFSET, reg); + cedrus_write(dev, VE_DEC_H265_BITS_OFFSET, 0); - reg = slice_params->bit_size - slice_params->data_bit_offset; + reg = slice_params->bit_size; cedrus_write(dev, VE_DEC_H265_BITS_LEN, reg); /* Source beginning and end addresses. */ @@ -385,6 +402,8 @@ static void cedrus_h265_setup(struct cedrus_ctx *ctx, /* Initialize bitstream access. */ cedrus_write(dev, VE_DEC_H265_TRIGGER, VE_DEC_H265_TRIGGER_INIT_SWDEC); + cedrus_h265_skip_bits(dev, slice_params->data_bit_offset); + /* Bitstream parameters. */ reg = VE_DEC_H265_DEC_NAL_HDR_NAL_UNIT_TYPE(slice_params->nal_unit_type) | diff --git a/drivers/staging/media/sunxi/cedrus/cedrus_regs.h b/drivers/staging/media/sunxi/cedrus/cedrus_regs.h index 0d9449fe2b28..df1cceef8d93 100644 --- a/drivers/staging/media/sunxi/cedrus/cedrus_regs.h +++ b/drivers/staging/media/sunxi/cedrus/cedrus_regs.h @@ -424,6 +424,7 @@ #define VE_DEC_H265_TRIGGER (VE_ENGINE_DEC_H265 + 0x34) +#define VE_DEC_H265_TRIGGER_TYPE_N_BITS(x) (((x) & 0x3f) << 8) #define VE_DEC_H265_TRIGGER_STCD_VC1 (0x02 << 4) #define VE_DEC_H265_TRIGGER_STCD_AVS (0x01 << 4) #define VE_DEC_H265_TRIGGER_STCD_HEVC (0x00 << 4) -- 2.24.0 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply related [flat|nested] 18+ messages in thread
* [PATCH 1/2] media: cedrus: Fix decoding for some HEVC videos @ 2019-12-13 16:15 ` Jernej Skrabec 0 siblings, 0 replies; 18+ messages in thread From: Jernej Skrabec @ 2019-12-13 16:15 UTC (permalink / raw) To: mchehab, mripard, paul.kocialkowski, hverkuil Cc: devel, gregkh, linux-kernel, wens, linux-arm-kernel, linux-media It seems that for some HEVC videos at least one bitstream parsing trigger must be called in order to be decoded correctly. There is no explanation why this helps, but it was observed that several videos with this fix are now decoded correctly and there is no regression with others. Without this fix, those same videos totally crash HEVC decoder (other decoder engines are unaffected). After decoding those problematic videos, HEVC decoder always returns only green image (all zeros). Only complete HW reset helps. This fix is similar to that for H264. Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> --- .../staging/media/sunxi/cedrus/cedrus_h265.c | 25 ++++++++++++++++--- .../staging/media/sunxi/cedrus/cedrus_regs.h | 1 + 2 files changed, 23 insertions(+), 3 deletions(-) diff --git a/drivers/staging/media/sunxi/cedrus/cedrus_h265.c b/drivers/staging/media/sunxi/cedrus/cedrus_h265.c index 109d3289418c..5a207f1e137c 100644 --- a/drivers/staging/media/sunxi/cedrus/cedrus_h265.c +++ b/drivers/staging/media/sunxi/cedrus/cedrus_h265.c @@ -7,6 +7,7 @@ * Copyright (C) 2018 Bootlin */ +#include <linux/delay.h> #include <linux/types.h> #include <media/videobuf2-dma-contig.h> @@ -283,6 +284,23 @@ static void cedrus_h265_write_scaling_list(struct cedrus_ctx *ctx, } } +static void cedrus_h265_skip_bits(struct cedrus_dev *dev, int num) +{ + int count = 0; + + while (count < num) { + int tmp = min(num - count, 32); + + cedrus_write(dev, VE_DEC_H265_TRIGGER, + VE_DEC_H265_TRIGGER_FLUSH_BITS | + VE_DEC_H265_TRIGGER_TYPE_N_BITS(tmp)); + while (cedrus_read(dev, VE_DEC_H265_STATUS) & VE_DEC_H265_STATUS_VLD_BUSY) + udelay(1); + + count += tmp; + } +} + static void cedrus_h265_setup(struct cedrus_ctx *ctx, struct cedrus_run *run) { @@ -347,10 +365,9 @@ static void cedrus_h265_setup(struct cedrus_ctx *ctx, /* Source offset and length in bits. */ - reg = slice_params->data_bit_offset; - cedrus_write(dev, VE_DEC_H265_BITS_OFFSET, reg); + cedrus_write(dev, VE_DEC_H265_BITS_OFFSET, 0); - reg = slice_params->bit_size - slice_params->data_bit_offset; + reg = slice_params->bit_size; cedrus_write(dev, VE_DEC_H265_BITS_LEN, reg); /* Source beginning and end addresses. */ @@ -385,6 +402,8 @@ static void cedrus_h265_setup(struct cedrus_ctx *ctx, /* Initialize bitstream access. */ cedrus_write(dev, VE_DEC_H265_TRIGGER, VE_DEC_H265_TRIGGER_INIT_SWDEC); + cedrus_h265_skip_bits(dev, slice_params->data_bit_offset); + /* Bitstream parameters. */ reg = VE_DEC_H265_DEC_NAL_HDR_NAL_UNIT_TYPE(slice_params->nal_unit_type) | diff --git a/drivers/staging/media/sunxi/cedrus/cedrus_regs.h b/drivers/staging/media/sunxi/cedrus/cedrus_regs.h index 0d9449fe2b28..df1cceef8d93 100644 --- a/drivers/staging/media/sunxi/cedrus/cedrus_regs.h +++ b/drivers/staging/media/sunxi/cedrus/cedrus_regs.h @@ -424,6 +424,7 @@ #define VE_DEC_H265_TRIGGER (VE_ENGINE_DEC_H265 + 0x34) +#define VE_DEC_H265_TRIGGER_TYPE_N_BITS(x) (((x) & 0x3f) << 8) #define VE_DEC_H265_TRIGGER_STCD_VC1 (0x02 << 4) #define VE_DEC_H265_TRIGGER_STCD_AVS (0x01 << 4) #define VE_DEC_H265_TRIGGER_STCD_HEVC (0x00 << 4) -- 2.24.0 _______________________________________________ devel mailing list devel@linuxdriverproject.org http://driverdev.linuxdriverproject.org/mailman/listinfo/driverdev-devel ^ permalink raw reply related [flat|nested] 18+ messages in thread
* Re: [PATCH 1/2] media: cedrus: Fix decoding for some HEVC videos 2019-12-13 16:15 ` Jernej Skrabec (?) @ 2019-12-18 8:40 ` Paul Kocialkowski -1 siblings, 0 replies; 18+ messages in thread From: Paul Kocialkowski @ 2019-12-18 8:40 UTC (permalink / raw) To: Jernej Skrabec Cc: mchehab, mripard, hverkuil, gregkh, wens, linux-media, linux-kernel, devel, linux-arm-kernel [-- Attachment #1: Type: text/plain, Size: 3870 bytes --] Hi, On Fri 13 Dec 19, 17:15, Jernej Skrabec wrote: > It seems that for some HEVC videos at least one bitstream parsing > trigger must be called in order to be decoded correctly. There is no > explanation why this helps, but it was observed that several videos > with this fix are now decoded correctly and there is no regression with > others. > > Without this fix, those same videos totally crash HEVC decoder (other > decoder engines are unaffected). After decoding those problematic > videos, HEVC decoder always returns only green image (all zeros). > Only complete HW reset helps. > > This fix is similar to that for H264. Thanks for the fix, interesting that the same issue shows up on HEVC! I suspect that Allwinner folks never really tested the engine without using it for bitstream parsing. Acked-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com> Cheers, Paul > Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> > --- > .../staging/media/sunxi/cedrus/cedrus_h265.c | 25 ++++++++++++++++--- > .../staging/media/sunxi/cedrus/cedrus_regs.h | 1 + > 2 files changed, 23 insertions(+), 3 deletions(-) > > diff --git a/drivers/staging/media/sunxi/cedrus/cedrus_h265.c b/drivers/staging/media/sunxi/cedrus/cedrus_h265.c > index 109d3289418c..5a207f1e137c 100644 > --- a/drivers/staging/media/sunxi/cedrus/cedrus_h265.c > +++ b/drivers/staging/media/sunxi/cedrus/cedrus_h265.c > @@ -7,6 +7,7 @@ > * Copyright (C) 2018 Bootlin > */ > > +#include <linux/delay.h> > #include <linux/types.h> > > #include <media/videobuf2-dma-contig.h> > @@ -283,6 +284,23 @@ static void cedrus_h265_write_scaling_list(struct cedrus_ctx *ctx, > } > } > > +static void cedrus_h265_skip_bits(struct cedrus_dev *dev, int num) > +{ > + int count = 0; > + > + while (count < num) { > + int tmp = min(num - count, 32); > + > + cedrus_write(dev, VE_DEC_H265_TRIGGER, > + VE_DEC_H265_TRIGGER_FLUSH_BITS | > + VE_DEC_H265_TRIGGER_TYPE_N_BITS(tmp)); > + while (cedrus_read(dev, VE_DEC_H265_STATUS) & VE_DEC_H265_STATUS_VLD_BUSY) > + udelay(1); > + > + count += tmp; > + } > +} > + > static void cedrus_h265_setup(struct cedrus_ctx *ctx, > struct cedrus_run *run) > { > @@ -347,10 +365,9 @@ static void cedrus_h265_setup(struct cedrus_ctx *ctx, > > /* Source offset and length in bits. */ > > - reg = slice_params->data_bit_offset; > - cedrus_write(dev, VE_DEC_H265_BITS_OFFSET, reg); > + cedrus_write(dev, VE_DEC_H265_BITS_OFFSET, 0); > > - reg = slice_params->bit_size - slice_params->data_bit_offset; > + reg = slice_params->bit_size; > cedrus_write(dev, VE_DEC_H265_BITS_LEN, reg); > > /* Source beginning and end addresses. */ > @@ -385,6 +402,8 @@ static void cedrus_h265_setup(struct cedrus_ctx *ctx, > /* Initialize bitstream access. */ > cedrus_write(dev, VE_DEC_H265_TRIGGER, VE_DEC_H265_TRIGGER_INIT_SWDEC); > > + cedrus_h265_skip_bits(dev, slice_params->data_bit_offset); > + > /* Bitstream parameters. */ > > reg = VE_DEC_H265_DEC_NAL_HDR_NAL_UNIT_TYPE(slice_params->nal_unit_type) | > diff --git a/drivers/staging/media/sunxi/cedrus/cedrus_regs.h b/drivers/staging/media/sunxi/cedrus/cedrus_regs.h > index 0d9449fe2b28..df1cceef8d93 100644 > --- a/drivers/staging/media/sunxi/cedrus/cedrus_regs.h > +++ b/drivers/staging/media/sunxi/cedrus/cedrus_regs.h > @@ -424,6 +424,7 @@ > > #define VE_DEC_H265_TRIGGER (VE_ENGINE_DEC_H265 + 0x34) > > +#define VE_DEC_H265_TRIGGER_TYPE_N_BITS(x) (((x) & 0x3f) << 8) > #define VE_DEC_H265_TRIGGER_STCD_VC1 (0x02 << 4) > #define VE_DEC_H265_TRIGGER_STCD_AVS (0x01 << 4) > #define VE_DEC_H265_TRIGGER_STCD_HEVC (0x00 << 4) > -- > 2.24.0 > -- Paul Kocialkowski, Bootlin Embedded Linux and kernel engineering https://bootlin.com [-- Attachment #2: signature.asc --] [-- Type: application/pgp-signature, Size: 488 bytes --] ^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [PATCH 1/2] media: cedrus: Fix decoding for some HEVC videos @ 2019-12-18 8:40 ` Paul Kocialkowski 0 siblings, 0 replies; 18+ messages in thread From: Paul Kocialkowski @ 2019-12-18 8:40 UTC (permalink / raw) To: Jernej Skrabec Cc: devel, gregkh, linux-kernel, mripard, hverkuil, wens, mchehab, linux-arm-kernel, linux-media [-- Attachment #1.1: Type: text/plain, Size: 3870 bytes --] Hi, On Fri 13 Dec 19, 17:15, Jernej Skrabec wrote: > It seems that for some HEVC videos at least one bitstream parsing > trigger must be called in order to be decoded correctly. There is no > explanation why this helps, but it was observed that several videos > with this fix are now decoded correctly and there is no regression with > others. > > Without this fix, those same videos totally crash HEVC decoder (other > decoder engines are unaffected). After decoding those problematic > videos, HEVC decoder always returns only green image (all zeros). > Only complete HW reset helps. > > This fix is similar to that for H264. Thanks for the fix, interesting that the same issue shows up on HEVC! I suspect that Allwinner folks never really tested the engine without using it for bitstream parsing. Acked-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com> Cheers, Paul > Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> > --- > .../staging/media/sunxi/cedrus/cedrus_h265.c | 25 ++++++++++++++++--- > .../staging/media/sunxi/cedrus/cedrus_regs.h | 1 + > 2 files changed, 23 insertions(+), 3 deletions(-) > > diff --git a/drivers/staging/media/sunxi/cedrus/cedrus_h265.c b/drivers/staging/media/sunxi/cedrus/cedrus_h265.c > index 109d3289418c..5a207f1e137c 100644 > --- a/drivers/staging/media/sunxi/cedrus/cedrus_h265.c > +++ b/drivers/staging/media/sunxi/cedrus/cedrus_h265.c > @@ -7,6 +7,7 @@ > * Copyright (C) 2018 Bootlin > */ > > +#include <linux/delay.h> > #include <linux/types.h> > > #include <media/videobuf2-dma-contig.h> > @@ -283,6 +284,23 @@ static void cedrus_h265_write_scaling_list(struct cedrus_ctx *ctx, > } > } > > +static void cedrus_h265_skip_bits(struct cedrus_dev *dev, int num) > +{ > + int count = 0; > + > + while (count < num) { > + int tmp = min(num - count, 32); > + > + cedrus_write(dev, VE_DEC_H265_TRIGGER, > + VE_DEC_H265_TRIGGER_FLUSH_BITS | > + VE_DEC_H265_TRIGGER_TYPE_N_BITS(tmp)); > + while (cedrus_read(dev, VE_DEC_H265_STATUS) & VE_DEC_H265_STATUS_VLD_BUSY) > + udelay(1); > + > + count += tmp; > + } > +} > + > static void cedrus_h265_setup(struct cedrus_ctx *ctx, > struct cedrus_run *run) > { > @@ -347,10 +365,9 @@ static void cedrus_h265_setup(struct cedrus_ctx *ctx, > > /* Source offset and length in bits. */ > > - reg = slice_params->data_bit_offset; > - cedrus_write(dev, VE_DEC_H265_BITS_OFFSET, reg); > + cedrus_write(dev, VE_DEC_H265_BITS_OFFSET, 0); > > - reg = slice_params->bit_size - slice_params->data_bit_offset; > + reg = slice_params->bit_size; > cedrus_write(dev, VE_DEC_H265_BITS_LEN, reg); > > /* Source beginning and end addresses. */ > @@ -385,6 +402,8 @@ static void cedrus_h265_setup(struct cedrus_ctx *ctx, > /* Initialize bitstream access. */ > cedrus_write(dev, VE_DEC_H265_TRIGGER, VE_DEC_H265_TRIGGER_INIT_SWDEC); > > + cedrus_h265_skip_bits(dev, slice_params->data_bit_offset); > + > /* Bitstream parameters. */ > > reg = VE_DEC_H265_DEC_NAL_HDR_NAL_UNIT_TYPE(slice_params->nal_unit_type) | > diff --git a/drivers/staging/media/sunxi/cedrus/cedrus_regs.h b/drivers/staging/media/sunxi/cedrus/cedrus_regs.h > index 0d9449fe2b28..df1cceef8d93 100644 > --- a/drivers/staging/media/sunxi/cedrus/cedrus_regs.h > +++ b/drivers/staging/media/sunxi/cedrus/cedrus_regs.h > @@ -424,6 +424,7 @@ > > #define VE_DEC_H265_TRIGGER (VE_ENGINE_DEC_H265 + 0x34) > > +#define VE_DEC_H265_TRIGGER_TYPE_N_BITS(x) (((x) & 0x3f) << 8) > #define VE_DEC_H265_TRIGGER_STCD_VC1 (0x02 << 4) > #define VE_DEC_H265_TRIGGER_STCD_AVS (0x01 << 4) > #define VE_DEC_H265_TRIGGER_STCD_HEVC (0x00 << 4) > -- > 2.24.0 > -- Paul Kocialkowski, Bootlin Embedded Linux and kernel engineering https://bootlin.com [-- Attachment #1.2: signature.asc --] [-- Type: application/pgp-signature, Size: 488 bytes --] [-- Attachment #2: Type: text/plain, Size: 176 bytes --] _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [PATCH 1/2] media: cedrus: Fix decoding for some HEVC videos @ 2019-12-18 8:40 ` Paul Kocialkowski 0 siblings, 0 replies; 18+ messages in thread From: Paul Kocialkowski @ 2019-12-18 8:40 UTC (permalink / raw) To: Jernej Skrabec Cc: devel, gregkh, linux-kernel, mripard, hverkuil, wens, mchehab, linux-arm-kernel, linux-media [-- Attachment #1.1: Type: text/plain, Size: 3870 bytes --] Hi, On Fri 13 Dec 19, 17:15, Jernej Skrabec wrote: > It seems that for some HEVC videos at least one bitstream parsing > trigger must be called in order to be decoded correctly. There is no > explanation why this helps, but it was observed that several videos > with this fix are now decoded correctly and there is no regression with > others. > > Without this fix, those same videos totally crash HEVC decoder (other > decoder engines are unaffected). After decoding those problematic > videos, HEVC decoder always returns only green image (all zeros). > Only complete HW reset helps. > > This fix is similar to that for H264. Thanks for the fix, interesting that the same issue shows up on HEVC! I suspect that Allwinner folks never really tested the engine without using it for bitstream parsing. Acked-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com> Cheers, Paul > Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> > --- > .../staging/media/sunxi/cedrus/cedrus_h265.c | 25 ++++++++++++++++--- > .../staging/media/sunxi/cedrus/cedrus_regs.h | 1 + > 2 files changed, 23 insertions(+), 3 deletions(-) > > diff --git a/drivers/staging/media/sunxi/cedrus/cedrus_h265.c b/drivers/staging/media/sunxi/cedrus/cedrus_h265.c > index 109d3289418c..5a207f1e137c 100644 > --- a/drivers/staging/media/sunxi/cedrus/cedrus_h265.c > +++ b/drivers/staging/media/sunxi/cedrus/cedrus_h265.c > @@ -7,6 +7,7 @@ > * Copyright (C) 2018 Bootlin > */ > > +#include <linux/delay.h> > #include <linux/types.h> > > #include <media/videobuf2-dma-contig.h> > @@ -283,6 +284,23 @@ static void cedrus_h265_write_scaling_list(struct cedrus_ctx *ctx, > } > } > > +static void cedrus_h265_skip_bits(struct cedrus_dev *dev, int num) > +{ > + int count = 0; > + > + while (count < num) { > + int tmp = min(num - count, 32); > + > + cedrus_write(dev, VE_DEC_H265_TRIGGER, > + VE_DEC_H265_TRIGGER_FLUSH_BITS | > + VE_DEC_H265_TRIGGER_TYPE_N_BITS(tmp)); > + while (cedrus_read(dev, VE_DEC_H265_STATUS) & VE_DEC_H265_STATUS_VLD_BUSY) > + udelay(1); > + > + count += tmp; > + } > +} > + > static void cedrus_h265_setup(struct cedrus_ctx *ctx, > struct cedrus_run *run) > { > @@ -347,10 +365,9 @@ static void cedrus_h265_setup(struct cedrus_ctx *ctx, > > /* Source offset and length in bits. */ > > - reg = slice_params->data_bit_offset; > - cedrus_write(dev, VE_DEC_H265_BITS_OFFSET, reg); > + cedrus_write(dev, VE_DEC_H265_BITS_OFFSET, 0); > > - reg = slice_params->bit_size - slice_params->data_bit_offset; > + reg = slice_params->bit_size; > cedrus_write(dev, VE_DEC_H265_BITS_LEN, reg); > > /* Source beginning and end addresses. */ > @@ -385,6 +402,8 @@ static void cedrus_h265_setup(struct cedrus_ctx *ctx, > /* Initialize bitstream access. */ > cedrus_write(dev, VE_DEC_H265_TRIGGER, VE_DEC_H265_TRIGGER_INIT_SWDEC); > > + cedrus_h265_skip_bits(dev, slice_params->data_bit_offset); > + > /* Bitstream parameters. */ > > reg = VE_DEC_H265_DEC_NAL_HDR_NAL_UNIT_TYPE(slice_params->nal_unit_type) | > diff --git a/drivers/staging/media/sunxi/cedrus/cedrus_regs.h b/drivers/staging/media/sunxi/cedrus/cedrus_regs.h > index 0d9449fe2b28..df1cceef8d93 100644 > --- a/drivers/staging/media/sunxi/cedrus/cedrus_regs.h > +++ b/drivers/staging/media/sunxi/cedrus/cedrus_regs.h > @@ -424,6 +424,7 @@ > > #define VE_DEC_H265_TRIGGER (VE_ENGINE_DEC_H265 + 0x34) > > +#define VE_DEC_H265_TRIGGER_TYPE_N_BITS(x) (((x) & 0x3f) << 8) > #define VE_DEC_H265_TRIGGER_STCD_VC1 (0x02 << 4) > #define VE_DEC_H265_TRIGGER_STCD_AVS (0x01 << 4) > #define VE_DEC_H265_TRIGGER_STCD_HEVC (0x00 << 4) > -- > 2.24.0 > -- Paul Kocialkowski, Bootlin Embedded Linux and kernel engineering https://bootlin.com [-- Attachment #1.2: signature.asc --] [-- Type: application/pgp-signature, Size: 488 bytes --] [-- Attachment #2: Type: text/plain, Size: 169 bytes --] _______________________________________________ devel mailing list devel@linuxdriverproject.org http://driverdev.linuxdriverproject.org/mailman/listinfo/driverdev-devel ^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [PATCH 1/2] media: cedrus: Fix decoding for some HEVC videos 2019-12-18 8:40 ` Paul Kocialkowski (?) @ 2019-12-18 16:40 ` Jernej Škrabec -1 siblings, 0 replies; 18+ messages in thread From: Jernej Škrabec @ 2019-12-18 16:40 UTC (permalink / raw) To: Paul Kocialkowski Cc: mchehab, mripard, hverkuil, gregkh, wens, linux-media, linux-kernel, devel, linux-arm-kernel Hi! Dne sreda, 18. december 2019 ob 09:40:47 CET je Paul Kocialkowski napisal(a): > Hi, > > On Fri 13 Dec 19, 17:15, Jernej Skrabec wrote: > > It seems that for some HEVC videos at least one bitstream parsing > > trigger must be called in order to be decoded correctly. There is no > > explanation why this helps, but it was observed that several videos > > with this fix are now decoded correctly and there is no regression with > > others. > > > > Without this fix, those same videos totally crash HEVC decoder (other > > decoder engines are unaffected). After decoding those problematic > > videos, HEVC decoder always returns only green image (all zeros). > > Only complete HW reset helps. > > > > This fix is similar to that for H264. > > Thanks for the fix, interesting that the same issue shows up on HEVC! > I suspect that Allwinner folks never really tested the engine without > using it for bitstream parsing. That thought also crossed my mind. It's even worse with VP8. There you can't have proper decoding at all without calling one specific bitstream parsing function. > > Acked-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com> Thanks! Best regards, Jernej > > Cheers, > > Paul > > > Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> > > --- > > > > .../staging/media/sunxi/cedrus/cedrus_h265.c | 25 ++++++++++++++++--- > > .../staging/media/sunxi/cedrus/cedrus_regs.h | 1 + > > 2 files changed, 23 insertions(+), 3 deletions(-) > > > > diff --git a/drivers/staging/media/sunxi/cedrus/cedrus_h265.c > > b/drivers/staging/media/sunxi/cedrus/cedrus_h265.c index > > 109d3289418c..5a207f1e137c 100644 > > --- a/drivers/staging/media/sunxi/cedrus/cedrus_h265.c > > +++ b/drivers/staging/media/sunxi/cedrus/cedrus_h265.c > > @@ -7,6 +7,7 @@ > > > > * Copyright (C) 2018 Bootlin > > */ > > > > +#include <linux/delay.h> > > > > #include <linux/types.h> > > > > #include <media/videobuf2-dma-contig.h> > > > > @@ -283,6 +284,23 @@ static void cedrus_h265_write_scaling_list(struct > > cedrus_ctx *ctx,> > > } > > > > } > > > > +static void cedrus_h265_skip_bits(struct cedrus_dev *dev, int num) > > +{ > > + int count = 0; > > + > > + while (count < num) { > > + int tmp = min(num - count, 32); > > + > > + cedrus_write(dev, VE_DEC_H265_TRIGGER, > > + VE_DEC_H265_TRIGGER_FLUSH_BITS | > > + VE_DEC_H265_TRIGGER_TYPE_N_BITS(tmp)); > > + while (cedrus_read(dev, VE_DEC_H265_STATUS) & > > VE_DEC_H265_STATUS_VLD_BUSY) + udelay(1); > > + > > + count += tmp; > > + } > > +} > > + > > > > static void cedrus_h265_setup(struct cedrus_ctx *ctx, > > > > struct cedrus_run *run) > > > > { > > > > @@ -347,10 +365,9 @@ static void cedrus_h265_setup(struct cedrus_ctx *ctx, > > > > /* Source offset and length in bits. */ > > > > - reg = slice_params->data_bit_offset; > > - cedrus_write(dev, VE_DEC_H265_BITS_OFFSET, reg); > > + cedrus_write(dev, VE_DEC_H265_BITS_OFFSET, 0); > > > > - reg = slice_params->bit_size - slice_params->data_bit_offset; > > + reg = slice_params->bit_size; > > > > cedrus_write(dev, VE_DEC_H265_BITS_LEN, reg); > > > > /* Source beginning and end addresses. */ > > > > @@ -385,6 +402,8 @@ static void cedrus_h265_setup(struct cedrus_ctx *ctx, > > > > /* Initialize bitstream access. */ > > cedrus_write(dev, VE_DEC_H265_TRIGGER, VE_DEC_H265_TRIGGER_INIT_SWDEC); > > > > + cedrus_h265_skip_bits(dev, slice_params->data_bit_offset); > > + > > > > /* Bitstream parameters. */ > > > > reg = VE_DEC_H265_DEC_NAL_HDR_NAL_UNIT_TYPE(slice_params- >nal_unit_type) > > | > > > > diff --git a/drivers/staging/media/sunxi/cedrus/cedrus_regs.h > > b/drivers/staging/media/sunxi/cedrus/cedrus_regs.h index > > 0d9449fe2b28..df1cceef8d93 100644 > > --- a/drivers/staging/media/sunxi/cedrus/cedrus_regs.h > > +++ b/drivers/staging/media/sunxi/cedrus/cedrus_regs.h > > @@ -424,6 +424,7 @@ > > > > #define VE_DEC_H265_TRIGGER (VE_ENGINE_DEC_H265 + 0x34) > > > > +#define VE_DEC_H265_TRIGGER_TYPE_N_BITS(x) (((x) & 0x3f) << 8) > > > > #define VE_DEC_H265_TRIGGER_STCD_VC1 (0x02 << 4) > > #define VE_DEC_H265_TRIGGER_STCD_AVS (0x01 << 4) > > #define VE_DEC_H265_TRIGGER_STCD_HEVC (0x00 << 4) ^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [PATCH 1/2] media: cedrus: Fix decoding for some HEVC videos @ 2019-12-18 16:40 ` Jernej Škrabec 0 siblings, 0 replies; 18+ messages in thread From: Jernej Škrabec @ 2019-12-18 16:40 UTC (permalink / raw) To: Paul Kocialkowski Cc: devel, gregkh, linux-kernel, mripard, hverkuil, wens, mchehab, linux-arm-kernel, linux-media Hi! Dne sreda, 18. december 2019 ob 09:40:47 CET je Paul Kocialkowski napisal(a): > Hi, > > On Fri 13 Dec 19, 17:15, Jernej Skrabec wrote: > > It seems that for some HEVC videos at least one bitstream parsing > > trigger must be called in order to be decoded correctly. There is no > > explanation why this helps, but it was observed that several videos > > with this fix are now decoded correctly and there is no regression with > > others. > > > > Without this fix, those same videos totally crash HEVC decoder (other > > decoder engines are unaffected). After decoding those problematic > > videos, HEVC decoder always returns only green image (all zeros). > > Only complete HW reset helps. > > > > This fix is similar to that for H264. > > Thanks for the fix, interesting that the same issue shows up on HEVC! > I suspect that Allwinner folks never really tested the engine without > using it for bitstream parsing. That thought also crossed my mind. It's even worse with VP8. There you can't have proper decoding at all without calling one specific bitstream parsing function. > > Acked-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com> Thanks! Best regards, Jernej > > Cheers, > > Paul > > > Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> > > --- > > > > .../staging/media/sunxi/cedrus/cedrus_h265.c | 25 ++++++++++++++++--- > > .../staging/media/sunxi/cedrus/cedrus_regs.h | 1 + > > 2 files changed, 23 insertions(+), 3 deletions(-) > > > > diff --git a/drivers/staging/media/sunxi/cedrus/cedrus_h265.c > > b/drivers/staging/media/sunxi/cedrus/cedrus_h265.c index > > 109d3289418c..5a207f1e137c 100644 > > --- a/drivers/staging/media/sunxi/cedrus/cedrus_h265.c > > +++ b/drivers/staging/media/sunxi/cedrus/cedrus_h265.c > > @@ -7,6 +7,7 @@ > > > > * Copyright (C) 2018 Bootlin > > */ > > > > +#include <linux/delay.h> > > > > #include <linux/types.h> > > > > #include <media/videobuf2-dma-contig.h> > > > > @@ -283,6 +284,23 @@ static void cedrus_h265_write_scaling_list(struct > > cedrus_ctx *ctx,> > > } > > > > } > > > > +static void cedrus_h265_skip_bits(struct cedrus_dev *dev, int num) > > +{ > > + int count = 0; > > + > > + while (count < num) { > > + int tmp = min(num - count, 32); > > + > > + cedrus_write(dev, VE_DEC_H265_TRIGGER, > > + VE_DEC_H265_TRIGGER_FLUSH_BITS | > > + VE_DEC_H265_TRIGGER_TYPE_N_BITS(tmp)); > > + while (cedrus_read(dev, VE_DEC_H265_STATUS) & > > VE_DEC_H265_STATUS_VLD_BUSY) + udelay(1); > > + > > + count += tmp; > > + } > > +} > > + > > > > static void cedrus_h265_setup(struct cedrus_ctx *ctx, > > > > struct cedrus_run *run) > > > > { > > > > @@ -347,10 +365,9 @@ static void cedrus_h265_setup(struct cedrus_ctx *ctx, > > > > /* Source offset and length in bits. */ > > > > - reg = slice_params->data_bit_offset; > > - cedrus_write(dev, VE_DEC_H265_BITS_OFFSET, reg); > > + cedrus_write(dev, VE_DEC_H265_BITS_OFFSET, 0); > > > > - reg = slice_params->bit_size - slice_params->data_bit_offset; > > + reg = slice_params->bit_size; > > > > cedrus_write(dev, VE_DEC_H265_BITS_LEN, reg); > > > > /* Source beginning and end addresses. */ > > > > @@ -385,6 +402,8 @@ static void cedrus_h265_setup(struct cedrus_ctx *ctx, > > > > /* Initialize bitstream access. */ > > cedrus_write(dev, VE_DEC_H265_TRIGGER, VE_DEC_H265_TRIGGER_INIT_SWDEC); > > > > + cedrus_h265_skip_bits(dev, slice_params->data_bit_offset); > > + > > > > /* Bitstream parameters. */ > > > > reg = VE_DEC_H265_DEC_NAL_HDR_NAL_UNIT_TYPE(slice_params- >nal_unit_type) > > | > > > > diff --git a/drivers/staging/media/sunxi/cedrus/cedrus_regs.h > > b/drivers/staging/media/sunxi/cedrus/cedrus_regs.h index > > 0d9449fe2b28..df1cceef8d93 100644 > > --- a/drivers/staging/media/sunxi/cedrus/cedrus_regs.h > > +++ b/drivers/staging/media/sunxi/cedrus/cedrus_regs.h > > @@ -424,6 +424,7 @@ > > > > #define VE_DEC_H265_TRIGGER (VE_ENGINE_DEC_H265 + 0x34) > > > > +#define VE_DEC_H265_TRIGGER_TYPE_N_BITS(x) (((x) & 0x3f) << 8) > > > > #define VE_DEC_H265_TRIGGER_STCD_VC1 (0x02 << 4) > > #define VE_DEC_H265_TRIGGER_STCD_AVS (0x01 << 4) > > #define VE_DEC_H265_TRIGGER_STCD_HEVC (0x00 << 4) _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [PATCH 1/2] media: cedrus: Fix decoding for some HEVC videos @ 2019-12-18 16:40 ` Jernej Škrabec 0 siblings, 0 replies; 18+ messages in thread From: Jernej Škrabec @ 2019-12-18 16:40 UTC (permalink / raw) To: Paul Kocialkowski Cc: devel, gregkh, linux-kernel, mripard, hverkuil, wens, mchehab, linux-arm-kernel, linux-media Hi! Dne sreda, 18. december 2019 ob 09:40:47 CET je Paul Kocialkowski napisal(a): > Hi, > > On Fri 13 Dec 19, 17:15, Jernej Skrabec wrote: > > It seems that for some HEVC videos at least one bitstream parsing > > trigger must be called in order to be decoded correctly. There is no > > explanation why this helps, but it was observed that several videos > > with this fix are now decoded correctly and there is no regression with > > others. > > > > Without this fix, those same videos totally crash HEVC decoder (other > > decoder engines are unaffected). After decoding those problematic > > videos, HEVC decoder always returns only green image (all zeros). > > Only complete HW reset helps. > > > > This fix is similar to that for H264. > > Thanks for the fix, interesting that the same issue shows up on HEVC! > I suspect that Allwinner folks never really tested the engine without > using it for bitstream parsing. That thought also crossed my mind. It's even worse with VP8. There you can't have proper decoding at all without calling one specific bitstream parsing function. > > Acked-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com> Thanks! Best regards, Jernej > > Cheers, > > Paul > > > Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> > > --- > > > > .../staging/media/sunxi/cedrus/cedrus_h265.c | 25 ++++++++++++++++--- > > .../staging/media/sunxi/cedrus/cedrus_regs.h | 1 + > > 2 files changed, 23 insertions(+), 3 deletions(-) > > > > diff --git a/drivers/staging/media/sunxi/cedrus/cedrus_h265.c > > b/drivers/staging/media/sunxi/cedrus/cedrus_h265.c index > > 109d3289418c..5a207f1e137c 100644 > > --- a/drivers/staging/media/sunxi/cedrus/cedrus_h265.c > > +++ b/drivers/staging/media/sunxi/cedrus/cedrus_h265.c > > @@ -7,6 +7,7 @@ > > > > * Copyright (C) 2018 Bootlin > > */ > > > > +#include <linux/delay.h> > > > > #include <linux/types.h> > > > > #include <media/videobuf2-dma-contig.h> > > > > @@ -283,6 +284,23 @@ static void cedrus_h265_write_scaling_list(struct > > cedrus_ctx *ctx,> > > } > > > > } > > > > +static void cedrus_h265_skip_bits(struct cedrus_dev *dev, int num) > > +{ > > + int count = 0; > > + > > + while (count < num) { > > + int tmp = min(num - count, 32); > > + > > + cedrus_write(dev, VE_DEC_H265_TRIGGER, > > + VE_DEC_H265_TRIGGER_FLUSH_BITS | > > + VE_DEC_H265_TRIGGER_TYPE_N_BITS(tmp)); > > + while (cedrus_read(dev, VE_DEC_H265_STATUS) & > > VE_DEC_H265_STATUS_VLD_BUSY) + udelay(1); > > + > > + count += tmp; > > + } > > +} > > + > > > > static void cedrus_h265_setup(struct cedrus_ctx *ctx, > > > > struct cedrus_run *run) > > > > { > > > > @@ -347,10 +365,9 @@ static void cedrus_h265_setup(struct cedrus_ctx *ctx, > > > > /* Source offset and length in bits. */ > > > > - reg = slice_params->data_bit_offset; > > - cedrus_write(dev, VE_DEC_H265_BITS_OFFSET, reg); > > + cedrus_write(dev, VE_DEC_H265_BITS_OFFSET, 0); > > > > - reg = slice_params->bit_size - slice_params->data_bit_offset; > > + reg = slice_params->bit_size; > > > > cedrus_write(dev, VE_DEC_H265_BITS_LEN, reg); > > > > /* Source beginning and end addresses. */ > > > > @@ -385,6 +402,8 @@ static void cedrus_h265_setup(struct cedrus_ctx *ctx, > > > > /* Initialize bitstream access. */ > > cedrus_write(dev, VE_DEC_H265_TRIGGER, VE_DEC_H265_TRIGGER_INIT_SWDEC); > > > > + cedrus_h265_skip_bits(dev, slice_params->data_bit_offset); > > + > > > > /* Bitstream parameters. */ > > > > reg = VE_DEC_H265_DEC_NAL_HDR_NAL_UNIT_TYPE(slice_params- >nal_unit_type) > > | > > > > diff --git a/drivers/staging/media/sunxi/cedrus/cedrus_regs.h > > b/drivers/staging/media/sunxi/cedrus/cedrus_regs.h index > > 0d9449fe2b28..df1cceef8d93 100644 > > --- a/drivers/staging/media/sunxi/cedrus/cedrus_regs.h > > +++ b/drivers/staging/media/sunxi/cedrus/cedrus_regs.h > > @@ -424,6 +424,7 @@ > > > > #define VE_DEC_H265_TRIGGER (VE_ENGINE_DEC_H265 + 0x34) > > > > +#define VE_DEC_H265_TRIGGER_TYPE_N_BITS(x) (((x) & 0x3f) << 8) > > > > #define VE_DEC_H265_TRIGGER_STCD_VC1 (0x02 << 4) > > #define VE_DEC_H265_TRIGGER_STCD_AVS (0x01 << 4) > > #define VE_DEC_H265_TRIGGER_STCD_HEVC (0x00 << 4) _______________________________________________ devel mailing list devel@linuxdriverproject.org http://driverdev.linuxdriverproject.org/mailman/listinfo/driverdev-devel ^ permalink raw reply [flat|nested] 18+ messages in thread
* [PATCH 2/2] media: cedrus: hevc: Add luma bit depth 2019-12-13 16:15 ` Jernej Skrabec (?) @ 2019-12-13 16:15 ` Jernej Skrabec -1 siblings, 0 replies; 18+ messages in thread From: Jernej Skrabec @ 2019-12-13 16:15 UTC (permalink / raw) To: mchehab, mripard, paul.kocialkowski, hverkuil Cc: gregkh, wens, linux-media, linux-kernel, devel, linux-arm-kernel Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> --- drivers/staging/media/sunxi/cedrus/cedrus_h265.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/staging/media/sunxi/cedrus/cedrus_h265.c b/drivers/staging/media/sunxi/cedrus/cedrus_h265.c index 5a207f1e137c..13e58977309f 100644 --- a/drivers/staging/media/sunxi/cedrus/cedrus_h265.c +++ b/drivers/staging/media/sunxi/cedrus/cedrus_h265.c @@ -420,6 +420,7 @@ static void cedrus_h265_setup(struct cedrus_ctx *ctx, VE_DEC_H265_DEC_SPS_HDR_LOG2_DIFF_MAX_MIN_LUMA_CODING_BLOCK_SIZE(sps->log2_diff_max_min_luma_coding_block_size) | VE_DEC_H265_DEC_SPS_HDR_LOG2_MIN_LUMA_CODING_BLOCK_SIZE_MINUS3(sps->log2_min_luma_coding_block_size_minus3) | VE_DEC_H265_DEC_SPS_HDR_BIT_DEPTH_CHROMA_MINUS8(sps->bit_depth_chroma_minus8) | + VE_DEC_H265_DEC_SPS_HDR_BIT_DEPTH_LUMA_MINUS8(sps->bit_depth_luma_minus8) | VE_DEC_H265_DEC_SPS_HDR_CHROMA_FORMAT_IDC(sps->chroma_format_idc); reg |= VE_DEC_H265_FLAG(VE_DEC_H265_DEC_SPS_HDR_FLAG_STRONG_INTRA_SMOOTHING_ENABLE, -- 2.24.0 ^ permalink raw reply related [flat|nested] 18+ messages in thread
* [PATCH 2/2] media: cedrus: hevc: Add luma bit depth @ 2019-12-13 16:15 ` Jernej Skrabec 0 siblings, 0 replies; 18+ messages in thread From: Jernej Skrabec @ 2019-12-13 16:15 UTC (permalink / raw) To: mchehab, mripard, paul.kocialkowski, hverkuil Cc: devel, gregkh, linux-kernel, wens, linux-arm-kernel, linux-media Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> --- drivers/staging/media/sunxi/cedrus/cedrus_h265.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/staging/media/sunxi/cedrus/cedrus_h265.c b/drivers/staging/media/sunxi/cedrus/cedrus_h265.c index 5a207f1e137c..13e58977309f 100644 --- a/drivers/staging/media/sunxi/cedrus/cedrus_h265.c +++ b/drivers/staging/media/sunxi/cedrus/cedrus_h265.c @@ -420,6 +420,7 @@ static void cedrus_h265_setup(struct cedrus_ctx *ctx, VE_DEC_H265_DEC_SPS_HDR_LOG2_DIFF_MAX_MIN_LUMA_CODING_BLOCK_SIZE(sps->log2_diff_max_min_luma_coding_block_size) | VE_DEC_H265_DEC_SPS_HDR_LOG2_MIN_LUMA_CODING_BLOCK_SIZE_MINUS3(sps->log2_min_luma_coding_block_size_minus3) | VE_DEC_H265_DEC_SPS_HDR_BIT_DEPTH_CHROMA_MINUS8(sps->bit_depth_chroma_minus8) | + VE_DEC_H265_DEC_SPS_HDR_BIT_DEPTH_LUMA_MINUS8(sps->bit_depth_luma_minus8) | VE_DEC_H265_DEC_SPS_HDR_CHROMA_FORMAT_IDC(sps->chroma_format_idc); reg |= VE_DEC_H265_FLAG(VE_DEC_H265_DEC_SPS_HDR_FLAG_STRONG_INTRA_SMOOTHING_ENABLE, -- 2.24.0 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply related [flat|nested] 18+ messages in thread
* [PATCH 2/2] media: cedrus: hevc: Add luma bit depth @ 2019-12-13 16:15 ` Jernej Skrabec 0 siblings, 0 replies; 18+ messages in thread From: Jernej Skrabec @ 2019-12-13 16:15 UTC (permalink / raw) To: mchehab, mripard, paul.kocialkowski, hverkuil Cc: devel, gregkh, linux-kernel, wens, linux-arm-kernel, linux-media Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> --- drivers/staging/media/sunxi/cedrus/cedrus_h265.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/staging/media/sunxi/cedrus/cedrus_h265.c b/drivers/staging/media/sunxi/cedrus/cedrus_h265.c index 5a207f1e137c..13e58977309f 100644 --- a/drivers/staging/media/sunxi/cedrus/cedrus_h265.c +++ b/drivers/staging/media/sunxi/cedrus/cedrus_h265.c @@ -420,6 +420,7 @@ static void cedrus_h265_setup(struct cedrus_ctx *ctx, VE_DEC_H265_DEC_SPS_HDR_LOG2_DIFF_MAX_MIN_LUMA_CODING_BLOCK_SIZE(sps->log2_diff_max_min_luma_coding_block_size) | VE_DEC_H265_DEC_SPS_HDR_LOG2_MIN_LUMA_CODING_BLOCK_SIZE_MINUS3(sps->log2_min_luma_coding_block_size_minus3) | VE_DEC_H265_DEC_SPS_HDR_BIT_DEPTH_CHROMA_MINUS8(sps->bit_depth_chroma_minus8) | + VE_DEC_H265_DEC_SPS_HDR_BIT_DEPTH_LUMA_MINUS8(sps->bit_depth_luma_minus8) | VE_DEC_H265_DEC_SPS_HDR_CHROMA_FORMAT_IDC(sps->chroma_format_idc); reg |= VE_DEC_H265_FLAG(VE_DEC_H265_DEC_SPS_HDR_FLAG_STRONG_INTRA_SMOOTHING_ENABLE, -- 2.24.0 _______________________________________________ devel mailing list devel@linuxdriverproject.org http://driverdev.linuxdriverproject.org/mailman/listinfo/driverdev-devel ^ permalink raw reply related [flat|nested] 18+ messages in thread
* Re: [PATCH 2/2] media: cedrus: hevc: Add luma bit depth 2019-12-13 16:15 ` Jernej Skrabec (?) @ 2019-12-18 8:43 ` Paul Kocialkowski -1 siblings, 0 replies; 18+ messages in thread From: Paul Kocialkowski @ 2019-12-18 8:43 UTC (permalink / raw) To: Jernej Skrabec Cc: mchehab, mripard, hverkuil, gregkh, wens, linux-media, linux-kernel, devel, linux-arm-kernel [-- Attachment #1: Type: text/plain, Size: 1390 bytes --] Hi, On Fri 13 Dec 19, 17:15, Jernej Skrabec wrote: > Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Good catch, thanks! Acked-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com> Cheers, Paul > --- > drivers/staging/media/sunxi/cedrus/cedrus_h265.c | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/drivers/staging/media/sunxi/cedrus/cedrus_h265.c b/drivers/staging/media/sunxi/cedrus/cedrus_h265.c > index 5a207f1e137c..13e58977309f 100644 > --- a/drivers/staging/media/sunxi/cedrus/cedrus_h265.c > +++ b/drivers/staging/media/sunxi/cedrus/cedrus_h265.c > @@ -420,6 +420,7 @@ static void cedrus_h265_setup(struct cedrus_ctx *ctx, > VE_DEC_H265_DEC_SPS_HDR_LOG2_DIFF_MAX_MIN_LUMA_CODING_BLOCK_SIZE(sps->log2_diff_max_min_luma_coding_block_size) | > VE_DEC_H265_DEC_SPS_HDR_LOG2_MIN_LUMA_CODING_BLOCK_SIZE_MINUS3(sps->log2_min_luma_coding_block_size_minus3) | > VE_DEC_H265_DEC_SPS_HDR_BIT_DEPTH_CHROMA_MINUS8(sps->bit_depth_chroma_minus8) | > + VE_DEC_H265_DEC_SPS_HDR_BIT_DEPTH_LUMA_MINUS8(sps->bit_depth_luma_minus8) | > VE_DEC_H265_DEC_SPS_HDR_CHROMA_FORMAT_IDC(sps->chroma_format_idc); > > reg |= VE_DEC_H265_FLAG(VE_DEC_H265_DEC_SPS_HDR_FLAG_STRONG_INTRA_SMOOTHING_ENABLE, > -- > 2.24.0 > -- Paul Kocialkowski, Bootlin Embedded Linux and kernel engineering https://bootlin.com [-- Attachment #2: signature.asc --] [-- Type: application/pgp-signature, Size: 488 bytes --] ^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [PATCH 2/2] media: cedrus: hevc: Add luma bit depth @ 2019-12-18 8:43 ` Paul Kocialkowski 0 siblings, 0 replies; 18+ messages in thread From: Paul Kocialkowski @ 2019-12-18 8:43 UTC (permalink / raw) To: Jernej Skrabec Cc: devel, gregkh, linux-kernel, mripard, hverkuil, wens, mchehab, linux-arm-kernel, linux-media [-- Attachment #1.1: Type: text/plain, Size: 1390 bytes --] Hi, On Fri 13 Dec 19, 17:15, Jernej Skrabec wrote: > Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Good catch, thanks! Acked-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com> Cheers, Paul > --- > drivers/staging/media/sunxi/cedrus/cedrus_h265.c | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/drivers/staging/media/sunxi/cedrus/cedrus_h265.c b/drivers/staging/media/sunxi/cedrus/cedrus_h265.c > index 5a207f1e137c..13e58977309f 100644 > --- a/drivers/staging/media/sunxi/cedrus/cedrus_h265.c > +++ b/drivers/staging/media/sunxi/cedrus/cedrus_h265.c > @@ -420,6 +420,7 @@ static void cedrus_h265_setup(struct cedrus_ctx *ctx, > VE_DEC_H265_DEC_SPS_HDR_LOG2_DIFF_MAX_MIN_LUMA_CODING_BLOCK_SIZE(sps->log2_diff_max_min_luma_coding_block_size) | > VE_DEC_H265_DEC_SPS_HDR_LOG2_MIN_LUMA_CODING_BLOCK_SIZE_MINUS3(sps->log2_min_luma_coding_block_size_minus3) | > VE_DEC_H265_DEC_SPS_HDR_BIT_DEPTH_CHROMA_MINUS8(sps->bit_depth_chroma_minus8) | > + VE_DEC_H265_DEC_SPS_HDR_BIT_DEPTH_LUMA_MINUS8(sps->bit_depth_luma_minus8) | > VE_DEC_H265_DEC_SPS_HDR_CHROMA_FORMAT_IDC(sps->chroma_format_idc); > > reg |= VE_DEC_H265_FLAG(VE_DEC_H265_DEC_SPS_HDR_FLAG_STRONG_INTRA_SMOOTHING_ENABLE, > -- > 2.24.0 > -- Paul Kocialkowski, Bootlin Embedded Linux and kernel engineering https://bootlin.com [-- Attachment #1.2: signature.asc --] [-- Type: application/pgp-signature, Size: 488 bytes --] [-- Attachment #2: Type: text/plain, Size: 176 bytes --] _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [PATCH 2/2] media: cedrus: hevc: Add luma bit depth @ 2019-12-18 8:43 ` Paul Kocialkowski 0 siblings, 0 replies; 18+ messages in thread From: Paul Kocialkowski @ 2019-12-18 8:43 UTC (permalink / raw) To: Jernej Skrabec Cc: devel, gregkh, linux-kernel, mripard, hverkuil, wens, mchehab, linux-arm-kernel, linux-media [-- Attachment #1.1: Type: text/plain, Size: 1390 bytes --] Hi, On Fri 13 Dec 19, 17:15, Jernej Skrabec wrote: > Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Good catch, thanks! Acked-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com> Cheers, Paul > --- > drivers/staging/media/sunxi/cedrus/cedrus_h265.c | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/drivers/staging/media/sunxi/cedrus/cedrus_h265.c b/drivers/staging/media/sunxi/cedrus/cedrus_h265.c > index 5a207f1e137c..13e58977309f 100644 > --- a/drivers/staging/media/sunxi/cedrus/cedrus_h265.c > +++ b/drivers/staging/media/sunxi/cedrus/cedrus_h265.c > @@ -420,6 +420,7 @@ static void cedrus_h265_setup(struct cedrus_ctx *ctx, > VE_DEC_H265_DEC_SPS_HDR_LOG2_DIFF_MAX_MIN_LUMA_CODING_BLOCK_SIZE(sps->log2_diff_max_min_luma_coding_block_size) | > VE_DEC_H265_DEC_SPS_HDR_LOG2_MIN_LUMA_CODING_BLOCK_SIZE_MINUS3(sps->log2_min_luma_coding_block_size_minus3) | > VE_DEC_H265_DEC_SPS_HDR_BIT_DEPTH_CHROMA_MINUS8(sps->bit_depth_chroma_minus8) | > + VE_DEC_H265_DEC_SPS_HDR_BIT_DEPTH_LUMA_MINUS8(sps->bit_depth_luma_minus8) | > VE_DEC_H265_DEC_SPS_HDR_CHROMA_FORMAT_IDC(sps->chroma_format_idc); > > reg |= VE_DEC_H265_FLAG(VE_DEC_H265_DEC_SPS_HDR_FLAG_STRONG_INTRA_SMOOTHING_ENABLE, > -- > 2.24.0 > -- Paul Kocialkowski, Bootlin Embedded Linux and kernel engineering https://bootlin.com [-- Attachment #1.2: signature.asc --] [-- Type: application/pgp-signature, Size: 488 bytes --] [-- Attachment #2: Type: text/plain, Size: 169 bytes --] _______________________________________________ devel mailing list devel@linuxdriverproject.org http://driverdev.linuxdriverproject.org/mailman/listinfo/driverdev-devel ^ permalink raw reply [flat|nested] 18+ messages in thread
end of thread, other threads:[~2019-12-18 16:40 UTC | newest] Thread overview: 18+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- 2019-12-13 16:15 [PATCH 0/2] media: cedrus: hevc: Minor fixes Jernej Skrabec 2019-12-13 16:15 ` Jernej Skrabec 2019-12-13 16:15 ` Jernej Skrabec 2019-12-13 16:15 ` [PATCH 1/2] media: cedrus: Fix decoding for some HEVC videos Jernej Skrabec 2019-12-13 16:15 ` Jernej Skrabec 2019-12-13 16:15 ` Jernej Skrabec 2019-12-18 8:40 ` Paul Kocialkowski 2019-12-18 8:40 ` Paul Kocialkowski 2019-12-18 8:40 ` Paul Kocialkowski 2019-12-18 16:40 ` Jernej Škrabec 2019-12-18 16:40 ` Jernej Škrabec 2019-12-18 16:40 ` Jernej Škrabec 2019-12-13 16:15 ` [PATCH 2/2] media: cedrus: hevc: Add luma bit depth Jernej Skrabec 2019-12-13 16:15 ` Jernej Skrabec 2019-12-13 16:15 ` Jernej Skrabec 2019-12-18 8:43 ` Paul Kocialkowski 2019-12-18 8:43 ` Paul Kocialkowski 2019-12-18 8:43 ` Paul Kocialkowski
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