* [PATCH v2] x86/resctrl: Fix potential memory leak
@ 2019-12-20 16:43 Shakeel Butt
2019-12-20 17:35 ` Reinette Chatre
2020-01-01 10:17 ` Borislav Petkov
0 siblings, 2 replies; 4+ messages in thread
From: Shakeel Butt @ 2019-12-20 16:43 UTC (permalink / raw)
To: Reinette Chatre, Fenghua Yu
Cc: Thomas Gleixner, Ingo Molnar, Borislav Petkov, x86, linux-kernel,
Shakeel Butt
The set_cache_qos_cfg() is leaking memory when the given level is not
RDT_RESOURCE_L3 or RDT_RESOURCE_L2. However at the moment, this function
is called with only valid levels but to make it more robust and future
proof, we should be handling the error path gracefully.
Fixes: 99adde9b370de ("x86/intel_rdt: Enable L2 CDP in MSR IA32_L2_QOS_CFG")
Signed-off-by: Shakeel Butt <shakeelb@google.com>
Acked-by: Fenghua Yu <fenghua.yu@intel.com>
---
Changes since v1:
- Updated the commit message
arch/x86/kernel/cpu/resctrl/rdtgroup.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/arch/x86/kernel/cpu/resctrl/rdtgroup.c b/arch/x86/kernel/cpu/resctrl/rdtgroup.c
index 2e3b06d6bbc6..a0c279c7f4b9 100644
--- a/arch/x86/kernel/cpu/resctrl/rdtgroup.c
+++ b/arch/x86/kernel/cpu/resctrl/rdtgroup.c
@@ -1748,8 +1748,10 @@ static int set_cache_qos_cfg(int level, bool enable)
update = l3_qos_cfg_update;
else if (level == RDT_RESOURCE_L2)
update = l2_qos_cfg_update;
- else
+ else {
+ free_cpumask_var(cpu_mask);
return -EINVAL;
+ }
r_l = &rdt_resources_all[level];
list_for_each_entry(d, &r_l->domains, list) {
--
2.24.1.735.g03f4e72817-goog
^ permalink raw reply related [flat|nested] 4+ messages in thread
* Re: [PATCH v2] x86/resctrl: Fix potential memory leak
2019-12-20 16:43 [PATCH v2] x86/resctrl: Fix potential memory leak Shakeel Butt
@ 2019-12-20 17:35 ` Reinette Chatre
2020-01-01 10:17 ` Borislav Petkov
1 sibling, 0 replies; 4+ messages in thread
From: Reinette Chatre @ 2019-12-20 17:35 UTC (permalink / raw)
To: Shakeel Butt, Fenghua Yu
Cc: Thomas Gleixner, Ingo Molnar, Borislav Petkov, x86, linux-kernel
Hi Shakeel,
On 12/20/2019 8:43 AM, Shakeel Butt wrote:
> The set_cache_qos_cfg() is leaking memory when the given level is not
> RDT_RESOURCE_L3 or RDT_RESOURCE_L2. However at the moment, this function
> is called with only valid levels but to make it more robust and future
> proof, we should be handling the error path gracefully.
>
> Fixes: 99adde9b370de ("x86/intel_rdt: Enable L2 CDP in MSR IA32_L2_QOS_CFG")
> Signed-off-by: Shakeel Butt <shakeelb@google.com>
> Acked-by: Fenghua Yu <fenghua.yu@intel.com>
> ---
> Changes since v1:
> - Updated the commit message
Thank you.
Acked-by: Reinette Chatre <reinette.chatre@intel.com>
Reinette
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH v2] x86/resctrl: Fix potential memory leak
2019-12-20 16:43 [PATCH v2] x86/resctrl: Fix potential memory leak Shakeel Butt
2019-12-20 17:35 ` Reinette Chatre
@ 2020-01-01 10:17 ` Borislav Petkov
2020-01-02 16:52 ` Shakeel Butt
1 sibling, 1 reply; 4+ messages in thread
From: Borislav Petkov @ 2020-01-01 10:17 UTC (permalink / raw)
To: Shakeel Butt
Cc: Reinette Chatre, Fenghua Yu, Thomas Gleixner, Ingo Molnar, x86,
linux-kernel
On Fri, Dec 20, 2019 at 08:43:58AM -0800, Shakeel Butt wrote:
> The set_cache_qos_cfg() is leaking memory when the given level is not
> RDT_RESOURCE_L3 or RDT_RESOURCE_L2. However at the moment, this function
> is called with only valid levels but to make it more robust and future
> proof, we should be handling the error path gracefully.
>
> Fixes: 99adde9b370de ("x86/intel_rdt: Enable L2 CDP in MSR IA32_L2_QOS_CFG")
> Signed-off-by: Shakeel Butt <shakeelb@google.com>
> Acked-by: Fenghua Yu <fenghua.yu@intel.com>
> ---
> Changes since v1:
> - Updated the commit message
>
>
> arch/x86/kernel/cpu/resctrl/rdtgroup.c | 4 +++-
> 1 file changed, 3 insertions(+), 1 deletion(-)
>
> diff --git a/arch/x86/kernel/cpu/resctrl/rdtgroup.c b/arch/x86/kernel/cpu/resctrl/rdtgroup.c
> index 2e3b06d6bbc6..a0c279c7f4b9 100644
> --- a/arch/x86/kernel/cpu/resctrl/rdtgroup.c
> +++ b/arch/x86/kernel/cpu/resctrl/rdtgroup.c
> @@ -1748,8 +1748,10 @@ static int set_cache_qos_cfg(int level, bool enable)
> update = l3_qos_cfg_update;
> else if (level == RDT_RESOURCE_L2)
> update = l2_qos_cfg_update;
> - else
> + else {
> + free_cpumask_var(cpu_mask);
> return -EINVAL;
> + }
And why can't the level check happen first and the allocation second,
thus needing to allocate the cpu mask only when the level is valid?
--
Regards/Gruss,
Boris.
https://people.kernel.org/tglx/notes-about-netiquette
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH v2] x86/resctrl: Fix potential memory leak
2020-01-01 10:17 ` Borislav Petkov
@ 2020-01-02 16:52 ` Shakeel Butt
0 siblings, 0 replies; 4+ messages in thread
From: Shakeel Butt @ 2020-01-02 16:52 UTC (permalink / raw)
To: Borislav Petkov
Cc: Reinette Chatre, Fenghua Yu, Thomas Gleixner, Ingo Molnar, x86, LKML
On Wed, Jan 1, 2020 at 2:17 AM Borislav Petkov <bp@alien8.de> wrote:
>
> On Fri, Dec 20, 2019 at 08:43:58AM -0800, Shakeel Butt wrote:
> > The set_cache_qos_cfg() is leaking memory when the given level is not
> > RDT_RESOURCE_L3 or RDT_RESOURCE_L2. However at the moment, this function
> > is called with only valid levels but to make it more robust and future
> > proof, we should be handling the error path gracefully.
> >
> > Fixes: 99adde9b370de ("x86/intel_rdt: Enable L2 CDP in MSR IA32_L2_QOS_CFG")
> > Signed-off-by: Shakeel Butt <shakeelb@google.com>
> > Acked-by: Fenghua Yu <fenghua.yu@intel.com>
> > ---
> > Changes since v1:
> > - Updated the commit message
> >
> >
> > arch/x86/kernel/cpu/resctrl/rdtgroup.c | 4 +++-
> > 1 file changed, 3 insertions(+), 1 deletion(-)
> >
> > diff --git a/arch/x86/kernel/cpu/resctrl/rdtgroup.c b/arch/x86/kernel/cpu/resctrl/rdtgroup.c
> > index 2e3b06d6bbc6..a0c279c7f4b9 100644
> > --- a/arch/x86/kernel/cpu/resctrl/rdtgroup.c
> > +++ b/arch/x86/kernel/cpu/resctrl/rdtgroup.c
> > @@ -1748,8 +1748,10 @@ static int set_cache_qos_cfg(int level, bool enable)
> > update = l3_qos_cfg_update;
> > else if (level == RDT_RESOURCE_L2)
> > update = l2_qos_cfg_update;
> > - else
> > + else {
> > + free_cpumask_var(cpu_mask);
> > return -EINVAL;
> > + }
>
> And why can't the level check happen first and the allocation second,
> thus needing to allocate the cpu mask only when the level is valid?
>
We definitely can. Will send the v3 patch.
Shakeel
^ permalink raw reply [flat|nested] 4+ messages in thread
end of thread, other threads:[~2020-01-02 16:52 UTC | newest]
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2019-12-20 16:43 [PATCH v2] x86/resctrl: Fix potential memory leak Shakeel Butt
2019-12-20 17:35 ` Reinette Chatre
2020-01-01 10:17 ` Borislav Petkov
2020-01-02 16:52 ` Shakeel Butt
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