* [Intel-gfx] [CI] drm/i915/gt: Tidy up checking active timelines during retirement
@ 2019-12-22 20:19 Chris Wilson
2019-12-22 21:04 ` [Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915/gt: Tidy up checking active timelines during retirement (rev5) Patchwork
0 siblings, 1 reply; 7+ messages in thread
From: Chris Wilson @ 2019-12-22 20:19 UTC (permalink / raw)
To: intel-gfx
Use the status of the timeline request list as we retire it to determine
if the timeline is still active.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Andi Shyti <andi.shyti@intel.com>
---
drivers/gpu/drm/i915/gt/intel_gt_requests.c | 14 +++++++++-----
1 file changed, 9 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_gt_requests.c b/drivers/gpu/drm/i915/gt/intel_gt_requests.c
index b4f04614230e..866bd4e16eae 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt_requests.c
+++ b/drivers/gpu/drm/i915/gt/intel_gt_requests.c
@@ -14,13 +14,15 @@
#include "intel_gt_requests.h"
#include "intel_timeline.h"
-static void retire_requests(struct intel_timeline *tl)
+static bool retire_requests(struct intel_timeline *tl)
{
struct i915_request *rq, *rn;
list_for_each_entry_safe(rq, rn, &tl->requests, link)
if (!i915_request_retire(rq))
- break;
+ return false;
+
+ return true;
}
static bool flush_submission(struct intel_gt *gt)
@@ -29,6 +31,9 @@ static bool flush_submission(struct intel_gt *gt)
enum intel_engine_id id;
bool active = false;
+ if (!intel_gt_pm_is_awake(gt))
+ return false;
+
for_each_engine(engine, gt, id) {
active |= intel_engine_flush_submission(engine);
active |= flush_work(&engine->retire_work);
@@ -145,16 +150,15 @@ long intel_gt_retire_requests_timeout(struct intel_gt *gt, long timeout)
}
}
- retire_requests(tl);
+ active_count += !retire_requests(tl);
+ flush_submission(gt);
spin_lock(&timelines->lock);
/* Resume iteration after dropping lock */
list_safe_reset_next(tl, tn, link);
if (atomic_dec_and_test(&tl->active_count))
list_del(&tl->link);
- else
- active_count += i915_active_fence_isset(&tl->last_request);
mutex_unlock(&tl->mutex);
--
2.24.1
_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 7+ messages in thread
* [Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915/gt: Tidy up checking active timelines during retirement (rev5)
2019-12-22 20:19 [Intel-gfx] [CI] drm/i915/gt: Tidy up checking active timelines during retirement Chris Wilson
@ 2019-12-22 21:04 ` Patchwork
0 siblings, 0 replies; 7+ messages in thread
From: Patchwork @ 2019-12-22 21:04 UTC (permalink / raw)
To: Chris Wilson; +Cc: intel-gfx
== Series Details ==
Series: drm/i915/gt: Tidy up checking active timelines during retirement (rev5)
URL : https://patchwork.freedesktop.org/series/71266/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_7623 -> Patchwork_15886
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with Patchwork_15886 absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_15886, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15886/index.html
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in Patchwork_15886:
### IGT changes ###
#### Possible regressions ####
* igt@gem_close_race@basic-threads:
- fi-glk-dsi: [PASS][1] -> [DMESG-WARN][2]
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7623/fi-glk-dsi/igt@gem_close_race@basic-threads.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15886/fi-glk-dsi/igt@gem_close_race@basic-threads.html
* igt@i915_module_load@reload-with-fault-injection:
- fi-kbl-7500u: NOTRUN -> [INCOMPLETE][3]
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15886/fi-kbl-7500u/igt@i915_module_load@reload-with-fault-injection.html
* igt@i915_selftest@live_gt_heartbeat:
- fi-bsw-nick: [PASS][4] -> [DMESG-FAIL][5]
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7623/fi-bsw-nick/igt@i915_selftest@live_gt_heartbeat.html
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15886/fi-bsw-nick/igt@i915_selftest@live_gt_heartbeat.html
* igt@i915_selftest@live_perf:
- fi-ivb-3770: [PASS][6] -> [FAIL][7]
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7623/fi-ivb-3770/igt@i915_selftest@live_perf.html
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15886/fi-ivb-3770/igt@i915_selftest@live_perf.html
* igt@i915_selftest@live_requests:
- fi-hsw-4770r: [PASS][8] -> [FAIL][9]
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7623/fi-hsw-4770r/igt@i915_selftest@live_requests.html
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15886/fi-hsw-4770r/igt@i915_selftest@live_requests.html
Known issues
------------
Here are the changes found in Patchwork_15886 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@gem_exec_suspend@basic-s3:
- fi-icl-u2: [PASS][10] -> [FAIL][11] ([fdo#103375])
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7623/fi-icl-u2/igt@gem_exec_suspend@basic-s3.html
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15886/fi-icl-u2/igt@gem_exec_suspend@basic-s3.html
* igt@gem_exec_suspend@basic-s4-devices:
- fi-icl-u2: [PASS][12] -> [FAIL][13] ([fdo#111550])
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7623/fi-icl-u2/igt@gem_exec_suspend@basic-s4-devices.html
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15886/fi-icl-u2/igt@gem_exec_suspend@basic-s4-devices.html
* igt@i915_selftest@live_blt:
- fi-hsw-4770: [PASS][14] -> [DMESG-FAIL][15] ([i915#553] / [i915#725])
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7623/fi-hsw-4770/igt@i915_selftest@live_blt.html
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15886/fi-hsw-4770/igt@i915_selftest@live_blt.html
#### Possible fixes ####
* igt@gem_close_race@basic-threads:
- {fi-tgl-guc}: [INCOMPLETE][16] ([i915#435]) -> [PASS][17]
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7623/fi-tgl-guc/igt@gem_close_race@basic-threads.html
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15886/fi-tgl-guc/igt@gem_close_race@basic-threads.html
* igt@gem_exec_create@basic:
- {fi-tgl-u}: [INCOMPLETE][18] ([fdo#111736]) -> [PASS][19]
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7623/fi-tgl-u/igt@gem_exec_create@basic.html
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15886/fi-tgl-u/igt@gem_exec_create@basic.html
* igt@i915_selftest@live_blt:
- fi-ivb-3770: [DMESG-FAIL][20] ([i915#725]) -> [PASS][21]
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7623/fi-ivb-3770/igt@i915_selftest@live_blt.html
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15886/fi-ivb-3770/igt@i915_selftest@live_blt.html
* igt@i915_selftest@live_execlists:
- fi-icl-u2: [INCOMPLETE][22] ([fdo#112175] / [i915#140]) -> [PASS][23]
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7623/fi-icl-u2/igt@i915_selftest@live_execlists.html
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15886/fi-icl-u2/igt@i915_selftest@live_execlists.html
- fi-kbl-soraka: [DMESG-FAIL][24] -> [PASS][25]
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7623/fi-kbl-soraka/igt@i915_selftest@live_execlists.html
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15886/fi-kbl-soraka/igt@i915_selftest@live_execlists.html
- fi-kbl-r: [INCOMPLETE][26] ([fdo#112175] / [fdo#112259]) -> [PASS][27]
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7623/fi-kbl-r/igt@i915_selftest@live_execlists.html
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15886/fi-kbl-r/igt@i915_selftest@live_execlists.html
* igt@i915_selftest@live_gem_contexts:
- fi-byt-j1900: [INCOMPLETE][28] ([i915#45]) -> [PASS][29]
[28]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7623/fi-byt-j1900/igt@i915_selftest@live_gem_contexts.html
[29]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15886/fi-byt-j1900/igt@i915_selftest@live_gem_contexts.html
#### Warnings ####
* igt@gem_exec_suspend@basic-s4-devices:
- fi-kbl-x1275: [DMESG-WARN][30] ([fdo#107139] / [i915#62] / [i915#92]) -> [DMESG-WARN][31] ([fdo#107139] / [i915#62] / [i915#92] / [i915#95])
[30]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7623/fi-kbl-x1275/igt@gem_exec_suspend@basic-s4-devices.html
[31]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15886/fi-kbl-x1275/igt@gem_exec_suspend@basic-s4-devices.html
* igt@kms_chamelium@common-hpd-after-suspend:
- fi-icl-u2: [DMESG-WARN][32] ([IGT#4] / [i915#263]) -> [FAIL][33] ([fdo#103375])
[32]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7623/fi-icl-u2/igt@kms_chamelium@common-hpd-after-suspend.html
[33]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15886/fi-icl-u2/igt@kms_chamelium@common-hpd-after-suspend.html
* igt@kms_flip@basic-flip-vs-modeset:
- fi-kbl-x1275: [DMESG-WARN][34] ([i915#62] / [i915#92]) -> [DMESG-WARN][35] ([i915#62] / [i915#92] / [i915#95]) +9 similar issues
[34]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7623/fi-kbl-x1275/igt@kms_flip@basic-flip-vs-modeset.html
[35]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15886/fi-kbl-x1275/igt@kms_flip@basic-flip-vs-modeset.html
* igt@kms_force_connector_basic@force-connector-state:
- fi-kbl-x1275: [DMESG-WARN][36] ([i915#62] / [i915#92] / [i915#95]) -> [DMESG-WARN][37] ([i915#62] / [i915#92]) +3 similar issues
[36]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7623/fi-kbl-x1275/igt@kms_force_connector_basic@force-connector-state.html
[37]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15886/fi-kbl-x1275/igt@kms_force_connector_basic@force-connector-state.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[IGT#4]: https://gitlab.freedesktop.org/drm/igt-gpu-tools/issues/4
[fdo#103375]: https://bugs.freedesktop.org/show_bug.cgi?id=103375
[fdo#107139]: https://bugs.freedesktop.org/show_bug.cgi?id=107139
[fdo#111550]: https://bugs.freedesktop.org/show_bug.cgi?id=111550
[fdo#111736]: https://bugs.freedesktop.org/show_bug.cgi?id=111736
[fdo#112175]: https://bugs.freedesktop.org/show_bug.cgi?id=112175
[fdo#112259]: https://bugs.freedesktop.org/show_bug.cgi?id=112259
[i915#140]: https://gitlab.freedesktop.org/drm/intel/issues/140
[i915#263]: https://gitlab.freedesktop.org/drm/intel/issues/263
[i915#435]: https://gitlab.freedesktop.org/drm/intel/issues/435
[i915#45]: https://gitlab.freedesktop.org/drm/intel/issues/45
[i915#553]: https://gitlab.freedesktop.org/drm/intel/issues/553
[i915#62]: https://gitlab.freedesktop.org/drm/intel/issues/62
[i915#725]: https://gitlab.freedesktop.org/drm/intel/issues/725
[i915#92]: https://gitlab.freedesktop.org/drm/intel/issues/92
[i915#95]: https://gitlab.freedesktop.org/drm/intel/issues/95
Participating hosts (40 -> 42)
------------------------------
Additional (9): fi-hsw-peppy fi-skl-guc fi-bwr-2160 fi-snb-2520m fi-kbl-7500u fi-whl-u fi-skl-lmem fi-byt-n2820 fi-skl-6600u
Missing (7): fi-ilk-m540 fi-hsw-4200u fi-bsw-cyan fi-ctg-p8600 fi-bsw-kefka fi-byt-clapper fi-bdw-samus
Build changes
-------------
* CI: CI-20190529 -> None
* Linux: CI_DRM_7623 -> Patchwork_15886
CI-20190529: 20190529
CI_DRM_7623: 08c8f85caff9f010e7c66e79a2b6fa8a4a230fc8 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_5352: 0586d205f651674e575351c2d5a7d0760716c9f1 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_15886: a40f64ed6e9f7f0a42889731c8c5de9d959c07ea @ git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
a40f64ed6e9f drm/i915/gt: Tidy up checking active timelines during retirement
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15886/index.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 7+ messages in thread
* [Intel-gfx] [CI] drm/i915/gt: Tidy up checking active timelines during retirement
@ 2019-12-23 15:08 Chris Wilson
0 siblings, 0 replies; 7+ messages in thread
From: Chris Wilson @ 2019-12-23 15:08 UTC (permalink / raw)
To: intel-gfx
Use the status of the timeline request list as we retire it to determine
if the timeline is still active.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Andi Shyti <andi.shyti@intel.com>
---
drivers/gpu/drm/i915/gt/intel_gt_requests.c | 14 +++++++++-----
1 file changed, 9 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_gt_requests.c b/drivers/gpu/drm/i915/gt/intel_gt_requests.c
index b4f04614230e..9e75fa1b6bc1 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt_requests.c
+++ b/drivers/gpu/drm/i915/gt/intel_gt_requests.c
@@ -14,13 +14,16 @@
#include "intel_gt_requests.h"
#include "intel_timeline.h"
-static void retire_requests(struct intel_timeline *tl)
+static bool retire_requests(struct intel_timeline *tl)
{
struct i915_request *rq, *rn;
list_for_each_entry_safe(rq, rn, &tl->requests, link)
if (!i915_request_retire(rq))
- break;
+ return false;
+
+ /* And check nothing new was submitted */
+ return !i915_active_fence_isset(&tl->last_request);
}
static bool flush_submission(struct intel_gt *gt)
@@ -29,6 +32,9 @@ static bool flush_submission(struct intel_gt *gt)
enum intel_engine_id id;
bool active = false;
+ if (!intel_gt_pm_is_awake(gt))
+ return false;
+
for_each_engine(engine, gt, id) {
active |= intel_engine_flush_submission(engine);
active |= flush_work(&engine->retire_work);
@@ -145,7 +151,7 @@ long intel_gt_retire_requests_timeout(struct intel_gt *gt, long timeout)
}
}
- retire_requests(tl);
+ active_count += !retire_requests(tl);
spin_lock(&timelines->lock);
@@ -153,8 +159,6 @@ long intel_gt_retire_requests_timeout(struct intel_gt *gt, long timeout)
list_safe_reset_next(tl, tn, link);
if (atomic_dec_and_test(&tl->active_count))
list_del(&tl->link);
- else
- active_count += i915_active_fence_isset(&tl->last_request);
mutex_unlock(&tl->mutex);
--
2.24.1
_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 7+ messages in thread
* [Intel-gfx] [CI] drm/i915/gt: Tidy up checking active timelines during retirement
@ 2019-12-22 21:37 Chris Wilson
0 siblings, 0 replies; 7+ messages in thread
From: Chris Wilson @ 2019-12-22 21:37 UTC (permalink / raw)
To: intel-gfx
Use the status of the timeline request list as we retire it to determine
if the timeline is still active.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Andi Shyti <andi.shyti@intel.com>
---
drivers/gpu/drm/i915/gt/intel_gt_requests.c | 26 ++++++++++-----------
1 file changed, 12 insertions(+), 14 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_gt_requests.c b/drivers/gpu/drm/i915/gt/intel_gt_requests.c
index b4f04614230e..b57c144621e9 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt_requests.c
+++ b/drivers/gpu/drm/i915/gt/intel_gt_requests.c
@@ -14,27 +14,29 @@
#include "intel_gt_requests.h"
#include "intel_timeline.h"
-static void retire_requests(struct intel_timeline *tl)
+static bool retire_requests(struct intel_timeline *tl)
{
struct i915_request *rq, *rn;
list_for_each_entry_safe(rq, rn, &tl->requests, link)
if (!i915_request_retire(rq))
- break;
+ return false;
+
+ return true;
}
-static bool flush_submission(struct intel_gt *gt)
+static void flush_submission(struct intel_gt *gt)
{
struct intel_engine_cs *engine;
enum intel_engine_id id;
- bool active = false;
+
+ if (!intel_gt_pm_is_awake(gt))
+ return;
for_each_engine(engine, gt, id) {
- active |= intel_engine_flush_submission(engine);
- active |= flush_work(&engine->retire_work);
+ intel_engine_flush_submission(engine);
+ flush_work(&engine->retire_work);
}
-
- return active;
}
static void engine_retire(struct work_struct *work)
@@ -145,16 +147,15 @@ long intel_gt_retire_requests_timeout(struct intel_gt *gt, long timeout)
}
}
- retire_requests(tl);
+ active_count += !retire_requests(tl);
+ flush_submission(gt);
spin_lock(&timelines->lock);
/* Resume iteration after dropping lock */
list_safe_reset_next(tl, tn, link);
if (atomic_dec_and_test(&tl->active_count))
list_del(&tl->link);
- else
- active_count += i915_active_fence_isset(&tl->last_request);
mutex_unlock(&tl->mutex);
@@ -169,9 +170,6 @@ long intel_gt_retire_requests_timeout(struct intel_gt *gt, long timeout)
list_for_each_entry_safe(tl, tn, &free, link)
__intel_timeline_free(&tl->kref);
- if (flush_submission(gt))
- active_count++;
-
return active_count ? timeout : 0;
}
--
2.24.1
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 7+ messages in thread
* [Intel-gfx] [CI] drm/i915/gt: Tidy up checking active timelines during retirement
@ 2019-12-22 19:38 Chris Wilson
0 siblings, 0 replies; 7+ messages in thread
From: Chris Wilson @ 2019-12-22 19:38 UTC (permalink / raw)
To: intel-gfx
Use the status of the timeline request list as we retire it to determine
if the timeline is still active.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Andi Shyti <andi.shyti@intel.com>
---
drivers/gpu/drm/i915/gt/intel_gt_requests.c | 15 ++++++++++-----
1 file changed, 10 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_gt_requests.c b/drivers/gpu/drm/i915/gt/intel_gt_requests.c
index b4f04614230e..0506f2aeb4e3 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt_requests.c
+++ b/drivers/gpu/drm/i915/gt/intel_gt_requests.c
@@ -14,13 +14,15 @@
#include "intel_gt_requests.h"
#include "intel_timeline.h"
-static void retire_requests(struct intel_timeline *tl)
+static bool retire_requests(struct intel_timeline *tl)
{
struct i915_request *rq, *rn;
list_for_each_entry_safe(rq, rn, &tl->requests, link)
if (!i915_request_retire(rq))
- break;
+ return false;
+
+ return true;
}
static bool flush_submission(struct intel_gt *gt)
@@ -29,9 +31,13 @@ static bool flush_submission(struct intel_gt *gt)
enum intel_engine_id id;
bool active = false;
+ if (!intel_gt_pm_is_awake(gt))
+ return false;
+
for_each_engine(engine, gt, id) {
active |= intel_engine_flush_submission(engine);
active |= flush_work(&engine->retire_work);
+ active |= flush_work(&engine->wakeref.work);
}
return active;
@@ -145,16 +151,15 @@ long intel_gt_retire_requests_timeout(struct intel_gt *gt, long timeout)
}
}
- retire_requests(tl);
+ active_count += !retire_requests(tl);
+ flush_submission(gt);
spin_lock(&timelines->lock);
/* Resume iteration after dropping lock */
list_safe_reset_next(tl, tn, link);
if (atomic_dec_and_test(&tl->active_count))
list_del(&tl->link);
- else
- active_count += i915_active_fence_isset(&tl->last_request);
mutex_unlock(&tl->mutex);
--
2.24.1
_______________________________________________
Intel-gfx mailing list
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^ permalink raw reply related [flat|nested] 7+ messages in thread
* [Intel-gfx] [CI] drm/i915/gt: Tidy up checking active timelines during retirement
@ 2019-12-22 19:07 Chris Wilson
0 siblings, 0 replies; 7+ messages in thread
From: Chris Wilson @ 2019-12-22 19:07 UTC (permalink / raw)
To: intel-gfx
Use the status of the timeline request list as we retire it to determine
if the timeline is still active.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Andi Shyti <andi.shyti@intel.com>
---
drivers/gpu/drm/i915/gt/intel_gt_requests.c | 14 +++++++++-----
1 file changed, 9 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_gt_requests.c b/drivers/gpu/drm/i915/gt/intel_gt_requests.c
index b4f04614230e..1bbace65b051 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt_requests.c
+++ b/drivers/gpu/drm/i915/gt/intel_gt_requests.c
@@ -14,13 +14,15 @@
#include "intel_gt_requests.h"
#include "intel_timeline.h"
-static void retire_requests(struct intel_timeline *tl)
+static bool retire_requests(struct intel_timeline *tl)
{
struct i915_request *rq, *rn;
list_for_each_entry_safe(rq, rn, &tl->requests, link)
if (!i915_request_retire(rq))
- break;
+ return false;
+
+ return true;
}
static bool flush_submission(struct intel_gt *gt)
@@ -29,9 +31,13 @@ static bool flush_submission(struct intel_gt *gt)
enum intel_engine_id id;
bool active = false;
+ if (!intel_gt_pm_is_awake(gt))
+ return false;
+
for_each_engine(engine, gt, id) {
active |= intel_engine_flush_submission(engine);
active |= flush_work(&engine->retire_work);
+ active |= flush_work(&engine->wakeref.work);
}
return active;
@@ -145,7 +151,7 @@ long intel_gt_retire_requests_timeout(struct intel_gt *gt, long timeout)
}
}
- retire_requests(tl);
+ active_count += !retire_requests(tl);
spin_lock(&timelines->lock);
@@ -153,8 +159,6 @@ long intel_gt_retire_requests_timeout(struct intel_gt *gt, long timeout)
list_safe_reset_next(tl, tn, link);
if (atomic_dec_and_test(&tl->active_count))
list_del(&tl->link);
- else
- active_count += i915_active_fence_isset(&tl->last_request);
mutex_unlock(&tl->mutex);
--
2.24.1
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^ permalink raw reply related [flat|nested] 7+ messages in thread
* [Intel-gfx] [CI] drm/i915/gt: Tidy up checking active timelines during retirement
@ 2019-12-22 17:35 Chris Wilson
0 siblings, 0 replies; 7+ messages in thread
From: Chris Wilson @ 2019-12-22 17:35 UTC (permalink / raw)
To: intel-gfx
Use the status of the timeline request list as we retire it to determine
if the timeline is still active.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Andi Shyti <andi.shyti@intel.com>
---
drivers/gpu/drm/i915/gt/intel_gt_requests.c | 13 ++++++++-----
1 file changed, 8 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_gt_requests.c b/drivers/gpu/drm/i915/gt/intel_gt_requests.c
index b4f04614230e..6ec627bf05ce 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt_requests.c
+++ b/drivers/gpu/drm/i915/gt/intel_gt_requests.c
@@ -14,13 +14,15 @@
#include "intel_gt_requests.h"
#include "intel_timeline.h"
-static void retire_requests(struct intel_timeline *tl)
+static bool retire_requests(struct intel_timeline *tl)
{
struct i915_request *rq, *rn;
list_for_each_entry_safe(rq, rn, &tl->requests, link)
if (!i915_request_retire(rq))
- break;
+ return false;
+
+ return true;
}
static bool flush_submission(struct intel_gt *gt)
@@ -29,6 +31,9 @@ static bool flush_submission(struct intel_gt *gt)
enum intel_engine_id id;
bool active = false;
+ if (!intel_gt_pm_is_awake(gt))
+ return false;
+
for_each_engine(engine, gt, id) {
active |= intel_engine_flush_submission(engine);
active |= flush_work(&engine->retire_work);
@@ -145,7 +150,7 @@ long intel_gt_retire_requests_timeout(struct intel_gt *gt, long timeout)
}
}
- retire_requests(tl);
+ active_count += !retire_requests(tl);
spin_lock(&timelines->lock);
@@ -153,8 +158,6 @@ long intel_gt_retire_requests_timeout(struct intel_gt *gt, long timeout)
list_safe_reset_next(tl, tn, link);
if (atomic_dec_and_test(&tl->active_count))
list_del(&tl->link);
- else
- active_count += i915_active_fence_isset(&tl->last_request);
mutex_unlock(&tl->mutex);
--
2.24.1
_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 7+ messages in thread
end of thread, other threads:[~2019-12-23 15:08 UTC | newest]
Thread overview: 7+ messages (download: mbox.gz / follow: Atom feed)
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2019-12-22 20:19 [Intel-gfx] [CI] drm/i915/gt: Tidy up checking active timelines during retirement Chris Wilson
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2019-12-23 15:08 [Intel-gfx] [CI] drm/i915/gt: Tidy up checking active timelines during retirement Chris Wilson
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