* [Intel-gfx] [PATCH 1/3] drm/i915: Introduce remap_io_sg() to prefault discontiguous objects @ 2019-12-23 4:15 Abdiel Janulgue 2019-12-23 4:15 ` [Intel-gfx] [PATCH 2/3] drm/i915: Add lmem fault handler Abdiel Janulgue ` (6 more replies) 0 siblings, 7 replies; 12+ messages in thread From: Abdiel Janulgue @ 2019-12-23 4:15 UTC (permalink / raw) To: intel-gfx Provide a way to set the PTE within apply_page_range for discontiguous objects in addition to the existing method of just incrementing the pfn for a page range. Signed-off-by: Abdiel Janulgue <abdiel.janulgue@linux.intel.com> Cc: Chris Wilson <chris@chris-wilson.co.uk> --- drivers/gpu/drm/i915/i915_drv.h | 3 ++ drivers/gpu/drm/i915/i915_mm.c | 67 +++++++++++++++++++++++++++++++++ 2 files changed, 70 insertions(+) diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index 95db8017f138..71a20387f931 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -2015,6 +2015,9 @@ int i915_reg_read_ioctl(struct drm_device *dev, void *data, int remap_io_mapping(struct vm_area_struct *vma, unsigned long addr, unsigned long pfn, unsigned long size, struct io_mapping *iomap); +int remap_io_sg(struct vm_area_struct *vma, + unsigned long addr, resource_size_t io_start, struct scatterlist *sgl, + unsigned long size, struct io_mapping *iomap); static inline int intel_hws_csb_write_index(struct drm_i915_private *i915) { diff --git a/drivers/gpu/drm/i915/i915_mm.c b/drivers/gpu/drm/i915/i915_mm.c index 318562ce64c0..4ae9ef470ad2 100644 --- a/drivers/gpu/drm/i915/i915_mm.c +++ b/drivers/gpu/drm/i915/i915_mm.c @@ -32,7 +32,13 @@ struct remap_pfn { struct mm_struct *mm; unsigned long pfn; + unsigned long start_pfn; + unsigned long size; pgprot_t prot; + + resource_size_t io_start; + struct sg_dma_page_iter sgiter; + struct scatterlist *sgl; }; static int remap_pfn(pte_t *pte, unsigned long addr, void *data) @@ -46,6 +52,31 @@ static int remap_pfn(pte_t *pte, unsigned long addr, void *data) return 0; } +static int remap_io(pte_t *pte, unsigned long addr, void *data) +{ + struct remap_pfn *r = data; + struct sg_dma_page_iter *sgiter = &r->sgiter; + if (!r->pfn) + __sg_page_iter_start(&sgiter->base, r->sgl, + r->size >> PAGE_SHIFT, 0); + + if (__sg_page_iter_dma_next(sgiter)) { + dma_addr_t addr = sg_page_iter_dma_address(sgiter); + unsigned long pfn = (r->io_start + addr) >> PAGE_SHIFT; + + if (!r->pfn) + r->start_pfn = pfn; + r->pfn = pfn; + /* Special PTE are not associated with any struct page */ + set_pte_at(r->mm, addr, pte, pte_mkspecial(pfn_pte(r->pfn, r->prot))); + + return 0; + } + + GEM_WARN_ON("invalid range"); + return -EINVAL; +} + /** * remap_io_mapping - remap an IO mapping to userspace * @vma: user vma to map to @@ -80,3 +111,39 @@ int remap_io_mapping(struct vm_area_struct *vma, return 0; } + +/** + * remap_io_sg - remap an IO mapping to userspace + * @vma: user vma to map to + * @addr: target user address to start at + * @io_start: IO start + * @sgl: Start sg entry + * @size: size of map area + * @iomap: the source io_mapping + * + * Note: this is only safe if the mm semaphore is held when called. + */ +int remap_io_sg(struct vm_area_struct *vma, + unsigned long addr, resource_size_t io_start, struct scatterlist *sgl, + unsigned long size, struct io_mapping *iomap) +{ + struct remap_pfn r = { 0 }; + int err; + GEM_BUG_ON((vma->vm_flags & EXPECTED_FLAGS) != EXPECTED_FLAGS); + + /* We rely on prevalidation of the io-mapping to skip track_pfn(). */ + r.mm = vma->vm_mm; + r.size = size; + r.io_start = io_start; + r.sgl = sgl; + r.prot = __pgprot((pgprot_val(iomap->prot) & _PAGE_CACHE_MASK) | + (pgprot_val(vma->vm_page_prot) & ~_PAGE_CACHE_MASK)); + + err = apply_to_page_range(r.mm, addr, size, remap_io, &r); + if (unlikely(err)) { + zap_vma_ptes(vma, addr, (r.pfn - r.start_pfn) << PAGE_SHIFT); + return err; + } + + return 0; +} -- 2.23.0 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply related [flat|nested] 12+ messages in thread
* [Intel-gfx] [PATCH 2/3] drm/i915: Add lmem fault handler 2019-12-23 4:15 [Intel-gfx] [PATCH 1/3] drm/i915: Introduce remap_io_sg() to prefault discontiguous objects Abdiel Janulgue @ 2019-12-23 4:15 ` Abdiel Janulgue 2019-12-23 4:15 ` [Intel-gfx] [PATCH 3/3] drm/i915/selftests: Add selftest for memory region PF handling Abdiel Janulgue ` (5 subsequent siblings) 6 siblings, 0 replies; 12+ messages in thread From: Abdiel Janulgue @ 2019-12-23 4:15 UTC (permalink / raw) To: intel-gfx; +Cc: Matthew Auld Fault handler to handle missing pages for lmem objects. v6: Use new remap_io_sg interface for noncontiguous fault handling Signed-off-by: Abdiel Janulgue <abdiel.janulgue@linux.intel.com> Signed-off-by: Matthew Auld <matthew.auld@intel.com> Cc: Chris Wilson <chris@chris-wilson.co.uk> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> --- drivers/gpu/drm/i915/gem/i915_gem_lmem.c | 1 + drivers/gpu/drm/i915/gem/i915_gem_lmem.h | 1 + drivers/gpu/drm/i915/gem/i915_gem_mman.c | 56 ++++++++++++++++++++++-- 3 files changed, 54 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/i915/gem/i915_gem_lmem.c b/drivers/gpu/drm/i915/gem/i915_gem_lmem.c index 520cc9cac471..ea5278ca9d99 100644 --- a/drivers/gpu/drm/i915/gem/i915_gem_lmem.c +++ b/drivers/gpu/drm/i915/gem/i915_gem_lmem.c @@ -6,6 +6,7 @@ #include "intel_memory_region.h" #include "gem/i915_gem_region.h" #include "gem/i915_gem_lmem.h" +#include "gem/i915_gem_mman.h" #include "i915_drv.h" const struct drm_i915_gem_object_ops i915_gem_lmem_obj_ops = { diff --git a/drivers/gpu/drm/i915/gem/i915_gem_lmem.h b/drivers/gpu/drm/i915/gem/i915_gem_lmem.h index 7c176b8b7d2f..54b709ed3a02 100644 --- a/drivers/gpu/drm/i915/gem/i915_gem_lmem.h +++ b/drivers/gpu/drm/i915/gem/i915_gem_lmem.h @@ -7,6 +7,7 @@ #define __I915_GEM_LMEM_H #include <linux/types.h> +#include <linux/mman.h> struct drm_i915_private; struct drm_i915_gem_object; diff --git a/drivers/gpu/drm/i915/gem/i915_gem_mman.c b/drivers/gpu/drm/i915/gem/i915_gem_mman.c index 879fff8adc48..6d6c6ab84b6d 100644 --- a/drivers/gpu/drm/i915/gem/i915_gem_mman.c +++ b/drivers/gpu/drm/i915/gem/i915_gem_mman.c @@ -11,6 +11,7 @@ #include "gt/intel_gt.h" #include "gt/intel_gt_requests.h" +#include "i915_gem_lmem.h" #include "i915_drv.h" #include "i915_gem_gtt.h" #include "i915_gem_ioctls.h" @@ -216,6 +217,7 @@ static vm_fault_t i915_error_to_vmf_fault(int err) case -ENOSPC: /* shmemfs allocation failure */ case -ENOMEM: /* our allocation failure */ + case -ENXIO: return VM_FAULT_OOM; case 0: @@ -274,6 +276,32 @@ static vm_fault_t vm_fault_cpu(struct vm_fault *vmf) return ret; } +static vm_fault_t vm_fault_iomem(struct vm_fault *vmf) +{ + struct vm_area_struct *area = vmf->vma; + struct i915_mmap_offset *priv = area->vm_private_data; + struct drm_i915_gem_object *obj = priv->obj; + struct intel_memory_region *mem = obj->mm.region; + unsigned long size = area->vm_end - area->vm_start; + bool write = area->vm_flags & VM_WRITE; + int ret, offs; + + /* Sanity check that we allow writing into this object */ + if (i915_gem_object_is_readonly(obj) && write) + return VM_FAULT_SIGBUS; + + ret = i915_gem_object_pin_pages(obj); + if (ret) + return i915_error_to_vmf_fault(ret); + + ret = remap_io_sg(area, area->vm_start, mem->io_start - mem->region.start, + i915_gem_object_get_sg(obj, 0, &offs), + size, &mem->iomap); + i915_gem_object_unpin_pages(obj); + + return i915_error_to_vmf_fault(ret); +} + static vm_fault_t vm_fault_gtt(struct vm_fault *vmf) { #define MIN_CHUNK_PAGES (SZ_1M >> PAGE_SHIFT) @@ -560,7 +588,8 @@ __assign_mmap_offset(struct drm_file *file, } if (mmap_type != I915_MMAP_TYPE_GTT && - !i915_gem_object_has_struct_page(obj)) { + !i915_gem_object_type_has(obj, I915_GEM_OBJECT_HAS_STRUCT_PAGE | + I915_GEM_OBJECT_HAS_IOMEM)) { err = -ENODEV; goto out; } @@ -694,6 +723,25 @@ static const struct vm_operations_struct vm_ops_cpu = { .close = vm_close, }; +static const struct vm_operations_struct vm_ops_iomem = { + .fault = vm_fault_iomem, + .open = vm_open, + .close = vm_close, +}; + +static const struct vm_operations_struct * +get_vm_cpu_ops(struct drm_i915_gem_object *obj) +{ + if (i915_gem_object_type_has(obj, I915_GEM_OBJECT_HAS_STRUCT_PAGE)) + return &vm_ops_cpu; + + if (i915_gem_object_type_has(obj, I915_GEM_OBJECT_HAS_IOMEM)) + return &vm_ops_iomem; + + GEM_BUG_ON("unknown object type"); + return NULL; +} + /* * This overcomes the limitation in drm_gem_mmap's assignment of a * drm_gem_object as the vma->vm_private_data. Since we need to @@ -762,18 +810,18 @@ int i915_gem_mmap(struct file *filp, struct vm_area_struct *vma) case I915_MMAP_TYPE_WC: vma->vm_page_prot = pgprot_writecombine(vm_get_page_prot(vma->vm_flags)); - vma->vm_ops = &vm_ops_cpu; + vma->vm_ops = get_vm_cpu_ops(to_intel_bo(obj)); break; case I915_MMAP_TYPE_WB: vma->vm_page_prot = vm_get_page_prot(vma->vm_flags); - vma->vm_ops = &vm_ops_cpu; + vma->vm_ops = get_vm_cpu_ops(to_intel_bo(obj)); break; case I915_MMAP_TYPE_UC: vma->vm_page_prot = pgprot_noncached(vm_get_page_prot(vma->vm_flags)); - vma->vm_ops = &vm_ops_cpu; + vma->vm_ops = get_vm_cpu_ops(to_intel_bo(obj)); break; case I915_MMAP_TYPE_GTT: -- 2.23.0 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply related [flat|nested] 12+ messages in thread
* [Intel-gfx] [PATCH 3/3] drm/i915/selftests: Add selftest for memory region PF handling 2019-12-23 4:15 [Intel-gfx] [PATCH 1/3] drm/i915: Introduce remap_io_sg() to prefault discontiguous objects Abdiel Janulgue 2019-12-23 4:15 ` [Intel-gfx] [PATCH 2/3] drm/i915: Add lmem fault handler Abdiel Janulgue @ 2019-12-23 4:15 ` Abdiel Janulgue 2019-12-27 13:52 ` kbuild test robot 2019-12-23 4:23 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/3] drm/i915: Introduce remap_io_sg() to prefault discontiguous objects Patchwork ` (4 subsequent siblings) 6 siblings, 1 reply; 12+ messages in thread From: Abdiel Janulgue @ 2019-12-23 4:15 UTC (permalink / raw) To: intel-gfx; +Cc: Matthew Auld Instead of testing individually our new fault handlers, iterate over all memory regions and test all from one interface. Signed-off-by: Abdiel Janulgue <abdiel.janulgue@linux.intel.com> Cc: Matthew Auld <matthew.auld@intel.com> Cc: Chris Wilson <chris@chris-wilson.co.uk> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> --- .../drm/i915/gem/selftests/i915_gem_mman.c | 233 ++++++++++++------ 1 file changed, 160 insertions(+), 73 deletions(-) diff --git a/drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c b/drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c index 591435c5f368..8c32888e31ed 100644 --- a/drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c +++ b/drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c @@ -9,6 +9,8 @@ #include "gt/intel_engine_pm.h" #include "gt/intel_gt.h" #include "gt/intel_gt_pm.h" +#include "gem/i915_gem_lmem.h" +#include "gem/i915_gem_region.h" #include "huge_gem_object.h" #include "i915_selftest.h" #include "selftests/i915_random.h" @@ -725,44 +727,93 @@ static int igt_mmap_offset_exhaustion(void *arg) goto out; } +typedef int (*obj_set_fn_t)(struct drm_i915_gem_object *obj, bool init); + +static int gtt_obj_set(struct drm_i915_gem_object *obj, bool init) +{ + u32 __iomem *map; + struct i915_vma *vma; + int err = 0; + + i915_gem_object_lock(obj); + err = i915_gem_object_set_to_gtt_domain(obj, true); + i915_gem_object_unlock(obj); + if (err) + return err; + + vma = i915_gem_object_ggtt_pin(obj, NULL, 0, 0, PIN_MAPPABLE); + if (IS_ERR(vma)) + return PTR_ERR(vma); + + intel_gt_pm_get(vma->vm->gt); + map = i915_vma_pin_iomap(vma); + i915_vma_unpin(vma); + if (IS_ERR(map)) { + err = PTR_ERR(map); + goto out; + } + + if (init) { + memset_io(map, POISON_INUSE, PAGE_SIZE); + } else { + if (memchr_inv(map, POISON_FREE, PAGE_SIZE)) { + pr_err("Write via mmap did not land in backing store\n"); + err = -EINVAL; + } + } + i915_vma_unpin_iomap(vma); + +out: + intel_gt_pm_put(vma->vm->gt); + return err; +} + +static int cpu_obj_set(struct drm_i915_gem_object *obj, bool init) +{ + int err = 0; + void *vaddr = i915_gem_object_pin_map(obj, i915_gem_object_is_lmem(obj) ? + I915_MAP_WC : I915_MAP_WB); + if (IS_ERR(vaddr)) + return PTR_ERR(vaddr); + + if (init) { + memset(vaddr, POISON_INUSE, PAGE_SIZE); + i915_gem_object_flush_map(obj); + } else { + if (memchr_inv(vaddr, POISON_FREE, PAGE_SIZE)) { + pr_err("Write via mmap did not land in backing store\n"); + err = -EINVAL; + } + } + i915_gem_object_unpin_map(obj); + + return err; +} + #define expand32(x) (((x) << 0) | ((x) << 8) | ((x) << 16) | ((x) << 24)) -static int igt_mmap(void *arg, enum i915_mmap_type type) +static int igt_mmap(struct drm_i915_private *i915, struct drm_i915_gem_object *obj, + enum i915_mmap_type type, obj_set_fn_t obj_set_fn) { - struct drm_i915_private *i915 = arg; - struct drm_i915_gem_object *obj; struct i915_mmap_offset *mmo; struct vm_area_struct *area; unsigned long addr; - void *vaddr; - int err = 0, i; + int err = 0, out_err = 0, i; - if (!i915_ggtt_has_aperture(&i915->ggtt)) + if (!i915_ggtt_has_aperture(&i915->ggtt) && + type == I915_MMAP_TYPE_GTT) return 0; - obj = i915_gem_object_create_internal(i915, PAGE_SIZE); - if (IS_ERR(obj)) - return PTR_ERR(obj); - - vaddr = i915_gem_object_pin_map(obj, I915_MAP_WB); - if (IS_ERR(vaddr)) { - err = PTR_ERR(vaddr); - goto out; - } - memset(vaddr, POISON_INUSE, PAGE_SIZE); - i915_gem_object_flush_map(obj); - i915_gem_object_unpin_map(obj); + err = obj_set_fn(obj, true); + if (err) + return err; mmo = mmap_offset_attach(obj, type, NULL); - if (IS_ERR(mmo)) { - err = PTR_ERR(mmo); - goto out; - } + if (IS_ERR(mmo)) + return PTR_ERR(mmo); addr = igt_mmap_node(i915, &mmo->vma_node, 0, PROT_WRITE, MAP_SHARED); - if (IS_ERR_VALUE(addr)) { - err = addr; - goto out; - } + if (IS_ERR_VALUE(addr)) + return addr; pr_debug("igt_mmap() @ %lx\n", addr); @@ -808,31 +859,50 @@ static int igt_mmap(void *arg, enum i915_mmap_type type) out_unmap: vm_munmap(addr, PAGE_SIZE); + out_err = obj_set_fn(obj, false); + if (out_err) + err = out_err; - vaddr = i915_gem_object_pin_map(obj, I915_MAP_FORCE_WC); - if (IS_ERR(vaddr)) { - err = PTR_ERR(vaddr); - goto out; - } - if (err == 0 && memchr_inv(vaddr, POISON_FREE, PAGE_SIZE)) { - pr_err("Write via mmap did not land in backing store\n"); - err = -EINVAL; - } - i915_gem_object_unpin_map(obj); - -out: - i915_gem_object_put(obj); return err; } -static int igt_mmap_gtt(void *arg) +static int igt_mmap_memory_regions(void *arg) { - return igt_mmap(arg, I915_MMAP_TYPE_GTT); -} + struct drm_i915_private *i915 = arg; + int i, err = 0; -static int igt_mmap_cpu(void *arg) -{ - return igt_mmap(arg, I915_MMAP_TYPE_WC); + for (i = 0; i < ARRAY_SIZE(i915->mm.regions); i++) { + struct intel_memory_region *mem = i915->mm.regions[i]; + struct drm_i915_gem_object *obj; + + if (!mem) + continue; + obj = i915_gem_object_create_region(mem, PAGE_SIZE, + mem->type == INTEL_MEMORY_LOCAL ? + I915_BO_ALLOC_CONTIGUOUS : 0); + if (IS_ERR(obj)) { + err = PTR_ERR(obj); + if (err == -ENODEV) { + err = 0; + continue; + } + break; + } + + if (!i915_gem_object_type_has(obj, + I915_GEM_OBJECT_HAS_STRUCT_PAGE | + I915_GEM_OBJECT_HAS_IOMEM)) + err = igt_mmap(i915, obj, I915_MMAP_TYPE_GTT, + gtt_obj_set); + else + err = igt_mmap(i915, obj, I915_MMAP_TYPE_WC, + cpu_obj_set); + i915_gem_object_put(obj); + if (err) + break; + } + + return err; } static int check_present_pte(pte_t *pte, unsigned long addr, void *data) @@ -887,32 +957,24 @@ static int prefault_range(u64 start, u64 len) return __get_user(c, end - 1); } -static int igt_mmap_revoke(void *arg, enum i915_mmap_type type) +static int igt_mmap_revoke(struct drm_i915_private *i915, struct drm_i915_gem_object *obj, + enum i915_mmap_type type) { - struct drm_i915_private *i915 = arg; - struct drm_i915_gem_object *obj; struct i915_mmap_offset *mmo; unsigned long addr; int err; - if (!i915_ggtt_has_aperture(&i915->ggtt)) + if (!i915_ggtt_has_aperture(&i915->ggtt) && + type == I915_MMAP_TYPE_GTT) return 0; - obj = i915_gem_object_create_internal(i915, SZ_4M); - if (IS_ERR(obj)) - return PTR_ERR(obj); - mmo = mmap_offset_attach(obj, type, NULL); - if (IS_ERR(mmo)) { - err = PTR_ERR(mmo); - goto out; - } + if (IS_ERR(mmo)) + return PTR_ERR(mmo); addr = igt_mmap_node(i915, &mmo->vma_node, 0, PROT_WRITE, MAP_SHARED); - if (IS_ERR_VALUE(addr)) { - err = addr; - goto out; - } + if (IS_ERR_VALUE(addr)) + return addr; err = prefault_range(addr, obj->base.size); if (err) @@ -952,19 +1014,46 @@ static int igt_mmap_revoke(void *arg, enum i915_mmap_type type) out_unmap: vm_munmap(addr, obj->base.size); -out: - i915_gem_object_put(obj); + return err; } -static int igt_mmap_gtt_revoke(void *arg) +static int igt_mmap_memory_regions_revoke(void *arg) { - return igt_mmap_revoke(arg, I915_MMAP_TYPE_GTT); -} + struct drm_i915_private *i915 = arg; + int i, err = 0; -static int igt_mmap_cpu_revoke(void *arg) -{ - return igt_mmap_revoke(arg, I915_MMAP_TYPE_WC); + for (i = 0; i < ARRAY_SIZE(i915->mm.regions); i++) { + struct intel_memory_region *mem = i915->mm.regions[i]; + struct drm_i915_gem_object *obj; + + if (!mem) + continue; + obj = i915_gem_object_create_region(mem, PAGE_SIZE, + mem->type == INTEL_MEMORY_LOCAL ? + I915_BO_ALLOC_CONTIGUOUS : 0); + if (IS_ERR(obj)) { + err = PTR_ERR(obj); + if (err == -ENODEV) { + err = 0; + continue; + } + break; + } + + if (!i915_gem_object_type_has(obj, + I915_GEM_OBJECT_HAS_STRUCT_PAGE | + I915_GEM_OBJECT_HAS_IOMEM)) + err = igt_mmap_revoke(i915, obj, I915_MMAP_TYPE_GTT); + else + err = igt_mmap_revoke(i915, obj, I915_MMAP_TYPE_WC); + + i915_gem_object_put(obj); + if (err) + break; + } + + return err; } int i915_gem_mman_live_selftests(struct drm_i915_private *i915) @@ -973,10 +1062,8 @@ int i915_gem_mman_live_selftests(struct drm_i915_private *i915) SUBTEST(igt_partial_tiling), SUBTEST(igt_smoke_tiling), SUBTEST(igt_mmap_offset_exhaustion), - SUBTEST(igt_mmap_gtt), - SUBTEST(igt_mmap_cpu), - SUBTEST(igt_mmap_gtt_revoke), - SUBTEST(igt_mmap_cpu_revoke), + SUBTEST(igt_mmap_memory_regions), + SUBTEST(igt_mmap_memory_regions_revoke), }; return i915_subtests(tests, i915); -- 2.23.0 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply related [flat|nested] 12+ messages in thread
* Re: [Intel-gfx] [PATCH 3/3] drm/i915/selftests: Add selftest for memory region PF handling 2019-12-23 4:15 ` [Intel-gfx] [PATCH 3/3] drm/i915/selftests: Add selftest for memory region PF handling Abdiel Janulgue @ 2019-12-27 13:52 ` kbuild test robot 0 siblings, 0 replies; 12+ messages in thread From: kbuild test robot @ 2019-12-27 13:52 UTC (permalink / raw) To: Abdiel Janulgue; +Cc: intel-gfx, kbuild-all, Matthew Auld Hi Abdiel, Thank you for the patch! Perhaps something to improve: [auto build test WARNING on drm-intel/for-linux-next] [also build test WARNING on drm-tip/drm-tip next-20191220] [cannot apply to v5.5-rc3] [if your patch is applied to the wrong git tree, please drop us a note to help improve the system. BTW, we also suggest to use '--base' option to specify the base tree in git format-patch, please see https://stackoverflow.com/a/37406982] url: https://github.com/0day-ci/linux/commits/Abdiel-Janulgue/drm-i915-Introduce-remap_io_sg-to-prefault-discontiguous-objects/20191225-032829 base: git://anongit.freedesktop.org/drm-intel for-linux-next reproduce: # apt-get install sparse # sparse version: v0.6.1-129-g341daf20-dirty make ARCH=x86_64 allmodconfig make C=1 CF='-fdiagnostic-prefix -D__CHECK_ENDIAN__' If you fix the issue, kindly add following tag Reported-by: kbuild test robot <lkp@intel.com> sparse warnings: (new ones prefixed by >>) >> drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c:759:32: sparse: sparse: incorrect type in argument 1 (different address spaces) >> drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c:759:32: sparse: expected void const *s >> drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c:759:32: sparse: got unsigned int [noderef] [usertype] <asn:2> *[assigned] map vim +759 drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c 731 732 static int gtt_obj_set(struct drm_i915_gem_object *obj, bool init) 733 { 734 u32 __iomem *map; 735 struct i915_vma *vma; 736 int err = 0; 737 738 i915_gem_object_lock(obj); 739 err = i915_gem_object_set_to_gtt_domain(obj, true); 740 i915_gem_object_unlock(obj); 741 if (err) 742 return err; 743 744 vma = i915_gem_object_ggtt_pin(obj, NULL, 0, 0, PIN_MAPPABLE); 745 if (IS_ERR(vma)) 746 return PTR_ERR(vma); 747 748 intel_gt_pm_get(vma->vm->gt); 749 map = i915_vma_pin_iomap(vma); 750 i915_vma_unpin(vma); 751 if (IS_ERR(map)) { 752 err = PTR_ERR(map); 753 goto out; 754 } 755 756 if (init) { 757 memset_io(map, POISON_INUSE, PAGE_SIZE); 758 } else { > 759 if (memchr_inv(map, POISON_FREE, PAGE_SIZE)) { 760 pr_err("Write via mmap did not land in backing store\n"); 761 err = -EINVAL; 762 } 763 } 764 i915_vma_unpin_iomap(vma); 765 766 out: 767 intel_gt_pm_put(vma->vm->gt); 768 return err; 769 } 770 --- 0-DAY kernel test infrastructure Open Source Technology Center https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org Intel Corporation _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [Intel-gfx] [PATCH 3/3] drm/i915/selftests: Add selftest for memory region PF handling @ 2019-12-27 13:52 ` kbuild test robot 0 siblings, 0 replies; 12+ messages in thread From: kbuild test robot @ 2019-12-27 13:52 UTC (permalink / raw) To: kbuild-all [-- Attachment #1: Type: text/plain, Size: 2732 bytes --] Hi Abdiel, Thank you for the patch! Perhaps something to improve: [auto build test WARNING on drm-intel/for-linux-next] [also build test WARNING on drm-tip/drm-tip next-20191220] [cannot apply to v5.5-rc3] [if your patch is applied to the wrong git tree, please drop us a note to help improve the system. BTW, we also suggest to use '--base' option to specify the base tree in git format-patch, please see https://stackoverflow.com/a/37406982] url: https://github.com/0day-ci/linux/commits/Abdiel-Janulgue/drm-i915-Introduce-remap_io_sg-to-prefault-discontiguous-objects/20191225-032829 base: git://anongit.freedesktop.org/drm-intel for-linux-next reproduce: # apt-get install sparse # sparse version: v0.6.1-129-g341daf20-dirty make ARCH=x86_64 allmodconfig make C=1 CF='-fdiagnostic-prefix -D__CHECK_ENDIAN__' If you fix the issue, kindly add following tag Reported-by: kbuild test robot <lkp@intel.com> sparse warnings: (new ones prefixed by >>) >> drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c:759:32: sparse: sparse: incorrect type in argument 1 (different address spaces) >> drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c:759:32: sparse: expected void const *s >> drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c:759:32: sparse: got unsigned int [noderef] [usertype] <asn:2> *[assigned] map vim +759 drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c 731 732 static int gtt_obj_set(struct drm_i915_gem_object *obj, bool init) 733 { 734 u32 __iomem *map; 735 struct i915_vma *vma; 736 int err = 0; 737 738 i915_gem_object_lock(obj); 739 err = i915_gem_object_set_to_gtt_domain(obj, true); 740 i915_gem_object_unlock(obj); 741 if (err) 742 return err; 743 744 vma = i915_gem_object_ggtt_pin(obj, NULL, 0, 0, PIN_MAPPABLE); 745 if (IS_ERR(vma)) 746 return PTR_ERR(vma); 747 748 intel_gt_pm_get(vma->vm->gt); 749 map = i915_vma_pin_iomap(vma); 750 i915_vma_unpin(vma); 751 if (IS_ERR(map)) { 752 err = PTR_ERR(map); 753 goto out; 754 } 755 756 if (init) { 757 memset_io(map, POISON_INUSE, PAGE_SIZE); 758 } else { > 759 if (memchr_inv(map, POISON_FREE, PAGE_SIZE)) { 760 pr_err("Write via mmap did not land in backing store\n"); 761 err = -EINVAL; 762 } 763 } 764 i915_vma_unpin_iomap(vma); 765 766 out: 767 intel_gt_pm_put(vma->vm->gt); 768 return err; 769 } 770 --- 0-DAY kernel test infrastructure Open Source Technology Center https://lists.01.org/hyperkitty/list/kbuild-all(a)lists.01.org Intel Corporation ^ permalink raw reply [flat|nested] 12+ messages in thread
* [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/3] drm/i915: Introduce remap_io_sg() to prefault discontiguous objects 2019-12-23 4:15 [Intel-gfx] [PATCH 1/3] drm/i915: Introduce remap_io_sg() to prefault discontiguous objects Abdiel Janulgue 2019-12-23 4:15 ` [Intel-gfx] [PATCH 2/3] drm/i915: Add lmem fault handler Abdiel Janulgue 2019-12-23 4:15 ` [Intel-gfx] [PATCH 3/3] drm/i915/selftests: Add selftest for memory region PF handling Abdiel Janulgue @ 2019-12-23 4:23 ` Patchwork 2019-12-23 4:25 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork ` (3 subsequent siblings) 6 siblings, 0 replies; 12+ messages in thread From: Patchwork @ 2019-12-23 4:23 UTC (permalink / raw) To: Abdiel Janulgue; +Cc: intel-gfx == Series Details == Series: series starting with [1/3] drm/i915: Introduce remap_io_sg() to prefault discontiguous objects URL : https://patchwork.freedesktop.org/series/71283/ State : warning == Summary == $ dim checkpatch origin/drm-tip baed6d9ecce4 drm/i915: Introduce remap_io_sg() to prefault discontiguous objects -:54: WARNING:LINE_SPACING: Missing a blank line after declarations #54: FILE: drivers/gpu/drm/i915/i915_mm.c:59: + struct sg_dma_page_iter *sgiter = &r->sgiter; + if (!r->pfn) -:100: WARNING:LINE_SPACING: Missing a blank line after declarations #100: FILE: drivers/gpu/drm/i915/i915_mm.c:132: + int err; + GEM_BUG_ON((vma->vm_flags & EXPECTED_FLAGS) != EXPECTED_FLAGS); total: 0 errors, 2 warnings, 0 checks, 92 lines checked c8a913e722c5 drm/i915: Add lmem fault handler -:107: WARNING:LEADING_SPACE: please, no spaces at the start of a line #107: FILE: drivers/gpu/drm/i915/gem/i915_gem_mman.c:727: + .fault = vm_fault_iomem,$ -:108: WARNING:LEADING_SPACE: please, no spaces at the start of a line #108: FILE: drivers/gpu/drm/i915/gem/i915_gem_mman.c:728: + .open = vm_open,$ -:109: WARNING:LEADING_SPACE: please, no spaces at the start of a line #109: FILE: drivers/gpu/drm/i915/gem/i915_gem_mman.c:729: + .close = vm_close,$ total: 0 errors, 3 warnings, 0 checks, 115 lines checked 0dfca0c7f22b drm/i915/selftests: Add selftest for memory region PF handling _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 12+ messages in thread
* [Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [1/3] drm/i915: Introduce remap_io_sg() to prefault discontiguous objects 2019-12-23 4:15 [Intel-gfx] [PATCH 1/3] drm/i915: Introduce remap_io_sg() to prefault discontiguous objects Abdiel Janulgue ` (2 preceding siblings ...) 2019-12-23 4:23 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/3] drm/i915: Introduce remap_io_sg() to prefault discontiguous objects Patchwork @ 2019-12-23 4:25 ` Patchwork 2019-12-23 4:52 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork ` (2 subsequent siblings) 6 siblings, 0 replies; 12+ messages in thread From: Patchwork @ 2019-12-23 4:25 UTC (permalink / raw) To: Abdiel Janulgue; +Cc: intel-gfx == Series Details == Series: series starting with [1/3] drm/i915: Introduce remap_io_sg() to prefault discontiguous objects URL : https://patchwork.freedesktop.org/series/71283/ State : warning == Summary == $ dim sparse origin/drm-tip Sparse version: v0.6.0 Commit: drm/i915: Introduce remap_io_sg() to prefault discontiguous objects +drivers/gpu/drm/i915/i915_mm.c:130:32: warning: Using plain integer as NULL pointer Commit: drm/i915: Add lmem fault handler Okay! Commit: drm/i915/selftests: Add selftest for memory region PF handling - +drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c:759:32: expected void const *s +drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c:759:32: got unsigned int [noderef] [usertype] <asn:2> *[assigned] map +drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c:759:32: warning: incorrect type in argument 1 (different address spaces) _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 12+ messages in thread
* [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/3] drm/i915: Introduce remap_io_sg() to prefault discontiguous objects 2019-12-23 4:15 [Intel-gfx] [PATCH 1/3] drm/i915: Introduce remap_io_sg() to prefault discontiguous objects Abdiel Janulgue ` (3 preceding siblings ...) 2019-12-23 4:25 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork @ 2019-12-23 4:52 ` Patchwork 2019-12-23 17:13 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork 2019-12-27 9:43 ` kbuild test robot 6 siblings, 0 replies; 12+ messages in thread From: Patchwork @ 2019-12-23 4:52 UTC (permalink / raw) To: Abdiel Janulgue; +Cc: intel-gfx == Series Details == Series: series starting with [1/3] drm/i915: Introduce remap_io_sg() to prefault discontiguous objects URL : https://patchwork.freedesktop.org/series/71283/ State : success == Summary == CI Bug Log - changes from CI_DRM_7623 -> Patchwork_15892 ==================================================== Summary ------- **SUCCESS** No regressions found. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15892/index.html Known issues ------------ Here are the changes found in Patchwork_15892 that come from known issues: ### IGT changes ### #### Issues hit #### * igt@gem_close_race@basic-threads: - fi-byt-j1900: [PASS][1] -> [TIMEOUT][2] ([i915#816]) [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7623/fi-byt-j1900/igt@gem_close_race@basic-threads.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15892/fi-byt-j1900/igt@gem_close_race@basic-threads.html * igt@gem_exec_suspend@basic-s3: - fi-icl-u2: [PASS][3] -> [FAIL][4] ([fdo#103375]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7623/fi-icl-u2/igt@gem_exec_suspend@basic-s3.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15892/fi-icl-u2/igt@gem_exec_suspend@basic-s3.html * igt@gem_exec_suspend@basic-s4-devices: - fi-icl-u2: [PASS][5] -> [FAIL][6] ([fdo#111550]) [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7623/fi-icl-u2/igt@gem_exec_suspend@basic-s4-devices.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15892/fi-icl-u2/igt@gem_exec_suspend@basic-s4-devices.html * igt@i915_selftest@live_blt: - fi-hsw-4770r: [PASS][7] -> [DMESG-FAIL][8] ([i915#553] / [i915#725]) [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7623/fi-hsw-4770r/igt@i915_selftest@live_blt.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15892/fi-hsw-4770r/igt@i915_selftest@live_blt.html - fi-hsw-4770: [PASS][9] -> [DMESG-FAIL][10] ([i915#725]) [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7623/fi-hsw-4770/igt@i915_selftest@live_blt.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15892/fi-hsw-4770/igt@i915_selftest@live_blt.html #### Possible fixes #### * igt@gem_exec_create@basic: - {fi-tgl-u}: [INCOMPLETE][11] ([fdo#111736]) -> [PASS][12] [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7623/fi-tgl-u/igt@gem_exec_create@basic.html [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15892/fi-tgl-u/igt@gem_exec_create@basic.html * igt@i915_selftest@live_execlists: - fi-icl-u2: [INCOMPLETE][13] ([fdo#112175] / [i915#140]) -> [PASS][14] [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7623/fi-icl-u2/igt@i915_selftest@live_execlists.html [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15892/fi-icl-u2/igt@i915_selftest@live_execlists.html - fi-kbl-soraka: [DMESG-FAIL][15] -> [PASS][16] [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7623/fi-kbl-soraka/igt@i915_selftest@live_execlists.html [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15892/fi-kbl-soraka/igt@i915_selftest@live_execlists.html - fi-kbl-r: [INCOMPLETE][17] ([fdo#112175] / [fdo#112259]) -> [PASS][18] [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7623/fi-kbl-r/igt@i915_selftest@live_execlists.html [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15892/fi-kbl-r/igt@i915_selftest@live_execlists.html #### Warnings #### * igt@gem_exec_suspend@basic-s4-devices: - fi-kbl-x1275: [DMESG-WARN][19] ([fdo#107139] / [i915#62] / [i915#92]) -> [DMESG-WARN][20] ([fdo#107139] / [i915#62] / [i915#92] / [i915#95]) [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7623/fi-kbl-x1275/igt@gem_exec_suspend@basic-s4-devices.html [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15892/fi-kbl-x1275/igt@gem_exec_suspend@basic-s4-devices.html * igt@i915_module_load@reload-with-fault-injection: - fi-kbl-x1275: [INCOMPLETE][21] -> [DMESG-WARN][22] ([i915#62] / [i915#92] / [i915#95]) [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7623/fi-kbl-x1275/igt@i915_module_load@reload-with-fault-injection.html [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15892/fi-kbl-x1275/igt@i915_module_load@reload-with-fault-injection.html * igt@i915_pm_rpm@basic-rte: - fi-kbl-guc: [SKIP][23] ([fdo#109271]) -> [FAIL][24] ([i915#704]) [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7623/fi-kbl-guc/igt@i915_pm_rpm@basic-rte.html [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15892/fi-kbl-guc/igt@i915_pm_rpm@basic-rte.html * igt@kms_chamelium@common-hpd-after-suspend: - fi-icl-u2: [DMESG-WARN][25] ([IGT#4] / [i915#263]) -> [FAIL][26] ([fdo#103375]) [25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7623/fi-icl-u2/igt@kms_chamelium@common-hpd-after-suspend.html [26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15892/fi-icl-u2/igt@kms_chamelium@common-hpd-after-suspend.html * igt@kms_flip@basic-flip-vs-modeset: - fi-kbl-x1275: [DMESG-WARN][27] ([i915#62] / [i915#92]) -> [DMESG-WARN][28] ([i915#62] / [i915#92] / [i915#95]) +10 similar issues [27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7623/fi-kbl-x1275/igt@kms_flip@basic-flip-vs-modeset.html [28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15892/fi-kbl-x1275/igt@kms_flip@basic-flip-vs-modeset.html * igt@kms_force_connector_basic@force-connector-state: - fi-kbl-x1275: [DMESG-WARN][29] ([i915#62] / [i915#92] / [i915#95]) -> [DMESG-WARN][30] ([i915#62] / [i915#92]) +4 similar issues [29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7623/fi-kbl-x1275/igt@kms_force_connector_basic@force-connector-state.html [30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15892/fi-kbl-x1275/igt@kms_force_connector_basic@force-connector-state.html {name}: This element is suppressed. This means it is ignored when computing the status of the difference (SUCCESS, WARNING, or FAILURE). [IGT#4]: https://gitlab.freedesktop.org/drm/igt-gpu-tools/issues/4 [fdo#103375]: https://bugs.freedesktop.org/show_bug.cgi?id=103375 [fdo#107139]: https://bugs.freedesktop.org/show_bug.cgi?id=107139 [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271 [fdo#111550]: https://bugs.freedesktop.org/show_bug.cgi?id=111550 [fdo#111736]: https://bugs.freedesktop.org/show_bug.cgi?id=111736 [fdo#112175]: https://bugs.freedesktop.org/show_bug.cgi?id=112175 [fdo#112259]: https://bugs.freedesktop.org/show_bug.cgi?id=112259 [i915#140]: https://gitlab.freedesktop.org/drm/intel/issues/140 [i915#263]: https://gitlab.freedesktop.org/drm/intel/issues/263 [i915#553]: https://gitlab.freedesktop.org/drm/intel/issues/553 [i915#62]: https://gitlab.freedesktop.org/drm/intel/issues/62 [i915#704]: https://gitlab.freedesktop.org/drm/intel/issues/704 [i915#725]: https://gitlab.freedesktop.org/drm/intel/issues/725 [i915#816]: https://gitlab.freedesktop.org/drm/intel/issues/816 [i915#92]: https://gitlab.freedesktop.org/drm/intel/issues/92 [i915#95]: https://gitlab.freedesktop.org/drm/intel/issues/95 Participating hosts (40 -> 41) ------------------------------ Additional (10): fi-hsw-peppy fi-skl-guc fi-bwr-2160 fi-snb-2520m fi-kbl-7500u fi-whl-u fi-skl-lmem fi-kbl-7560u fi-byt-n2820 fi-skl-6600u Missing (9): fi-ilk-m540 fi-hsw-4200u fi-bsw-cyan fi-ctg-p8600 fi-ivb-3770 fi-elk-e7500 fi-byt-clapper fi-bdw-samus fi-snb-2600 Build changes ------------- * CI: CI-20190529 -> None * Linux: CI_DRM_7623 -> Patchwork_15892 CI-20190529: 20190529 CI_DRM_7623: 08c8f85caff9f010e7c66e79a2b6fa8a4a230fc8 @ git://anongit.freedesktop.org/gfx-ci/linux IGT_5352: 0586d205f651674e575351c2d5a7d0760716c9f1 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_15892: 0dfca0c7f22ba3592a326f72c359ff6e3616ae00 @ git://anongit.freedesktop.org/gfx-ci/linux == Linux commits == 0dfca0c7f22b drm/i915/selftests: Add selftest for memory region PF handling c8a913e722c5 drm/i915: Add lmem fault handler baed6d9ecce4 drm/i915: Introduce remap_io_sg() to prefault discontiguous objects == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15892/index.html _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 12+ messages in thread
* [Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/3] drm/i915: Introduce remap_io_sg() to prefault discontiguous objects 2019-12-23 4:15 [Intel-gfx] [PATCH 1/3] drm/i915: Introduce remap_io_sg() to prefault discontiguous objects Abdiel Janulgue ` (4 preceding siblings ...) 2019-12-23 4:52 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork @ 2019-12-23 17:13 ` Patchwork 2019-12-27 9:43 ` kbuild test robot 6 siblings, 0 replies; 12+ messages in thread From: Patchwork @ 2019-12-23 17:13 UTC (permalink / raw) To: Abdiel Janulgue; +Cc: intel-gfx == Series Details == Series: series starting with [1/3] drm/i915: Introduce remap_io_sg() to prefault discontiguous objects URL : https://patchwork.freedesktop.org/series/71283/ State : success == Summary == CI Bug Log - changes from CI_DRM_7623_full -> Patchwork_15892_full ==================================================== Summary ------- **SUCCESS** No regressions found. Known issues ------------ Here are the changes found in Patchwork_15892_full that come from known issues: ### IGT changes ### #### Issues hit #### * igt@gem_ctx_shared@q-smoketest-bsd2: - shard-tglb: [PASS][1] -> [INCOMPLETE][2] ([i915#461]) [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7623/shard-tglb2/igt@gem_ctx_shared@q-smoketest-bsd2.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15892/shard-tglb4/igt@gem_ctx_shared@q-smoketest-bsd2.html * igt@gem_exec_gttfill@basic: - shard-tglb: [PASS][3] -> [INCOMPLETE][4] ([fdo#111593]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7623/shard-tglb4/igt@gem_exec_gttfill@basic.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15892/shard-tglb4/igt@gem_exec_gttfill@basic.html * igt@gem_exec_parallel@contexts: - shard-tglb: [PASS][5] -> [INCOMPLETE][6] ([i915#470]) [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7623/shard-tglb3/igt@gem_exec_parallel@contexts.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15892/shard-tglb4/igt@gem_exec_parallel@contexts.html * igt@gem_exec_schedule@preempt-queue-chain-bsd2: - shard-tglb: [PASS][7] -> [INCOMPLETE][8] ([fdo#111677]) +1 similar issue [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7623/shard-tglb1/igt@gem_exec_schedule@preempt-queue-chain-bsd2.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15892/shard-tglb6/igt@gem_exec_schedule@preempt-queue-chain-bsd2.html * igt@gem_exec_schedule@smoketest-all: - shard-tglb: [PASS][9] -> [INCOMPLETE][10] ([i915#463]) [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7623/shard-tglb2/igt@gem_exec_schedule@smoketest-all.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15892/shard-tglb4/igt@gem_exec_schedule@smoketest-all.html * igt@gem_sync@basic-each: - shard-tglb: [PASS][11] -> [INCOMPLETE][12] ([i915#472] / [i915#707]) [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7623/shard-tglb1/igt@gem_sync@basic-each.html [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15892/shard-tglb3/igt@gem_sync@basic-each.html * igt@gem_workarounds@suspend-resume-fd: - shard-kbl: [PASS][13] -> [DMESG-WARN][14] ([i915#180]) +4 similar issues [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7623/shard-kbl2/igt@gem_workarounds@suspend-resume-fd.html [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15892/shard-kbl2/igt@gem_workarounds@suspend-resume-fd.html * igt@i915_selftest@live_gt_timelines: - shard-tglb: [PASS][15] -> [INCOMPLETE][16] ([i915#455]) [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7623/shard-tglb5/igt@i915_selftest@live_gt_timelines.html [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15892/shard-tglb6/igt@i915_selftest@live_gt_timelines.html * igt@i915_selftest@mock_requests: - shard-skl: [PASS][17] -> [INCOMPLETE][18] ([i915#198]) +1 similar issue [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7623/shard-skl8/igt@i915_selftest@mock_requests.html [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15892/shard-skl2/igt@i915_selftest@mock_requests.html * igt@kms_big_fb@linear-64bpp-rotate-0: - shard-tglb: [PASS][19] -> [DMESG-WARN][20] ([i915#766]) [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7623/shard-tglb4/igt@kms_big_fb@linear-64bpp-rotate-0.html [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15892/shard-tglb7/igt@kms_big_fb@linear-64bpp-rotate-0.html * igt@kms_cursor_crc@pipe-b-cursor-128x42-sliding: - shard-skl: [PASS][21] -> [FAIL][22] ([i915#54]) +3 similar issues [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7623/shard-skl8/igt@kms_cursor_crc@pipe-b-cursor-128x42-sliding.html [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15892/shard-skl7/igt@kms_cursor_crc@pipe-b-cursor-128x42-sliding.html * igt@kms_cursor_crc@pipe-d-cursor-suspend: - shard-tglb: [PASS][23] -> [INCOMPLETE][24] ([i915#460]) [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7623/shard-tglb7/igt@kms_cursor_crc@pipe-d-cursor-suspend.html [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15892/shard-tglb5/igt@kms_cursor_crc@pipe-d-cursor-suspend.html * igt@kms_fbcon_fbt@fbc-suspend: - shard-tglb: [PASS][25] -> [INCOMPLETE][26] ([i915#435] / [i915#456] / [i915#460]) [25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7623/shard-tglb1/igt@kms_fbcon_fbt@fbc-suspend.html [26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15892/shard-tglb2/igt@kms_fbcon_fbt@fbc-suspend.html * igt@kms_frontbuffer_tracking@fbcpsr-rgb565-draw-pwrite: - shard-tglb: [PASS][27] -> [FAIL][28] ([i915#49]) +4 similar issues [27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7623/shard-tglb1/igt@kms_frontbuffer_tracking@fbcpsr-rgb565-draw-pwrite.html [28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15892/shard-tglb5/igt@kms_frontbuffer_tracking@fbcpsr-rgb565-draw-pwrite.html * igt@kms_pipe_crc_basic@read-crc-pipe-b-frame-sequence: - shard-snb: [PASS][29] -> [SKIP][30] ([fdo#109271]) [29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7623/shard-snb6/igt@kms_pipe_crc_basic@read-crc-pipe-b-frame-sequence.html [30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15892/shard-snb5/igt@kms_pipe_crc_basic@read-crc-pipe-b-frame-sequence.html * igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a: - shard-apl: [PASS][31] -> [DMESG-WARN][32] ([i915#180]) [31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7623/shard-apl8/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a.html [32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15892/shard-apl3/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a.html #### Possible fixes #### * igt@gem_eio@kms: - shard-snb: [INCOMPLETE][33] ([i915#82]) -> [PASS][34] [33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7623/shard-snb2/igt@gem_eio@kms.html [34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15892/shard-snb2/igt@gem_eio@kms.html * igt@gem_exec_await@wide-all: - shard-tglb: [INCOMPLETE][35] ([fdo#111736]) -> [PASS][36] [35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7623/shard-tglb6/igt@gem_exec_await@wide-all.html [36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15892/shard-tglb6/igt@gem_exec_await@wide-all.html * igt@gem_exec_nop@basic-parallel: - shard-tglb: [INCOMPLETE][37] ([i915#435]) -> [PASS][38] [37]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7623/shard-tglb5/igt@gem_exec_nop@basic-parallel.html [38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15892/shard-tglb2/igt@gem_exec_nop@basic-parallel.html * igt@gem_exec_schedule@preempt-queue-chain-bsd1: - shard-tglb: [INCOMPLETE][39] ([fdo#111606] / [fdo#111677]) -> [PASS][40] [39]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7623/shard-tglb6/igt@gem_exec_schedule@preempt-queue-chain-bsd1.html [40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15892/shard-tglb2/igt@gem_exec_schedule@preempt-queue-chain-bsd1.html * {igt@gen9_exec_parse@allowed-single}: - shard-glk: [DMESG-WARN][41] ([i915#716]) -> [PASS][42] [41]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7623/shard-glk3/igt@gen9_exec_parse@allowed-single.html [42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15892/shard-glk6/igt@gen9_exec_parse@allowed-single.html * igt@i915_pm_rpm@system-suspend-modeset: - shard-tglb: [INCOMPLETE][43] ([i915#456] / [i915#460]) -> [PASS][44] +1 similar issue [43]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7623/shard-tglb5/igt@i915_pm_rpm@system-suspend-modeset.html [44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15892/shard-tglb2/igt@i915_pm_rpm@system-suspend-modeset.html * igt@i915_suspend@sysfs-reader: - shard-apl: [DMESG-WARN][45] ([i915#180]) -> [PASS][46] +1 similar issue [45]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7623/shard-apl6/igt@i915_suspend@sysfs-reader.html [46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15892/shard-apl2/igt@i915_suspend@sysfs-reader.html * igt@kms_cursor_crc@pipe-a-cursor-64x64-sliding: - shard-skl: [FAIL][47] ([i915#54]) -> [PASS][48] +3 similar issues [47]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7623/shard-skl10/igt@kms_cursor_crc@pipe-a-cursor-64x64-sliding.html [48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15892/shard-skl5/igt@kms_cursor_crc@pipe-a-cursor-64x64-sliding.html * igt@kms_cursor_crc@pipe-a-cursor-suspend: - shard-kbl: [DMESG-WARN][49] ([i915#180]) -> [PASS][50] +5 similar issues [49]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7623/shard-kbl3/igt@kms_cursor_crc@pipe-a-cursor-suspend.html [50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15892/shard-kbl4/igt@kms_cursor_crc@pipe-a-cursor-suspend.html * igt@kms_draw_crc@draw-method-rgb565-mmap-gtt-untiled: - shard-skl: [FAIL][51] ([i915#52] / [i915#54]) -> [PASS][52] [51]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7623/shard-skl7/igt@kms_draw_crc@draw-method-rgb565-mmap-gtt-untiled.html [52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15892/shard-skl1/igt@kms_draw_crc@draw-method-rgb565-mmap-gtt-untiled.html * igt@kms_draw_crc@draw-method-rgb565-render-xtiled: - shard-kbl: [INCOMPLETE][53] ([fdo#103665] / [i915#667]) -> [PASS][54] [53]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7623/shard-kbl7/igt@kms_draw_crc@draw-method-rgb565-render-xtiled.html [54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15892/shard-kbl7/igt@kms_draw_crc@draw-method-rgb565-render-xtiled.html * igt@kms_flip@plain-flip-fb-recreate-interruptible: - shard-skl: [FAIL][55] ([i915#34]) -> [PASS][56] [55]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7623/shard-skl10/igt@kms_flip@plain-flip-fb-recreate-interruptible.html [56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15892/shard-skl10/igt@kms_flip@plain-flip-fb-recreate-interruptible.html * igt@kms_frontbuffer_tracking@fbc-1p-pri-indfb-multidraw: - shard-tglb: [FAIL][57] ([i915#49]) -> [PASS][58] +1 similar issue [57]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7623/shard-tglb7/igt@kms_frontbuffer_tracking@fbc-1p-pri-indfb-multidraw.html [58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15892/shard-tglb3/igt@kms_frontbuffer_tracking@fbc-1p-pri-indfb-multidraw.html * igt@kms_frontbuffer_tracking@psr-1p-primscrn-cur-indfb-draw-blt: - shard-tglb: [INCOMPLETE][59] ([i915#435] / [i915#667]) -> [PASS][60] [59]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7623/shard-tglb5/igt@kms_frontbuffer_tracking@psr-1p-primscrn-cur-indfb-draw-blt.html [60]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15892/shard-tglb2/igt@kms_frontbuffer_tracking@psr-1p-primscrn-cur-indfb-draw-blt.html * igt@kms_frontbuffer_tracking@psr-1p-primscrn-spr-indfb-move: - shard-tglb: [INCOMPLETE][61] ([i915#667]) -> [PASS][62] [61]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7623/shard-tglb7/igt@kms_frontbuffer_tracking@psr-1p-primscrn-spr-indfb-move.html [62]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15892/shard-tglb5/igt@kms_frontbuffer_tracking@psr-1p-primscrn-spr-indfb-move.html * igt@kms_plane_alpha_blend@pipe-c-coverage-7efc: - shard-skl: [FAIL][63] ([fdo#108145] / [i915#265]) -> [PASS][64] +1 similar issue [63]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7623/shard-skl3/igt@kms_plane_alpha_blend@pipe-c-coverage-7efc.html [64]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15892/shard-skl1/igt@kms_plane_alpha_blend@pipe-c-coverage-7efc.html {name}: This element is suppressed. This means it is ignored when computing the status of the difference (SUCCESS, WARNING, or FAILURE). [fdo#103665]: https://bugs.freedesktop.org/show_bug.cgi?id=103665 [fdo#108145]: https://bugs.freedesktop.org/show_bug.cgi?id=108145 [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271 [fdo#111593]: https://bugs.freedesktop.org/show_bug.cgi?id=111593 [fdo#111606]: https://bugs.freedesktop.org/show_bug.cgi?id=111606 [fdo#111677]: https://bugs.freedesktop.org/show_bug.cgi?id=111677 [fdo#111736]: https://bugs.freedesktop.org/show_bug.cgi?id=111736 [i915#180]: https://gitlab.freedesktop.org/drm/intel/issues/180 [i915#198]: https://gitlab.freedesktop.org/drm/intel/issues/198 [i915#265]: https://gitlab.freedesktop.org/drm/intel/issues/265 [i915#34]: https://gitlab.freedesktop.org/drm/intel/issues/34 [i915#435]: https://gitlab.freedesktop.org/drm/intel/issues/435 [i915#455]: https://gitlab.freedesktop.org/drm/intel/issues/455 [i915#456]: https://gitlab.freedesktop.org/drm/intel/issues/456 [i915#460]: https://gitlab.freedesktop.org/drm/intel/issues/460 [i915#461]: https://gitlab.freedesktop.org/drm/intel/issues/461 [i915#463]: https://gitlab.freedesktop.org/drm/intel/issues/463 [i915#470]: https://gitlab.freedesktop.org/drm/intel/issues/470 [i915#472]: https://gitlab.freedesktop.org/drm/intel/issues/472 [i915#49]: https://gitlab.freedesktop.org/drm/intel/issues/49 [i915#52]: https://gitlab.freedesktop.org/drm/intel/issues/52 [i915#54]: https://gitlab.freedesktop.org/drm/intel/issues/54 [i915#667]: https://gitlab.freedesktop.org/drm/intel/issues/667 [i915#707]: https://gitlab.freedesktop.org/drm/intel/issues/707 [i915#716]: https://gitlab.freedesktop.org/drm/intel/issues/716 [i915#766]: https://gitlab.freedesktop.org/drm/intel/issues/766 [i915#82]: https://gitlab.freedesktop.org/drm/intel/issues/82 Participating hosts (10 -> 9) ------------------------------ Missing (1): pig-hsw-4770r Build changes ------------- * CI: CI-20190529 -> None * Linux: CI_DRM_7623 -> Patchwork_15892 CI-20190529: 20190529 CI_DRM_7623: 08c8f85caff9f010e7c66e79a2b6fa8a4a230fc8 @ git://anongit.freedesktop.org/gfx-ci/linux IGT_5352: 0586d205f651674e575351c2d5a7d0760716c9f1 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_15892: 0dfca0c7f22ba3592a326f72c359ff6e3616ae00 @ git://anongit.freedesktop.org/gfx-ci/linux piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15892/index.html _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [Intel-gfx] [PATCH 1/3] drm/i915: Introduce remap_io_sg() to prefault discontiguous objects 2019-12-23 4:15 [Intel-gfx] [PATCH 1/3] drm/i915: Introduce remap_io_sg() to prefault discontiguous objects Abdiel Janulgue @ 2019-12-27 9:43 ` kbuild test robot 2019-12-23 4:15 ` [Intel-gfx] [PATCH 3/3] drm/i915/selftests: Add selftest for memory region PF handling Abdiel Janulgue ` (5 subsequent siblings) 6 siblings, 0 replies; 12+ messages in thread From: kbuild test robot @ 2019-12-27 9:43 UTC (permalink / raw) To: Abdiel Janulgue; +Cc: intel-gfx, kbuild-all Hi Abdiel, Thank you for the patch! Perhaps something to improve: [auto build test WARNING on drm-intel/for-linux-next] [also build test WARNING on drm-tip/drm-tip v5.5-rc3 next-20191220] [if your patch is applied to the wrong git tree, please drop us a note to help improve the system. BTW, we also suggest to use '--base' option to specify the base tree in git format-patch, please see https://stackoverflow.com/a/37406982] url: https://github.com/0day-ci/linux/commits/Abdiel-Janulgue/drm-i915-Introduce-remap_io_sg-to-prefault-discontiguous-objects/20191225-032829 base: git://anongit.freedesktop.org/drm-intel for-linux-next reproduce: # apt-get install sparse # sparse version: v0.6.1-129-g341daf20-dirty make ARCH=x86_64 allmodconfig make C=1 CF='-fdiagnostic-prefix -D__CHECK_ENDIAN__' If you fix the issue, kindly add following tag Reported-by: kbuild test robot <lkp@intel.com> sparse warnings: (new ones prefixed by >>) >> drivers/gpu/drm/i915/i915_mm.c:130:32: sparse: sparse: Using plain integer as NULL pointer vim +130 drivers/gpu/drm/i915/i915_mm.c 114 115 /** 116 * remap_io_sg - remap an IO mapping to userspace 117 * @vma: user vma to map to 118 * @addr: target user address to start at 119 * @io_start: IO start 120 * @sgl: Start sg entry 121 * @size: size of map area 122 * @iomap: the source io_mapping 123 * 124 * Note: this is only safe if the mm semaphore is held when called. 125 */ 126 int remap_io_sg(struct vm_area_struct *vma, 127 unsigned long addr, resource_size_t io_start, struct scatterlist *sgl, 128 unsigned long size, struct io_mapping *iomap) 129 { > 130 struct remap_pfn r = { 0 }; --- 0-DAY kernel test infrastructure Open Source Technology Center https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org Intel Corporation _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [Intel-gfx] [PATCH 1/3] drm/i915: Introduce remap_io_sg() to prefault discontiguous objects @ 2019-12-27 9:43 ` kbuild test robot 0 siblings, 0 replies; 12+ messages in thread From: kbuild test robot @ 2019-12-27 9:43 UTC (permalink / raw) To: kbuild-all [-- Attachment #1: Type: text/plain, Size: 1946 bytes --] Hi Abdiel, Thank you for the patch! Perhaps something to improve: [auto build test WARNING on drm-intel/for-linux-next] [also build test WARNING on drm-tip/drm-tip v5.5-rc3 next-20191220] [if your patch is applied to the wrong git tree, please drop us a note to help improve the system. BTW, we also suggest to use '--base' option to specify the base tree in git format-patch, please see https://stackoverflow.com/a/37406982] url: https://github.com/0day-ci/linux/commits/Abdiel-Janulgue/drm-i915-Introduce-remap_io_sg-to-prefault-discontiguous-objects/20191225-032829 base: git://anongit.freedesktop.org/drm-intel for-linux-next reproduce: # apt-get install sparse # sparse version: v0.6.1-129-g341daf20-dirty make ARCH=x86_64 allmodconfig make C=1 CF='-fdiagnostic-prefix -D__CHECK_ENDIAN__' If you fix the issue, kindly add following tag Reported-by: kbuild test robot <lkp@intel.com> sparse warnings: (new ones prefixed by >>) >> drivers/gpu/drm/i915/i915_mm.c:130:32: sparse: sparse: Using plain integer as NULL pointer vim +130 drivers/gpu/drm/i915/i915_mm.c 114 115 /** 116 * remap_io_sg - remap an IO mapping to userspace 117 * @vma: user vma to map to 118 * @addr: target user address to start at 119 * @io_start: IO start 120 * @sgl: Start sg entry 121 * @size: size of map area 122 * @iomap: the source io_mapping 123 * 124 * Note: this is only safe if the mm semaphore is held when called. 125 */ 126 int remap_io_sg(struct vm_area_struct *vma, 127 unsigned long addr, resource_size_t io_start, struct scatterlist *sgl, 128 unsigned long size, struct io_mapping *iomap) 129 { > 130 struct remap_pfn r = { 0 }; --- 0-DAY kernel test infrastructure Open Source Technology Center https://lists.01.org/hyperkitty/list/kbuild-all(a)lists.01.org Intel Corporation ^ permalink raw reply [flat|nested] 12+ messages in thread
* [Intel-gfx] [PATCH 1/3] drm/i915: allow prefaulting discontiguous objects in remap_io_mapping() @ 2019-12-19 11:21 Abdiel Janulgue 2019-12-19 11:21 ` [Intel-gfx] [PATCH 3/3] drm/i915/selftests: Add selftest for memory region PF handling Abdiel Janulgue 0 siblings, 1 reply; 12+ messages in thread From: Abdiel Janulgue @ 2019-12-19 11:21 UTC (permalink / raw) To: intel-gfx Provide a way to set the PTE of the physical address of kernel memory in addition to just incrementing the pfn for a page range. Signed-off-by: Abdiel Janulgue <abdiel.janulgue@linux.intel.com> Cc: Chris Wilson <chris@chris-wilson.co.uk> --- drivers/gpu/drm/i915/gem/i915_gem_mman.c | 1 + drivers/gpu/drm/i915/i915_drv.h | 4 +++- drivers/gpu/drm/i915/i915_mm.c | 17 ++++++++++++++--- 3 files changed, 18 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/i915/gem/i915_gem_mman.c b/drivers/gpu/drm/i915/gem/i915_gem_mman.c index 879fff8adc48..aa5d6623d86c 100644 --- a/drivers/gpu/drm/i915/gem/i915_gem_mman.c +++ b/drivers/gpu/drm/i915/gem/i915_gem_mman.c @@ -360,6 +360,7 @@ static vm_fault_t vm_fault_gtt(struct vm_fault *vmf) area->vm_start + (vma->ggtt_view.partial.offset << PAGE_SHIFT), (ggtt->gmadr.start + vma->node.start) >> PAGE_SHIFT, min_t(u64, vma->size, area->vm_end - area->vm_start), + NULL, &ggtt->iomap); if (ret) goto err_fence; diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index 0781b6326b8c..5ee0fe4d492b 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -2015,9 +2015,11 @@ int i915_reg_read_ioctl(struct drm_device *dev, void *data, intel_de_wait_for_register((dev_priv_), (reg_), (mask_), 0, (timeout_)) /* i915_mm.c */ +typedef unsigned long (*io_pfn_t)(struct drm_i915_gem_object *obj, + unsigned long n); int remap_io_mapping(struct vm_area_struct *vma, unsigned long addr, unsigned long pfn, unsigned long size, - struct io_mapping *iomap); + io_pfn_t fn, struct io_mapping *iomap); static inline int intel_hws_csb_write_index(struct drm_i915_private *i915) { diff --git a/drivers/gpu/drm/i915/i915_mm.c b/drivers/gpu/drm/i915/i915_mm.c index 318562ce64c0..86a73444bed4 100644 --- a/drivers/gpu/drm/i915/i915_mm.c +++ b/drivers/gpu/drm/i915/i915_mm.c @@ -32,7 +32,11 @@ struct remap_pfn { struct mm_struct *mm; unsigned long pfn; + unsigned long start_pfn; pgprot_t prot; + + io_pfn_t fn; + struct drm_i915_gem_object *obj; }; static int remap_pfn(pte_t *pte, unsigned long addr, void *data) @@ -41,7 +45,10 @@ static int remap_pfn(pte_t *pte, unsigned long addr, void *data) /* Special PTE are not associated with any struct page */ set_pte_at(r->mm, addr, pte, pte_mkspecial(pfn_pte(r->pfn, r->prot))); - r->pfn++; + if (r->fn) + r->pfn = r->fn(r->obj, r->start_pfn++); + else + r->pfn++; return 0; } @@ -52,15 +59,17 @@ static int remap_pfn(pte_t *pte, unsigned long addr, void *data) * @addr: target user address to start at * @pfn: physical address of kernel memory * @size: size of map area + * @fn: if provided, the function translates each increment of @pfn to io pfn * @iomap: the source io_mapping * * Note: this is only safe if the mm semaphore is held when called. */ int remap_io_mapping(struct vm_area_struct *vma, unsigned long addr, unsigned long pfn, unsigned long size, - struct io_mapping *iomap) + io_pfn_t fn, struct io_mapping *iomap) { - struct remap_pfn r; + struct remap_pfn r = { 0 }; + struct i915_mmap_offset *priv = vma->vm_private_data; int err; #define EXPECTED_FLAGS (VM_PFNMAP | VM_DONTEXPAND | VM_DONTDUMP) @@ -69,6 +78,8 @@ int remap_io_mapping(struct vm_area_struct *vma, /* We rely on prevalidation of the io-mapping to skip track_pfn(). */ r.mm = vma->vm_mm; r.pfn = pfn; + r.fn = fn; + r.obj = priv->obj; r.prot = __pgprot((pgprot_val(iomap->prot) & _PAGE_CACHE_MASK) | (pgprot_val(vma->vm_page_prot) & ~_PAGE_CACHE_MASK)); -- 2.17.1 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply related [flat|nested] 12+ messages in thread
* [Intel-gfx] [PATCH 3/3] drm/i915/selftests: Add selftest for memory region PF handling 2019-12-19 11:21 [Intel-gfx] [PATCH 1/3] drm/i915: allow prefaulting discontiguous objects in remap_io_mapping() Abdiel Janulgue @ 2019-12-19 11:21 ` Abdiel Janulgue 0 siblings, 0 replies; 12+ messages in thread From: Abdiel Janulgue @ 2019-12-19 11:21 UTC (permalink / raw) To: intel-gfx; +Cc: Matthew Auld Instead of testing individually our new fault handlers, iterate over all memory regions and test all from one interface. Signed-off-by: Abdiel Janulgue <abdiel.janulgue@linux.intel.com> Cc: Matthew Auld <matthew.auld@intel.com> Cc: Chris Wilson <chris@chris-wilson.co.uk> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> --- .../drm/i915/gem/selftests/i915_gem_mman.c | 233 ++++++++++++------ 1 file changed, 160 insertions(+), 73 deletions(-) diff --git a/drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c b/drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c index 591435c5f368..8c32888e31ed 100644 --- a/drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c +++ b/drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c @@ -9,6 +9,8 @@ #include "gt/intel_engine_pm.h" #include "gt/intel_gt.h" #include "gt/intel_gt_pm.h" +#include "gem/i915_gem_lmem.h" +#include "gem/i915_gem_region.h" #include "huge_gem_object.h" #include "i915_selftest.h" #include "selftests/i915_random.h" @@ -725,44 +727,93 @@ static int igt_mmap_offset_exhaustion(void *arg) goto out; } +typedef int (*obj_set_fn_t)(struct drm_i915_gem_object *obj, bool init); + +static int gtt_obj_set(struct drm_i915_gem_object *obj, bool init) +{ + u32 __iomem *map; + struct i915_vma *vma; + int err = 0; + + i915_gem_object_lock(obj); + err = i915_gem_object_set_to_gtt_domain(obj, true); + i915_gem_object_unlock(obj); + if (err) + return err; + + vma = i915_gem_object_ggtt_pin(obj, NULL, 0, 0, PIN_MAPPABLE); + if (IS_ERR(vma)) + return PTR_ERR(vma); + + intel_gt_pm_get(vma->vm->gt); + map = i915_vma_pin_iomap(vma); + i915_vma_unpin(vma); + if (IS_ERR(map)) { + err = PTR_ERR(map); + goto out; + } + + if (init) { + memset_io(map, POISON_INUSE, PAGE_SIZE); + } else { + if (memchr_inv(map, POISON_FREE, PAGE_SIZE)) { + pr_err("Write via mmap did not land in backing store\n"); + err = -EINVAL; + } + } + i915_vma_unpin_iomap(vma); + +out: + intel_gt_pm_put(vma->vm->gt); + return err; +} + +static int cpu_obj_set(struct drm_i915_gem_object *obj, bool init) +{ + int err = 0; + void *vaddr = i915_gem_object_pin_map(obj, i915_gem_object_is_lmem(obj) ? + I915_MAP_WC : I915_MAP_WB); + if (IS_ERR(vaddr)) + return PTR_ERR(vaddr); + + if (init) { + memset(vaddr, POISON_INUSE, PAGE_SIZE); + i915_gem_object_flush_map(obj); + } else { + if (memchr_inv(vaddr, POISON_FREE, PAGE_SIZE)) { + pr_err("Write via mmap did not land in backing store\n"); + err = -EINVAL; + } + } + i915_gem_object_unpin_map(obj); + + return err; +} + #define expand32(x) (((x) << 0) | ((x) << 8) | ((x) << 16) | ((x) << 24)) -static int igt_mmap(void *arg, enum i915_mmap_type type) +static int igt_mmap(struct drm_i915_private *i915, struct drm_i915_gem_object *obj, + enum i915_mmap_type type, obj_set_fn_t obj_set_fn) { - struct drm_i915_private *i915 = arg; - struct drm_i915_gem_object *obj; struct i915_mmap_offset *mmo; struct vm_area_struct *area; unsigned long addr; - void *vaddr; - int err = 0, i; + int err = 0, out_err = 0, i; - if (!i915_ggtt_has_aperture(&i915->ggtt)) + if (!i915_ggtt_has_aperture(&i915->ggtt) && + type == I915_MMAP_TYPE_GTT) return 0; - obj = i915_gem_object_create_internal(i915, PAGE_SIZE); - if (IS_ERR(obj)) - return PTR_ERR(obj); - - vaddr = i915_gem_object_pin_map(obj, I915_MAP_WB); - if (IS_ERR(vaddr)) { - err = PTR_ERR(vaddr); - goto out; - } - memset(vaddr, POISON_INUSE, PAGE_SIZE); - i915_gem_object_flush_map(obj); - i915_gem_object_unpin_map(obj); + err = obj_set_fn(obj, true); + if (err) + return err; mmo = mmap_offset_attach(obj, type, NULL); - if (IS_ERR(mmo)) { - err = PTR_ERR(mmo); - goto out; - } + if (IS_ERR(mmo)) + return PTR_ERR(mmo); addr = igt_mmap_node(i915, &mmo->vma_node, 0, PROT_WRITE, MAP_SHARED); - if (IS_ERR_VALUE(addr)) { - err = addr; - goto out; - } + if (IS_ERR_VALUE(addr)) + return addr; pr_debug("igt_mmap() @ %lx\n", addr); @@ -808,31 +859,50 @@ static int igt_mmap(void *arg, enum i915_mmap_type type) out_unmap: vm_munmap(addr, PAGE_SIZE); + out_err = obj_set_fn(obj, false); + if (out_err) + err = out_err; - vaddr = i915_gem_object_pin_map(obj, I915_MAP_FORCE_WC); - if (IS_ERR(vaddr)) { - err = PTR_ERR(vaddr); - goto out; - } - if (err == 0 && memchr_inv(vaddr, POISON_FREE, PAGE_SIZE)) { - pr_err("Write via mmap did not land in backing store\n"); - err = -EINVAL; - } - i915_gem_object_unpin_map(obj); - -out: - i915_gem_object_put(obj); return err; } -static int igt_mmap_gtt(void *arg) +static int igt_mmap_memory_regions(void *arg) { - return igt_mmap(arg, I915_MMAP_TYPE_GTT); -} + struct drm_i915_private *i915 = arg; + int i, err = 0; -static int igt_mmap_cpu(void *arg) -{ - return igt_mmap(arg, I915_MMAP_TYPE_WC); + for (i = 0; i < ARRAY_SIZE(i915->mm.regions); i++) { + struct intel_memory_region *mem = i915->mm.regions[i]; + struct drm_i915_gem_object *obj; + + if (!mem) + continue; + obj = i915_gem_object_create_region(mem, PAGE_SIZE, + mem->type == INTEL_MEMORY_LOCAL ? + I915_BO_ALLOC_CONTIGUOUS : 0); + if (IS_ERR(obj)) { + err = PTR_ERR(obj); + if (err == -ENODEV) { + err = 0; + continue; + } + break; + } + + if (!i915_gem_object_type_has(obj, + I915_GEM_OBJECT_HAS_STRUCT_PAGE | + I915_GEM_OBJECT_HAS_IOMEM)) + err = igt_mmap(i915, obj, I915_MMAP_TYPE_GTT, + gtt_obj_set); + else + err = igt_mmap(i915, obj, I915_MMAP_TYPE_WC, + cpu_obj_set); + i915_gem_object_put(obj); + if (err) + break; + } + + return err; } static int check_present_pte(pte_t *pte, unsigned long addr, void *data) @@ -887,32 +957,24 @@ static int prefault_range(u64 start, u64 len) return __get_user(c, end - 1); } -static int igt_mmap_revoke(void *arg, enum i915_mmap_type type) +static int igt_mmap_revoke(struct drm_i915_private *i915, struct drm_i915_gem_object *obj, + enum i915_mmap_type type) { - struct drm_i915_private *i915 = arg; - struct drm_i915_gem_object *obj; struct i915_mmap_offset *mmo; unsigned long addr; int err; - if (!i915_ggtt_has_aperture(&i915->ggtt)) + if (!i915_ggtt_has_aperture(&i915->ggtt) && + type == I915_MMAP_TYPE_GTT) return 0; - obj = i915_gem_object_create_internal(i915, SZ_4M); - if (IS_ERR(obj)) - return PTR_ERR(obj); - mmo = mmap_offset_attach(obj, type, NULL); - if (IS_ERR(mmo)) { - err = PTR_ERR(mmo); - goto out; - } + if (IS_ERR(mmo)) + return PTR_ERR(mmo); addr = igt_mmap_node(i915, &mmo->vma_node, 0, PROT_WRITE, MAP_SHARED); - if (IS_ERR_VALUE(addr)) { - err = addr; - goto out; - } + if (IS_ERR_VALUE(addr)) + return addr; err = prefault_range(addr, obj->base.size); if (err) @@ -952,19 +1014,46 @@ static int igt_mmap_revoke(void *arg, enum i915_mmap_type type) out_unmap: vm_munmap(addr, obj->base.size); -out: - i915_gem_object_put(obj); + return err; } -static int igt_mmap_gtt_revoke(void *arg) +static int igt_mmap_memory_regions_revoke(void *arg) { - return igt_mmap_revoke(arg, I915_MMAP_TYPE_GTT); -} + struct drm_i915_private *i915 = arg; + int i, err = 0; -static int igt_mmap_cpu_revoke(void *arg) -{ - return igt_mmap_revoke(arg, I915_MMAP_TYPE_WC); + for (i = 0; i < ARRAY_SIZE(i915->mm.regions); i++) { + struct intel_memory_region *mem = i915->mm.regions[i]; + struct drm_i915_gem_object *obj; + + if (!mem) + continue; + obj = i915_gem_object_create_region(mem, PAGE_SIZE, + mem->type == INTEL_MEMORY_LOCAL ? + I915_BO_ALLOC_CONTIGUOUS : 0); + if (IS_ERR(obj)) { + err = PTR_ERR(obj); + if (err == -ENODEV) { + err = 0; + continue; + } + break; + } + + if (!i915_gem_object_type_has(obj, + I915_GEM_OBJECT_HAS_STRUCT_PAGE | + I915_GEM_OBJECT_HAS_IOMEM)) + err = igt_mmap_revoke(i915, obj, I915_MMAP_TYPE_GTT); + else + err = igt_mmap_revoke(i915, obj, I915_MMAP_TYPE_WC); + + i915_gem_object_put(obj); + if (err) + break; + } + + return err; } int i915_gem_mman_live_selftests(struct drm_i915_private *i915) @@ -973,10 +1062,8 @@ int i915_gem_mman_live_selftests(struct drm_i915_private *i915) SUBTEST(igt_partial_tiling), SUBTEST(igt_smoke_tiling), SUBTEST(igt_mmap_offset_exhaustion), - SUBTEST(igt_mmap_gtt), - SUBTEST(igt_mmap_cpu), - SUBTEST(igt_mmap_gtt_revoke), - SUBTEST(igt_mmap_cpu_revoke), + SUBTEST(igt_mmap_memory_regions), + SUBTEST(igt_mmap_memory_regions_revoke), }; return i915_subtests(tests, i915); -- 2.17.1 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply related [flat|nested] 12+ messages in thread
end of thread, other threads:[~2019-12-27 13:54 UTC | newest] Thread overview: 12+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- 2019-12-23 4:15 [Intel-gfx] [PATCH 1/3] drm/i915: Introduce remap_io_sg() to prefault discontiguous objects Abdiel Janulgue 2019-12-23 4:15 ` [Intel-gfx] [PATCH 2/3] drm/i915: Add lmem fault handler Abdiel Janulgue 2019-12-23 4:15 ` [Intel-gfx] [PATCH 3/3] drm/i915/selftests: Add selftest for memory region PF handling Abdiel Janulgue 2019-12-27 13:52 ` kbuild test robot 2019-12-27 13:52 ` kbuild test robot 2019-12-23 4:23 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/3] drm/i915: Introduce remap_io_sg() to prefault discontiguous objects Patchwork 2019-12-23 4:25 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork 2019-12-23 4:52 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork 2019-12-23 17:13 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork 2019-12-27 9:43 ` [Intel-gfx] [PATCH 1/3] " kbuild test robot 2019-12-27 9:43 ` kbuild test robot -- strict thread matches above, loose matches on Subject: below -- 2019-12-19 11:21 [Intel-gfx] [PATCH 1/3] drm/i915: allow prefaulting discontiguous objects in remap_io_mapping() Abdiel Janulgue 2019-12-19 11:21 ` [Intel-gfx] [PATCH 3/3] drm/i915/selftests: Add selftest for memory region PF handling Abdiel Janulgue
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