From: Rob Herring <robh@kernel.org> To: Anson Huang <Anson.Huang@nxp.com> Cc: aisheng.dong@nxp.com, festevam@gmail.com, shawnguo@kernel.org, stefan@agner.ch, kernel@pengutronix.de, linus.walleij@linaro.org, mark.rutland@arm.com, s.hauer@pengutronix.de, catalin.marinas@arm.com, will@kernel.org, bjorn.andersson@linaro.org, olof@lixom.net, maxime@cerno.tech, leonard.crestez@nxp.com, dinguyen@kernel.org, marcin.juszkiewicz@linaro.org, linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Linux-imx@nxp.com Subject: Re: [PATCH V2 1/3] dt-bindings: imx: Add pinctrl binding doc for i.MX8MP Date: Sat, 4 Jan 2020 14:33:32 -0700 [thread overview] Message-ID: <20200104213332.GA19211@bogus> (raw) In-Reply-To: <1577342743-25885-1-git-send-email-Anson.Huang@nxp.com> On Thu, Dec 26, 2019 at 02:45:41PM +0800, Anson Huang wrote: > Add binding doc for i.MX8MP pinctrl driver. > > Signed-off-by: Anson Huang <Anson.Huang@nxp.com> > --- > No changes. > --- > .../bindings/pinctrl/fsl,imx8mp-pinctrl.txt | 38 + Please make this a DT schema. > arch/arm64/boot/dts/freescale/imx8mp-pinfunc.h | 931 +++++++++++++++++++++ > 2 files changed, 969 insertions(+) > create mode 100644 Documentation/devicetree/bindings/pinctrl/fsl,imx8mp-pinctrl.txt > create mode 100644 arch/arm64/boot/dts/freescale/imx8mp-pinfunc.h > > diff --git a/Documentation/devicetree/bindings/pinctrl/fsl,imx8mp-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/fsl,imx8mp-pinctrl.txt > new file mode 100644 > index 0000000..619104b > --- /dev/null > +++ b/Documentation/devicetree/bindings/pinctrl/fsl,imx8mp-pinctrl.txt > @@ -0,0 +1,38 @@ > +* Freescale IMX8MP IOMUX Controller > + > +Please refer to fsl,imx-pinctrl.txt and pinctrl-bindings.txt in this directory > +for common binding part and usage. > + > +Required properties: > +- compatible: "fsl,imx8mp-iomuxc" > +- reg: should contain the base physical address and size of the iomuxc > + registers. > + > +Required properties in sub-nodes: > +- fsl,pins: each entry consists of 6 integers and represents the mux and config > + setting for one pin. The first 5 integers <mux_reg conf_reg input_reg mux_val > + input_val> are specified using a PIN_FUNC_ID macro, which can be found in > + <arch/arm64/boot/dts/freescale/imx8mp-pinfunc.h>. The last integer CONFIG is > + the pad setting value like pull-up on this pin. Please refer to i.MX8M Plus > + Reference Manual for detailed CONFIG settings. > + > +Examples: > + > +&uart1 { > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_uart1>; > +}; > + > +iomuxc: pinctrl@30330000 { > + compatible = "fsl,imx8mp-iomuxc"; > + reg = <0x30330000 0x10000>; > + > + pinctrl_uart1: uart1grp { In particular, define some node naming pattern that you can match on. Perhaps "grp$" works. > + fsl,pins = < > + MX8MP_IOMUXC_UART1_RXD__UART1_DCE_RX 0x140 > + MX8MP_IOMUXC_UART1_TXD__UART1_DCE_TX 0x140 > + MX8MP_IOMUXC_UART3_RXD__UART1_DCE_CTS 0x140 > + MX8MP_IOMUXC_UART3_TXD__UART1_DCE_RTS 0x140 > + >; > + }; > +};
WARNING: multiple messages have this Message-ID (diff)
From: Rob Herring <robh@kernel.org> To: Anson Huang <Anson.Huang@nxp.com> Cc: aisheng.dong@nxp.com, mark.rutland@arm.com, will@kernel.org, linux-gpio@vger.kernel.org, festevam@gmail.com, linus.walleij@linaro.org, linux-kernel@vger.kernel.org, stefan@agner.ch, bjorn.andersson@linaro.org, marcin.juszkiewicz@linaro.org, dinguyen@kernel.org, devicetree@vger.kernel.org, maxime@cerno.tech, kernel@pengutronix.de, catalin.marinas@arm.com, olof@lixom.net, leonard.crestez@nxp.com, shawnguo@kernel.org, s.hauer@pengutronix.de, linux-arm-kernel@lists.infradead.org, Linux-imx@nxp.com Subject: Re: [PATCH V2 1/3] dt-bindings: imx: Add pinctrl binding doc for i.MX8MP Date: Sat, 4 Jan 2020 14:33:32 -0700 [thread overview] Message-ID: <20200104213332.GA19211@bogus> (raw) In-Reply-To: <1577342743-25885-1-git-send-email-Anson.Huang@nxp.com> On Thu, Dec 26, 2019 at 02:45:41PM +0800, Anson Huang wrote: > Add binding doc for i.MX8MP pinctrl driver. > > Signed-off-by: Anson Huang <Anson.Huang@nxp.com> > --- > No changes. > --- > .../bindings/pinctrl/fsl,imx8mp-pinctrl.txt | 38 + Please make this a DT schema. > arch/arm64/boot/dts/freescale/imx8mp-pinfunc.h | 931 +++++++++++++++++++++ > 2 files changed, 969 insertions(+) > create mode 100644 Documentation/devicetree/bindings/pinctrl/fsl,imx8mp-pinctrl.txt > create mode 100644 arch/arm64/boot/dts/freescale/imx8mp-pinfunc.h > > diff --git a/Documentation/devicetree/bindings/pinctrl/fsl,imx8mp-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/fsl,imx8mp-pinctrl.txt > new file mode 100644 > index 0000000..619104b > --- /dev/null > +++ b/Documentation/devicetree/bindings/pinctrl/fsl,imx8mp-pinctrl.txt > @@ -0,0 +1,38 @@ > +* Freescale IMX8MP IOMUX Controller > + > +Please refer to fsl,imx-pinctrl.txt and pinctrl-bindings.txt in this directory > +for common binding part and usage. > + > +Required properties: > +- compatible: "fsl,imx8mp-iomuxc" > +- reg: should contain the base physical address and size of the iomuxc > + registers. > + > +Required properties in sub-nodes: > +- fsl,pins: each entry consists of 6 integers and represents the mux and config > + setting for one pin. The first 5 integers <mux_reg conf_reg input_reg mux_val > + input_val> are specified using a PIN_FUNC_ID macro, which can be found in > + <arch/arm64/boot/dts/freescale/imx8mp-pinfunc.h>. The last integer CONFIG is > + the pad setting value like pull-up on this pin. Please refer to i.MX8M Plus > + Reference Manual for detailed CONFIG settings. > + > +Examples: > + > +&uart1 { > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_uart1>; > +}; > + > +iomuxc: pinctrl@30330000 { > + compatible = "fsl,imx8mp-iomuxc"; > + reg = <0x30330000 0x10000>; > + > + pinctrl_uart1: uart1grp { In particular, define some node naming pattern that you can match on. Perhaps "grp$" works. > + fsl,pins = < > + MX8MP_IOMUXC_UART1_RXD__UART1_DCE_RX 0x140 > + MX8MP_IOMUXC_UART1_TXD__UART1_DCE_TX 0x140 > + MX8MP_IOMUXC_UART3_RXD__UART1_DCE_CTS 0x140 > + MX8MP_IOMUXC_UART3_TXD__UART1_DCE_RTS 0x140 > + >; > + }; > +}; _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2020-01-04 21:35 UTC|newest] Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top 2019-12-26 6:45 [PATCH V2 1/3] dt-bindings: imx: Add pinctrl binding doc for i.MX8MP Anson Huang 2019-12-26 6:45 ` Anson Huang 2019-12-26 6:45 ` [PATCH V2 2/3] pinctrl: freescale: Add i.MX8MP pinctrl driver support Anson Huang 2019-12-26 6:45 ` Anson Huang 2019-12-26 6:45 ` [PATCH V2 3/3] arm64: defconfig: Select CONFIG_PINCTRL_IMX8MP by default Anson Huang 2019-12-26 6:45 ` Anson Huang 2019-12-26 14:07 ` [PATCH V2 1/3] dt-bindings: imx: Add pinctrl binding doc for i.MX8MP Abel Vesa 2019-12-26 14:07 ` Abel Vesa 2020-01-04 21:33 ` Rob Herring [this message] 2020-01-04 21:33 ` Rob Herring
Reply instructions: You may reply publicly to this message via plain-text email using any one of the following methods: * Save the following mbox file, import it into your mail client, and reply-to-all from there: mbox Avoid top-posting and favor interleaved quoting: https://en.wikipedia.org/wiki/Posting_style#Interleaved_style * Reply using the --to, --cc, and --in-reply-to switches of git-send-email(1): git send-email \ --in-reply-to=20200104213332.GA19211@bogus \ --to=robh@kernel.org \ --cc=Anson.Huang@nxp.com \ --cc=Linux-imx@nxp.com \ --cc=aisheng.dong@nxp.com \ --cc=bjorn.andersson@linaro.org \ --cc=catalin.marinas@arm.com \ --cc=devicetree@vger.kernel.org \ --cc=dinguyen@kernel.org \ --cc=festevam@gmail.com \ --cc=kernel@pengutronix.de \ --cc=leonard.crestez@nxp.com \ --cc=linus.walleij@linaro.org \ --cc=linux-arm-kernel@lists.infradead.org \ --cc=linux-gpio@vger.kernel.org \ --cc=linux-kernel@vger.kernel.org \ --cc=marcin.juszkiewicz@linaro.org \ --cc=mark.rutland@arm.com \ --cc=maxime@cerno.tech \ --cc=olof@lixom.net \ --cc=s.hauer@pengutronix.de \ --cc=shawnguo@kernel.org \ --cc=stefan@agner.ch \ --cc=will@kernel.org \ /path/to/YOUR_REPLY https://kernel.org/pub/software/scm/git/docs/git-send-email.html * If your mail client supports setting the In-Reply-To header via mailto: links, try the mailto: linkBe sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes, see mirroring instructions on how to clone and mirror all data and code used by this external index.