* [Intel-gfx] [PATCH 1/2] drm/i915/gt: Push context state allocation earlier
@ 2020-01-08 12:23 Chris Wilson
2020-01-08 12:23 ` [Intel-gfx] [PATCH 2/2] drm/i915/gt: Pull context activation into central intel_context_pin() Chris Wilson
2020-01-08 13:23 ` [Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [1/2] drm/i915/gt: Push context state allocation earlier Patchwork
0 siblings, 2 replies; 4+ messages in thread
From: Chris Wilson @ 2020-01-08 12:23 UTC (permalink / raw)
To: intel-gfx
Allow for knowledgeable users to preallocate the context state, and to
separate the allocation step from the pinning step during
intel_context_pin()
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
---
drivers/gpu/drm/i915/gt/intel_context.c | 34 +++++++++++++++++++------
drivers/gpu/drm/i915/gt/intel_context.h | 2 ++
2 files changed, 28 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_context.c b/drivers/gpu/drm/i915/gt/intel_context.c
index 5ea8305fd633..eefe0996ade1 100644
--- a/drivers/gpu/drm/i915/gt/intel_context.c
+++ b/drivers/gpu/drm/i915/gt/intel_context.c
@@ -43,24 +43,42 @@ intel_context_create(struct intel_engine_cs *engine)
return ce;
}
+int intel_context_alloc_state(struct intel_context *ce)
+{
+ int err = 0;
+
+ if (mutex_lock_interruptible(&ce->pin_mutex))
+ return -EINTR;
+
+ if (!test_bit(CONTEXT_ALLOC_BIT, &ce->flags)) {
+ err = ce->ops->alloc(ce);
+ if (unlikely(err))
+ goto unlock;
+
+ set_bit(CONTEXT_ALLOC_BIT, &ce->flags);
+ }
+
+unlock:
+ mutex_unlock(&ce->pin_mutex);
+ return 0;
+}
+
int __intel_context_do_pin(struct intel_context *ce)
{
int err;
+ if (unlikely(!test_bit(CONTEXT_ALLOC_BIT, &ce->flags))) {
+ err = intel_context_alloc_state(ce);
+ if (err)
+ return err;
+ }
+
if (mutex_lock_interruptible(&ce->pin_mutex))
return -EINTR;
if (likely(!atomic_read(&ce->pin_count))) {
intel_wakeref_t wakeref;
- if (unlikely(!test_bit(CONTEXT_ALLOC_BIT, &ce->flags))) {
- err = ce->ops->alloc(ce);
- if (unlikely(err))
- goto err;
-
- __set_bit(CONTEXT_ALLOC_BIT, &ce->flags);
- }
-
err = 0;
with_intel_runtime_pm(ce->engine->uncore->rpm, wakeref)
err = ce->ops->pin(ce);
diff --git a/drivers/gpu/drm/i915/gt/intel_context.h b/drivers/gpu/drm/i915/gt/intel_context.h
index 0f5ae4ff3b10..673f5fb2967a 100644
--- a/drivers/gpu/drm/i915/gt/intel_context.h
+++ b/drivers/gpu/drm/i915/gt/intel_context.h
@@ -31,6 +31,8 @@ void intel_context_fini(struct intel_context *ce);
struct intel_context *
intel_context_create(struct intel_engine_cs *engine);
+int intel_context_alloc_state(struct intel_context *ce);
+
void intel_context_free(struct intel_context *ce);
/**
--
2.25.0.rc1
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^ permalink raw reply related [flat|nested] 4+ messages in thread
* [Intel-gfx] [PATCH 2/2] drm/i915/gt: Pull context activation into central intel_context_pin()
2020-01-08 12:23 [Intel-gfx] [PATCH 1/2] drm/i915/gt: Push context state allocation earlier Chris Wilson
@ 2020-01-08 12:23 ` Chris Wilson
2020-01-08 12:58 ` Maarten Lankhorst
2020-01-08 13:23 ` [Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [1/2] drm/i915/gt: Push context state allocation earlier Patchwork
1 sibling, 1 reply; 4+ messages in thread
From: Chris Wilson @ 2020-01-08 12:23 UTC (permalink / raw)
To: intel-gfx
While this is encroaching on midlayer territory, having already made the
state allocation a previous step in pinning, we can now pull the common
intel_context_active_acquire() into intel_context_pin() itself. This is
a prelude to make the activation a separate step inside pinning, outside
of the ce->pin_mutex
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
---
drivers/gpu/drm/i915/gt/intel_context.c | 64 ++++++++++---------
drivers/gpu/drm/i915/gt/intel_context.h | 3 -
drivers/gpu/drm/i915/gt/intel_lrc.c | 16 +----
.../gpu/drm/i915/gt/intel_ring_submission.c | 16 +----
drivers/gpu/drm/i915/gt/mock_engine.c | 2 +-
5 files changed, 39 insertions(+), 62 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_context.c b/drivers/gpu/drm/i915/gt/intel_context.c
index eefe0996ade1..85f161fd46f8 100644
--- a/drivers/gpu/drm/i915/gt/intel_context.c
+++ b/drivers/gpu/drm/i915/gt/intel_context.c
@@ -63,6 +63,34 @@ int intel_context_alloc_state(struct intel_context *ce)
return 0;
}
+static int intel_context_active_acquire(struct intel_context *ce)
+{
+ int err;
+
+ err = i915_active_acquire(&ce->active);
+ if (err)
+ return err;
+
+ /* Preallocate tracking nodes */
+ if (!intel_context_is_barrier(ce)) {
+ err = i915_active_acquire_preallocate_barrier(&ce->active,
+ ce->engine);
+ if (err) {
+ i915_active_release(&ce->active);
+ return err;
+ }
+ }
+
+ return 0;
+}
+
+static void intel_context_active_release(struct intel_context *ce)
+{
+ /* Nodes preallocated in intel_context_active() */
+ i915_active_acquire_barrier(&ce->active);
+ i915_active_release(&ce->active);
+}
+
int __intel_context_do_pin(struct intel_context *ce)
{
int err;
@@ -79,11 +107,15 @@ int __intel_context_do_pin(struct intel_context *ce)
if (likely(!atomic_read(&ce->pin_count))) {
intel_wakeref_t wakeref;
+ err = intel_context_active_acquire(ce);
+ if (unlikely(err))
+ goto err;
+
err = 0;
with_intel_runtime_pm(ce->engine->uncore->rpm, wakeref)
err = ce->ops->pin(ce);
if (err)
- goto err;
+ goto err_active;
CE_TRACE(ce, "pin ring:{head:%04x, tail:%04x}\n",
ce->ring->head, ce->ring->tail);
@@ -97,6 +129,8 @@ int __intel_context_do_pin(struct intel_context *ce)
mutex_unlock(&ce->pin_mutex);
return 0;
+err_active:
+ intel_context_active_release(ce);
err:
mutex_unlock(&ce->pin_mutex);
return err;
@@ -198,34 +232,6 @@ static int __intel_context_active(struct i915_active *active)
return err;
}
-int intel_context_active_acquire(struct intel_context *ce)
-{
- int err;
-
- err = i915_active_acquire(&ce->active);
- if (err)
- return err;
-
- /* Preallocate tracking nodes */
- if (!intel_context_is_barrier(ce)) {
- err = i915_active_acquire_preallocate_barrier(&ce->active,
- ce->engine);
- if (err) {
- i915_active_release(&ce->active);
- return err;
- }
- }
-
- return 0;
-}
-
-void intel_context_active_release(struct intel_context *ce)
-{
- /* Nodes preallocated in intel_context_active() */
- i915_active_acquire_barrier(&ce->active);
- i915_active_release(&ce->active);
-}
-
void
intel_context_init(struct intel_context *ce,
struct intel_engine_cs *engine)
diff --git a/drivers/gpu/drm/i915/gt/intel_context.h b/drivers/gpu/drm/i915/gt/intel_context.h
index 673f5fb2967a..f0f49b50b968 100644
--- a/drivers/gpu/drm/i915/gt/intel_context.h
+++ b/drivers/gpu/drm/i915/gt/intel_context.h
@@ -118,9 +118,6 @@ static inline void intel_context_exit(struct intel_context *ce)
ce->ops->exit(ce);
}
-int intel_context_active_acquire(struct intel_context *ce);
-void intel_context_active_release(struct intel_context *ce);
-
static inline struct intel_context *intel_context_get(struct intel_context *ce)
{
kref_get(&ce->ref);
diff --git a/drivers/gpu/drm/i915/gt/intel_lrc.c b/drivers/gpu/drm/i915/gt/intel_lrc.c
index bd74b76c6403..28b1fbcb4370 100644
--- a/drivers/gpu/drm/i915/gt/intel_lrc.c
+++ b/drivers/gpu/drm/i915/gt/intel_lrc.c
@@ -2566,33 +2566,21 @@ __execlists_context_pin(struct intel_context *ce,
struct intel_engine_cs *engine)
{
void *vaddr;
- int ret;
GEM_BUG_ON(!ce->state);
-
- ret = intel_context_active_acquire(ce);
- if (ret)
- goto err;
GEM_BUG_ON(!i915_vma_is_pinned(ce->state));
vaddr = i915_gem_object_pin_map(ce->state->obj,
i915_coherent_map_type(engine->i915) |
I915_MAP_OVERRIDE);
- if (IS_ERR(vaddr)) {
- ret = PTR_ERR(vaddr);
- goto unpin_active;
- }
+ if (IS_ERR(vaddr))
+ return PTR_ERR(vaddr);
ce->lrc_desc = lrc_descriptor(ce, engine) | CTX_DESC_FORCE_RESTORE;
ce->lrc_reg_state = vaddr + LRC_STATE_PN * PAGE_SIZE;
__execlists_update_reg_state(ce, engine);
return 0;
-
-unpin_active:
- intel_context_active_release(ce);
-err:
- return ret;
}
static int execlists_context_pin(struct intel_context *ce)
diff --git a/drivers/gpu/drm/i915/gt/intel_ring_submission.c b/drivers/gpu/drm/i915/gt/intel_ring_submission.c
index eca5ab048cd9..bc44fe8e5ffa 100644
--- a/drivers/gpu/drm/i915/gt/intel_ring_submission.c
+++ b/drivers/gpu/drm/i915/gt/intel_ring_submission.c
@@ -1329,21 +1329,7 @@ static int ring_context_alloc(struct intel_context *ce)
static int ring_context_pin(struct intel_context *ce)
{
- int err;
-
- err = intel_context_active_acquire(ce);
- if (err)
- return err;
-
- err = __context_pin_ppgtt(ce);
- if (err)
- goto err_active;
-
- return 0;
-
-err_active:
- intel_context_active_release(ce);
- return err;
+ return __context_pin_ppgtt(ce);
}
static void ring_context_reset(struct intel_context *ce)
diff --git a/drivers/gpu/drm/i915/gt/mock_engine.c b/drivers/gpu/drm/i915/gt/mock_engine.c
index d0e68ce9aa51..a560b7eee2cd 100644
--- a/drivers/gpu/drm/i915/gt/mock_engine.c
+++ b/drivers/gpu/drm/i915/gt/mock_engine.c
@@ -149,7 +149,7 @@ static int mock_context_alloc(struct intel_context *ce)
static int mock_context_pin(struct intel_context *ce)
{
- return intel_context_active_acquire(ce);
+ return 0;
}
static void mock_context_reset(struct intel_context *ce)
--
2.25.0.rc1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 4+ messages in thread
* Re: [Intel-gfx] [PATCH 2/2] drm/i915/gt: Pull context activation into central intel_context_pin()
2020-01-08 12:23 ` [Intel-gfx] [PATCH 2/2] drm/i915/gt: Pull context activation into central intel_context_pin() Chris Wilson
@ 2020-01-08 12:58 ` Maarten Lankhorst
0 siblings, 0 replies; 4+ messages in thread
From: Maarten Lankhorst @ 2020-01-08 12:58 UTC (permalink / raw)
To: Chris Wilson, intel-gfx
Op 08-01-2020 om 13:23 schreef Chris Wilson:
> While this is encroaching on midlayer territory, having already made the
> state allocation a previous step in pinning, we can now pull the common
> intel_context_active_acquire() into intel_context_pin() itself. This is
> a prelude to make the activation a separate step inside pinning, outside
> of the ce->pin_mutex
>
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
> Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Yeah, hopefully with both we can finally fix the issue.
With that, for both patches:
Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
> drivers/gpu/drm/i915/gt/intel_context.c | 64 ++++++++++---------
> drivers/gpu/drm/i915/gt/intel_context.h | 3 -
> drivers/gpu/drm/i915/gt/intel_lrc.c | 16 +----
> .../gpu/drm/i915/gt/intel_ring_submission.c | 16 +----
> drivers/gpu/drm/i915/gt/mock_engine.c | 2 +-
> 5 files changed, 39 insertions(+), 62 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/gt/intel_context.c b/drivers/gpu/drm/i915/gt/intel_context.c
> index eefe0996ade1..85f161fd46f8 100644
> --- a/drivers/gpu/drm/i915/gt/intel_context.c
> +++ b/drivers/gpu/drm/i915/gt/intel_context.c
> @@ -63,6 +63,34 @@ int intel_context_alloc_state(struct intel_context *ce)
> return 0;
> }
>
> +static int intel_context_active_acquire(struct intel_context *ce)
> +{
> + int err;
> +
> + err = i915_active_acquire(&ce->active);
> + if (err)
> + return err;
> +
> + /* Preallocate tracking nodes */
> + if (!intel_context_is_barrier(ce)) {
> + err = i915_active_acquire_preallocate_barrier(&ce->active,
> + ce->engine);
> + if (err) {
> + i915_active_release(&ce->active);
> + return err;
> + }
> + }
> +
> + return 0;
> +}
> +
> +static void intel_context_active_release(struct intel_context *ce)
> +{
> + /* Nodes preallocated in intel_context_active() */
> + i915_active_acquire_barrier(&ce->active);
> + i915_active_release(&ce->active);
> +}
> +
> int __intel_context_do_pin(struct intel_context *ce)
> {
> int err;
> @@ -79,11 +107,15 @@ int __intel_context_do_pin(struct intel_context *ce)
> if (likely(!atomic_read(&ce->pin_count))) {
> intel_wakeref_t wakeref;
>
> + err = intel_context_active_acquire(ce);
> + if (unlikely(err))
> + goto err;
> +
> err = 0;
> with_intel_runtime_pm(ce->engine->uncore->rpm, wakeref)
> err = ce->ops->pin(ce);
> if (err)
> - goto err;
> + goto err_active;
>
> CE_TRACE(ce, "pin ring:{head:%04x, tail:%04x}\n",
> ce->ring->head, ce->ring->tail);
> @@ -97,6 +129,8 @@ int __intel_context_do_pin(struct intel_context *ce)
> mutex_unlock(&ce->pin_mutex);
> return 0;
>
> +err_active:
> + intel_context_active_release(ce);
> err:
> mutex_unlock(&ce->pin_mutex);
> return err;
> @@ -198,34 +232,6 @@ static int __intel_context_active(struct i915_active *active)
> return err;
> }
>
> -int intel_context_active_acquire(struct intel_context *ce)
> -{
> - int err;
> -
> - err = i915_active_acquire(&ce->active);
> - if (err)
> - return err;
> -
> - /* Preallocate tracking nodes */
> - if (!intel_context_is_barrier(ce)) {
> - err = i915_active_acquire_preallocate_barrier(&ce->active,
> - ce->engine);
> - if (err) {
> - i915_active_release(&ce->active);
> - return err;
> - }
> - }
> -
> - return 0;
> -}
> -
> -void intel_context_active_release(struct intel_context *ce)
> -{
> - /* Nodes preallocated in intel_context_active() */
> - i915_active_acquire_barrier(&ce->active);
> - i915_active_release(&ce->active);
> -}
> -
> void
> intel_context_init(struct intel_context *ce,
> struct intel_engine_cs *engine)
> diff --git a/drivers/gpu/drm/i915/gt/intel_context.h b/drivers/gpu/drm/i915/gt/intel_context.h
> index 673f5fb2967a..f0f49b50b968 100644
> --- a/drivers/gpu/drm/i915/gt/intel_context.h
> +++ b/drivers/gpu/drm/i915/gt/intel_context.h
> @@ -118,9 +118,6 @@ static inline void intel_context_exit(struct intel_context *ce)
> ce->ops->exit(ce);
> }
>
> -int intel_context_active_acquire(struct intel_context *ce);
> -void intel_context_active_release(struct intel_context *ce);
> -
> static inline struct intel_context *intel_context_get(struct intel_context *ce)
> {
> kref_get(&ce->ref);
> diff --git a/drivers/gpu/drm/i915/gt/intel_lrc.c b/drivers/gpu/drm/i915/gt/intel_lrc.c
> index bd74b76c6403..28b1fbcb4370 100644
> --- a/drivers/gpu/drm/i915/gt/intel_lrc.c
> +++ b/drivers/gpu/drm/i915/gt/intel_lrc.c
> @@ -2566,33 +2566,21 @@ __execlists_context_pin(struct intel_context *ce,
> struct intel_engine_cs *engine)
> {
> void *vaddr;
> - int ret;
>
> GEM_BUG_ON(!ce->state);
> -
> - ret = intel_context_active_acquire(ce);
> - if (ret)
> - goto err;
> GEM_BUG_ON(!i915_vma_is_pinned(ce->state));
>
> vaddr = i915_gem_object_pin_map(ce->state->obj,
> i915_coherent_map_type(engine->i915) |
> I915_MAP_OVERRIDE);
> - if (IS_ERR(vaddr)) {
> - ret = PTR_ERR(vaddr);
> - goto unpin_active;
> - }
> + if (IS_ERR(vaddr))
> + return PTR_ERR(vaddr);
>
> ce->lrc_desc = lrc_descriptor(ce, engine) | CTX_DESC_FORCE_RESTORE;
> ce->lrc_reg_state = vaddr + LRC_STATE_PN * PAGE_SIZE;
> __execlists_update_reg_state(ce, engine);
>
> return 0;
> -
> -unpin_active:
> - intel_context_active_release(ce);
> -err:
> - return ret;
> }
>
> static int execlists_context_pin(struct intel_context *ce)
> diff --git a/drivers/gpu/drm/i915/gt/intel_ring_submission.c b/drivers/gpu/drm/i915/gt/intel_ring_submission.c
> index eca5ab048cd9..bc44fe8e5ffa 100644
> --- a/drivers/gpu/drm/i915/gt/intel_ring_submission.c
> +++ b/drivers/gpu/drm/i915/gt/intel_ring_submission.c
> @@ -1329,21 +1329,7 @@ static int ring_context_alloc(struct intel_context *ce)
>
> static int ring_context_pin(struct intel_context *ce)
> {
> - int err;
> -
> - err = intel_context_active_acquire(ce);
> - if (err)
> - return err;
> -
> - err = __context_pin_ppgtt(ce);
> - if (err)
> - goto err_active;
> -
> - return 0;
> -
> -err_active:
> - intel_context_active_release(ce);
> - return err;
> + return __context_pin_ppgtt(ce);
> }
>
> static void ring_context_reset(struct intel_context *ce)
> diff --git a/drivers/gpu/drm/i915/gt/mock_engine.c b/drivers/gpu/drm/i915/gt/mock_engine.c
> index d0e68ce9aa51..a560b7eee2cd 100644
> --- a/drivers/gpu/drm/i915/gt/mock_engine.c
> +++ b/drivers/gpu/drm/i915/gt/mock_engine.c
> @@ -149,7 +149,7 @@ static int mock_context_alloc(struct intel_context *ce)
>
> static int mock_context_pin(struct intel_context *ce)
> {
> - return intel_context_active_acquire(ce);
> + return 0;
> }
>
> static void mock_context_reset(struct intel_context *ce)
_______________________________________________
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^ permalink raw reply [flat|nested] 4+ messages in thread
* [Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [1/2] drm/i915/gt: Push context state allocation earlier
2020-01-08 12:23 [Intel-gfx] [PATCH 1/2] drm/i915/gt: Push context state allocation earlier Chris Wilson
2020-01-08 12:23 ` [Intel-gfx] [PATCH 2/2] drm/i915/gt: Pull context activation into central intel_context_pin() Chris Wilson
@ 2020-01-08 13:23 ` Patchwork
1 sibling, 0 replies; 4+ messages in thread
From: Patchwork @ 2020-01-08 13:23 UTC (permalink / raw)
To: Chris Wilson; +Cc: intel-gfx
== Series Details ==
Series: series starting with [1/2] drm/i915/gt: Push context state allocation earlier
URL : https://patchwork.freedesktop.org/series/71759/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_7702 -> Patchwork_16023
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with Patchwork_16023 absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_16023, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16023/index.html
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in Patchwork_16023:
### IGT changes ###
#### Possible regressions ####
* igt@gem_busy@busy-all:
- fi-bsw-nick: [PASS][1] -> [DMESG-WARN][2]
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7702/fi-bsw-nick/igt@gem_busy@busy-all.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16023/fi-bsw-nick/igt@gem_busy@busy-all.html
- fi-kbl-guc: [PASS][3] -> [DMESG-WARN][4]
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7702/fi-kbl-guc/igt@gem_busy@busy-all.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16023/fi-kbl-guc/igt@gem_busy@busy-all.html
* igt@gem_ctx_switch@rcs0:
- fi-kbl-8809g: [PASS][5] -> [DMESG-WARN][6]
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7702/fi-kbl-8809g/igt@gem_ctx_switch@rcs0.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16023/fi-kbl-8809g/igt@gem_ctx_switch@rcs0.html
* igt@i915_selftest@live_workarounds:
- fi-icl-u3: [PASS][7] -> [DMESG-WARN][8]
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7702/fi-icl-u3/igt@i915_selftest@live_workarounds.html
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16023/fi-icl-u3/igt@i915_selftest@live_workarounds.html
- fi-kbl-r: [PASS][9] -> [DMESG-WARN][10]
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7702/fi-kbl-r/igt@i915_selftest@live_workarounds.html
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16023/fi-kbl-r/igt@i915_selftest@live_workarounds.html
* igt@kms_busy@basic-flip-pipe-a:
- fi-cfl-guc: [PASS][11] -> [DMESG-WARN][12]
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7702/fi-cfl-guc/igt@kms_busy@basic-flip-pipe-a.html
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16023/fi-cfl-guc/igt@kms_busy@basic-flip-pipe-a.html
- fi-kbl-x1275: [PASS][13] -> [DMESG-WARN][14]
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7702/fi-kbl-x1275/igt@kms_busy@basic-flip-pipe-a.html
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16023/fi-kbl-x1275/igt@kms_busy@basic-flip-pipe-a.html
- fi-kbl-soraka: [PASS][15] -> [DMESG-WARN][16]
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7702/fi-kbl-soraka/igt@kms_busy@basic-flip-pipe-a.html
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16023/fi-kbl-soraka/igt@kms_busy@basic-flip-pipe-a.html
- fi-glk-dsi: [PASS][17] -> [DMESG-WARN][18]
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7702/fi-glk-dsi/igt@kms_busy@basic-flip-pipe-a.html
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16023/fi-glk-dsi/igt@kms_busy@basic-flip-pipe-a.html
- fi-bsw-kefka: [PASS][19] -> [DMESG-WARN][20]
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7702/fi-bsw-kefka/igt@kms_busy@basic-flip-pipe-a.html
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16023/fi-bsw-kefka/igt@kms_busy@basic-flip-pipe-a.html
- fi-icl-y: [PASS][21] -> [DMESG-WARN][22]
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7702/fi-icl-y/igt@kms_busy@basic-flip-pipe-a.html
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16023/fi-icl-y/igt@kms_busy@basic-flip-pipe-a.html
- fi-whl-u: [PASS][23] -> [DMESG-WARN][24]
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7702/fi-whl-u/igt@kms_busy@basic-flip-pipe-a.html
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16023/fi-whl-u/igt@kms_busy@basic-flip-pipe-a.html
- fi-icl-dsi: [PASS][25] -> [DMESG-WARN][26]
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7702/fi-icl-dsi/igt@kms_busy@basic-flip-pipe-a.html
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16023/fi-icl-dsi/igt@kms_busy@basic-flip-pipe-a.html
- fi-apl-guc: [PASS][27] -> [DMESG-WARN][28]
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7702/fi-apl-guc/igt@kms_busy@basic-flip-pipe-a.html
[28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16023/fi-apl-guc/igt@kms_busy@basic-flip-pipe-a.html
- fi-bxt-dsi: [PASS][29] -> [DMESG-WARN][30]
[29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7702/fi-bxt-dsi/igt@kms_busy@basic-flip-pipe-a.html
[30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16023/fi-bxt-dsi/igt@kms_busy@basic-flip-pipe-a.html
- fi-cfl-8700k: [PASS][31] -> [DMESG-WARN][32]
[31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7702/fi-cfl-8700k/igt@kms_busy@basic-flip-pipe-a.html
[32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16023/fi-cfl-8700k/igt@kms_busy@basic-flip-pipe-a.html
- fi-icl-guc: [PASS][33] -> [DMESG-WARN][34]
[33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7702/fi-icl-guc/igt@kms_busy@basic-flip-pipe-a.html
[34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16023/fi-icl-guc/igt@kms_busy@basic-flip-pipe-a.html
- fi-skl-6700k2: [PASS][35] -> [DMESG-WARN][36]
[35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7702/fi-skl-6700k2/igt@kms_busy@basic-flip-pipe-a.html
[36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16023/fi-skl-6700k2/igt@kms_busy@basic-flip-pipe-a.html
- fi-cml-u2: [PASS][37] -> [DMESG-WARN][38]
[37]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7702/fi-cml-u2/igt@kms_busy@basic-flip-pipe-a.html
[38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16023/fi-cml-u2/igt@kms_busy@basic-flip-pipe-a.html
* igt@kms_busy@basic-flip-pipe-b:
- fi-skl-guc: [PASS][39] -> [DMESG-WARN][40]
[39]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7702/fi-skl-guc/igt@kms_busy@basic-flip-pipe-b.html
[40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16023/fi-skl-guc/igt@kms_busy@basic-flip-pipe-b.html
* igt@kms_busy@basic-flip-pipe-c:
- fi-bsw-n3050: NOTRUN -> [DMESG-WARN][41]
[41]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16023/fi-bsw-n3050/igt@kms_busy@basic-flip-pipe-c.html
- fi-icl-u2: [PASS][42] -> [DMESG-WARN][43]
[42]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7702/fi-icl-u2/igt@kms_busy@basic-flip-pipe-c.html
[43]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16023/fi-icl-u2/igt@kms_busy@basic-flip-pipe-c.html
* igt@runner@aborted:
- fi-kbl-x1275: NOTRUN -> [FAIL][44]
[44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16023/fi-kbl-x1275/igt@runner@aborted.html
- fi-cfl-8700k: NOTRUN -> [FAIL][45]
[45]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16023/fi-cfl-8700k/igt@runner@aborted.html
- fi-apl-guc: NOTRUN -> [FAIL][46]
[46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16023/fi-apl-guc/igt@runner@aborted.html
- fi-kbl-soraka: NOTRUN -> [FAIL][47]
[47]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16023/fi-kbl-soraka/igt@runner@aborted.html
- fi-kbl-guc: NOTRUN -> [FAIL][48]
[48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16023/fi-kbl-guc/igt@runner@aborted.html
- fi-whl-u: NOTRUN -> [FAIL][49]
[49]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16023/fi-whl-u/igt@runner@aborted.html
- fi-bxt-dsi: NOTRUN -> [FAIL][50]
[50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16023/fi-bxt-dsi/igt@runner@aborted.html
- fi-cfl-guc: NOTRUN -> [FAIL][51]
[51]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16023/fi-cfl-guc/igt@runner@aborted.html
#### Warnings ####
* igt@runner@aborted:
- fi-kbl-8809g: [FAIL][52] ([i915#858]) -> [FAIL][53]
[52]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7702/fi-kbl-8809g/igt@runner@aborted.html
[53]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16023/fi-kbl-8809g/igt@runner@aborted.html
#### Suppressed ####
The following results come from untrusted machines, tests, or statuses.
They do not affect the overall result.
* igt@kms_busy@basic-flip-pipe-a:
- {fi-tgl-u}: [PASS][54] -> [DMESG-WARN][55]
[54]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7702/fi-tgl-u/igt@kms_busy@basic-flip-pipe-a.html
[55]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16023/fi-tgl-u/igt@kms_busy@basic-flip-pipe-a.html
Known issues
------------
Here are the changes found in Patchwork_16023 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@gem_close_race@basic-threads:
- fi-byt-j1900: [PASS][56] -> [TIMEOUT][57] ([i915#816])
[56]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7702/fi-byt-j1900/igt@gem_close_race@basic-threads.html
[57]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16023/fi-byt-j1900/igt@gem_close_race@basic-threads.html
- fi-byt-n2820: [PASS][58] -> [TIMEOUT][59] ([i915#816])
[58]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7702/fi-byt-n2820/igt@gem_close_race@basic-threads.html
[59]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16023/fi-byt-n2820/igt@gem_close_race@basic-threads.html
* igt@i915_selftest@live_gem_contexts:
- fi-hsw-peppy: [PASS][60] -> [DMESG-FAIL][61] ([i915#722])
[60]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7702/fi-hsw-peppy/igt@i915_selftest@live_gem_contexts.html
[61]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16023/fi-hsw-peppy/igt@i915_selftest@live_gem_contexts.html
#### Possible fixes ####
* igt@i915_selftest@live_blt:
- fi-hsw-4770: [DMESG-FAIL][62] ([i915#725]) -> [PASS][63]
[62]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7702/fi-hsw-4770/igt@i915_selftest@live_blt.html
[63]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16023/fi-hsw-4770/igt@i915_selftest@live_blt.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[i915#722]: https://gitlab.freedesktop.org/drm/intel/issues/722
[i915#725]: https://gitlab.freedesktop.org/drm/intel/issues/725
[i915#816]: https://gitlab.freedesktop.org/drm/intel/issues/816
[i915#858]: https://gitlab.freedesktop.org/drm/intel/issues/858
Participating hosts (51 -> 37)
------------------------------
Additional (1): fi-bsw-n3050
Missing (15): fi-bdw-samus fi-bdw-5557u fi-hsw-4200u fi-skl-6770hq fi-bdw-gvtdvm fi-byt-squawks fi-bsw-cyan fi-ilk-650 fi-kbl-7500u fi-ctg-p8600 fi-gdg-551 fi-ivb-3770 fi-kbl-7560u fi-byt-clapper fi-skl-6600u
Build changes
-------------
* CI: CI-20190529 -> None
* Linux: CI_DRM_7702 -> Patchwork_16023
CI-20190529: 20190529
CI_DRM_7702: 696cc0448fced2ed45ab5e9e0a5c913bfe263592 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_5358: c6fc013f414b806175dc4143c58ab445e5235ea5 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_16023: d2a13c2a79e37f35acc873b7713e1b606dcafba2 @ git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
d2a13c2a79e3 drm/i915/gt: Pull context activation into central intel_context_pin()
ec1a6b75257b drm/i915/gt: Push context state allocation earlier
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16023/index.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 4+ messages in thread
end of thread, other threads:[~2020-01-08 13:23 UTC | newest]
Thread overview: 4+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2020-01-08 12:23 [Intel-gfx] [PATCH 1/2] drm/i915/gt: Push context state allocation earlier Chris Wilson
2020-01-08 12:23 ` [Intel-gfx] [PATCH 2/2] drm/i915/gt: Pull context activation into central intel_context_pin() Chris Wilson
2020-01-08 12:58 ` Maarten Lankhorst
2020-01-08 13:23 ` [Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [1/2] drm/i915/gt: Push context state allocation earlier Patchwork
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