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From: "Roger Pau Monné" <>
To: Jan Beulich <>
Cc:, Paul Durrant <>,
	Wei Liu <>, Andrew Cooper <>
Subject: Re: [Xen-devel] [PATCH v2 0/3] x86: improve assisted tlb flush and use it in guest mode
Date: Fri, 10 Jan 2020 17:14:44 +0100	[thread overview]
Message-ID: <20200110161444.GD11756@Air-de-Roger> (raw)
In-Reply-To: <>

On Fri, Jan 10, 2020 at 05:08:16PM +0100, Jan Beulich wrote:
> On 10.01.2020 17:04, Roger Pau Monne wrote:
> > Patch #2 is likely the most controversial one, as it changes the
> > implementation of assisted TLB flushes. I have to admit I haven't been
> > able to figure out why HVM guest context flushes issued a
> > flush_tlb_mask, and the commit introducing such behavior doesn't contain
> > a helpful commit message.
> A shadow mode thing, maybe?

Hm, I could be wrong, but that flush doesn't seem to make sense for
shadow mode either.

If VPID/ASID is used, ticking it will drop all the guest caches, and
if VPID/ASID not used a vmexit/vmentry will clear the cache.
According to my reading of the Intel SDM this applies regardless of
whether HAP (EPT) is used or not.

The flush done by flush_tlb_mask is in root mode, and hence doesn't
affect the guest (non-root) caches when SVM/VTx is used.


Xen-devel mailing list

      reply	other threads:[~2020-01-10 16:15 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-01-10 16:04 Roger Pau Monne
2020-01-10 16:04 ` [Xen-devel] [PATCH v2 1/3] x86/hvm: allow ASID flush when v != current Roger Pau Monne
2020-01-10 16:04 ` [Xen-devel] [PATCH v2 2/3] x86/hvm: rework HVMOP_flush_tlbs Roger Pau Monne
2020-01-10 16:04 ` [Xen-devel] [PATCH v2 3/3] x86/tlb: use Xen L0 assisted TLB flush when available Roger Pau Monne
2020-01-10 16:08 ` [Xen-devel] [PATCH v2 0/3] x86: improve assisted tlb flush and use it in guest mode Jan Beulich
2020-01-10 16:14   ` Roger Pau Monné [this message]

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