From: Maxime Ripard <mripard@kernel.org>
To: Andre Przywara <andre.przywara@arm.com>
Cc: Chen-Yu Tsai <wens@csie.org>, Mark Brown <broonie@kernel.org>,
linux-spi@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-sunxi@googlegroups.com, Icenowy Zheng <icenowy@aosc.xyz>,
devicetree@vger.kernel.org, Rob Herring <robh+dt@kernel.org>,
Mark Rutland <mark.rutland@arm.com>
Subject: Re: [PATCH 1/2] arm64: dts: sun50i: H6: Add SPI controllers nodes and pinmuxes
Date: Sat, 11 Jan 2020 18:26:39 +0100 [thread overview]
Message-ID: <20200111172639.to3lhzros6ca5hj2@gilmour.lan> (raw)
In-Reply-To: <20200108101006.150706-2-andre.przywara@arm.com>
On Wed, Jan 08, 2020 at 10:10:05AM +0000, Andre Przywara wrote:
> The Allwinner H6 SoC contains two SPI controllers similar to the H3/A64,
> but with the added capability of 3-wire and 4-wire operation modes.
> For now the driver does not support those, but the SPI registers are
> fully backwards-compatible, just adding bits and registers which were
> formerly reserved. So we can use the existing driver for the "normal" SPI
> modes, for instance to access the SPI NOR flash soldered on the PineH64
> board.
> We use an H6 specific compatible string in addition to the existing H3
> string, so when the driver later gains Quad SPI support, it should work
> automatically without any DT changes.
>
> Tested by accessing the SPI flash on a Pine H64 board (SPI0), also
> connecting another SPI flash to the SPI1 header pins.
>
> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
> ---
> arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi | 54 ++++++++++++++++++++
> 1 file changed, 54 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
> index 3329283e38ab..40835850893e 100644
> --- a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
> +++ b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
> @@ -338,6 +338,30 @@
> bias-pull-up;
> };
>
> + /omit-if-no-ref/
> + spi0_pins: spi0-pins {
> + pins = "PC0", "PC2", "PC3";
> + function = "spi0";
> + };
> +
> + /omit-if-no-ref/
> + spi0_cs_pin: spi0-cs-pin {
> + pins = "PC5";
> + function = "spi0";
> + };
It seems suspicious to use it in the Pine H64, since PC5 is also used
by the eMMC (and this prevents either the SPI or the emmc controller
to probe, depending on which probed first).
Maxime
WARNING: multiple messages have this Message-ID (diff)
From: Maxime Ripard <mripard-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
To: Andre Przywara <andre.przywara-5wv7dgnIgG8@public.gmane.org>
Cc: Chen-Yu Tsai <wens-jdAy2FN1RRM@public.gmane.org>,
Mark Brown <broonie-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>,
linux-spi-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
linux-sunxi-/JYPxA39Uh5TLH3MbocFFw@public.gmane.org,
Icenowy Zheng <icenowy-ymACFijhrKM@public.gmane.org>,
devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
Rob Herring <robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>,
Mark Rutland <mark.rutland-5wv7dgnIgG8@public.gmane.org>
Subject: Re: [PATCH 1/2] arm64: dts: sun50i: H6: Add SPI controllers nodes and pinmuxes
Date: Sat, 11 Jan 2020 18:26:39 +0100 [thread overview]
Message-ID: <20200111172639.to3lhzros6ca5hj2@gilmour.lan> (raw)
In-Reply-To: <20200108101006.150706-2-andre.przywara-5wv7dgnIgG8@public.gmane.org>
On Wed, Jan 08, 2020 at 10:10:05AM +0000, Andre Przywara wrote:
> The Allwinner H6 SoC contains two SPI controllers similar to the H3/A64,
> but with the added capability of 3-wire and 4-wire operation modes.
> For now the driver does not support those, but the SPI registers are
> fully backwards-compatible, just adding bits and registers which were
> formerly reserved. So we can use the existing driver for the "normal" SPI
> modes, for instance to access the SPI NOR flash soldered on the PineH64
> board.
> We use an H6 specific compatible string in addition to the existing H3
> string, so when the driver later gains Quad SPI support, it should work
> automatically without any DT changes.
>
> Tested by accessing the SPI flash on a Pine H64 board (SPI0), also
> connecting another SPI flash to the SPI1 header pins.
>
> Signed-off-by: Andre Przywara <andre.przywara-5wv7dgnIgG8@public.gmane.org>
> ---
> arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi | 54 ++++++++++++++++++++
> 1 file changed, 54 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
> index 3329283e38ab..40835850893e 100644
> --- a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
> +++ b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
> @@ -338,6 +338,30 @@
> bias-pull-up;
> };
>
> + /omit-if-no-ref/
> + spi0_pins: spi0-pins {
> + pins = "PC0", "PC2", "PC3";
> + function = "spi0";
> + };
> +
> + /omit-if-no-ref/
> + spi0_cs_pin: spi0-cs-pin {
> + pins = "PC5";
> + function = "spi0";
> + };
It seems suspicious to use it in the Pine H64, since PC5 is also used
by the eMMC (and this prevents either the SPI or the emmc controller
to probe, depending on which probed first).
Maxime
WARNING: multiple messages have this Message-ID (diff)
From: Maxime Ripard <mripard@kernel.org>
To: Andre Przywara <andre.przywara@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>,
devicetree@vger.kernel.org, linux-sunxi@googlegroups.com,
Rob Herring <robh+dt@kernel.org>,
linux-spi@vger.kernel.org, Chen-Yu Tsai <wens@csie.org>,
Mark Brown <broonie@kernel.org>, Icenowy Zheng <icenowy@aosc.xyz>,
linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH 1/2] arm64: dts: sun50i: H6: Add SPI controllers nodes and pinmuxes
Date: Sat, 11 Jan 2020 18:26:39 +0100 [thread overview]
Message-ID: <20200111172639.to3lhzros6ca5hj2@gilmour.lan> (raw)
In-Reply-To: <20200108101006.150706-2-andre.przywara@arm.com>
On Wed, Jan 08, 2020 at 10:10:05AM +0000, Andre Przywara wrote:
> The Allwinner H6 SoC contains two SPI controllers similar to the H3/A64,
> but with the added capability of 3-wire and 4-wire operation modes.
> For now the driver does not support those, but the SPI registers are
> fully backwards-compatible, just adding bits and registers which were
> formerly reserved. So we can use the existing driver for the "normal" SPI
> modes, for instance to access the SPI NOR flash soldered on the PineH64
> board.
> We use an H6 specific compatible string in addition to the existing H3
> string, so when the driver later gains Quad SPI support, it should work
> automatically without any DT changes.
>
> Tested by accessing the SPI flash on a Pine H64 board (SPI0), also
> connecting another SPI flash to the SPI1 header pins.
>
> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
> ---
> arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi | 54 ++++++++++++++++++++
> 1 file changed, 54 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
> index 3329283e38ab..40835850893e 100644
> --- a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
> +++ b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
> @@ -338,6 +338,30 @@
> bias-pull-up;
> };
>
> + /omit-if-no-ref/
> + spi0_pins: spi0-pins {
> + pins = "PC0", "PC2", "PC3";
> + function = "spi0";
> + };
> +
> + /omit-if-no-ref/
> + spi0_cs_pin: spi0-cs-pin {
> + pins = "PC5";
> + function = "spi0";
> + };
It seems suspicious to use it in the Pine H64, since PC5 is also used
by the eMMC (and this prevents either the SPI or the emmc controller
to probe, depending on which probed first).
Maxime
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http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2020-01-11 17:26 UTC|newest]
Thread overview: 30+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-01-08 10:10 [PATCH 0/2] arm64: dts: sun50i: H6: Enable SPI flash Andre Przywara
2020-01-08 10:10 ` Andre Przywara
2020-01-08 10:10 ` Andre Przywara
2020-01-08 10:10 ` [PATCH 1/2] arm64: dts: sun50i: H6: Add SPI controllers nodes and pinmuxes Andre Przywara
2020-01-08 10:10 ` Andre Przywara
2020-01-08 10:10 ` Andre Przywara
2020-01-08 10:45 ` [linux-sunxi] " Clément Péron
2020-01-08 10:45 ` Clément Péron
2020-01-08 10:45 ` Clément Péron
2020-01-08 11:34 ` Emmanuel Vadot
2020-01-08 11:34 ` Emmanuel Vadot
2020-01-08 11:34 ` Emmanuel Vadot
2020-01-08 11:47 ` Andre Przywara
2020-01-08 11:47 ` Andre Przywara
2020-01-08 11:47 ` Andre Przywara
2020-01-08 14:32 ` Emmanuel Vadot
2020-01-08 14:32 ` Emmanuel Vadot
2020-01-08 14:32 ` Emmanuel Vadot
2020-01-11 17:26 ` Maxime Ripard [this message]
2020-01-11 17:26 ` Maxime Ripard
2020-01-11 17:26 ` Maxime Ripard
2020-01-12 15:12 ` André Przywara
2020-01-12 15:12 ` André Przywara
2020-01-12 15:12 ` André Przywara
2020-01-13 8:59 ` Maxime Ripard
2020-01-13 8:59 ` Maxime Ripard
2020-01-13 8:59 ` Maxime Ripard
2020-01-08 10:10 ` [PATCH 2/2] arm64: dts: allwinner: h6: Pine H64: Add SPI flash node Andre Przywara
2020-01-08 10:10 ` Andre Przywara
2020-01-08 10:10 ` Andre Przywara
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