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* [Intel-gfx] [PATCH] drm/i915/tgl: Program MBUS_ABOX{1, 2}_CTL during display init
@ 2020-01-16  1:48 Matt Roper
  2020-01-16  2:24 ` [Intel-gfx] ✓ Fi.CI.BAT: success for " Patchwork
                   ` (2 more replies)
  0 siblings, 3 replies; 4+ messages in thread
From: Matt Roper @ 2020-01-16  1:48 UTC (permalink / raw)
  To: intel-gfx

On gen11 we only needed to program MBus credits into MBUS_ABOX_CTL
during display initialization, but on gen12 we're now supposed to
program the same values into MBUS_ABOX1_CTL and MBUS_ABOX2_CTL as well.

Bspec: 49213
Bspec: 50096
Cc: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
---
 drivers/gpu/drm/i915/display/intel_display_power.c | 4 ++++
 drivers/gpu/drm/i915/i915_reg.h                    | 2 ++
 2 files changed, 6 insertions(+)

diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c b/drivers/gpu/drm/i915/display/intel_display_power.c
index 21561acfa3ac..761be9fcaf10 100644
--- a/drivers/gpu/drm/i915/display/intel_display_power.c
+++ b/drivers/gpu/drm/i915/display/intel_display_power.c
@@ -4474,6 +4474,10 @@ static void icl_mbus_init(struct drm_i915_private *dev_priv)
 	      MBUS_ABOX_BW_CREDIT(1);
 
 	I915_WRITE(MBUS_ABOX_CTL, val);
+	if (INTEL_GEN(dev_priv) >= 12) {
+		I915_WRITE(MBUS_ABOX1_CTL, val);
+		I915_WRITE(MBUS_ABOX2_CTL, val);
+	}
 }
 
 static void hsw_assert_cdclk(struct drm_i915_private *dev_priv)
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 5e5949edf2a8..ef191a0278ac 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -2860,6 +2860,8 @@ static inline bool i915_mmio_reg_valid(i915_reg_t reg)
 #define MI_ARB_STATE	_MMIO(0x20e4) /* 915+ only */
 
 #define MBUS_ABOX_CTL			_MMIO(0x45038)
+#define MBUS_ABOX1_CTL			_MMIO(0x45048)
+#define MBUS_ABOX2_CTL			_MMIO(0x4504C)
 #define MBUS_ABOX_BW_CREDIT_MASK	(3 << 20)
 #define MBUS_ABOX_BW_CREDIT(x)		((x) << 20)
 #define MBUS_ABOX_B_CREDIT_MASK		(0xF << 16)
-- 
2.23.0

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^ permalink raw reply related	[flat|nested] 4+ messages in thread

end of thread, other threads:[~2020-01-18 16:38 UTC | newest]

Thread overview: 4+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2020-01-16  1:48 [Intel-gfx] [PATCH] drm/i915/tgl: Program MBUS_ABOX{1, 2}_CTL during display init Matt Roper
2020-01-16  2:24 ` [Intel-gfx] ✓ Fi.CI.BAT: success for " Patchwork
2020-01-16  2:24 ` [Intel-gfx] ✗ Fi.CI.BUILD: warning " Patchwork
2020-01-18 16:38 ` [Intel-gfx] ✓ Fi.CI.IGT: success " Patchwork

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