From: Will Deacon <will@kernel.org>
To: Marc Zyngier <maz@kernel.org>
Cc: Steven Price <steven.price@arm.com>,
Catalin Marinas <catalin.marinas@arm.com>,
linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
kvmarm@lists.cs.columbia.edu
Subject: Re: [PATCH v5 0/3] arm64: Workaround for Cortex-A55 erratum 1530923
Date: Thu, 16 Jan 2020 10:47:46 +0000 [thread overview]
Message-ID: <20200116104746.GB14761@willie-the-truck> (raw)
In-Reply-To: <3292551ef07b2c5354d48faedad849ff@kernel.org>
On Thu, Jan 16, 2020 at 07:28:49AM +0000, Marc Zyngier wrote:
> On 2020-01-14 16:45, Will Deacon wrote:
> > On Mon, Dec 16, 2019 at 11:56:28AM +0000, Steven Price wrote:
> > > Version 5 is a rebasing of version 4 (no changes).
> > >
> > > This series enables a workaround for Cortex-A55 erratum 1530923. The
> > > erratum potentially allows TLB entries to be allocated as a result
> > > of a
> > > speculative AT instruction. This may happen in the middle of a guest
> > > world switch while the relevant VMSA configuration is in an
> > > inconsistent
> > > state, leading to erroneous content being allocated into TLBs.
> > >
> > > There are existing workarounds for similar issues, 1165522 is
> > > effectively the same, and 1319367/1319537 is similar but without VHE
> > > support. Rather than add to the selection of errata, the first patch
> > > renames 1165522 to WORKAROUND_SPECULATIVE_AT which can be reused (in
> > > the
> > > final patch) for 1530923.
> > >
> > > The workaround for errata 1319367 and 1319537 although similar cannot
> > > use VHE (not available on those CPUs) so cannot share the workaround.
> > > However, to keep some sense of symmetry the workaround is renamed to
> > > SPECULATIVE_AT_NVHE.
> > >
> > > Changes since v4:
> > > * Rebased to v5.5-rc1
> >
> > Looks fine to me. Marc, are you ok with me queueing this via arm64
> > (that's
> > where the existing workarounds came from), or would you prefer to take
> > them
> > via kvm-arm?
>
> Please go ahead and take it (with my ack) via the arm64 tree.
Will do, thanks!
Will
WARNING: multiple messages have this Message-ID (diff)
From: Will Deacon <will@kernel.org>
To: Marc Zyngier <maz@kernel.org>
Cc: Catalin Marinas <catalin.marinas@arm.com>,
kvmarm@lists.cs.columbia.edu, linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
Steven Price <steven.price@arm.com>
Subject: Re: [PATCH v5 0/3] arm64: Workaround for Cortex-A55 erratum 1530923
Date: Thu, 16 Jan 2020 10:47:46 +0000 [thread overview]
Message-ID: <20200116104746.GB14761@willie-the-truck> (raw)
In-Reply-To: <3292551ef07b2c5354d48faedad849ff@kernel.org>
On Thu, Jan 16, 2020 at 07:28:49AM +0000, Marc Zyngier wrote:
> On 2020-01-14 16:45, Will Deacon wrote:
> > On Mon, Dec 16, 2019 at 11:56:28AM +0000, Steven Price wrote:
> > > Version 5 is a rebasing of version 4 (no changes).
> > >
> > > This series enables a workaround for Cortex-A55 erratum 1530923. The
> > > erratum potentially allows TLB entries to be allocated as a result
> > > of a
> > > speculative AT instruction. This may happen in the middle of a guest
> > > world switch while the relevant VMSA configuration is in an
> > > inconsistent
> > > state, leading to erroneous content being allocated into TLBs.
> > >
> > > There are existing workarounds for similar issues, 1165522 is
> > > effectively the same, and 1319367/1319537 is similar but without VHE
> > > support. Rather than add to the selection of errata, the first patch
> > > renames 1165522 to WORKAROUND_SPECULATIVE_AT which can be reused (in
> > > the
> > > final patch) for 1530923.
> > >
> > > The workaround for errata 1319367 and 1319537 although similar cannot
> > > use VHE (not available on those CPUs) so cannot share the workaround.
> > > However, to keep some sense of symmetry the workaround is renamed to
> > > SPECULATIVE_AT_NVHE.
> > >
> > > Changes since v4:
> > > * Rebased to v5.5-rc1
> >
> > Looks fine to me. Marc, are you ok with me queueing this via arm64
> > (that's
> > where the existing workarounds came from), or would you prefer to take
> > them
> > via kvm-arm?
>
> Please go ahead and take it (with my ack) via the arm64 tree.
Will do, thanks!
Will
_______________________________________________
kvmarm mailing list
kvmarm@lists.cs.columbia.edu
https://lists.cs.columbia.edu/mailman/listinfo/kvmarm
WARNING: multiple messages have this Message-ID (diff)
From: Will Deacon <will@kernel.org>
To: Marc Zyngier <maz@kernel.org>
Cc: Catalin Marinas <catalin.marinas@arm.com>,
kvmarm@lists.cs.columbia.edu, linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
Steven Price <steven.price@arm.com>
Subject: Re: [PATCH v5 0/3] arm64: Workaround for Cortex-A55 erratum 1530923
Date: Thu, 16 Jan 2020 10:47:46 +0000 [thread overview]
Message-ID: <20200116104746.GB14761@willie-the-truck> (raw)
In-Reply-To: <3292551ef07b2c5354d48faedad849ff@kernel.org>
On Thu, Jan 16, 2020 at 07:28:49AM +0000, Marc Zyngier wrote:
> On 2020-01-14 16:45, Will Deacon wrote:
> > On Mon, Dec 16, 2019 at 11:56:28AM +0000, Steven Price wrote:
> > > Version 5 is a rebasing of version 4 (no changes).
> > >
> > > This series enables a workaround for Cortex-A55 erratum 1530923. The
> > > erratum potentially allows TLB entries to be allocated as a result
> > > of a
> > > speculative AT instruction. This may happen in the middle of a guest
> > > world switch while the relevant VMSA configuration is in an
> > > inconsistent
> > > state, leading to erroneous content being allocated into TLBs.
> > >
> > > There are existing workarounds for similar issues, 1165522 is
> > > effectively the same, and 1319367/1319537 is similar but without VHE
> > > support. Rather than add to the selection of errata, the first patch
> > > renames 1165522 to WORKAROUND_SPECULATIVE_AT which can be reused (in
> > > the
> > > final patch) for 1530923.
> > >
> > > The workaround for errata 1319367 and 1319537 although similar cannot
> > > use VHE (not available on those CPUs) so cannot share the workaround.
> > > However, to keep some sense of symmetry the workaround is renamed to
> > > SPECULATIVE_AT_NVHE.
> > >
> > > Changes since v4:
> > > * Rebased to v5.5-rc1
> >
> > Looks fine to me. Marc, are you ok with me queueing this via arm64
> > (that's
> > where the existing workarounds came from), or would you prefer to take
> > them
> > via kvm-arm?
>
> Please go ahead and take it (with my ack) via the arm64 tree.
Will do, thanks!
Will
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2020-01-16 10:47 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-12-16 11:56 [PATCH v5 0/3] arm64: Workaround for Cortex-A55 erratum 1530923 Steven Price
2019-12-16 11:56 ` Steven Price
2019-12-16 11:56 ` Steven Price
2019-12-16 11:56 ` [PATCH v5 1/3] arm64: Rename WORKAROUND_1165522 to SPECULATIVE_AT_VHE Steven Price
2019-12-16 11:56 ` Steven Price
2019-12-16 11:56 ` Steven Price
2019-12-16 11:56 ` [PATCH v5 2/3] arm64: Rename WORKAROUND_1319367 to SPECULATIVE_AT_NVHE Steven Price
2019-12-16 11:56 ` Steven Price
2019-12-16 11:56 ` Steven Price
2019-12-16 11:56 ` [PATCH v5 3/3] arm64: Workaround for Cortex-A55 erratum 1530923 Steven Price
2019-12-16 11:56 ` Steven Price
2019-12-16 11:56 ` Steven Price
2020-01-14 16:45 ` [PATCH v5 0/3] " Will Deacon
2020-01-14 16:45 ` Will Deacon
2020-01-14 16:45 ` Will Deacon
2020-01-16 7:28 ` Marc Zyngier
2020-01-16 7:28 ` Marc Zyngier
2020-01-16 7:28 ` Marc Zyngier
2020-01-16 10:47 ` Will Deacon [this message]
2020-01-16 10:47 ` Will Deacon
2020-01-16 10:47 ` Will Deacon
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