From: shiva.linuxworks@gmail.com To: Miquel Raynal <miquel.raynal@bootlin.com>, Richard Weinberger <richard@nod.at>, Vignesh Raghavendra <vigneshr@ti.com>, Boris Brezillon <bbrezillon@kernel.org>, Frieder Schrempf <frieder.schrempf@kontron.de>, linux-mtd@lists.infradead.org, linux-kernel@vger.kernel.org Cc: Shivamurthy Shastri <sshivamurthy@micron.com> Subject: [PATCH 4/4] mtd: spinand: Add new Micron SPI NAND devices with multiple dies Date: Sun, 19 Jan 2020 15:54:32 +0100 [thread overview] Message-ID: <20200119145432.10405-5-sshivamurthy@micron.com> (raw) In-Reply-To: <20200119145432.10405-1-sshivamurthy@micron.com> From: Shivamurthy Shastri <sshivamurthy@micron.com> Add device table for new Micron SPI NAND devices, which have multiple dies. While at it, add support to select the die. Signed-off-by: Shivamurthy Shastri <sshivamurthy@micron.com> --- drivers/mtd/nand/spi/micron.c | 50 +++++++++++++++++++++++++++++++++++ 1 file changed, 50 insertions(+) diff --git a/drivers/mtd/nand/spi/micron.c b/drivers/mtd/nand/spi/micron.c index 45fc37c58f8a..03b486843210 100644 --- a/drivers/mtd/nand/spi/micron.c +++ b/drivers/mtd/nand/spi/micron.c @@ -18,6 +18,8 @@ #define MICRON_STATUS_ECC_4TO6_BITFLIPS (3 << 4) #define MICRON_STATUS_ECC_7TO8_BITFLIPS (5 << 4) +#define MICRON_DIE_SELECTION_BIT 6 + static SPINAND_OP_VARIANTS(read_cache_variants, SPINAND_PAGE_READ_FROM_CACHE_QUADIO_OP(0, 2, NULL, 0), SPINAND_PAGE_READ_FROM_CACHE_X4_OP(0, 1, NULL, 0), @@ -64,6 +66,21 @@ static const struct mtd_ooblayout_ops micron_8_ooblayout = { .free = micron_8_ooblayout_free, }; +static int micron_select_target(struct spinand_device *spinand, + unsigned int target) +{ + struct spi_mem_op op = SPINAND_SET_FEATURE_OP(0xd0, + spinand->scratchbuf); + + /* + * As per datasheet, die selection is done by the 6th bit of Die + * Select Register (Address 0xD0). + */ + *spinand->scratchbuf = target << MICRON_DIE_SELECTION_BIT; + + return spi_mem_exec_op(spinand->spimem, &op); +} + static int micron_8_ecc_get_status(struct spinand_device *spinand, u8 status) { @@ -131,6 +148,17 @@ static const struct spinand_info micron_spinand_table[] = { 0, SPINAND_ECCINFO(µn_8_ooblayout, micron_8_ecc_get_status)), + /* M79A 4Gb 3.3V */ + SPINAND_INFO("MT29F4G01ADAGD", 0x36, + NAND_MEMORG(1, 2048, 128, 64, 2048, 80, 2, 1, 2), + NAND_ECCREQ(8, 512), + SPINAND_INFO_OP_VARIANTS(&read_cache_variants, + &write_cache_variants, + &update_cache_variants), + 0, + SPINAND_ECCINFO(µn_8_ooblayout, + micron_8_ecc_get_status), + SPINAND_SELECT_TARGET(micron_select_target)), /* M70A 4Gb 3.3V */ SPINAND_INFO("MT29F4G01ABAFD", 0x34, NAND_MEMORG(1, 4096, 256, 64, 2048, 40, 1, 1, 1), @@ -151,6 +179,28 @@ static const struct spinand_info micron_spinand_table[] = { 0, SPINAND_ECCINFO(µn_8_ooblayout, micron_8_ecc_get_status)), + /* M70A 8Gb 3.3V */ + SPINAND_INFO("MT29F8G01ADAFD", 0x46, + NAND_MEMORG(1, 4096, 256, 64, 2048, 40, 1, 1, 2), + NAND_ECCREQ(8, 512), + SPINAND_INFO_OP_VARIANTS(&read_cache_variants, + &write_cache_variants, + &update_cache_variants), + 0, + SPINAND_ECCINFO(µn_8_ooblayout, + micron_8_ecc_get_status), + SPINAND_SELECT_TARGET(micron_select_target)), + /* M70A 8Gb 1.8V */ + SPINAND_INFO("MT29F8G01ADBFD", 0x47, + NAND_MEMORG(1, 4096, 256, 64, 2048, 40, 1, 1, 2), + NAND_ECCREQ(8, 512), + SPINAND_INFO_OP_VARIANTS(&read_cache_variants, + &write_cache_variants, + &update_cache_variants), + 0, + SPINAND_ECCINFO(µn_8_ooblayout, + micron_8_ecc_get_status), + SPINAND_SELECT_TARGET(micron_select_target)), }; static int micron_spinand_detect(struct spinand_device *spinand) -- 2.17.1
WARNING: multiple messages have this Message-ID (diff)
From: shiva.linuxworks@gmail.com To: Miquel Raynal <miquel.raynal@bootlin.com>, Richard Weinberger <richard@nod.at>, Vignesh Raghavendra <vigneshr@ti.com>, Boris Brezillon <bbrezillon@kernel.org>, Frieder Schrempf <frieder.schrempf@kontron.de>, linux-mtd@lists.infradead.org, linux-kernel@vger.kernel.org Cc: Shivamurthy Shastri <sshivamurthy@micron.com> Subject: [PATCH 4/4] mtd: spinand: Add new Micron SPI NAND devices with multiple dies Date: Sun, 19 Jan 2020 15:54:32 +0100 [thread overview] Message-ID: <20200119145432.10405-5-sshivamurthy@micron.com> (raw) In-Reply-To: <20200119145432.10405-1-sshivamurthy@micron.com> From: Shivamurthy Shastri <sshivamurthy@micron.com> Add device table for new Micron SPI NAND devices, which have multiple dies. While at it, add support to select the die. Signed-off-by: Shivamurthy Shastri <sshivamurthy@micron.com> --- drivers/mtd/nand/spi/micron.c | 50 +++++++++++++++++++++++++++++++++++ 1 file changed, 50 insertions(+) diff --git a/drivers/mtd/nand/spi/micron.c b/drivers/mtd/nand/spi/micron.c index 45fc37c58f8a..03b486843210 100644 --- a/drivers/mtd/nand/spi/micron.c +++ b/drivers/mtd/nand/spi/micron.c @@ -18,6 +18,8 @@ #define MICRON_STATUS_ECC_4TO6_BITFLIPS (3 << 4) #define MICRON_STATUS_ECC_7TO8_BITFLIPS (5 << 4) +#define MICRON_DIE_SELECTION_BIT 6 + static SPINAND_OP_VARIANTS(read_cache_variants, SPINAND_PAGE_READ_FROM_CACHE_QUADIO_OP(0, 2, NULL, 0), SPINAND_PAGE_READ_FROM_CACHE_X4_OP(0, 1, NULL, 0), @@ -64,6 +66,21 @@ static const struct mtd_ooblayout_ops micron_8_ooblayout = { .free = micron_8_ooblayout_free, }; +static int micron_select_target(struct spinand_device *spinand, + unsigned int target) +{ + struct spi_mem_op op = SPINAND_SET_FEATURE_OP(0xd0, + spinand->scratchbuf); + + /* + * As per datasheet, die selection is done by the 6th bit of Die + * Select Register (Address 0xD0). + */ + *spinand->scratchbuf = target << MICRON_DIE_SELECTION_BIT; + + return spi_mem_exec_op(spinand->spimem, &op); +} + static int micron_8_ecc_get_status(struct spinand_device *spinand, u8 status) { @@ -131,6 +148,17 @@ static const struct spinand_info micron_spinand_table[] = { 0, SPINAND_ECCINFO(µn_8_ooblayout, micron_8_ecc_get_status)), + /* M79A 4Gb 3.3V */ + SPINAND_INFO("MT29F4G01ADAGD", 0x36, + NAND_MEMORG(1, 2048, 128, 64, 2048, 80, 2, 1, 2), + NAND_ECCREQ(8, 512), + SPINAND_INFO_OP_VARIANTS(&read_cache_variants, + &write_cache_variants, + &update_cache_variants), + 0, + SPINAND_ECCINFO(µn_8_ooblayout, + micron_8_ecc_get_status), + SPINAND_SELECT_TARGET(micron_select_target)), /* M70A 4Gb 3.3V */ SPINAND_INFO("MT29F4G01ABAFD", 0x34, NAND_MEMORG(1, 4096, 256, 64, 2048, 40, 1, 1, 1), @@ -151,6 +179,28 @@ static const struct spinand_info micron_spinand_table[] = { 0, SPINAND_ECCINFO(µn_8_ooblayout, micron_8_ecc_get_status)), + /* M70A 8Gb 3.3V */ + SPINAND_INFO("MT29F8G01ADAFD", 0x46, + NAND_MEMORG(1, 4096, 256, 64, 2048, 40, 1, 1, 2), + NAND_ECCREQ(8, 512), + SPINAND_INFO_OP_VARIANTS(&read_cache_variants, + &write_cache_variants, + &update_cache_variants), + 0, + SPINAND_ECCINFO(µn_8_ooblayout, + micron_8_ecc_get_status), + SPINAND_SELECT_TARGET(micron_select_target)), + /* M70A 8Gb 1.8V */ + SPINAND_INFO("MT29F8G01ADBFD", 0x47, + NAND_MEMORG(1, 4096, 256, 64, 2048, 40, 1, 1, 2), + NAND_ECCREQ(8, 512), + SPINAND_INFO_OP_VARIANTS(&read_cache_variants, + &write_cache_variants, + &update_cache_variants), + 0, + SPINAND_ECCINFO(µn_8_ooblayout, + micron_8_ecc_get_status), + SPINAND_SELECT_TARGET(micron_select_target)), }; static int micron_spinand_detect(struct spinand_device *spinand) -- 2.17.1 ______________________________________________________ Linux MTD discussion mailing list http://lists.infradead.org/mailman/listinfo/linux-mtd/
next prev parent reply other threads:[~2020-01-19 14:57 UTC|newest] Thread overview: 30+ messages / expand[flat|nested] mbox.gz Atom feed top 2020-01-19 14:54 [PATCH 0/4] Add new series Micron SPI NAND devices shiva.linuxworks 2020-01-19 14:54 ` shiva.linuxworks 2020-01-19 14:54 ` [PATCH 1/4] mtd: spinand: Generalize the OOB layout structure and function names shiva.linuxworks 2020-01-19 14:54 ` shiva.linuxworks 2020-01-30 8:30 ` Miquel Raynal 2020-01-30 8:30 ` Miquel Raynal 2020-01-19 14:54 ` [PATCH 2/4] mtd: spinand: Add new Micron SPI NAND devices shiva.linuxworks 2020-01-19 14:54 ` shiva.linuxworks 2020-01-19 14:54 ` [PATCH 3/4] mtd: spinand: Add M70A series " shiva.linuxworks 2020-01-19 14:54 ` shiva.linuxworks 2020-01-20 10:16 ` Miquel Raynal 2020-01-20 10:16 ` Miquel Raynal 2020-01-21 12:23 ` [EXT] " Shivamurthy Shastri (sshivamurthy) 2020-01-21 12:23 ` Shivamurthy Shastri (sshivamurthy) 2020-01-21 13:40 ` Miquel Raynal 2020-01-21 13:40 ` Miquel Raynal 2020-01-21 14:59 ` Shivamurthy Shastri (sshivamurthy) 2020-01-21 14:59 ` Shivamurthy Shastri (sshivamurthy) 2020-01-21 15:27 ` Miquel Raynal 2020-01-21 15:27 ` Miquel Raynal 2020-01-23 9:01 ` Shivamurthy Shastri (sshivamurthy) 2020-01-23 9:01 ` Shivamurthy Shastri (sshivamurthy) 2020-01-19 14:54 ` shiva.linuxworks [this message] 2020-01-19 14:54 ` [PATCH 4/4] mtd: spinand: Add new Micron SPI NAND devices with multiple dies shiva.linuxworks 2020-01-20 10:22 ` Miquel Raynal 2020-01-20 10:22 ` Miquel Raynal 2020-01-21 12:23 ` [EXT] " Shivamurthy Shastri (sshivamurthy) 2020-01-21 12:23 ` Shivamurthy Shastri (sshivamurthy) 2020-01-21 13:44 ` Miquel Raynal 2020-01-21 13:44 ` Miquel Raynal
Reply instructions: You may reply publicly to this message via plain-text email using any one of the following methods: * Save the following mbox file, import it into your mail client, and reply-to-all from there: mbox Avoid top-posting and favor interleaved quoting: https://en.wikipedia.org/wiki/Posting_style#Interleaved_style * Reply using the --to, --cc, and --in-reply-to switches of git-send-email(1): git send-email \ --in-reply-to=20200119145432.10405-5-sshivamurthy@micron.com \ --to=shiva.linuxworks@gmail.com \ --cc=bbrezillon@kernel.org \ --cc=frieder.schrempf@kontron.de \ --cc=linux-kernel@vger.kernel.org \ --cc=linux-mtd@lists.infradead.org \ --cc=miquel.raynal@bootlin.com \ --cc=richard@nod.at \ --cc=sshivamurthy@micron.com \ --cc=vigneshr@ti.com \ /path/to/YOUR_REPLY https://kernel.org/pub/software/scm/git/docs/git-send-email.html * If your mail client supports setting the In-Reply-To header via mailto: links, try the mailto: linkBe sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes, see mirroring instructions on how to clone and mirror all data and code used by this external index.