* [Intel-gfx] [RFC 1/8] drm/i915/svm: Support partial binding in ppgtt
2020-01-24 8:53 [Intel-gfx] [RFC 0/8] drm/i915/svm: [WIP] SVM runtime allocator support Niranjana Vishwanathapura
@ 2020-01-24 8:53 ` Niranjana Vishwanathapura
2020-01-24 8:53 ` [Intel-gfx] [RFC 2/8] drm/i915/svm: Add support to mark VMs as active Niranjana Vishwanathapura
` (8 subsequent siblings)
9 siblings, 0 replies; 14+ messages in thread
From: Niranjana Vishwanathapura @ 2020-01-24 8:53 UTC (permalink / raw)
To: intel-gfx; +Cc: chris.p.wilson, jason.ekstrand, daniel.vetter
Add support to partially bind objects in ppgtt.
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Cc: Jon Bloomfield <jon.bloomfield@intel.com>
Cc: Daniel Vetter <daniel.vetter@intel.com>
Cc: Chris P Wilson <chris.p.wilson@intel.com>
Cc: Sudeep Dutt <sudeep.dutt@intel.com>
Cc: Stuart Summers <stuart.summers@intel.com>
Signed-off-by: Niranjana Vishwanathapura <niranjana.vishwanathapura@intel.com>
---
drivers/gpu/drm/i915/gt/gen8_ppgtt.c | 37 +++++++++++++++++-----------
drivers/gpu/drm/i915/gt/intel_gtt.h | 21 +++++++++++++---
drivers/gpu/drm/i915/i915_vma.c | 1 -
drivers/gpu/drm/i915/i915_vma.h | 2 --
4 files changed, 41 insertions(+), 20 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/gen8_ppgtt.c b/drivers/gpu/drm/i915/gt/gen8_ppgtt.c
index 077b8f7cf6cb..d1f18b150600 100644
--- a/drivers/gpu/drm/i915/gt/gen8_ppgtt.c
+++ b/drivers/gpu/drm/i915/gt/gen8_ppgtt.c
@@ -382,15 +382,20 @@ gen8_ppgtt_insert_pte(struct i915_ppgtt *ppgtt,
vaddr[gen8_pd_index(idx, 0)] = pte_encode | iter->dma;
iter->dma += I915_GTT_PAGE_SIZE;
+ iter->rem -= I915_GTT_PAGE_SIZE;
+ if (!iter->rem) {
+ idx = 0;
+ break;
+ }
+
if (iter->dma >= iter->max) {
iter->sg = __sg_next(iter->sg);
- if (!iter->sg) {
- idx = 0;
- break;
- }
+ GEM_BUG_ON(!iter->sg);
iter->dma = sg_dma_address(iter->sg);
- iter->max = iter->dma + iter->sg->length;
+ iter->max = iter->dma +
+ min_t(u64, (u64)iter->sg->length,
+ iter->rem);
}
if (gen8_pd_index(++idx, 0) == 0) {
@@ -418,7 +423,7 @@ static void gen8_ppgtt_insert_huge(struct i915_vma *vma,
{
const gen8_pte_t pte_encode = gen8_pte_encode(0, cache_level, flags);
u64 start = vma->node.start;
- dma_addr_t rem = iter->sg->length;
+ dma_addr_t rem = min_t(u64, (u64)iter->sg->length, iter->rem);
GEM_BUG_ON(!i915_vm_is_4lvl(vma->vm));
@@ -460,18 +465,22 @@ static void gen8_ppgtt_insert_huge(struct i915_vma *vma,
}
do {
- GEM_BUG_ON(iter->sg->length < page_size);
+ GEM_BUG_ON(rem < page_size);
vaddr[index++] = encode | iter->dma;
start += page_size;
iter->dma += page_size;
+ iter->rem -= page_size;
+ if (!iter->rem)
+ break;
+
rem -= page_size;
if (iter->dma >= iter->max) {
iter->sg = __sg_next(iter->sg);
- if (!iter->sg)
- break;
+ GEM_BUG_ON(!iter->sg);
- rem = iter->sg->length;
+ rem = min_t(u64, (u64)iter->sg->length,
+ iter->rem);
iter->dma = sg_dma_address(iter->sg);
iter->max = iter->dma + rem;
@@ -497,9 +506,9 @@ static void gen8_ppgtt_insert_huge(struct i915_vma *vma,
if (maybe_64K != -1 &&
(index == I915_PDES ||
(i915_vm_has_scratch_64K(vma->vm) &&
- !iter->sg && IS_ALIGNED(vma->node.start +
- vma->node.size,
- I915_GTT_PAGE_SIZE_2M)))) {
+ !iter->rem && IS_ALIGNED(vma->node.start +
+ vma->node.size,
+ I915_GTT_PAGE_SIZE_2M)))) {
vaddr = kmap_atomic_px(pd);
vaddr[maybe_64K] |= GEN8_PDE_IPS_64K;
kunmap_atomic(vaddr);
@@ -528,7 +537,7 @@ static void gen8_ppgtt_insert_huge(struct i915_vma *vma,
}
vma->page_sizes.gtt |= page_size;
- } while (iter->sg);
+ } while (iter->rem);
}
static void gen8_ppgtt_insert(struct i915_address_space *vm,
diff --git a/drivers/gpu/drm/i915/gt/intel_gtt.h b/drivers/gpu/drm/i915/gt/intel_gtt.h
index 7da7681c20b1..bb59f57b88e1 100644
--- a/drivers/gpu/drm/i915/gt/intel_gtt.h
+++ b/drivers/gpu/drm/i915/gt/intel_gtt.h
@@ -27,6 +27,7 @@
#include "gt/intel_reset.h"
#include "i915_gem_fence_reg.h"
+#include "i915_scatterlist.h"
#include "i915_selftest.h"
#include "i915_vma_types.h"
@@ -577,11 +578,25 @@ void setup_private_pat(struct intel_uncore *uncore);
static inline struct sgt_dma {
struct scatterlist *sg;
dma_addr_t dma, max;
+ u64 rem;
} sgt_dma(struct i915_vma *vma) {
struct scatterlist *sg = vma->pages->sgl;
- dma_addr_t addr = sg_dma_address(sg);
-
- return (struct sgt_dma){ sg, addr, addr + sg->length };
+ dma_addr_t addr;
+ u64 offset = 0;
+
+ /* For partial binding, skip until specified offset */
+ if (vma->ggtt_view.type == I915_GGTT_VIEW_PARTIAL) {
+ offset = vma->ggtt_view.partial.offset << PAGE_SHIFT;
+ while (offset >= sg->length) {
+ offset -= sg->length;
+ sg = __sg_next(sg);
+ }
+ }
+
+ addr = sg_dma_address(sg);
+ return (struct sgt_dma) { sg, addr + offset,
+ addr + min_t(u64, (u64)sg->length, vma->size),
+ vma->size };
}
#endif
diff --git a/drivers/gpu/drm/i915/i915_vma.c b/drivers/gpu/drm/i915/i915_vma.c
index 17d7c525ea5c..48af37355371 100644
--- a/drivers/gpu/drm/i915/i915_vma.c
+++ b/drivers/gpu/drm/i915/i915_vma.c
@@ -275,7 +275,6 @@ i915_vma_instance(struct drm_i915_gem_object *obj,
{
struct i915_vma *vma;
- GEM_BUG_ON(view && !i915_is_ggtt(vm));
GEM_BUG_ON(!atomic_read(&vm->open));
spin_lock(&obj->vma.lock);
diff --git a/drivers/gpu/drm/i915/i915_vma.h b/drivers/gpu/drm/i915/i915_vma.h
index 02b31a62951e..044f3400575c 100644
--- a/drivers/gpu/drm/i915/i915_vma.h
+++ b/drivers/gpu/drm/i915/i915_vma.h
@@ -155,8 +155,6 @@ i915_vma_compare(struct i915_vma *vma,
{
ptrdiff_t cmp;
- GEM_BUG_ON(view && !i915_is_ggtt(vm));
-
cmp = ptrdiff(vma->vm, vm);
if (cmp)
return cmp;
--
2.21.0.rc0.32.g243a4c7e27
_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 14+ messages in thread* [Intel-gfx] [RFC 2/8] drm/i915/svm: Add support to mark VMs as active
2020-01-24 8:53 [Intel-gfx] [RFC 0/8] drm/i915/svm: [WIP] SVM runtime allocator support Niranjana Vishwanathapura
2020-01-24 8:53 ` [Intel-gfx] [RFC 1/8] drm/i915/svm: Support partial binding in ppgtt Niranjana Vishwanathapura
@ 2020-01-24 8:53 ` Niranjana Vishwanathapura
2020-01-24 8:53 ` [Intel-gfx] [RFC 3/8] drm/i915/svm: Introduce VM_BIND ioctl Niranjana Vishwanathapura
` (7 subsequent siblings)
9 siblings, 0 replies; 14+ messages in thread
From: Niranjana Vishwanathapura @ 2020-01-24 8:53 UTC (permalink / raw)
To: intel-gfx; +Cc: chris.p.wilson, jason.ekstrand, daniel.vetter
Add support to determine if an address space (VM) is active.
ie., are there any active requests using the address space.
This allows us to wait for VM to be idle before carrying out
some operations.
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Cc: Jon Bloomfield <jon.bloomfield@intel.com>
Cc: Daniel Vetter <daniel.vetter@intel.com>
Cc: Chris P Wilson <chris.p.wilson@intel.com>
Cc: Sudeep Dutt <sudeep.dutt@intel.com>
Cc: Stuart Summers <stuart.summers@intel.com>
Signed-off-by: Niranjana Vishwanathapura <niranjana.vishwanathapura@intel.com>
---
.../gpu/drm/i915/gem/i915_gem_execbuffer.c | 5 +++
drivers/gpu/drm/i915/gt/intel_gtt.c | 32 +++++++++++++++++++
drivers/gpu/drm/i915/gt/intel_gtt.h | 13 ++++++++
drivers/gpu/drm/i915/i915_gem_gtt.h | 14 ++++++++
4 files changed, 64 insertions(+)
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
index 60c984e10c4a..b3d9a4a02568 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
@@ -1880,6 +1880,11 @@ static int eb_move_to_gpu(struct i915_execbuffer *eb)
if (unlikely(err))
goto err_skip;
+ /* XXX: Should probably be done first */
+ err = i915_vm_move_to_active(eb->context->vm, eb->request);
+ if (err)
+ goto err_skip;
+
eb->exec = NULL;
/* Unconditionally flush any chipset caches (for streaming writes). */
diff --git a/drivers/gpu/drm/i915/gt/intel_gtt.c b/drivers/gpu/drm/i915/gt/intel_gtt.c
index 16acdc5d6734..ad5bf7fc851a 100644
--- a/drivers/gpu/drm/i915/gt/intel_gtt.c
+++ b/drivers/gpu/drm/i915/gt/intel_gtt.c
@@ -191,6 +191,7 @@ void __i915_vm_close(struct i915_address_space *vm)
void i915_address_space_fini(struct i915_address_space *vm)
{
+ i915_active_fini(&vm->active);
spin_lock(&vm->free_pages.lock);
if (pagevec_count(&vm->free_pages.pvec))
vm_free_pages_release(vm, true);
@@ -200,6 +201,7 @@ void i915_address_space_fini(struct i915_address_space *vm)
drm_mm_takedown(&vm->mm);
mutex_destroy(&vm->mutex);
+ mutex_destroy(&vm->svm_mutex);
}
static void __i915_vm_release(struct work_struct *work)
@@ -224,6 +226,33 @@ void i915_vm_release(struct kref *kref)
queue_rcu_work(vm->i915->wq, &vm->rcu);
}
+static inline struct i915_address_space *active_to_vm(struct i915_active *ref)
+{
+ return container_of(ref, typeof(struct i915_address_space), active);
+}
+
+int i915_vm_move_to_active(struct i915_address_space *vm,
+ struct i915_request *rq)
+{
+ int ret = 0;
+
+ mutex_lock(&vm->svm_mutex);
+ ret = i915_active_add_request(&vm->active, rq);
+ mutex_unlock(&vm->svm_mutex);
+ return ret;
+}
+
+static int __i915_vm_active(struct i915_active *ref)
+{
+ return i915_vm_tryget(active_to_vm(ref)) ? 0 : -ENOENT;
+}
+
+__i915_active_call
+static void __i915_vm_retire(struct i915_active *ref)
+{
+ i915_vm_put(active_to_vm(ref));
+}
+
void i915_address_space_init(struct i915_address_space *vm, int subclass)
{
kref_init(&vm->ref);
@@ -246,6 +275,9 @@ void i915_address_space_init(struct i915_address_space *vm, int subclass)
stash_init(&vm->free_pages);
INIT_LIST_HEAD(&vm->bound_list);
+
+ mutex_init(&vm->svm_mutex);
+ i915_active_init(&vm->active, __i915_vm_active, __i915_vm_retire);
}
void clear_pages(struct i915_vma *vma)
diff --git a/drivers/gpu/drm/i915/gt/intel_gtt.h b/drivers/gpu/drm/i915/gt/intel_gtt.h
index bb59f57b88e1..f3e5469c4dc6 100644
--- a/drivers/gpu/drm/i915/gt/intel_gtt.h
+++ b/drivers/gpu/drm/i915/gt/intel_gtt.h
@@ -263,6 +263,8 @@ struct i915_address_space {
*/
struct list_head bound_list;
+ struct mutex svm_mutex; /* protects svm operations */
+
struct pagestash free_pages;
/* Global GTT */
@@ -298,6 +300,8 @@ struct i915_address_space {
I915_SELFTEST_DECLARE(struct fault_attr fault_attr);
I915_SELFTEST_DECLARE(bool scrub_64K);
+
+ struct i915_active active;
};
/*
@@ -400,6 +404,15 @@ i915_vm_get(struct i915_address_space *vm)
return vm;
}
+static inline struct i915_address_space *
+i915_vm_tryget(struct i915_address_space *vm)
+{
+ if (likely(kref_get_unless_zero(&vm->ref)))
+ return vm;
+
+ return NULL;
+}
+
void i915_vm_release(struct kref *kref);
static inline void i915_vm_put(struct i915_address_space *vm)
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.h b/drivers/gpu/drm/i915/i915_gem_gtt.h
index f6226df9f972..3e46fd119a42 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.h
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.h
@@ -48,4 +48,18 @@ int i915_gem_gtt_insert(struct i915_address_space *vm,
#define PIN_OFFSET_MASK I915_GTT_PAGE_MASK
+int i915_vm_move_to_active(struct i915_address_space *vm,
+ struct i915_request *rq);
+
+static inline int i915_vm_sync(struct i915_address_space *vm)
+{
+ /* Wait for all requests under this vm to finish */
+ return i915_active_wait(&vm->active);
+}
+
+static inline bool i915_vm_is_active(const struct i915_address_space *vm)
+{
+ return !i915_active_is_idle(&vm->active);
+}
+
#endif
--
2.21.0.rc0.32.g243a4c7e27
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 14+ messages in thread* [Intel-gfx] [RFC 3/8] drm/i915/svm: Introduce VM_BIND ioctl
2020-01-24 8:53 [Intel-gfx] [RFC 0/8] drm/i915/svm: [WIP] SVM runtime allocator support Niranjana Vishwanathapura
2020-01-24 8:53 ` [Intel-gfx] [RFC 1/8] drm/i915/svm: Support partial binding in ppgtt Niranjana Vishwanathapura
2020-01-24 8:53 ` [Intel-gfx] [RFC 2/8] drm/i915/svm: Add support to mark VMs as active Niranjana Vishwanathapura
@ 2020-01-24 8:53 ` Niranjana Vishwanathapura
2020-01-25 14:49 ` kbuild test robot
2020-01-26 7:35 ` kbuild test robot
2020-01-24 8:53 ` [Intel-gfx] [RFC 4/8] drm/i915/svm: Manage SVM bindings added using VM_BIND Niranjana Vishwanathapura
` (6 subsequent siblings)
9 siblings, 2 replies; 14+ messages in thread
From: Niranjana Vishwanathapura @ 2020-01-24 8:53 UTC (permalink / raw)
To: intel-gfx; +Cc: chris.p.wilson, jason.ekstrand, daniel.vetter
Add VM_BIND ioctl to bind/unbind an array of gem buffer
objects at specified virtual addresses.
Support partial binding with offset and length fields.
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Cc: Jon Bloomfield <jon.bloomfield@intel.com>
Cc: Daniel Vetter <daniel.vetter@intel.com>
Cc: Chris P Wilson <chris.p.wilson@intel.com>
Cc: Sudeep Dutt <sudeep.dutt@intel.com>
Cc: Stuart Summers <stuart.summers@intel.com>
Signed-off-by: Niranjana Vishwanathapura <niranjana.vishwanathapura@intel.com>
---
drivers/gpu/drm/i915/i915_drv.c | 40 +++++++++++++++++++++++++
drivers/gpu/drm/i915/i915_drv.h | 22 ++++++++++++++
include/uapi/drm/i915_drm.h | 53 +++++++++++++++++++++++++++++++++
3 files changed, 115 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index f7385abdd74b..64ba02c55282 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -2688,6 +2688,45 @@ i915_gem_reject_pin_ioctl(struct drm_device *dev, void *data,
return -ENODEV;
}
+static int i915_gem_vm_bind_ioctl(struct drm_device *dev, void *data,
+ struct drm_file *file)
+{
+ struct drm_i915_gem_vm_bind_va __user *vas;
+ struct drm_i915_gem_vm_bind *args = data;
+ struct i915_address_space *vm;
+ int i, ret = 0;
+
+ vm = i915_gem_address_space_lookup(file->driver_priv, args->vm_id);
+ if (unlikely(!vm))
+ return -ENOENT;
+
+ if (!args->num_vas)
+ goto bind_done;
+
+ vas = u64_to_user_ptr(args->vas_ptr);
+ if (!access_ok(vas, args->num_vas * sizeof(*vas))) {
+ ret = -EFAULT;
+ goto bind_done;
+ }
+
+ for (i = 0; !ret && i < args->num_vas; i++) {
+ struct drm_i915_gem_vm_bind_va va;
+
+ if (__copy_from_user(&va, vas++, sizeof(va))) {
+ ret = -EFAULT;
+ goto bind_done;
+ }
+
+ switch (va.type) {
+ default:
+ ret = -EINVAL;
+ }
+ }
+bind_done:
+ i915_vm_put(vm);
+ return ret;
+}
+
static const struct drm_ioctl_desc i915_ioctls[] = {
DRM_IOCTL_DEF_DRV(I915_INIT, drm_noop, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
DRM_IOCTL_DEF_DRV(I915_FLUSH, drm_noop, DRM_AUTH),
@@ -2747,6 +2786,7 @@ static const struct drm_ioctl_desc i915_ioctls[] = {
DRM_IOCTL_DEF_DRV(I915_QUERY, i915_query_ioctl, DRM_RENDER_ALLOW),
DRM_IOCTL_DEF_DRV(I915_GEM_VM_CREATE, i915_gem_vm_create_ioctl, DRM_RENDER_ALLOW),
DRM_IOCTL_DEF_DRV(I915_GEM_VM_DESTROY, i915_gem_vm_destroy_ioctl, DRM_RENDER_ALLOW),
+ DRM_IOCTL_DEF_DRV(I915_GEM_VM_BIND, i915_gem_vm_bind_ioctl, DRM_RENDER_ALLOW),
};
static struct drm_driver driver = {
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 077af22b8340..7be87bc37cc0 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1919,6 +1919,28 @@ i915_gem_context_lookup(struct drm_i915_file_private *file_priv, u32 id)
return ctx;
}
+static inline struct i915_address_space *
+__i915_gem_address_space_lookup_rcu(struct drm_i915_file_private *file_priv,
+ u32 id)
+{
+ return idr_find(&file_priv->vm_idr, id);
+}
+
+static inline struct i915_address_space *
+i915_gem_address_space_lookup(struct drm_i915_file_private *file_priv,
+ u32 id)
+{
+ struct i915_address_space *vm;
+
+ rcu_read_lock();
+ vm = __i915_gem_address_space_lookup_rcu(file_priv, id);
+ if (vm)
+ vm = i915_vm_get(vm);
+ rcu_read_unlock();
+
+ return vm;
+}
+
/* i915_gem_evict.c */
int __must_check i915_gem_evict_something(struct i915_address_space *vm,
u64 min_size, u64 alignment,
diff --git a/include/uapi/drm/i915_drm.h b/include/uapi/drm/i915_drm.h
index 829c0a48577f..e696854829ab 100644
--- a/include/uapi/drm/i915_drm.h
+++ b/include/uapi/drm/i915_drm.h
@@ -359,6 +359,7 @@ typedef struct _drm_i915_sarea {
#define DRM_I915_QUERY 0x39
#define DRM_I915_GEM_VM_CREATE 0x3a
#define DRM_I915_GEM_VM_DESTROY 0x3b
+#define DRM_I915_GEM_VM_BIND 0x3c
/* Must be kept compact -- no holes */
#define DRM_IOCTL_I915_INIT DRM_IOW( DRM_COMMAND_BASE + DRM_I915_INIT, drm_i915_init_t)
@@ -422,6 +423,7 @@ typedef struct _drm_i915_sarea {
#define DRM_IOCTL_I915_QUERY DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_QUERY, struct drm_i915_query)
#define DRM_IOCTL_I915_GEM_VM_CREATE DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_GEM_VM_CREATE, struct drm_i915_gem_vm_control)
#define DRM_IOCTL_I915_GEM_VM_DESTROY DRM_IOW (DRM_COMMAND_BASE + DRM_I915_GEM_VM_DESTROY, struct drm_i915_gem_vm_control)
+#define DRM_IOCTL_I915_GEM_VM_BIND DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_GEM_VM_BIND, struct drm_i915_gem_vm_bind)
/* Allow drivers to submit batchbuffers directly to hardware, relying
* on the security mechanisms provided by hardware.
@@ -2277,6 +2279,57 @@ struct drm_i915_query_perf_config {
__u8 data[];
};
+/**
+ * struct drm_i915_gem_vm_bind_va
+ *
+ * VA to object mapping to [un]bind.
+ */
+struct drm_i915_gem_vm_bind_va {
+ /** VA start to [un]bind **/
+ __u64 start;
+
+ /** Offset in Object to [un]bind for I915_GEM_VM_BIND_SVM_OBJ type **/
+ __u64 offset;
+
+ /** VA length to [un]bind **/
+ __u64 length;
+
+ /** Type of memory to [un]bind **/
+ __u32 type;
+#define I915_GEM_VM_BIND_SVM_OBJ 0
+
+ /** Object handle to [un]bind for I915_GEM_VM_BIND_SVM_OBJ type **/
+ __u32 handle;
+
+ /** Flags **/
+ __u32 flags;
+#define I915_GEM_VM_BIND_UNBIND (1 << 0)
+#define I915_GEM_VM_BIND_READONLY (1 << 1)
+};
+
+/**
+ * struct drm_i915_gem_vm_bind
+ *
+ * [Un]Bind an array of objects in a vm's page table.
+ */
+struct drm_i915_gem_vm_bind {
+ /** vm to [un]bind **/
+ __u32 vm_id;
+
+ /** number of VAs to [un]bind **/
+ __u32 num_vas;
+
+ /** Array of VAs to [un]bind **/
+ __u64 vas_ptr;
+
+ /**
+ * Zero-terminated chain of extensions.
+ *
+ * No current extensions defined; mbz.
+ */
+ __u64 extensions;
+};
+
#if defined(__cplusplus)
}
#endif
--
2.21.0.rc0.32.g243a4c7e27
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 14+ messages in thread* Re: [Intel-gfx] [RFC 3/8] drm/i915/svm: Introduce VM_BIND ioctl
2020-01-24 8:53 ` [Intel-gfx] [RFC 3/8] drm/i915/svm: Introduce VM_BIND ioctl Niranjana Vishwanathapura
@ 2020-01-25 14:49 ` kbuild test robot
2020-01-26 7:35 ` kbuild test robot
1 sibling, 0 replies; 14+ messages in thread
From: kbuild test robot @ 2020-01-25 14:49 UTC (permalink / raw)
To: kbuild-all
[-- Attachment #1: Type: text/plain, Size: 4472 bytes --]
Hi Niranjana,
[FYI, it's a private test report for your RFC patch.]
[auto build test ERROR on drm-intel/for-linux-next]
[also build test ERROR on drm-tip/drm-tip next-20200124]
[cannot apply to v5.5-rc7]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system. BTW, we also suggest to use '--base' option to specify the
base tree in git format-patch, please see https://stackoverflow.com/a/37406982]
url: https://github.com/0day-ci/linux/commits/Niranjana-Vishwanathapura/drm-i915-svm-WIP-SVM-runtime-allocator-support/20200125-144343
base: git://anongit.freedesktop.org/drm-intel for-linux-next
config: i386-randconfig-g003-20200125 (attached as .config)
compiler: gcc-7 (Debian 7.5.0-3) 7.5.0
reproduce:
# save the attached .config to linux build tree
make ARCH=i386
If you fix the issue, kindly add following tag
Reported-by: kbuild test robot <lkp@intel.com>
All errors (new ones prefixed by >>):
In file included from drivers/gpu/drm/i915/display/intel_display_types.h:46:0,
from drivers/gpu/drm/i915/display/intel_combo_phy.c:7:
drivers/gpu/drm/i915/i915_drv.h: In function '__i915_gem_address_space_lookup_rcu':
>> drivers/gpu/drm/i915/i915_drv.h:1924:30: error: 'struct drm_i915_file_private' has no member named 'vm_idr'; did you mean 'vm_xa'?
return idr_find(&file_priv->vm_idr, id);
^~~~~~
vm_xa
--
In file included from drivers/gpu/drm/i915/selftests/igt_reset.c:12:0:
drivers/gpu/drm/i915/selftests/../i915_drv.h: In function '__i915_gem_address_space_lookup_rcu':
>> drivers/gpu/drm/i915/selftests/../i915_drv.h:1924:30: error: 'struct drm_i915_file_private' has no member named 'vm_idr'; did you mean 'vm_xa'?
return idr_find(&file_priv->vm_idr, id);
^~~~~~
vm_xa
--
/dev/null:1:0: error: cannot open /dev/null.gcno
In file included from drivers/gpu/drm/i915/display/intel_display_types.h:46:0,
from <command-line>:0:
drivers/gpu/drm/i915/i915_drv.h: In function '__i915_gem_address_space_lookup_rcu':
>> drivers/gpu/drm/i915/i915_drv.h:1924:30: error: 'struct drm_i915_file_private' has no member named 'vm_idr'; did you mean 'vm_xa'?
return idr_find(&file_priv->vm_idr, id);
^~~~~~
vm_xa
--
In file included from drivers/gpu/drm/i915/display/intel_display_types.h:46:0,
from drivers/gpu/drm/i915/i915_drv.c:53:
drivers/gpu/drm/i915/i915_drv.h: In function '__i915_gem_address_space_lookup_rcu':
>> drivers/gpu/drm/i915/i915_drv.h:1924:30: error: 'struct drm_i915_file_private' has no member named 'vm_idr'; did you mean 'vm_xa'?
return idr_find(&file_priv->vm_idr, id);
^~~~~~
vm_xa
drivers/gpu/drm/i915/i915_drv.h:1925:1: error: control reaches end of non-void function [-Werror=return-type]
}
^
cc1: all warnings being treated as errors
--
In file included from drivers/gpu/drm/i915/gt/intel_lrc.c:136:0:
drivers/gpu/drm/i915/i915_drv.h: In function '__i915_gem_address_space_lookup_rcu':
>> drivers/gpu/drm/i915/i915_drv.h:1924:30: error: 'struct drm_i915_file_private' has no member named 'vm_idr'; did you mean 'vm_xa'?
return idr_find(&file_priv->vm_idr, id);
^~~~~~
vm_xa
drivers/gpu/drm/i915/gt/intel_lrc.c: In function 'execlists_capture_work':
drivers/gpu/drm/i915/gt/intel_lrc.c:2559:2: error: implicit declaration of function 'i915_gpu_coredump_put'; did you mean 'i915_gpu_coredump_alloc'? [-Werror=implicit-function-declaration]
i915_gpu_coredump_put(cap->error);
^~~~~~~~~~~~~~~~~~~~~
i915_gpu_coredump_alloc
cc1: all warnings being treated as errors
vim +1924 drivers/gpu/drm/i915/i915_drv.h
1919
1920 static inline struct i915_address_space *
1921 __i915_gem_address_space_lookup_rcu(struct drm_i915_file_private *file_priv,
1922 u32 id)
1923 {
> 1924 return idr_find(&file_priv->vm_idr, id);
1925 }
1926
---
0-DAY kernel test infrastructure Open Source Technology Center
https://lists.01.org/hyperkitty/list/kbuild-all(a)lists.01.org Intel Corporation
[-- Attachment #2: config.gz --]
[-- Type: application/gzip, Size: 35894 bytes --]
^ permalink raw reply [flat|nested] 14+ messages in thread* Re: [Intel-gfx] [RFC 3/8] drm/i915/svm: Introduce VM_BIND ioctl
2020-01-24 8:53 ` [Intel-gfx] [RFC 3/8] drm/i915/svm: Introduce VM_BIND ioctl Niranjana Vishwanathapura
2020-01-25 14:49 ` kbuild test robot
@ 2020-01-26 7:35 ` kbuild test robot
1 sibling, 0 replies; 14+ messages in thread
From: kbuild test robot @ 2020-01-26 7:35 UTC (permalink / raw)
To: kbuild-all
[-- Attachment #1: Type: text/plain, Size: 2086 bytes --]
Hi Niranjana,
[FYI, it's a private test report for your RFC patch.]
[auto build test WARNING on drm-intel/for-linux-next]
[also build test WARNING on drm-tip/drm-tip next-20200124]
[cannot apply to v5.5-rc7]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system. BTW, we also suggest to use '--base' option to specify the
base tree in git format-patch, please see https://stackoverflow.com/a/37406982]
url: https://github.com/0day-ci/linux/commits/Niranjana-Vishwanathapura/drm-i915-svm-WIP-SVM-runtime-allocator-support/20200125-144343
base: git://anongit.freedesktop.org/drm-intel for-linux-next
config: x86_64-randconfig-g001-20200125 (attached as .config)
compiler: gcc-7 (Debian 7.5.0-3) 7.5.0
reproduce:
# save the attached .config to linux build tree
make ARCH=x86_64
If you fix the issue, kindly add following tag
Reported-by: kbuild test robot <lkp@intel.com>
All warnings (new ones prefixed by >>):
In file included from drivers/gpu/drm/i915/display/intel_display_types.h:46:0,
from drivers/gpu/drm/i915/i915_drv.c:53:
drivers/gpu/drm/i915/i915_drv.h: In function '__i915_gem_address_space_lookup_rcu':
drivers/gpu/drm/i915/i915_drv.h:1924:30: error: 'struct drm_i915_file_private' has no member named 'vm_idr'; did you mean 'vm_xa'?
return idr_find(&file_priv->vm_idr, id);
^~~~~~
vm_xa
>> drivers/gpu/drm/i915/i915_drv.h:1925:1: warning: control reaches end of non-void function [-Wreturn-type]
}
^
vim +1925 drivers/gpu/drm/i915/i915_drv.h
1919
1920 static inline struct i915_address_space *
1921 __i915_gem_address_space_lookup_rcu(struct drm_i915_file_private *file_priv,
1922 u32 id)
1923 {
> 1924 return idr_find(&file_priv->vm_idr, id);
> 1925 }
1926
---
0-DAY kernel test infrastructure Open Source Technology Center
https://lists.01.org/hyperkitty/list/kbuild-all(a)lists.01.org Intel Corporation
[-- Attachment #2: config.gz --]
[-- Type: application/gzip, Size: 33713 bytes --]
^ permalink raw reply [flat|nested] 14+ messages in thread
* [Intel-gfx] [RFC 4/8] drm/i915/svm: Manage SVM bindings added using VM_BIND
2020-01-24 8:53 [Intel-gfx] [RFC 0/8] drm/i915/svm: [WIP] SVM runtime allocator support Niranjana Vishwanathapura
` (2 preceding siblings ...)
2020-01-24 8:53 ` [Intel-gfx] [RFC 3/8] drm/i915/svm: Introduce VM_BIND ioctl Niranjana Vishwanathapura
@ 2020-01-24 8:53 ` Niranjana Vishwanathapura
2020-01-24 8:53 ` [Intel-gfx] [RFC 5/8] drm/i915/svm: Handle persistent vmas Niranjana Vishwanathapura
` (5 subsequent siblings)
9 siblings, 0 replies; 14+ messages in thread
From: Niranjana Vishwanathapura @ 2020-01-24 8:53 UTC (permalink / raw)
To: intel-gfx; +Cc: chris.p.wilson, jason.ekstrand, daniel.vetter
Maintain all VM_BIND bindings in an list.
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Cc: Jon Bloomfield <jon.bloomfield@intel.com>
Cc: Daniel Vetter <daniel.vetter@intel.com>
Cc: Chris P Wilson <chris.p.wilson@intel.com>
Cc: Sudeep Dutt <sudeep.dutt@intel.com>
Cc: Stuart Summers <stuart.summers@intel.com>
Signed-off-by: Niranjana Vishwanathapura <niranjana.vishwanathapura@intel.com>
---
drivers/gpu/drm/i915/Kconfig | 11 ++++
drivers/gpu/drm/i915/Makefile | 3 +
drivers/gpu/drm/i915/gem/i915_gem_svm.c | 82 +++++++++++++++++++++++++
drivers/gpu/drm/i915/gem/i915_gem_svm.h | 22 +++++++
drivers/gpu/drm/i915/gt/intel_gtt.c | 1 +
drivers/gpu/drm/i915/gt/intel_gtt.h | 4 ++
drivers/gpu/drm/i915/i915_drv.c | 4 ++
drivers/gpu/drm/i915/i915_vma.c | 5 ++
drivers/gpu/drm/i915/i915_vma_types.h | 3 +
9 files changed, 135 insertions(+)
create mode 100644 drivers/gpu/drm/i915/gem/i915_gem_svm.c
create mode 100644 drivers/gpu/drm/i915/gem/i915_gem_svm.h
diff --git a/drivers/gpu/drm/i915/Kconfig b/drivers/gpu/drm/i915/Kconfig
index ba9595960bbe..c2e48710eec8 100644
--- a/drivers/gpu/drm/i915/Kconfig
+++ b/drivers/gpu/drm/i915/Kconfig
@@ -137,6 +137,17 @@ config DRM_I915_GVT_KVMGT
Choose this option if you want to enable KVMGT support for
Intel GVT-g.
+config DRM_I915_SVM
+ bool "Enable Shared Virtual Memory support in i915"
+ depends on STAGING
+ depends on DRM_I915
+ default n
+ help
+ Choose this option if you want Shared Virtual Memory (SVM)
+ support in i915. With SVM support, one can share the virtual
+ address space between a process and the GPU. SVM is supported
+ on both integrated and discrete Intel GPUs.
+
menu "drm/i915 Debugging"
depends on DRM_I915
depends on EXPERT
diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile
index b8c5f8934dbd..dbdbe85790f6 100644
--- a/drivers/gpu/drm/i915/Makefile
+++ b/drivers/gpu/drm/i915/Makefile
@@ -156,6 +156,9 @@ i915-y += \
intel_region_lmem.o \
intel_wopcm.o
+# SVM code
+i915-$(CONFIG_DRM_I915_SVM) += gem/i915_gem_svm.o
+
# general-purpose microcontroller (GuC) support
i915-y += gt/uc/intel_uc.o \
gt/uc/intel_uc_fw.o \
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_svm.c b/drivers/gpu/drm/i915/gem/i915_gem_svm.c
new file mode 100644
index 000000000000..f26567ea0e3a
--- /dev/null
+++ b/drivers/gpu/drm/i915/gem/i915_gem_svm.c
@@ -0,0 +1,82 @@
+// SPDX-License-Identifier: MIT
+/*
+ * Copyright © 2019 Intel Corporation
+ */
+
+#include "i915_drv.h"
+#include "i915_gem_gtt.h"
+#include "i915_gem_lmem.h"
+
+static struct i915_vma *
+i915_gem_vm_lookup_svm_vma(struct i915_address_space *vm,
+ struct drm_i915_gem_object *obj,
+ struct drm_i915_gem_vm_bind_va *va)
+{
+ struct i915_vma *vma, *tmp;
+
+ /* FIXME: Optimize lookup (use hashtable or tree) */
+ mutex_lock(&vm->svm_mutex);
+ list_for_each_entry_safe(vma, tmp, &vm->svm_list, svm_link) {
+ if (vma->obj != obj ||
+ vma->node.start != va->start ||
+ vma->node.size != va->length)
+ continue;
+
+ list_del_init(&vma->svm_link);
+ mutex_unlock(&vm->svm_mutex);
+ return vma;
+ }
+ mutex_unlock(&vm->svm_mutex);
+ return NULL;
+}
+
+int i915_gem_vm_bind_svm_obj(struct i915_address_space *vm,
+ struct drm_i915_gem_vm_bind_va *va,
+ struct drm_file *file)
+{
+ struct drm_i915_gem_object *obj;
+ struct i915_vma *vma;
+ int ret = 0;
+
+ obj = i915_gem_object_lookup(file, va->handle);
+ if (!obj)
+ return -ENOENT;
+
+ /* For dgfx, ensure the obj is in device local memory only */
+ if (IS_DGFX(vm->i915) && !i915_gem_object_is_lmem(obj))
+ return -EINVAL;
+
+ if (!(va->flags & I915_GEM_VM_BIND_UNBIND)) {
+ struct i915_ggtt_view view;
+
+ view.type = I915_GGTT_VIEW_PARTIAL;
+ view.partial.offset = va->offset >> PAGE_SHIFT;
+ view.partial.size = va->length >> PAGE_SHIFT;
+ vma = i915_vma_instance(obj, vm, &view);
+ if (IS_ERR(vma)) {
+ ret = PTR_ERR(vma);
+ goto put_obj;
+ }
+ vma->va_start = va->start;
+ /* Disable eviction for now */
+ __i915_vma_pin(vma);
+
+ /*
+ * FIXME: Reserve VA here and bind only if the vm is active.
+ * This ensures any overlapping binding is rejected here itself.
+ * and we don't need to store va_start.
+ */
+ mutex_lock(&vm->svm_mutex);
+ list_add(&vma->svm_link, &vm->svm_list);
+ mutex_unlock(&vm->svm_mutex);
+ } else {
+ vma = i915_gem_vm_lookup_svm_vma(vm, obj, va);
+ if (vma) {
+ __i915_vma_unpin(vma);
+ __i915_vma_put(vma);
+ }
+ }
+put_obj:
+ i915_gem_object_put(obj);
+ return ret;
+}
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_svm.h b/drivers/gpu/drm/i915/gem/i915_gem_svm.h
new file mode 100644
index 000000000000..e1ad125e86cc
--- /dev/null
+++ b/drivers/gpu/drm/i915/gem/i915_gem_svm.h
@@ -0,0 +1,22 @@
+/* SPDX-License-Identifier: MIT */
+/*
+ * Copyright © 2019 Intel Corporation
+ */
+
+#ifndef __I915_GEM_SVM_H
+#define __I915_GEM_SVM_H
+
+#include "i915_drv.h"
+
+#if defined(CONFIG_DRM_I915_SVM)
+int i915_gem_vm_bind_svm_obj(struct i915_address_space *vm,
+ struct drm_i915_gem_vm_bind_va *va,
+ struct drm_file *file);
+#else
+static inline int i915_gem_vm_bind_svm_obj(struct i915_address_space *vm,
+ struct drm_i915_gem_vm_bind_va *va,
+ struct drm_file *file)
+{ return -ENOTSUPP; }
+#endif
+
+#endif /* __I915_GEM_SVM_H */
diff --git a/drivers/gpu/drm/i915/gt/intel_gtt.c b/drivers/gpu/drm/i915/gt/intel_gtt.c
index ad5bf7fc851a..897aad1f7c08 100644
--- a/drivers/gpu/drm/i915/gt/intel_gtt.c
+++ b/drivers/gpu/drm/i915/gt/intel_gtt.c
@@ -276,6 +276,7 @@ void i915_address_space_init(struct i915_address_space *vm, int subclass)
INIT_LIST_HEAD(&vm->bound_list);
+ INIT_LIST_HEAD(&vm->svm_list);
mutex_init(&vm->svm_mutex);
i915_active_init(&vm->active, __i915_vm_active, __i915_vm_retire);
}
diff --git a/drivers/gpu/drm/i915/gt/intel_gtt.h b/drivers/gpu/drm/i915/gt/intel_gtt.h
index f3e5469c4dc6..800c062a4b0e 100644
--- a/drivers/gpu/drm/i915/gt/intel_gtt.h
+++ b/drivers/gpu/drm/i915/gt/intel_gtt.h
@@ -263,6 +263,10 @@ struct i915_address_space {
*/
struct list_head bound_list;
+ /**
+ * List of SVM bind objects.
+ */
+ struct list_head svm_list;
struct mutex svm_mutex; /* protects svm operations */
struct pagestash free_pages;
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index 64ba02c55282..5631fa82bfed 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -62,6 +62,7 @@
#include "gem/i915_gem_context.h"
#include "gem/i915_gem_ioctls.h"
#include "gem/i915_gem_mman.h"
+#include "gem/i915_gem_svm.h"
#include "gt/intel_gt.h"
#include "gt/intel_gt_pm.h"
#include "gt/intel_rc6.h"
@@ -2718,6 +2719,9 @@ static int i915_gem_vm_bind_ioctl(struct drm_device *dev, void *data,
}
switch (va.type) {
+ case I915_GEM_VM_BIND_SVM_OBJ:
+ ret = i915_gem_vm_bind_svm_obj(vm, &va, file);
+ break;
default:
ret = -EINVAL;
}
diff --git a/drivers/gpu/drm/i915/i915_vma.c b/drivers/gpu/drm/i915/i915_vma.c
index 48af37355371..3e16b291f806 100644
--- a/drivers/gpu/drm/i915/i915_vma.c
+++ b/drivers/gpu/drm/i915/i915_vma.c
@@ -223,6 +223,7 @@ vma_create(struct drm_i915_gem_object *obj,
spin_unlock(&obj->vma.lock);
+ INIT_LIST_HEAD(&vma->svm_link);
return vma;
err_vma:
@@ -1047,6 +1048,10 @@ void i915_vma_release(struct kref *ref)
list_del(&vma->obj_link);
rb_erase(&vma->obj_node, &obj->vma.tree);
spin_unlock(&obj->vma.lock);
+
+ mutex_lock(&vma->vm->svm_mutex);
+ list_del_init(&vma->svm_link);
+ mutex_unlock(&vma->vm->svm_mutex);
}
__i915_vma_remove_closed(vma);
diff --git a/drivers/gpu/drm/i915/i915_vma_types.h b/drivers/gpu/drm/i915/i915_vma_types.h
index e0942efd5236..d5a4fb4e43a4 100644
--- a/drivers/gpu/drm/i915/i915_vma_types.h
+++ b/drivers/gpu/drm/i915/i915_vma_types.h
@@ -269,6 +269,9 @@ struct i915_vma {
/** This object's place on the active/inactive lists */
struct list_head vm_link;
+ u64 va_start;
+ struct list_head svm_link; /* Link in persistent VMA list */
+
struct list_head obj_link; /* Link in the object's VMA list */
struct rb_node obj_node;
struct hlist_node obj_hash;
--
2.21.0.rc0.32.g243a4c7e27
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 14+ messages in thread* [Intel-gfx] [RFC 5/8] drm/i915/svm: Handle persistent vmas
2020-01-24 8:53 [Intel-gfx] [RFC 0/8] drm/i915/svm: [WIP] SVM runtime allocator support Niranjana Vishwanathapura
` (3 preceding siblings ...)
2020-01-24 8:53 ` [Intel-gfx] [RFC 4/8] drm/i915/svm: Manage SVM bindings added using VM_BIND Niranjana Vishwanathapura
@ 2020-01-24 8:53 ` Niranjana Vishwanathapura
2020-01-24 8:54 ` [Intel-gfx] [RFC 6/8] drm/i915/svm: Skip vma_lookup for " Niranjana Vishwanathapura
` (4 subsequent siblings)
9 siblings, 0 replies; 14+ messages in thread
From: Niranjana Vishwanathapura @ 2020-01-24 8:53 UTC (permalink / raw)
To: intel-gfx; +Cc: chris.p.wilson, jason.ekstrand, daniel.vetter
Treat VM_BIND vmas as persistent and handle them during the
request submission in the execbuff path.
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Cc: Jon Bloomfield <jon.bloomfield@intel.com>
Cc: Daniel Vetter <daniel.vetter@intel.com>
Cc: Chris P Wilson <chris.p.wilson@intel.com>
Cc: Sudeep Dutt <sudeep.dutt@intel.com>
Cc: Stuart Summers <stuart.summers@intel.com>
Signed-off-by: Niranjana Vishwanathapura <niranjana.vishwanathapura@intel.com>
---
.../gpu/drm/i915/gem/i915_gem_execbuffer.c | 26 +++++++++++++++++++
drivers/gpu/drm/i915/gem/i915_gem_svm.c | 1 +
drivers/gpu/drm/i915/gt/intel_gtt.c | 10 +++++++
drivers/gpu/drm/i915/i915_vma.h | 15 ++++++++++-
drivers/gpu/drm/i915/i915_vma_types.h | 4 +++
5 files changed, 55 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
index b3d9a4a02568..6aaffb9a817f 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
@@ -723,6 +723,26 @@ static int eb_select_context(struct i915_execbuffer *eb)
return 0;
}
+static int eb_lookup_persistent_vmas(struct i915_address_space *vm)
+{
+ struct i915_vma *vma;
+ int ret = 0;
+
+ mutex_lock(&vm->svm_mutex);
+ list_for_each_entry(vma, &vm->svm_list, svm_link) {
+ u64 pin_flags = vma->va_start | PIN_OFFSET_FIXED | PIN_USER;
+
+ if (drm_mm_node_allocated(&vma->node))
+ continue;
+
+ ret = i915_vma_pin(vma, 0, 0, pin_flags);
+ if (ret)
+ break;
+ }
+ mutex_unlock(&vm->svm_mutex);
+ return ret;
+}
+
static int eb_lookup_vmas(struct i915_execbuffer *eb)
{
struct radix_tree_root *handles_vma = &eb->gem_context->handles_vma;
@@ -1765,6 +1785,12 @@ static noinline int eb_relocate_slow(struct i915_execbuffer *eb)
static int eb_relocate(struct i915_execbuffer *eb)
{
+ int ret;
+
+ ret = eb_lookup_persistent_vmas(eb->context->vm);
+ if (ret)
+ return ret;
+
if (eb_lookup_vmas(eb))
goto slow;
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_svm.c b/drivers/gpu/drm/i915/gem/i915_gem_svm.c
index f26567ea0e3a..e5e45ccc4262 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_svm.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_svm.c
@@ -58,6 +58,7 @@ int i915_gem_vm_bind_svm_obj(struct i915_address_space *vm,
goto put_obj;
}
vma->va_start = va->start;
+ i915_vma_set_persistent(vma);
/* Disable eviction for now */
__i915_vma_pin(vma);
diff --git a/drivers/gpu/drm/i915/gt/intel_gtt.c b/drivers/gpu/drm/i915/gt/intel_gtt.c
index 897aad1f7c08..e0195906de20 100644
--- a/drivers/gpu/drm/i915/gt/intel_gtt.c
+++ b/drivers/gpu/drm/i915/gt/intel_gtt.c
@@ -234,9 +234,19 @@ static inline struct i915_address_space *active_to_vm(struct i915_active *ref)
int i915_vm_move_to_active(struct i915_address_space *vm,
struct i915_request *rq)
{
+ struct i915_vma *vma;
int ret = 0;
mutex_lock(&vm->svm_mutex);
+ list_for_each_entry(vma, &vm->svm_list, svm_link) {
+ /* Wait for the vma to be bound before we start! */
+ ret = i915_request_await_active(rq, &vma->active);
+ if (ret)
+ break;
+
+ if (!ret)
+ ret = i915_active_add_request(&vm->active, rq);
+ }
ret = i915_active_add_request(&vm->active, rq);
mutex_unlock(&vm->svm_mutex);
return ret;
diff --git a/drivers/gpu/drm/i915/i915_vma.h b/drivers/gpu/drm/i915/i915_vma.h
index 044f3400575c..56cff222e7ca 100644
--- a/drivers/gpu/drm/i915/i915_vma.h
+++ b/drivers/gpu/drm/i915/i915_vma.h
@@ -124,6 +124,16 @@ static inline u32 i915_ggtt_pin_bias(struct i915_vma *vma)
return i915_vm_to_ggtt(vma->vm)->pin_bias;
}
+static inline bool i915_vma_is_persistent(const struct i915_vma *vma)
+{
+ return test_bit(I915_VMA_PERSISTENT_BIT, __i915_vma_flags(vma));
+}
+
+static inline void i915_vma_set_persistent(struct i915_vma *vma)
+{
+ set_bit(I915_VMA_PERSISTENT_BIT, __i915_vma_flags(vma));
+}
+
static inline struct i915_vma *i915_vma_get(struct i915_vma *vma)
{
i915_gem_object_get(vma->obj);
@@ -376,7 +386,10 @@ void i915_vma_make_purgeable(struct i915_vma *vma);
static inline int i915_vma_sync(struct i915_vma *vma)
{
/* Wait for the asynchronous bindings and pending GPU reads */
- return i915_active_wait(&vma->active);
+ if (i915_vma_is_persistent(vma))
+ return i915_vm_sync(vma->vm);
+ else
+ return i915_active_wait(&vma->active);
}
#endif
diff --git a/drivers/gpu/drm/i915/i915_vma_types.h b/drivers/gpu/drm/i915/i915_vma_types.h
index d5a4fb4e43a4..8a270280a5ca 100644
--- a/drivers/gpu/drm/i915/i915_vma_types.h
+++ b/drivers/gpu/drm/i915/i915_vma_types.h
@@ -250,6 +250,10 @@ struct i915_vma {
#define I915_VMA_USERFAULT ((int)BIT(I915_VMA_USERFAULT_BIT))
#define I915_VMA_GGTT_WRITE ((int)BIT(I915_VMA_GGTT_WRITE_BIT))
+#define I915_VMA_PERSISTENT_BIT 18
+
+#define I915_VMA_PERSISTENT ((int)BIT(I915_VMA_PERSISTENT_BIT))
+
struct i915_active active;
#define I915_VMA_PAGES_BIAS 24
--
2.21.0.rc0.32.g243a4c7e27
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 14+ messages in thread* [Intel-gfx] [RFC 6/8] drm/i915/svm: Skip vma_lookup for persistent vmas
2020-01-24 8:53 [Intel-gfx] [RFC 0/8] drm/i915/svm: [WIP] SVM runtime allocator support Niranjana Vishwanathapura
` (4 preceding siblings ...)
2020-01-24 8:53 ` [Intel-gfx] [RFC 5/8] drm/i915/svm: Handle persistent vmas Niranjana Vishwanathapura
@ 2020-01-24 8:54 ` Niranjana Vishwanathapura
2020-01-24 8:54 ` [Intel-gfx] [RFC 7/8] drm/i915/svm: Add support to en/disable SVM Niranjana Vishwanathapura
` (3 subsequent siblings)
9 siblings, 0 replies; 14+ messages in thread
From: Niranjana Vishwanathapura @ 2020-01-24 8:54 UTC (permalink / raw)
To: intel-gfx; +Cc: chris.p.wilson, jason.ekstrand, daniel.vetter
vma_lookup is tied to segment of the object instead of section
of VA space. Hence, it do not support aliasing (ie., multiple
bindings to the same section of the object).
Hence skip vma_lookup for persistent vmas which should support
aliasing.
This needs proper solution.
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Cc: Jon Bloomfield <jon.bloomfield@intel.com>
Cc: Daniel Vetter <daniel.vetter@intel.com>
Cc: Chris P Wilson <chris.p.wilson@intel.com>
Cc: Sudeep Dutt <sudeep.dutt@intel.com>
Cc: Stuart Summers <stuart.summers@intel.com>
Signed-off-by: Niranjana Vishwanathapura <niranjana.vishwanathapura@intel.com>
---
drivers/gpu/drm/i915/i915_vma.c | 21 ++++++++++++++++-----
1 file changed, 16 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_vma.c b/drivers/gpu/drm/i915/i915_vma.c
index 3e16b291f806..9e2d0dbd308c 100644
--- a/drivers/gpu/drm/i915/i915_vma.c
+++ b/drivers/gpu/drm/i915/i915_vma.c
@@ -181,6 +181,10 @@ vma_create(struct drm_i915_gem_object *obj,
spin_lock(&obj->vma.lock);
+ if (!i915_vma_is_ggtt(vma) &&
+ (view && view->type == I915_GGTT_VIEW_PARTIAL))
+ goto skip_rb_insert;
+
rb = NULL;
p = &obj->vma.tree.rb_node;
while (*p) {
@@ -210,6 +214,7 @@ vma_create(struct drm_i915_gem_object *obj,
rb_link_node(&vma->obj_node, rb, p);
rb_insert_color(&vma->obj_node, &obj->vma.tree);
+skip_rb_insert:
if (i915_vma_is_ggtt(vma))
/*
* We put the GGTT vma at the start of the vma-list, followed
@@ -274,13 +279,16 @@ i915_vma_instance(struct drm_i915_gem_object *obj,
struct i915_address_space *vm,
const struct i915_ggtt_view *view)
{
- struct i915_vma *vma;
+ struct i915_vma *vma = NULL;
GEM_BUG_ON(!atomic_read(&vm->open));
- spin_lock(&obj->vma.lock);
- vma = vma_lookup(obj, vm, view);
- spin_unlock(&obj->vma.lock);
+ if (i915_is_ggtt(vm) || !view ||
+ view->type != I915_GGTT_VIEW_PARTIAL) {
+ spin_lock(&obj->vma.lock);
+ vma = vma_lookup(obj, vm, view);
+ spin_unlock(&obj->vma.lock);
+ }
/* vma_create() will resolve the race if another creates the vma */
if (unlikely(!vma))
@@ -1046,7 +1054,10 @@ void i915_vma_release(struct kref *ref)
spin_lock(&obj->vma.lock);
list_del(&vma->obj_link);
- rb_erase(&vma->obj_node, &obj->vma.tree);
+
+ if (!i915_vma_is_persistent(vma))
+ rb_erase(&vma->obj_node, &obj->vma.tree);
+
spin_unlock(&obj->vma.lock);
mutex_lock(&vma->vm->svm_mutex);
--
2.21.0.rc0.32.g243a4c7e27
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 14+ messages in thread* [Intel-gfx] [RFC 7/8] drm/i915/svm: Add support to en/disable SVM
2020-01-24 8:53 [Intel-gfx] [RFC 0/8] drm/i915/svm: [WIP] SVM runtime allocator support Niranjana Vishwanathapura
` (5 preceding siblings ...)
2020-01-24 8:54 ` [Intel-gfx] [RFC 6/8] drm/i915/svm: Skip vma_lookup for " Niranjana Vishwanathapura
@ 2020-01-24 8:54 ` Niranjana Vishwanathapura
2020-01-25 16:40 ` kbuild test robot
2020-01-24 8:54 ` [Intel-gfx] [RFC 8/8] drm/i915/svm: VM_BIND for endless batch buffer Niranjana Vishwanathapura
` (2 subsequent siblings)
9 siblings, 1 reply; 14+ messages in thread
From: Niranjana Vishwanathapura @ 2020-01-24 8:54 UTC (permalink / raw)
To: intel-gfx; +Cc: chris.p.wilson, jason.ekstrand, daniel.vetter
Add SVM as a capability and allow user to enable/disable SVM
functionality on a per context basis.
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Cc: Jon Bloomfield <jon.bloomfield@intel.com>
Cc: Daniel Vetter <daniel.vetter@intel.com>
Cc: Chris P Wilson <chris.p.wilson@intel.com>
Cc: Sudeep Dutt <sudeep.dutt@intel.com>
Cc: Stuart Summers <stuart.summers@intel.com>
Signed-off-by: Niranjana Vishwanathapura <niranjana.vishwanathapura@intel.com>
Signed-off-by: Venkata Sandeep Dhanalakota <venkata.s.dhanalakota@intel.com>
---
drivers/gpu/drm/i915/gem/i915_gem_context.c | 100 ++++++++++++++++++
drivers/gpu/drm/i915/gem/i915_gem_context.h | 4 +
.../gpu/drm/i915/gem/i915_gem_execbuffer.c | 5 +
drivers/gpu/drm/i915/gt/intel_gtt.h | 3 +
drivers/gpu/drm/i915/i915_drv.c | 6 +-
drivers/gpu/drm/i915/i915_drv.h | 10 ++
drivers/gpu/drm/i915/i915_getparam.c | 3 +
include/uapi/drm/i915_drm.h | 17 +++
8 files changed, 146 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_context.c b/drivers/gpu/drm/i915/gem/i915_gem_context.c
index a2e57e62af30..fcbe5ff5c762 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_context.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_context.c
@@ -931,6 +931,76 @@ int i915_gem_vm_destroy_ioctl(struct drm_device *dev, void *data,
return 0;
}
+static int i915_gem_vm_setparam_ioctl(struct drm_device *dev, void *data,
+ struct drm_file *file)
+{
+ struct drm_i915_file_private *file_priv = file->driver_priv;
+ struct drm_i915_gem_vm_param *args = data;
+ struct i915_address_space *vm;
+ int err = 0;
+ u32 id;
+
+ id = args->vm_id;
+ if (!id)
+ return -ENOENT;
+
+ err = mutex_lock_interruptible(&file_priv->vm_idr_lock);
+ if (err)
+ return err;
+
+ vm = idr_find(&file_priv->vm_idr, id);
+
+ mutex_unlock(&file_priv->vm_idr_lock);
+ if (!vm)
+ return -ENOENT;
+
+ switch (lower_32_bits(args->param)) {
+ case I915_GEM_VM_PARAM_SVM:
+ /* FIXME: Ensure ppgtt is empty and VM idle before switching */
+ if (!i915_has_svm(file_priv->dev_priv))
+ err = -ENOTSUPP;
+ else
+ vm->svm_enabled = !!args->value;
+ break;
+ default:
+ err = -EINVAL;
+ }
+ return err;
+}
+
+static int i915_gem_vm_getparam_ioctl(struct drm_device *dev, void *data,
+ struct drm_file *file)
+{
+ struct drm_i915_file_private *file_priv = file->driver_priv;
+ struct drm_i915_gem_vm_param *args = data;
+ struct i915_address_space *vm;
+ int err = 0;
+ u32 id;
+
+ id = args->vm_id;
+ if (!id)
+ return -ENOENT;
+
+ err = mutex_lock_interruptible(&file_priv->vm_idr_lock);
+ if (err)
+ return err;
+
+ vm = idr_find(&file_priv->vm_idr, id);
+
+ mutex_unlock(&file_priv->vm_idr_lock);
+ if (!vm)
+ return -ENOENT;
+
+ switch (lower_32_bits(args->param)) {
+ case I915_GEM_VM_PARAM_SVM:
+ args->value = i915_vm_is_svm_enabled(vm);
+ break;
+ default:
+ err = -EINVAL;
+ }
+ return err;
+}
+
struct context_barrier_task {
struct i915_active base;
void (*task)(void *data);
@@ -2380,6 +2450,21 @@ int i915_gem_context_getparam_ioctl(struct drm_device *dev, void *data,
return ret;
}
+int i915_gem_getparam_ioctl(struct drm_device *dev, void *data,
+ struct drm_file *file)
+{
+ struct drm_i915_gem_context_param *args = data;
+ u32 class = upper_32_bits(args->param);
+
+ switch (class) {
+ case 0:
+ return i915_gem_context_getparam_ioctl(dev, data, file);
+ case 2:
+ return i915_gem_vm_getparam_ioctl(dev, data, file);
+ }
+ return -EINVAL;
+}
+
int i915_gem_context_setparam_ioctl(struct drm_device *dev, void *data,
struct drm_file *file)
{
@@ -2398,6 +2483,21 @@ int i915_gem_context_setparam_ioctl(struct drm_device *dev, void *data,
return ret;
}
+int i915_gem_setparam_ioctl(struct drm_device *dev, void *data,
+ struct drm_file *file)
+{
+ struct drm_i915_gem_context_param *args = data;
+ u32 class = upper_32_bits(args->param);
+
+ switch (class) {
+ case 0:
+ return i915_gem_context_setparam_ioctl(dev, data, file);
+ case 2:
+ return i915_gem_vm_setparam_ioctl(dev, data, file);
+ }
+ return -EINVAL;
+}
+
int i915_gem_context_reset_stats_ioctl(struct drm_device *dev,
void *data, struct drm_file *file)
{
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_context.h b/drivers/gpu/drm/i915/gem/i915_gem_context.h
index 3ae61a355d87..59ebe90b8cd5 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_context.h
+++ b/drivers/gpu/drm/i915/gem/i915_gem_context.h
@@ -131,6 +131,10 @@ int i915_gem_context_getparam_ioctl(struct drm_device *dev, void *data,
struct drm_file *file_priv);
int i915_gem_context_setparam_ioctl(struct drm_device *dev, void *data,
struct drm_file *file_priv);
+int i915_gem_getparam_ioctl(struct drm_device *dev, void *data,
+ struct drm_file *file);
+int i915_gem_setparam_ioctl(struct drm_device *dev, void *data,
+ struct drm_file *file);
int i915_gem_context_reset_stats_ioctl(struct drm_device *dev, void *data,
struct drm_file *file);
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
index 6aaffb9a817f..6dce8a42fd0c 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
@@ -426,6 +426,11 @@ eb_validate_vma(struct i915_execbuffer *eb,
if (unlikely(entry->alignment && !is_power_of_2(entry->alignment)))
return -EINVAL;
+ /* Only allow user PINNED addresses for SVM enabled contexts */
+ if (unlikely(i915_vm_is_svm_enabled(eb->gem_context->vm) &&
+ !(entry->flags & EXEC_OBJECT_PINNED)))
+ return -EINVAL;
+
/*
* Offset can be used as input (EXEC_OBJECT_PINNED), reject
* any non-page-aligned or non-canonical addresses.
diff --git a/drivers/gpu/drm/i915/gt/intel_gtt.h b/drivers/gpu/drm/i915/gt/intel_gtt.h
index 800c062a4b0e..8581503a0a6e 100644
--- a/drivers/gpu/drm/i915/gt/intel_gtt.h
+++ b/drivers/gpu/drm/i915/gt/intel_gtt.h
@@ -268,6 +268,7 @@ struct i915_address_space {
*/
struct list_head svm_list;
struct mutex svm_mutex; /* protects svm operations */
+ bool svm_enabled;
struct pagestash free_pages;
@@ -367,6 +368,8 @@ struct i915_ppgtt {
#define i915_is_ggtt(vm) ((vm)->is_ggtt)
+#define i915_vm_is_svm_enabled(vm) ((vm)->svm_enabled)
+
static inline bool
i915_vm_is_4lvl(const struct i915_address_space *vm)
{
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index 5631fa82bfed..2023a82ad594 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -2700,6 +2700,8 @@ static int i915_gem_vm_bind_ioctl(struct drm_device *dev, void *data,
vm = i915_gem_address_space_lookup(file->driver_priv, args->vm_id);
if (unlikely(!vm))
return -ENOENT;
+ if (unlikely(!i915_vm_is_svm_enabled(vm)))
+ return -ENOTSUPP;
if (!args->num_vas)
goto bind_done;
@@ -2782,8 +2784,8 @@ static const struct drm_ioctl_desc i915_ioctls[] = {
DRM_IOCTL_DEF_DRV(I915_REG_READ, i915_reg_read_ioctl, DRM_RENDER_ALLOW),
DRM_IOCTL_DEF_DRV(I915_GET_RESET_STATS, i915_gem_context_reset_stats_ioctl, DRM_RENDER_ALLOW),
DRM_IOCTL_DEF_DRV(I915_GEM_USERPTR, i915_gem_userptr_ioctl, DRM_RENDER_ALLOW),
- DRM_IOCTL_DEF_DRV(I915_GEM_CONTEXT_GETPARAM, i915_gem_context_getparam_ioctl, DRM_RENDER_ALLOW),
- DRM_IOCTL_DEF_DRV(I915_GEM_CONTEXT_SETPARAM, i915_gem_context_setparam_ioctl, DRM_RENDER_ALLOW),
+ DRM_IOCTL_DEF_DRV(I915_GEM_CONTEXT_GETPARAM, i915_gem_getparam_ioctl, DRM_RENDER_ALLOW),
+ DRM_IOCTL_DEF_DRV(I915_GEM_CONTEXT_SETPARAM, i915_gem_setparam_ioctl, DRM_RENDER_ALLOW),
DRM_IOCTL_DEF_DRV(I915_PERF_OPEN, i915_perf_open_ioctl, DRM_RENDER_ALLOW),
DRM_IOCTL_DEF_DRV(I915_PERF_ADD_CONFIG, i915_perf_add_config_ioctl, DRM_RENDER_ALLOW),
DRM_IOCTL_DEF_DRV(I915_PERF_REMOVE_CONFIG, i915_perf_remove_config_ioctl, DRM_RENDER_ALLOW),
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 7be87bc37cc0..9f2407cee28e 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -38,6 +38,7 @@
#include <linux/i2c-algo-bit.h>
#include <linux/backlight.h>
#include <linux/hash.h>
+#include <linux/hmm.h>
#include <linux/intel-iommu.h>
#include <linux/kref.h>
#include <linux/mm_types.h>
@@ -1746,6 +1747,15 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
/* Only valid when HAS_DISPLAY() is true */
#define INTEL_DISPLAY_ENABLED(dev_priv) (WARN_ON(!HAS_DISPLAY(dev_priv)), !i915_modparams.disable_display)
+static inline bool i915_has_svm(struct drm_i915_private *dev_priv)
+{
+#ifdef CONFIG_DRM_I915_SVM
+ return INTEL_GEN(dev_priv) >= 8;
+#else
+ return false;
+#endif
+}
+
static inline bool intel_vtd_active(void)
{
#ifdef CONFIG_INTEL_IOMMU
diff --git a/drivers/gpu/drm/i915/i915_getparam.c b/drivers/gpu/drm/i915/i915_getparam.c
index 54fce81d5724..c35402103e0f 100644
--- a/drivers/gpu/drm/i915/i915_getparam.c
+++ b/drivers/gpu/drm/i915/i915_getparam.c
@@ -161,6 +161,9 @@ int i915_getparam_ioctl(struct drm_device *dev, void *data,
case I915_PARAM_PERF_REVISION:
value = i915_perf_ioctl_version();
break;
+ case I915_PARAM_HAS_SVM:
+ value = i915_has_svm(i915);
+ break;
default:
DRM_DEBUG("Unknown parameter %d\n", param->param);
return -EINVAL;
diff --git a/include/uapi/drm/i915_drm.h b/include/uapi/drm/i915_drm.h
index e696854829ab..a29f9ea203f0 100644
--- a/include/uapi/drm/i915_drm.h
+++ b/include/uapi/drm/i915_drm.h
@@ -359,6 +359,8 @@ typedef struct _drm_i915_sarea {
#define DRM_I915_QUERY 0x39
#define DRM_I915_GEM_VM_CREATE 0x3a
#define DRM_I915_GEM_VM_DESTROY 0x3b
+#define DRM_I915_GEM_VM_GETPARAM DRM_I915_GEM_CONTEXT_GETPARAM
+#define DRM_I915_GEM_VM_SETPARAM DRM_I915_GEM_CONTEXT_SETPARAM
#define DRM_I915_GEM_VM_BIND 0x3c
/* Must be kept compact -- no holes */
@@ -423,6 +425,8 @@ typedef struct _drm_i915_sarea {
#define DRM_IOCTL_I915_QUERY DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_QUERY, struct drm_i915_query)
#define DRM_IOCTL_I915_GEM_VM_CREATE DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_GEM_VM_CREATE, struct drm_i915_gem_vm_control)
#define DRM_IOCTL_I915_GEM_VM_DESTROY DRM_IOW (DRM_COMMAND_BASE + DRM_I915_GEM_VM_DESTROY, struct drm_i915_gem_vm_control)
+#define DRM_IOCTL_I915_GEM_VM_GETPARAM DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_GEM_VM_GETPARAM, struct drm_i915_gem_vm_param)
+#define DRM_IOCTL_I915_GEM_VM_SETPARAM DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_GEM_VM_SETPARAM, struct drm_i915_gem_vm_param)
#define DRM_IOCTL_I915_GEM_VM_BIND DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_GEM_VM_BIND, struct drm_i915_gem_vm_bind)
/* Allow drivers to submit batchbuffers directly to hardware, relying
@@ -621,6 +625,8 @@ typedef struct drm_i915_irq_wait {
*/
#define I915_PARAM_PERF_REVISION 54
+/* Shared Virtual Memory (SVM) support capability */
+#define I915_PARAM_HAS_SVM 55
/* Must be kept compact -- no holes and well documented */
typedef struct drm_i915_getparam {
@@ -1826,6 +1832,17 @@ struct drm_i915_gem_vm_control {
__u32 vm_id;
};
+struct drm_i915_gem_vm_param {
+ __u32 vm_id;
+ __u32 rsvd;
+
+#define I915_VM_PARAM (2ull << 32)
+#define I915_GEM_VM_PARAM_SVM 0x1
+ __u64 param;
+
+ __u64 value;
+};
+
struct drm_i915_reg_read {
/*
* Register offset.
--
2.21.0.rc0.32.g243a4c7e27
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^ permalink raw reply related [flat|nested] 14+ messages in thread* Re: [Intel-gfx] [RFC 7/8] drm/i915/svm: Add support to en/disable SVM
2020-01-24 8:54 ` [Intel-gfx] [RFC 7/8] drm/i915/svm: Add support to en/disable SVM Niranjana Vishwanathapura
@ 2020-01-25 16:40 ` kbuild test robot
0 siblings, 0 replies; 14+ messages in thread
From: kbuild test robot @ 2020-01-25 16:40 UTC (permalink / raw)
To: kbuild-all
[-- Attachment #1: Type: text/plain, Size: 6257 bytes --]
Hi Niranjana,
[FYI, it's a private test report for your RFC patch.]
[auto build test ERROR on drm-intel/for-linux-next]
[also build test ERROR on drm-tip/drm-tip next-20200124]
[cannot apply to v5.5-rc7]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system. BTW, we also suggest to use '--base' option to specify the
base tree in git format-patch, please see https://stackoverflow.com/a/37406982]
url: https://github.com/0day-ci/linux/commits/Niranjana-Vishwanathapura/drm-i915-svm-WIP-SVM-runtime-allocator-support/20200125-144343
base: git://anongit.freedesktop.org/drm-intel for-linux-next
config: i386-randconfig-g003-20200125 (attached as .config)
compiler: gcc-7 (Debian 7.5.0-3) 7.5.0
reproduce:
# save the attached .config to linux build tree
make ARCH=i386
If you fix the issue, kindly add following tag
Reported-by: kbuild test robot <lkp@intel.com>
All errors (new ones prefixed by >>):
In file included from drivers/gpu//drm/i915/gem/i915_gem_context.h:14:0,
from drivers/gpu//drm/i915/gem/i915_gem_context.c:80:
drivers/gpu//drm/i915/i915_drv.h: In function '__i915_gem_address_space_lookup_rcu':
drivers/gpu//drm/i915/i915_drv.h:1934:30: error: 'struct drm_i915_file_private' has no member named 'vm_idr'; did you mean 'vm_xa'?
return idr_find(&file_priv->vm_idr, id);
^~~~~~
vm_xa
In file included from include/linux/notifier.h:14:0,
from arch/x86/include/asm/uprobes.h:13,
from include/linux/uprobes.h:49,
from include/linux/mm_types.h:14,
from include/linux/mmzone.h:21,
from include/linux/gfp.h:6,
from include/linux/slab.h:15,
from include/linux/io-mapping.h:10,
from drivers/gpu//drm/i915/gt/intel_gtt.h:19,
from drivers/gpu//drm/i915/gt/gen6_ppgtt.h:9,
from drivers/gpu//drm/i915/gem/i915_gem_context.c:72:
drivers/gpu//drm/i915/gem/i915_gem_context.c: In function 'i915_gem_vm_setparam_ioctl':
>> drivers/gpu//drm/i915/gem/i915_gem_context.c:922:43: error: 'struct drm_i915_file_private' has no member named 'vm_idr_lock'
err = mutex_lock_interruptible(&file_priv->vm_idr_lock);
^
include/linux/mutex.h:154:72: note: in definition of macro 'mutex_lock_interruptible'
#define mutex_lock_interruptible(lock) mutex_lock_interruptible_nested(lock, 0)
^~~~
>> drivers/gpu//drm/i915/gem/i915_gem_context.c:926:28: error: 'struct drm_i915_file_private' has no member named 'vm_idr'; did you mean 'vm_xa'?
vm = idr_find(&file_priv->vm_idr, id);
^~~~~~
vm_xa
drivers/gpu//drm/i915/gem/i915_gem_context.c:928:25: error: 'struct drm_i915_file_private' has no member named 'vm_idr_lock'
mutex_unlock(&file_priv->vm_idr_lock);
^~
In file included from include/linux/notifier.h:14:0,
from arch/x86/include/asm/uprobes.h:13,
from include/linux/uprobes.h:49,
from include/linux/mm_types.h:14,
from include/linux/mmzone.h:21,
from include/linux/gfp.h:6,
from include/linux/slab.h:15,
from include/linux/io-mapping.h:10,
from drivers/gpu//drm/i915/gt/intel_gtt.h:19,
from drivers/gpu//drm/i915/gt/gen6_ppgtt.h:9,
from drivers/gpu//drm/i915/gem/i915_gem_context.c:72:
drivers/gpu//drm/i915/gem/i915_gem_context.c: In function 'i915_gem_vm_getparam_ioctl':
drivers/gpu//drm/i915/gem/i915_gem_context.c:959:43: error: 'struct drm_i915_file_private' has no member named 'vm_idr_lock'
err = mutex_lock_interruptible(&file_priv->vm_idr_lock);
^
include/linux/mutex.h:154:72: note: in definition of macro 'mutex_lock_interruptible'
#define mutex_lock_interruptible(lock) mutex_lock_interruptible_nested(lock, 0)
^~~~
drivers/gpu//drm/i915/gem/i915_gem_context.c:963:28: error: 'struct drm_i915_file_private' has no member named 'vm_idr'; did you mean 'vm_xa'?
vm = idr_find(&file_priv->vm_idr, id);
^~~~~~
vm_xa
drivers/gpu//drm/i915/gem/i915_gem_context.c:965:25: error: 'struct drm_i915_file_private' has no member named 'vm_idr_lock'
mutex_unlock(&file_priv->vm_idr_lock);
^~
vim +922 drivers/gpu//drm/i915/gem/i915_gem_context.c
908
909 static int i915_gem_vm_setparam_ioctl(struct drm_device *dev, void *data,
910 struct drm_file *file)
911 {
912 struct drm_i915_file_private *file_priv = file->driver_priv;
913 struct drm_i915_gem_vm_param *args = data;
914 struct i915_address_space *vm;
915 int err = 0;
916 u32 id;
917
918 id = args->vm_id;
919 if (!id)
920 return -ENOENT;
921
> 922 err = mutex_lock_interruptible(&file_priv->vm_idr_lock);
923 if (err)
924 return err;
925
> 926 vm = idr_find(&file_priv->vm_idr, id);
927
928 mutex_unlock(&file_priv->vm_idr_lock);
929 if (!vm)
930 return -ENOENT;
931
932 switch (lower_32_bits(args->param)) {
933 case I915_GEM_VM_PARAM_SVM:
934 /* FIXME: Ensure ppgtt is empty and VM idle before switching */
935 if (!i915_has_svm(file_priv->dev_priv))
936 err = -ENOTSUPP;
937 else
938 vm->svm_enabled = !!args->value;
939 break;
940 default:
941 err = -EINVAL;
942 }
943 return err;
944 }
945
---
0-DAY kernel test infrastructure Open Source Technology Center
https://lists.01.org/hyperkitty/list/kbuild-all(a)lists.01.org Intel Corporation
[-- Attachment #2: config.gz --]
[-- Type: application/gzip, Size: 35899 bytes --]
^ permalink raw reply [flat|nested] 14+ messages in thread
* [Intel-gfx] [RFC 8/8] drm/i915/svm: VM_BIND for endless batch buffer
2020-01-24 8:53 [Intel-gfx] [RFC 0/8] drm/i915/svm: [WIP] SVM runtime allocator support Niranjana Vishwanathapura
` (6 preceding siblings ...)
2020-01-24 8:54 ` [Intel-gfx] [RFC 7/8] drm/i915/svm: Add support to en/disable SVM Niranjana Vishwanathapura
@ 2020-01-24 8:54 ` Niranjana Vishwanathapura
2020-01-24 9:54 ` [Intel-gfx] ✗ Fi.CI.BUILD: failure for drm/i915/svm: [WIP] SVM runtime allocator support Patchwork
2020-01-24 18:54 ` [Intel-gfx] [RFC 0/8] " Niranjana Vishwanathapura
9 siblings, 0 replies; 14+ messages in thread
From: Niranjana Vishwanathapura @ 2020-01-24 8:54 UTC (permalink / raw)
To: intel-gfx; +Cc: chris.p.wilson, jason.ekstrand, daniel.vetter
Initial attempt at supporting VM_BIND for endless batch buffer.
Not tested.
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Cc: Jon Bloomfield <jon.bloomfield@intel.com>
Cc: Daniel Vetter <daniel.vetter@intel.com>
Cc: Chris P Wilson <chris.p.wilson@intel.com>
Cc: Sudeep Dutt <sudeep.dutt@intel.com>
Cc: Stuart Summers <stuart.summers@intel.com>
Signed-off-by: Niranjana Vishwanathapura <niranjana.vishwanathapura@intel.com>
---
drivers/gpu/drm/i915/gem/i915_gem_svm.c | 11 +++++++++++
1 file changed, 11 insertions(+)
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_svm.c b/drivers/gpu/drm/i915/gem/i915_gem_svm.c
index e5e45ccc4262..dd12c2c46aa8 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_svm.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_svm.c
@@ -68,9 +68,20 @@ int i915_gem_vm_bind_svm_obj(struct i915_address_space *vm,
* and we don't need to store va_start.
*/
mutex_lock(&vm->svm_mutex);
+ if (i915_vm_is_active(vm)) {
+ u64 pin_flags = vma->va_start |
+ PIN_OFFSET_FIXED | PIN_USER;
+
+ ret = i915_vma_pin(vma, 0, 0, pin_flags);
+ if (ret) {
+ mutex_unlock(&vm->mutex);
+ goto put_obj;
+ }
+ }
list_add(&vma->svm_link, &vm->svm_list);
mutex_unlock(&vm->svm_mutex);
} else {
+ /* FIXME: Do async unbind if vm is active */
vma = i915_gem_vm_lookup_svm_vma(vm, obj, va);
if (vma) {
__i915_vma_unpin(vma);
--
2.21.0.rc0.32.g243a4c7e27
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https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 14+ messages in thread* [Intel-gfx] ✗ Fi.CI.BUILD: failure for drm/i915/svm: [WIP] SVM runtime allocator support
2020-01-24 8:53 [Intel-gfx] [RFC 0/8] drm/i915/svm: [WIP] SVM runtime allocator support Niranjana Vishwanathapura
` (7 preceding siblings ...)
2020-01-24 8:54 ` [Intel-gfx] [RFC 8/8] drm/i915/svm: VM_BIND for endless batch buffer Niranjana Vishwanathapura
@ 2020-01-24 9:54 ` Patchwork
2020-01-24 18:54 ` [Intel-gfx] [RFC 0/8] " Niranjana Vishwanathapura
9 siblings, 0 replies; 14+ messages in thread
From: Patchwork @ 2020-01-24 9:54 UTC (permalink / raw)
To: Niranjana Vishwanathapura; +Cc: intel-gfx
== Series Details ==
Series: drm/i915/svm: [WIP] SVM runtime allocator support
URL : https://patchwork.freedesktop.org/series/72519/
State : failure
== Summary ==
CALL scripts/checksyscalls.sh
CALL scripts/atomic/check-atomics.sh
DESCEND objtool
CHK include/generated/compile.h
HDRTEST drivers/gpu/drm/i915/display/intel_display_types.h
In file included from ./drivers/gpu/drm/i915/display/intel_display_types.h:46:0,
from <command-line>:0:
./drivers/gpu/drm/i915/i915_drv.h: In function ‘__i915_gem_address_space_lookup_rcu’:
./drivers/gpu/drm/i915/i915_drv.h:1934:30: error: ‘struct drm_i915_file_private’ has no member named ‘vm_idr’; did you mean ‘vm_xa’?
return idr_find(&file_priv->vm_idr, id);
^~~~~~
vm_xa
drivers/gpu/drm/i915/Makefile:306: recipe for target 'drivers/gpu/drm/i915/display/intel_display_types.hdrtest' failed
make[4]: *** [drivers/gpu/drm/i915/display/intel_display_types.hdrtest] Error 1
scripts/Makefile.build:503: recipe for target 'drivers/gpu/drm/i915' failed
make[3]: *** [drivers/gpu/drm/i915] Error 2
scripts/Makefile.build:503: recipe for target 'drivers/gpu/drm' failed
make[2]: *** [drivers/gpu/drm] Error 2
scripts/Makefile.build:503: recipe for target 'drivers/gpu' failed
make[1]: *** [drivers/gpu] Error 2
Makefile:1693: recipe for target 'drivers' failed
make: *** [drivers] Error 2
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^ permalink raw reply [flat|nested] 14+ messages in thread* Re: [Intel-gfx] [RFC 0/8] drm/i915/svm: [WIP] SVM runtime allocator support
2020-01-24 8:53 [Intel-gfx] [RFC 0/8] drm/i915/svm: [WIP] SVM runtime allocator support Niranjana Vishwanathapura
` (8 preceding siblings ...)
2020-01-24 9:54 ` [Intel-gfx] ✗ Fi.CI.BUILD: failure for drm/i915/svm: [WIP] SVM runtime allocator support Patchwork
@ 2020-01-24 18:54 ` Niranjana Vishwanathapura
9 siblings, 0 replies; 14+ messages in thread
From: Niranjana Vishwanathapura @ 2020-01-24 18:54 UTC (permalink / raw)
To: intel-gfx; +Cc: jason.ekstrand, daniel.vetter, chris.p.wilson
On Fri, Jan 24, 2020 at 12:53:54AM -0800, Niranjana Vishwanathapura wrote:
>This patch series is WIP and not submission ready.
>It needs more clarity on locking strategy, synchronization between
>VM_BIND and execbuff paths, endless batch buffer support among other things.
>This patch series is in continuation of runtime allocator support in
>earlier posted series
>https://lists.freedesktop.org/archives/intel-gfx/2019-December/223480.html
>It is an initial dig to address (partially) some feedback received in patch
>[02/12] in above RFC series.
>Posting it for early feedback.
>
>Shared Virtual Memory (SVM) allows the programmer to use a single virtual
>address space which will be shared between threads executing on CPUs and GPUs.
>It abstracts away from the user the location of the backing memory, and hence
>simplifies the user programming model.
>
>This series supports SVM Runtime allocator that requires the driver to provide
>memory allocation and management interface through GEM buffer object (BO) interface.
>
>No change is done to execbuff command submission interface.
>The newly added ability to partial bind BOs is only supported via VM_BIND ioctl.
>
Forgot to add the point that any synchronization between objects involving bindings
added via VM_BIND should be explicitly handled by the user.
>The patch series includes
>- Support to partially bind gem buffer objects in ppgtt including aliasing
>- Support to mark VMs as active and wait for them to become idle
>- VM_BIND ioctl to bind an array of BO fragments to specified GPU VAs
>- Handle persistent vmas created through VM_BIND in the execbuff path
>- Support for user to enable/disable SVM support on a per VM basis
>- Initial dig at handling endless batch buffer
>
>Niranjana Vishwanathapura (8):
> drm/i915/svm: Support partial binding in ppgtt
> drm/i915/svm: Add support to mark VMs as active
> drm/i915/svm: Introduce VM_BIND ioctl
> drm/i915/svm: Manage SVM bindings added using VM_BIND
> drm/i915/svm: Handle persistent vmas
> drm/i915/svm: Skip vma_lookup for persistent vmas
> drm/i915/svm: Add support to en/disable SVM
> drm/i915/svm: VM_BIND for endless batch buffer
>
> drivers/gpu/drm/i915/Kconfig | 11 ++
> drivers/gpu/drm/i915/Makefile | 3 +
> drivers/gpu/drm/i915/gem/i915_gem_context.c | 100 ++++++++++++++++++
> drivers/gpu/drm/i915/gem/i915_gem_context.h | 4 +
> .../gpu/drm/i915/gem/i915_gem_execbuffer.c | 36 +++++++
> drivers/gpu/drm/i915/gem/i915_gem_svm.c | 94 ++++++++++++++++
> drivers/gpu/drm/i915/gem/i915_gem_svm.h | 22 ++++
> drivers/gpu/drm/i915/gt/gen8_ppgtt.c | 37 ++++---
> drivers/gpu/drm/i915/gt/intel_gtt.c | 43 ++++++++
> drivers/gpu/drm/i915/gt/intel_gtt.h | 41 ++++++-
> drivers/gpu/drm/i915/i915_drv.c | 50 ++++++++-
> drivers/gpu/drm/i915/i915_drv.h | 32 ++++++
> drivers/gpu/drm/i915/i915_gem_gtt.h | 14 +++
> drivers/gpu/drm/i915/i915_getparam.c | 3 +
> drivers/gpu/drm/i915/i915_vma.c | 27 +++--
> drivers/gpu/drm/i915/i915_vma.h | 17 ++-
> drivers/gpu/drm/i915/i915_vma_types.h | 7 ++
> include/uapi/drm/i915_drm.h | 70 ++++++++++++
> 18 files changed, 583 insertions(+), 28 deletions(-)
> create mode 100644 drivers/gpu/drm/i915/gem/i915_gem_svm.c
> create mode 100644 drivers/gpu/drm/i915/gem/i915_gem_svm.h
>
>--
>2.21.0.rc0.32.g243a4c7e27
>
>_______________________________________________
>Intel-gfx mailing list
>Intel-gfx@lists.freedesktop.org
>https://lists.freedesktop.org/mailman/listinfo/intel-gfx
_______________________________________________
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^ permalink raw reply [flat|nested] 14+ messages in thread