[RFC PATCH V5 2/3] dt-bindings: mt8183: Add sensor interface dt-bindings

[Louis Kuo <louis.kuo@mediatek.com>]

This patch adds the DT binding documentation for the sensor interface
module in Mediatek SoCs.

Signed-off-by: Louis Kuo <louis.kuo@mediatek.com>
---
 .../bindings/media/mediatek-seninf.txt        | 66 +++++++++++++++++++
 1 file changed, 66 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/media/mediatek-seninf.txt

diff --git a/Documentation/devicetree/bindings/media/mediatek-seninf.txt b/Documentation/devicetree/bindings/media/mediatek-seninf.txt
new file mode 100644
index 000000000000..85a990814bdf
--- /dev/null
+++ b/Documentation/devicetree/bindings/media/mediatek-seninf.txt
@@ -0,0 +1,66 @@
+ ca* Mediatek seninf MIPI-CSI2 host driver
+
+Seninf MIPI-CSI2 host driver is a HW camera interface controller. It support
+a widely adopted, simple, high-speed protocol primarily intended for
+point-to-point image and video transmission between cameras and host devices.
+
+Required properties:
+  - compatible: "mediatek,mt8183-seninf"
+  - reg: Must contain an entry for each entry in reg-names.
+  - reg-names: Must include the following entries:
+    "base": seninf registers base
+    "rx": Rx analog registers base
+  - interrupts: interrupt number to the cpu.
+  - clocks : clock name from clock manager.
+  - clock-names: must be CLK_CAM_SENINF and CLK_TOP_MUX_SENINF,
+    It is the clocks of seninf.
+  - ports : list port node of endpoint.
+  - port : describe endpoint for each remote device port connected to this
+  		   port.
+  	reg : port reg 0 must be main camera, port reg 1 must be sub camera,
+  		  since seninf driver support upto 4 cameras, so camisp is reg 4.
+
+Example:
+		seninf: seninf@1a040000 {
+			compatible = "mediatek,mt8183-seninf";
+			reg = <0 0x1a040000 0 0x8000>,
+			      <0 0x11c80000 0 0x6000>;
+			reg-names = "base", "rx";
+			interrupts = <GIC_SPI 251 IRQ_TYPE_LEVEL_LOW>;
+			power-domains = <&scpsys MT8183_POWER_DOMAIN_CAM>;
+			clocks = <&camsys CLK_CAM_SENINF>,
+				 <&topckgen CLK_TOP_MUX_SENINF>;
+			clock-names = "CLK_CAM_SENINF", "CLK_TOP_MUX_SENINF";
+
+			ports {
+				#address-cells = <1>;
+				#size-cells = <0>;
+
+				port@0 {
+					reg = <0>;
+
+					seninf_port0_endpoint: endpoint {
+						data-lanes = <0 1 3 4>;
+						remote-endpoint = <&ov8856_endpoint>;
+					};
+				};
+
+				port@1 {
+					reg = <1>;
+
+					seninf_port1_endpoint: endpoint {
+						data-lanes = <1>;
+						remote-endpoint = <&ov02a10_endpoint>;
+					};
+				};
+
+				port@4 {
+					reg = <4>;
+
+					seninf_camisp_endpoint: endpoint {
+						remote-endpoint = <&camisp_endpoint>;
+					};
+				};
+			};
+		};
+
-- 
2.18.0