[Intel-gfx] [PATCH] drm/i915/gt: Warn about the hidden i915_vma_pin in timeline_get_seqno

[Intel-gfx] [PATCH] drm/i915/gt: Warn about the hidden i915_vma_pin in timeline_get_seqno

[Chris Wilson]

On seqno rollover, we need to allocate ourselves a new cacheline. This
might incur grabbing a new page and pinning it into the GGTT, with some
rather unfortunate lockdep implications.

To avoid a mutex, and more specifically pinning in the GGTT from inside
the kernel context being used to flush the GGTT in emergencies, we will
likely need to lift the next-cacheline allocation to a pre-reservation.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
---
 drivers/gpu/drm/i915/gt/intel_timeline.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/gpu/drm/i915/gt/intel_timeline.c b/drivers/gpu/drm/i915/gt/intel_timeline.c
index 465f87b65901..54e1e55f3c81 100644
--- a/drivers/gpu/drm/i915/gt/intel_timeline.c
+++ b/drivers/gpu/drm/i915/gt/intel_timeline.c
@@ -406,6 +406,8 @@ __intel_timeline_get_seqno(struct intel_timeline *tl,
 	void *vaddr;
 	int err;
 
+	might_lock(&tl->gt->ggtt->vm.mutex);
+
 	/*
 	 * If there is an outstanding GPU reference to this cacheline,
 	 * such as it being sampled by a HW semaphore on another timeline,
-- 
2.25.0

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[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915/gt: Warn about the hidden i915_vma_pin in timeline_get_seqno

[Patchwork]

== Series Details ==

Series: drm/i915/gt: Warn about the hidden i915_vma_pin in timeline_get_seqno
URL   : https://patchwork.freedesktop.org/series/72770/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_7842 -> Patchwork_16334
====================================================

Summary
-------

  **FAILURE**

  Serious unknown changes coming with Patchwork_16334 absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_16334, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16334/index.html

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in Patchwork_16334:

### IGT changes ###

#### Possible regressions ####

  * igt@runner@aborted:
    - fi-hsw-peppy:       NOTRUN -> [FAIL][1]
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16334/fi-hsw-peppy/igt@runner@aborted.html

  
Known issues
------------

  Here are the changes found in Patchwork_16334 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@gem_close_race@basic-threads:
    - fi-hsw-peppy:       [PASS][2] -> [TIMEOUT][3] ([fdo#112271])
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7842/fi-hsw-peppy/igt@gem_close_race@basic-threads.html
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16334/fi-hsw-peppy/igt@gem_close_race@basic-threads.html

  
#### Possible fixes ####

  * igt@i915_selftest@live_blt:
    - fi-byt-n2820:       [DMESG-FAIL][4] ([i915#725]) -> [PASS][5]
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7842/fi-byt-n2820/igt@i915_selftest@live_blt.html
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16334/fi-byt-n2820/igt@i915_selftest@live_blt.html

  
#### Warnings ####

  * igt@gem_exec_parallel@fds:
    - fi-byt-n2820:       [TIMEOUT][6] ([fdo#112271]) -> [FAIL][7] ([i915#694])
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7842/fi-byt-n2820/igt@gem_exec_parallel@fds.html
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16334/fi-byt-n2820/igt@gem_exec_parallel@fds.html

  
  [fdo#112271]: https://bugs.freedesktop.org/show_bug.cgi?id=112271
  [i915#694]: https://gitlab.freedesktop.org/drm/intel/issues/694
  [i915#725]: https://gitlab.freedesktop.org/drm/intel/issues/725


Participating hosts (48 -> 43)
------------------------------

  Additional (4): fi-glk-dsi fi-tgl-y fi-tgl-u fi-bwr-2160 
  Missing    (9): fi-ilk-m540 fi-hsw-4200u fi-skl-6770hq fi-byt-squawks fi-bsw-cyan fi-ivb-3770 fi-skl-lmem fi-byt-clapper fi-snb-2600 


Build changes
-------------

  * CI: CI-20190529 -> None
  * Linux: CI_DRM_7842 -> Patchwork_16334

  CI-20190529: 20190529
  CI_DRM_7842: 34f535513361a22f81bc3b7388755872b73b18f3 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_5407: a9d69f51dadbcbc53527671f87572d05c3370cba @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_16334: 6215ed3cf29c56cf9f5d41457f5984dfc5014cb4 @ git://anongit.freedesktop.org/gfx-ci/linux


== Linux commits ==

6215ed3cf29c drm/i915/gt: Warn about the hidden i915_vma_pin in timeline_get_seqno

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16334/index.html
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Re: [Intel-gfx] [PATCH] drm/i915/gt: Warn about the hidden i915_vma_pin in timeline_get_seqno

[Maarten Lankhorst]

Op 30-01-2020 om 12:58 schreef Chris Wilson:
> On seqno rollover, we need to allocate ourselves a new cacheline. This
> might incur grabbing a new page and pinning it into the GGTT, with some
> rather unfortunate lockdep implications.
>
> To avoid a mutex, and more specifically pinning in the GGTT from inside
> the kernel context being used to flush the GGTT in emergencies, we will
> likely need to lift the next-cacheline allocation to a pre-reservation.
>
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
> ---
>  drivers/gpu/drm/i915/gt/intel_timeline.c | 2 ++
>  1 file changed, 2 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/gt/intel_timeline.c b/drivers/gpu/drm/i915/gt/intel_timeline.c
> index 465f87b65901..54e1e55f3c81 100644
> --- a/drivers/gpu/drm/i915/gt/intel_timeline.c
> +++ b/drivers/gpu/drm/i915/gt/intel_timeline.c
> @@ -406,6 +406,8 @@ __intel_timeline_get_seqno(struct intel_timeline *tl,
>  	void *vaddr;
>  	int err;
>  
> +	might_lock(&tl->gt->ggtt->vm.mutex);
> +
>  	/*
>  	 * If there is an outstanding GPU reference to this cacheline,
>  	 * such as it being sampled by a HW semaphore on another timeline,

Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>

If this breaks on lockdep, it was already broken.

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Re: [Intel-gfx] [PATCH] drm/i915/gt: Warn about the hidden i915_vma_pin in timeline_get_seqno

[Chris Wilson]

Quoting Maarten Lankhorst (2020-01-31 10:12:36)
> Op 30-01-2020 om 12:58 schreef Chris Wilson:
> > On seqno rollover, we need to allocate ourselves a new cacheline. This
> > might incur grabbing a new page and pinning it into the GGTT, with some
> > rather unfortunate lockdep implications.
> >
> > To avoid a mutex, and more specifically pinning in the GGTT from inside
> > the kernel context being used to flush the GGTT in emergencies, we will
> > likely need to lift the next-cacheline allocation to a pre-reservation.
> >
> > Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> > Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
> > ---
> >  drivers/gpu/drm/i915/gt/intel_timeline.c | 2 ++
> >  1 file changed, 2 insertions(+)
> >
> > diff --git a/drivers/gpu/drm/i915/gt/intel_timeline.c b/drivers/gpu/drm/i915/gt/intel_timeline.c
> > index 465f87b65901..54e1e55f3c81 100644
> > --- a/drivers/gpu/drm/i915/gt/intel_timeline.c
> > +++ b/drivers/gpu/drm/i915/gt/intel_timeline.c
> > @@ -406,6 +406,8 @@ __intel_timeline_get_seqno(struct intel_timeline *tl,
> >       void *vaddr;
> >       int err;
> >  
> > +     might_lock(&tl->gt->ggtt->vm.mutex);
> > +
> >       /*
> >        * If there is an outstanding GPU reference to this cacheline,
> >        * such as it being sampled by a HW semaphore on another timeline,
> 
> Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
> 
> If this breaks on lockdep, it was already broken.

I have to write a selftest to cause seqno wrap on the kernel_context to
readily demonstrate the breakage. :|
-Chris
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