[igt-dev] [PATCH i-g-t 0/9] Handling mmap_gtt

[igt-dev] [PATCH i-g-t 0/9] Handling mmap_gtt

[Ramalingam C]

When platform doesn't support mappable aperture, we use device coherent
mapping instead of mmap_gtt.

And in such scenarios we are skipping the tiling based tests and fence
related tests along with GTT mmap specific tests.

Ramalingam C (9):
  tests/prime_vgem: Skip fence and gtt specific tests
  tests/intel_dp_compliance: Skip tests as tiling is not supported
  tests/prime_mmap_coherency: use device coherent mapping instead of
    mmap_gtt
  tests/prime_mmap: use device coherent mapping instead of mmap_gtt
  tests/kms_psr: Skip tests on mmap_gtt, if no mappable aperture
  tests/kms_available_modes_crc: Skip test if mappable aperture not
    supported
  tests/i915_pm_rpm: use device coherent mapping instead of mmap_gtt
  tests/i915_suspend: skip fence related tests, if no mmap_gtt
  tests/gem_tiling_max_stride: Skip if set tiling is not supported

 tests/i915/gem_tiling_max_stride.c |  1 +
 tests/i915/i915_pm_rpm.c           | 24 +++++++++++++++---------
 tests/i915/i915_suspend.c          | 16 ++++++++++++----
 tests/kms_available_modes_crc.c    |  1 +
 tests/kms_psr.c                    |  1 +
 tests/prime_mmap.c                 |  4 ++--
 tests/prime_mmap_coherency.c       |  2 +-
 tests/prime_vgem.c                 | 12 +++++++++---
 tools/intel_dp_compliance.c        |  2 ++
 9 files changed, 44 insertions(+), 19 deletions(-)

-- 
2.20.1

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[igt-dev] [PATCH i-g-t 1/9] tests/prime_vgem: Skip fence and gtt specific tests

[Ramalingam C]

In the absence of the mappable aperture, skip GTT and
fence specific tests.

v2:
  requirement check is moved to subtest start [Zbigniew]

Signed-off-by: Ramalingam C <ramalingam.c@intel.com>
---
 tests/prime_vgem.c | 12 +++++++++---
 1 file changed, 9 insertions(+), 3 deletions(-)

diff --git a/tests/prime_vgem.c b/tests/prime_vgem.c
index 3bdb23007d56..c483cbe722ea 100644
--- a/tests/prime_vgem.c
+++ b/tests/prime_vgem.c
@@ -846,14 +846,18 @@ igt_main
 	igt_subtest("basic-write")
 		test_write(vgem, i915);
 
-	igt_subtest("basic-gtt")
+	igt_subtest("basic-gtt") {
+		gem_require_mappable_ggtt(i915);
 		test_gtt(vgem, i915);
+	}
 
 	igt_subtest("shrink")
 		test_shrink(vgem, i915);
 
-	igt_subtest("coherency-gtt")
+	igt_subtest("coherency-gtt") {
+		gem_require_mappable_ggtt(i915);
 		test_gtt_interleaved(vgem, i915);
+	}
 
 	for (e = intel_execution_engines; e->name; e++) {
 		igt_subtest_f("%ssync-%s",
@@ -902,8 +906,10 @@ igt_main
 
 		igt_subtest("basic-fence-read")
 			test_fence_read(i915, vgem);
-		igt_subtest("basic-fence-mmap")
+		igt_subtest("basic-fence-mmap") {
+			gem_require_mappable_ggtt(i915);
 			test_fence_mmap(i915, vgem);
+		}
 
 		for (e = intel_execution_engines; e->name; e++) {
 			igt_subtest_f("%sfence-wait-%s",
-- 
2.20.1

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[igt-dev] [PATCH i-g-t 2/9] tests/intel_dp_compliance: Skip tests as tiling is not supported

[Ramalingam C]

Skip the test if the tiling is not supported on the platforms.

Signed-off-by: Ramalingam C <ramalingam.c@intel.com>
---
 tools/intel_dp_compliance.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/tools/intel_dp_compliance.c b/tools/intel_dp_compliance.c
index 5cc3d37a71d6..8f4ea3f3d328 100644
--- a/tools/intel_dp_compliance.c
+++ b/tools/intel_dp_compliance.c
@@ -1043,6 +1043,8 @@ int main(int argc, char **argv)
 	drm_fd = drm_open_driver(DRIVER_ANY);
 	gen = intel_gen(intel_get_drm_devid(drm_fd));
 
+	/* Set tiling is not supported on newer platforms */
+	gem_require_mappable_ggtt(drm_fd);
 	kmstest_set_vt_graphics_mode();
 	setup_debugfs_files();
 	cleanup_test();
-- 
2.20.1

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[igt-dev] [PATCH i-g-t 3/9] tests/prime_mmap_coherency: use device coherent mapping instead of mmap_gtt

[Ramalingam C]

Since on new discrete GPUs we dont have the mappable aperture, if that
is acceptable for the test purpose, we should use GEM_MMAP_OFFSET.
Hence using gem_mmap_device_coherent() which wraps the mmap options in
the order of gem_mmap_offset / gem_mmap / mmap_gtt

Signed-off-by: Ramalingam C <ramalingam.c@intel.com>
---
 tests/prime_mmap_coherency.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/tests/prime_mmap_coherency.c b/tests/prime_mmap_coherency.c
index 39538767c68f..32d78ee1a771 100644
--- a/tests/prime_mmap_coherency.c
+++ b/tests/prime_mmap_coherency.c
@@ -69,7 +69,7 @@ static int test_read_flush(void)
 
 	/* STEP #3: write 0x11 into BO 1. */
 	bo_2 = drm_intel_bo_alloc(bufmgr, "BO 2", width * height * 4, 4096);
-	ptr_gtt = gem_mmap__gtt(fd, bo_2->handle, width * height, PROT_READ | PROT_WRITE);
+	ptr_gtt = gem_mmap__device_coherent(fd, bo_2->handle, 0, width * height, PROT_READ | PROT_WRITE);
 	gem_set_domain(fd, bo_2->handle,
 		       I915_GEM_DOMAIN_GTT, I915_GEM_DOMAIN_GTT);
 	memset(ptr_gtt, 0xc5, width * height);
-- 
2.20.1

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[igt-dev] [PATCH i-g-t 4/9] tests/prime_mmap: use device coherent mapping instead of mmap_gtt

[Ramalingam C]

Since on new discrete GPUs we dont have the mappable aperture, if that
is acceptable for the test purpose, we should use GEM_MMAP_OFFSET.
Hence using gem_mmap_device_coherent() which wraps the mmap options in
the order of gem_mmap_offset / gem_mmap / mmap_gtt

Signed-off-by: Ramalingam C <ramalingam.c@intel.com>
---
 tests/prime_mmap.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/tests/prime_mmap.c b/tests/prime_mmap.c
index fc985784407b..1433424109c8 100644
--- a/tests/prime_mmap.c
+++ b/tests/prime_mmap.c
@@ -85,8 +85,8 @@ test_correct(void)
 	dma_buf_fd = prime_handle_to_fd(fd, handle);
 	igt_assert(errno == 0);
 
-	/* Check correctness vs GEM_MMAP_GTT */
-	ptr1 = gem_mmap__gtt(fd, handle, BO_SIZE, PROT_READ);
+	/* Check correctness vs GEM_MMAP */
+	ptr1 = gem_mmap__device_coherent(fd, handle, 0, BO_SIZE, PROT_READ);
 	ptr2 = mmap(NULL, BO_SIZE, PROT_READ, MAP_SHARED, dma_buf_fd, 0);
 	igt_assert(ptr1 != MAP_FAILED);
 	igt_assert(ptr2 != MAP_FAILED);
-- 
2.20.1

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[igt-dev] [PATCH i-g-t 5/9] tests/kms_psr: Skip tests on mmap_gtt, if no mappable aperture

[Ramalingam C]

Due to non availability of the mappable aperture on discrete GPUs,
skip the tests specific to mmap_gtt

Signed-off-by: Ramalingam C <ramalingam.c@intel.com>
---
 tests/kms_psr.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/tests/kms_psr.c b/tests/kms_psr.c
index d9be87d927b2..13ed02f46ac4 100644
--- a/tests/kms_psr.c
+++ b/tests/kms_psr.c
@@ -270,6 +270,7 @@ static void run_test(data_t *data)
 		expected = "GREEN";
 		break;
 	case MMAP_GTT:
+		gem_require_mappable_ggtt(data->drm_fd);
 		ptr = gem_mmap__gtt(data->drm_fd, handle, data->mod_size,
 				    PROT_WRITE);
 		gem_set_domain(data->drm_fd, handle,
-- 
2.20.1

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[igt-dev] [PATCH i-g-t 6/9] tests/kms_available_modes_crc: Skip test if mappable aperture not supported

[Ramalingam C]

If the mappable aperture is not supported, skip the test.

Signed-off-by: Ramalingam C <ramalingam.c@intel.com>
---
 tests/kms_available_modes_crc.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/tests/kms_available_modes_crc.c b/tests/kms_available_modes_crc.c
index d1b7b51708b0..12761343459a 100644
--- a/tests/kms_available_modes_crc.c
+++ b/tests/kms_available_modes_crc.c
@@ -448,6 +448,7 @@ igt_main
 	data.commit = data.display.is_atomic ? COMMIT_ATOMIC : COMMIT_LEGACY;
 
 	igt_subtest("available_mode_test_crc") {
+		gem_require_mappable_ggtt(data.gfx_fd);
 		test_available_modes(&data);
 	}
 
-- 
2.20.1

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[igt-dev] [PATCH i-g-t 7/9] tests/i915_pm_rpm: use device coherent mapping instead of mmap_gtt

[Ramalingam C]

Since on new discrete GPUs we dont have the mappable aperture, if that
is acceptable for the test purpose, we should use GEM_MMAP_OFFSET.
Hence using gem_mmap_device_coherent() which wraps the mmap options in
the order of gem_mmap_offset / gem_mmap / mmap_gtt

Incase of fencing/gtt related tests, we mandate the existance of the
mmap_gtt.

Signed-off-by: Ramalingam C <ramalingam.c@intel.com>
---
 tests/i915/i915_pm_rpm.c | 24 +++++++++++++++---------
 1 file changed, 15 insertions(+), 9 deletions(-)

diff --git a/tests/i915/i915_pm_rpm.c b/tests/i915/i915_pm_rpm.c
index f5f813c3d952..9524d7d3a4dd 100644
--- a/tests/i915/i915_pm_rpm.c
+++ b/tests/i915/i915_pm_rpm.c
@@ -1392,8 +1392,8 @@ static void gem_evict_pwrite_subtest(void)
 
 	for (n = 0; n < num_trash_bos; n++) {
 		trash_bos[n].handle = gem_create(drm_fd, 1024*1024);
-		trash_bos[n].ptr = gem_mmap__gtt(drm_fd, trash_bos[n].handle,
-						 1024*1024, PROT_WRITE);
+		trash_bos[n].ptr = gem_mmap__device_coherent(drm_fd, trash_bos[n].handle,
+							     0, 1024*1024, PROT_WRITE);
 		*trash_bos[n].ptr = 0;
 	}
 
@@ -1535,7 +1535,7 @@ static void fill_igt_fb(struct igt_fb *fb, uint32_t color)
 	int i;
 	uint32_t *ptr;
 
-	ptr = gem_mmap__gtt(drm_fd, fb->gem_handle, fb->size, PROT_WRITE);
+	ptr = gem_mmap__device_coherent(drm_fd, fb->gem_handle, 0, fb->size, PROT_WRITE);
 	for (i = 0; i < fb->size/sizeof(uint32_t); i++)
 		ptr[i] = color;
 	igt_assert(munmap(ptr, fb->size) == 0);
@@ -1827,8 +1827,8 @@ static void pm_test_tiling(void)
 		for (j = 0, k = 1 << off_bit;
 		     k <= gtt_obj_max_size; k <<= 1, j++) {
 			handles[j] = gem_create(drm_fd, k);
-			gem_bufs[j] = gem_mmap__gtt(drm_fd, handles[j],
-						    k, PROT_WRITE);
+			gem_bufs[j] = gem_mmap__device_coherent(drm_fd, handles[j],
+								0, k, PROT_WRITE);
 			memset(gem_bufs[j], 0x0, k);
 		}
 
@@ -1872,7 +1872,7 @@ static void pm_test_caching(void)
 
 	handle = gem_create(drm_fd, gtt_obj_max_size);
 	default_cache_level = gem_get_caching(drm_fd, handle);
-	gem_buf = gem_mmap__gtt(drm_fd, handle, gtt_obj_max_size, PROT_WRITE);
+	gem_buf = gem_mmap__device_coherent(drm_fd, handle, 0, gtt_obj_max_size, PROT_WRITE);
 
 	for (i = 0; i < ARRAY_SIZE(cache_levels); i++) {
 		igt_assert(wait_for_suspended());
@@ -2016,8 +2016,10 @@ igt_main_args("", long_options, help_str, opt_handler, NULL)
 	/* GEM */
 	igt_subtest("gem-mmap-cpu")
 		gem_mmap_subtest(false);
-	igt_subtest("gem-mmap-gtt")
+	igt_subtest("gem-mmap-gtt") {
+		gem_require_mappable_ggtt(drm_fd);
 		gem_mmap_subtest(true);
+	}
 	igt_subtest("gem-pread")
 		gem_pread_subtest();
 	igt_subtest("gem-execbuf")
@@ -2058,10 +2060,14 @@ igt_main_args("", long_options, help_str, opt_handler, NULL)
 		dpms_mode_unset_subtest(SCREEN_TYPE_LPSP);
 	igt_subtest("dpms-mode-unset-non-lpsp")
 		dpms_mode_unset_subtest(SCREEN_TYPE_NON_LPSP);
-	igt_subtest("fences")
+	igt_subtest("fences") {
+		gem_require_mappable_ggtt(drm_fd);
 		fences_subtest(false);
-	igt_subtest("fences-dpms")
+	}
+	igt_subtest("fences-dpms") {
+		gem_require_mappable_ggtt(drm_fd);
 		fences_subtest(true);
+	}
 
 	/* Modeset stress */
 	igt_subtest("modeset-lpsp-stress")
-- 
2.20.1

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[igt-dev] [PATCH i-g-t 8/9] tests/i915_suspend: skip fence related tests, if no mmap_gtt

[Ramalingam C]

When mappable aperture is not available, skip the fencing related tests.

Signed-off-by: Ramalingam C <ramalingam.c@intel.com>
---
 tests/i915/i915_suspend.c | 16 ++++++++++++----
 1 file changed, 12 insertions(+), 4 deletions(-)

diff --git a/tests/i915/i915_suspend.c b/tests/i915/i915_suspend.c
index 5a2ec76699d6..47e134b12086 100644
--- a/tests/i915/i915_suspend.c
+++ b/tests/i915/i915_suspend.c
@@ -208,11 +208,15 @@ igt_main
 	igt_fixture
 		fd = drm_open_driver(DRIVER_INTEL);
 
-	igt_subtest("fence-restore-tiled2untiled")
+	igt_subtest("fence-restore-tiled2untiled") {
+		gem_require_mappable_ggtt(fd);
 		test_fence_restore(fd, true, false);
+	}
 
-	igt_subtest("fence-restore-untiled")
+	igt_subtest("fence-restore-untiled") {
+		gem_require_mappable_ggtt(fd);
 		test_fence_restore(fd, false, false);
+	}
 
 	igt_subtest("debugfs-reader")
 		test_debugfs_reader(fd, false);
@@ -226,11 +230,15 @@ igt_main
 	igt_subtest("forcewake")
 		test_forcewake(fd, false);
 
-	igt_subtest("fence-restore-tiled2untiled-hibernate")
+	igt_subtest("fence-restore-tiled2untiled-hibernate") {
+		gem_require_mappable_ggtt(fd);
 		test_fence_restore(fd, true, true);
+	}
 
-	igt_subtest("fence-restore-untiled-hibernate")
+	igt_subtest("fence-restore-untiled-hibernate") {
+		gem_require_mappable_ggtt(fd);
 		test_fence_restore(fd, false, true);
+	}
 
 	igt_subtest("debugfs-reader-hibernate")
 		test_debugfs_reader(fd, true);
-- 
2.20.1

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[igt-dev] [PATCH i-g-t 9/9] tests/gem_tiling_max_stride: Skip if set tiling is not supported

[Ramalingam C]

When mmapable aperture is not supported set tiling also not supported.
Hence skip the test.

Signed-off-by: Ramalingam C <ramalingam.c@intel.com>
---
 tests/i915/gem_tiling_max_stride.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/tests/i915/gem_tiling_max_stride.c b/tests/i915/gem_tiling_max_stride.c
index 0e99d979f0ca..77f7223ba19b 100644
--- a/tests/i915/gem_tiling_max_stride.c
+++ b/tests/i915/gem_tiling_max_stride.c
@@ -71,6 +71,7 @@ igt_simple_main
 	fd = drm_open_driver(DRIVER_INTEL);
 
 	devid = intel_get_drm_devid(fd);
+	gem_require_mappable_ggtt(fd);
 
 	if (intel_gen(devid) >= 7) {
 		stride = 256 * 1024;
-- 
2.20.1

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[igt-dev] ✓ Fi.CI.BAT: success for Handling mmap_gtt

[Patchwork]

== Series Details ==

Series: Handling mmap_gtt
URL   : https://patchwork.freedesktop.org/series/72837/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_7853 -> IGTPW_4065
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4065/index.html

Known issues
------------

  Here are the changes found in IGTPW_4065 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@i915_pm_rpm@module-reload:
    - fi-skl-6770hq:      [PASS][1] -> [FAIL][2] ([i915#178])
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7853/fi-skl-6770hq/igt@i915_pm_rpm@module-reload.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4065/fi-skl-6770hq/igt@i915_pm_rpm@module-reload.html

  * igt@i915_selftest@live_blt:
    - fi-hsw-4770r:       [PASS][3] -> [DMESG-FAIL][4] ([i915#563])
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7853/fi-hsw-4770r/igt@i915_selftest@live_blt.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4065/fi-hsw-4770r/igt@i915_selftest@live_blt.html
    - fi-ivb-3770:        [PASS][5] -> [DMESG-FAIL][6] ([i915#770])
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7853/fi-ivb-3770/igt@i915_selftest@live_blt.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4065/fi-ivb-3770/igt@i915_selftest@live_blt.html

  * igt@i915_selftest@live_gem_contexts:
    - fi-cfl-8700k:       [PASS][7] -> [INCOMPLETE][8] ([i915#424])
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7853/fi-cfl-8700k/igt@i915_selftest@live_gem_contexts.html
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4065/fi-cfl-8700k/igt@i915_selftest@live_gem_contexts.html

  
#### Possible fixes ####

  * igt@gem_close_race@basic-threads:
    - fi-byt-j1900:       [TIMEOUT][9] ([fdo#112271] / [i915#1084] / [i915#816]) -> [PASS][10]
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7853/fi-byt-j1900/igt@gem_close_race@basic-threads.html
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4065/fi-byt-j1900/igt@gem_close_race@basic-threads.html
    - fi-byt-n2820:       [TIMEOUT][11] ([fdo#112271] / [i915#1084] / [i915#816]) -> [PASS][12]
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7853/fi-byt-n2820/igt@gem_close_race@basic-threads.html
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4065/fi-byt-n2820/igt@gem_close_race@basic-threads.html

  * igt@i915_selftest@live_blt:
    - fi-hsw-4770:        [DMESG-FAIL][13] ([i915#563]) -> [PASS][14]
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7853/fi-hsw-4770/igt@i915_selftest@live_blt.html
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4065/fi-hsw-4770/igt@i915_selftest@live_blt.html

  * igt@i915_selftest@live_execlists:
    - fi-icl-y:           [DMESG-FAIL][15] ([fdo#108569]) -> [PASS][16]
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7853/fi-icl-y/igt@i915_selftest@live_execlists.html
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4065/fi-icl-y/igt@i915_selftest@live_execlists.html

  * igt@kms_chamelium@hdmi-hpd-fast:
    - fi-kbl-7500u:       [FAIL][17] ([fdo#111096] / [i915#323]) -> [PASS][18]
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7853/fi-kbl-7500u/igt@kms_chamelium@hdmi-hpd-fast.html
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4065/fi-kbl-7500u/igt@kms_chamelium@hdmi-hpd-fast.html

  
#### Warnings ####

  * igt@i915_pm_rpm@basic-rte:
    - fi-kbl-guc:         [FAIL][19] ([i915#579]) -> [SKIP][20] ([fdo#109271])
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7853/fi-kbl-guc/igt@i915_pm_rpm@basic-rte.html
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4065/fi-kbl-guc/igt@i915_pm_rpm@basic-rte.html

  
  [fdo#108569]: https://bugs.freedesktop.org/show_bug.cgi?id=108569
  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [fdo#111096]: https://bugs.freedesktop.org/show_bug.cgi?id=111096
  [fdo#112271]: https://bugs.freedesktop.org/show_bug.cgi?id=112271
  [i915#1084]: https://gitlab.freedesktop.org/drm/intel/issues/1084
  [i915#178]: https://gitlab.freedesktop.org/drm/intel/issues/178
  [i915#323]: https://gitlab.freedesktop.org/drm/intel/issues/323
  [i915#424]: https://gitlab.freedesktop.org/drm/intel/issues/424
  [i915#563]: https://gitlab.freedesktop.org/drm/intel/issues/563
  [i915#579]: https://gitlab.freedesktop.org/drm/intel/issues/579
  [i915#770]: https://gitlab.freedesktop.org/drm/intel/issues/770
  [i915#816]: https://gitlab.freedesktop.org/drm/intel/issues/816


Participating hosts (47 -> 46)
------------------------------

  Additional (5): fi-gdg-551 fi-cfl-8109u fi-skl-6600u fi-skl-6700k2 fi-snb-2600 
  Missing    (6): fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-byt-clapper fi-bdw-samus 


Build changes
-------------

  * CI: CI-20190529 -> None
  * IGT: IGT_5409 -> IGTPW_4065

  CI-20190529: 20190529
  CI_DRM_7853: 1df04205c16923e525efe9c26d6e98612d38c9b3 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGTPW_4065: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4065/index.html
  IGT_5409: 93aefe6baa3fabf8c0cabe83e185f7b8f8d8753d @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4065/index.html
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Re: [igt-dev] [PATCH i-g-t 1/9] tests/prime_vgem: Skip fence and gtt specific tests

[Dixit, Ashutosh]

On Fri, 31 Jan 2020 09:31:01 -0800, Ramalingam C wrote:
>
> In the absence of the mappable aperture, skip GTT and
> fence specific tests.
>
> v2:
>   requirement check is moved to subtest start [Zbigniew]
>
> Signed-off-by: Ramalingam C <ramalingam.c@intel.com>
> ---
>  tests/prime_vgem.c | 12 +++++++++---
>  1 file changed, 9 insertions(+), 3 deletions(-)
>
> diff --git a/tests/prime_vgem.c b/tests/prime_vgem.c
> index 3bdb23007d56..c483cbe722ea 100644
> --- a/tests/prime_vgem.c
> +++ b/tests/prime_vgem.c
> @@ -846,14 +846,18 @@ igt_main
>	igt_subtest("basic-write")
>		test_write(vgem, i915);
>
> -	igt_subtest("basic-gtt")
> +	igt_subtest("basic-gtt") {
> +		gem_require_mappable_ggtt(i915);
>		test_gtt(vgem, i915);
> +	}

To me seems no reason to skip this. We could either unconditionally use
device_coherent() or use mmap_gtt() if gtt is available else
device_coherent()? Though probably the test would need to be renamed as
test_device_coherent()?

>
>	igt_subtest("shrink")
>		test_shrink(vgem, i915);
>
> -	igt_subtest("coherency-gtt")
> +	igt_subtest("coherency-gtt") {
> +		gem_require_mappable_ggtt(i915);
>		test_gtt_interleaved(vgem, i915);
> +	}

Probably similar situation here, though with WC instead of GTT the test
should always pass?

>
>	for (e = intel_execution_engines; e->name; e++) {
>		igt_subtest_f("%ssync-%s",
> @@ -902,8 +906,10 @@ igt_main
>
>		igt_subtest("basic-fence-read")
>			test_fence_read(i915, vgem);
> -		igt_subtest("basic-fence-mmap")
> +		igt_subtest("basic-fence-mmap") {
> +			gem_require_mappable_ggtt(i915);
>			test_fence_mmap(i915, vgem);
> +		}

Once again, just use device_coherent()?
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Re: [igt-dev] [PATCH i-g-t 2/9] tests/intel_dp_compliance: Skip tests as tiling is not supported

[Dixit, Ashutosh]

On Fri, 31 Jan 2020 09:31:02 -0800, Ramalingam C wrote:
>
> Skip the test if the tiling is not supported on the platforms.
>
> Signed-off-by: Ramalingam C <ramalingam.c@intel.com>
> ---
>  tools/intel_dp_compliance.c | 2 ++
>  1 file changed, 2 insertions(+)
>
> diff --git a/tools/intel_dp_compliance.c b/tools/intel_dp_compliance.c
> index 5cc3d37a71d6..8f4ea3f3d328 100644
> --- a/tools/intel_dp_compliance.c
> +++ b/tools/intel_dp_compliance.c
> @@ -1043,6 +1043,8 @@ int main(int argc, char **argv)
>	drm_fd = drm_open_driver(DRIVER_ANY);
>	gen = intel_gen(intel_get_drm_devid(drm_fd));
>
> +	/* Set tiling is not supported on newer platforms */
> +	gem_require_mappable_ggtt(drm_fd);

But the test exclusively uses LOCAL_DRM_FORMAT_MOD_NONE? We should see if
it can use device_coherent() or see if we can drop this from this series
for now and revisit later with the other display tests?
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Re: [igt-dev] [PATCH i-g-t 3/9] tests/prime_mmap_coherency: use device coherent mapping instead of mmap_gtt

[Dixit, Ashutosh]

On Fri, 31 Jan 2020 09:31:03 -0800, Ramalingam C wrote:
>
> Since on new discrete GPUs we dont have the mappable aperture, if that
> is acceptable for the test purpose, we should use GEM_MMAP_OFFSET.
> Hence using gem_mmap_device_coherent() which wraps the mmap options in
> the order of gem_mmap_offset / gem_mmap / mmap_gtt
>
> Signed-off-by: Ramalingam C <ramalingam.c@intel.com>
> ---
>  tests/prime_mmap_coherency.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/tests/prime_mmap_coherency.c b/tests/prime_mmap_coherency.c
> index 39538767c68f..32d78ee1a771 100644
> --- a/tests/prime_mmap_coherency.c
> +++ b/tests/prime_mmap_coherency.c
> @@ -69,7 +69,7 @@ static int test_read_flush(void)
>
>	/* STEP #3: write 0x11 into BO 1. */
>	bo_2 = drm_intel_bo_alloc(bufmgr, "BO 2", width * height * 4, 4096);
> -	ptr_gtt = gem_mmap__gtt(fd, bo_2->handle, width * height, PROT_READ | PROT_WRITE);
> +	ptr_gtt = gem_mmap__device_coherent(fd, bo_2->handle, 0, width * height, PROT_READ | PROT_WRITE);
>	gem_set_domain(fd, bo_2->handle,
>		       I915_GEM_DOMAIN_GTT, I915_GEM_DOMAIN_GTT);
>	memset(ptr_gtt, 0xc5, width * height);

I think the patch is ok but did you check if the test passes/fails on
devices with/without a mappable aperture? I sort of expect it to always
fail, at least with WC, but not sure if it ever passes with the GTT mapping
(since we haven't done a clflush).
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Re: [igt-dev] [PATCH i-g-t 4/9] tests/prime_mmap: use device coherent mapping instead of mmap_gtt

[Dixit, Ashutosh]

On Fri, 31 Jan 2020 09:31:04 -0800, Ramalingam C wrote:
>
> Since on new discrete GPUs we dont have the mappable aperture, if that
> is acceptable for the test purpose, we should use GEM_MMAP_OFFSET.
> Hence using gem_mmap_device_coherent() which wraps the mmap options in
> the order of gem_mmap_offset / gem_mmap / mmap_gtt
>
> Signed-off-by: Ramalingam C <ramalingam.c@intel.com>
> ---
>  tests/prime_mmap.c | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/tests/prime_mmap.c b/tests/prime_mmap.c
> index fc985784407b..1433424109c8 100644
> --- a/tests/prime_mmap.c
> +++ b/tests/prime_mmap.c
> @@ -85,8 +85,8 @@ test_correct(void)
>	dma_buf_fd = prime_handle_to_fd(fd, handle);
>	igt_assert(errno == 0);
>
> -	/* Check correctness vs GEM_MMAP_GTT */
> -	ptr1 = gem_mmap__gtt(fd, handle, BO_SIZE, PROT_READ);
> +	/* Check correctness vs GEM_MMAP */
> +	ptr1 = gem_mmap__device_coherent(fd, handle, 0, BO_SIZE, PROT_READ);

Once again, does this test pass with gtt mapping but fail with wc mapping?
I thought gtt mapping also bypasses the cache like wc? What about prime
mmap's? Can someone please confirm? Otherwise I will try to look.
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Re: [igt-dev] [PATCH i-g-t 3/9] tests/prime_mmap_coherency: use device coherent mapping instead of mmap_gtt

[Ramalingam C]

On 2020-01-31 at 22:27:42 -0800, Dixit, Ashutosh wrote:
> On Fri, 31 Jan 2020 09:31:03 -0800, Ramalingam C wrote:
> >
> > Since on new discrete GPUs we dont have the mappable aperture, if that
> > is acceptable for the test purpose, we should use GEM_MMAP_OFFSET.
> > Hence using gem_mmap_device_coherent() which wraps the mmap options in
> > the order of gem_mmap_offset / gem_mmap / mmap_gtt
> >
> > Signed-off-by: Ramalingam C <ramalingam.c@intel.com>
> > ---
> >  tests/prime_mmap_coherency.c | 2 +-
> >  1 file changed, 1 insertion(+), 1 deletion(-)
> >
> > diff --git a/tests/prime_mmap_coherency.c b/tests/prime_mmap_coherency.c
> > index 39538767c68f..32d78ee1a771 100644
> > --- a/tests/prime_mmap_coherency.c
> > +++ b/tests/prime_mmap_coherency.c
> > @@ -69,7 +69,7 @@ static int test_read_flush(void)
> >
> >	/* STEP #3: write 0x11 into BO 1. */
> >	bo_2 = drm_intel_bo_alloc(bufmgr, "BO 2", width * height * 4, 4096);
> > -	ptr_gtt = gem_mmap__gtt(fd, bo_2->handle, width * height, PROT_READ | PROT_WRITE);
> > +	ptr_gtt = gem_mmap__device_coherent(fd, bo_2->handle, 0, width * height, PROT_READ | PROT_WRITE);
> >	gem_set_domain(fd, bo_2->handle,
> >		       I915_GEM_DOMAIN_GTT, I915_GEM_DOMAIN_GTT);
> >	memset(ptr_gtt, 0xc5, width * height);
> 
> I think the patch is ok but did you check if the test passes/fails on
> devices with/without a mappable aperture? I sort of expect it to always
> fail, at least with WC, but not sure if it ever passes with the GTT mapping
> (since we haven't done a clflush).
Subtest read fails at gem_mmap__gtt but with device_coherent mapping
the test is passing.

-Ram
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Re: [igt-dev] [PATCH i-g-t 4/9] tests/prime_mmap: use device coherent mapping instead of mmap_gtt

[Ramalingam C]

On 2020-01-31 at 22:57:29 -0800, Dixit, Ashutosh wrote:
> On Fri, 31 Jan 2020 09:31:04 -0800, Ramalingam C wrote:
> >
> > Since on new discrete GPUs we dont have the mappable aperture, if that
> > is acceptable for the test purpose, we should use GEM_MMAP_OFFSET.
> > Hence using gem_mmap_device_coherent() which wraps the mmap options in
> > the order of gem_mmap_offset / gem_mmap / mmap_gtt
> >
> > Signed-off-by: Ramalingam C <ramalingam.c@intel.com>
> > ---
> >  tests/prime_mmap.c | 4 ++--
> >  1 file changed, 2 insertions(+), 2 deletions(-)
> >
> > diff --git a/tests/prime_mmap.c b/tests/prime_mmap.c
> > index fc985784407b..1433424109c8 100644
> > --- a/tests/prime_mmap.c
> > +++ b/tests/prime_mmap.c
> > @@ -85,8 +85,8 @@ test_correct(void)
> >	dma_buf_fd = prime_handle_to_fd(fd, handle);
> >	igt_assert(errno == 0);
> >
> > -	/* Check correctness vs GEM_MMAP_GTT */
> > -	ptr1 = gem_mmap__gtt(fd, handle, BO_SIZE, PROT_READ);
> > +	/* Check correctness vs GEM_MMAP */
> > +	ptr1 = gem_mmap__device_coherent(fd, handle, 0, BO_SIZE, PROT_READ);
> 
> Once again, does this test pass with gtt mapping but fail with wc mapping?
> I thought gtt mapping also bypasses the cache like wc? What about prime
> mmap's? Can someone please confirm? Otherwise I will try to look.
Ashutosh,

At this test subtest test-correct is failing at gem_mmap__gtt, but
passes when we use device coherent mapping.

-Ram
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Re: [igt-dev] [PATCH i-g-t 1/9] tests/prime_vgem: Skip fence and gtt specific tests

[Janusz Krzysztofik]

On Saturday, February 1, 2020 6:42:50 AM CET Dixit, Ashutosh wrote:
> On Fri, 31 Jan 2020 09:31:01 -0800, Ramalingam C wrote:
> >
> > In the absence of the mappable aperture, skip GTT and
> > fence specific tests.
> >
> > v2:
> >   requirement check is moved to subtest start [Zbigniew]
> >
> > Signed-off-by: Ramalingam C <ramalingam.c@intel.com>
> > ---
> >  tests/prime_vgem.c | 12 +++++++++---
> >  1 file changed, 9 insertions(+), 3 deletions(-)
> >
> > diff --git a/tests/prime_vgem.c b/tests/prime_vgem.c
> > index 3bdb23007d56..c483cbe722ea 100644
> > --- a/tests/prime_vgem.c
> > +++ b/tests/prime_vgem.c
> > @@ -846,14 +846,18 @@ igt_main
> >	igt_subtest("basic-write")
> >		test_write(vgem, i915);
> >
> > -	igt_subtest("basic-gtt")
> > +	igt_subtest("basic-gtt") {
> > +		gem_require_mappable_ggtt(i915);
> >		test_gtt(vgem, i915);
> > +	}
> 
> To me seems no reason to skip this. 

Only I915_MMAP_OFFSET_GTT type of mmap-offset to a PRIME imported dma-buf 
backed object is supported, other types are not, then the test can only 
succeed if mappable aperture is available, otherwise it should be skipped.
This applies to all 3 subtests.

Thanks,
Janusz


> We could either unconditionally use
> device_coherent() or use mmap_gtt() if gtt is available else
> device_coherent()? Though probably the test would need to be renamed as
> test_device_coherent()?
> 
> >
> >	igt_subtest("shrink")
> >		test_shrink(vgem, i915);
> >
> > -	igt_subtest("coherency-gtt")
> > +	igt_subtest("coherency-gtt") {
> > +		gem_require_mappable_ggtt(i915);
> >		test_gtt_interleaved(vgem, i915);
> > +	}
> 
> Probably similar situation here, though with WC instead of GTT the test
> should always pass?
> 
> >
> >	for (e = intel_execution_engines; e->name; e++) {
> >		igt_subtest_f("%ssync-%s",
> > @@ -902,8 +906,10 @@ igt_main
> >
> >		igt_subtest("basic-fence-read")
> >			test_fence_read(i915, vgem);
> > -		igt_subtest("basic-fence-mmap")
> > +		igt_subtest("basic-fence-mmap") {
> > +			gem_require_mappable_ggtt(i915);
> >			test_fence_mmap(i915, vgem);
> > +		}
> 
> Once again, just use device_coherent()?
> 




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Re: [igt-dev] [PATCH i-g-t 1/9] tests/prime_vgem: Skip fence and gtt specific tests

[Janusz Krzysztofik]

On Friday, January 31, 2020 6:31:01 PM CET Ramalingam C wrote:
> In the absence of the mappable aperture, skip GTT and
> fence specific tests.
> 
> v2:
>   requirement check is moved to subtest start [Zbigniew]
> 
> Signed-off-by: Ramalingam C <ramalingam.c@intel.com>
> ---
>  tests/prime_vgem.c | 12 +++++++++---
>  1 file changed, 9 insertions(+), 3 deletions(-)
> 
> diff --git a/tests/prime_vgem.c b/tests/prime_vgem.c
> index 3bdb23007d56..c483cbe722ea 100644
> --- a/tests/prime_vgem.c
> +++ b/tests/prime_vgem.c
> @@ -846,14 +846,18 @@ igt_main
>  	igt_subtest("basic-write")
>  		test_write(vgem, i915);
>  
> -	igt_subtest("basic-gtt")
> +	igt_subtest("basic-gtt") {
> +		gem_require_mappable_ggtt(i915);
>  		test_gtt(vgem, i915);
> +	}
>  
>  	igt_subtest("shrink")
>  		test_shrink(vgem, i915);
>  
> -	igt_subtest("coherency-gtt")
> +	igt_subtest("coherency-gtt") {
> +		gem_require_mappable_ggtt(i915);
>  		test_gtt_interleaved(vgem, i915);
> +	}
>  
>  	for (e = intel_execution_engines; e->name; e++) {
>  		igt_subtest_f("%ssync-%s",
> @@ -902,8 +906,10 @@ igt_main
>  
>  		igt_subtest("basic-fence-read")
>  			test_fence_read(i915, vgem);
> -		igt_subtest("basic-fence-mmap")
> +		igt_subtest("basic-fence-mmap") {
> +			gem_require_mappable_ggtt(i915);
>  			test_fence_mmap(i915, vgem);
> +		}
>  
>  		for (e = intel_execution_engines; e->name; e++) {
>  			igt_subtest_f("%sfence-wait-%s",
> 

As discussed before, we need blitter based replacements for completeness, but 
those skips are needed anyway, better than failures we currently get, as long 
as we decided to not provide support for non-GTT mapping of dma-buf objects.

Reviewed-by: Janusz Krzysztofik <janusz.krzysztofik@linux.intel.com>

Thanks,
Janusz



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Re: [igt-dev] [PATCH i-g-t 2/9] tests/intel_dp_compliance: Skip tests as tiling is not supported

[Dixit, Ashutosh]

On Fri, 31 Jan 2020 21:55:05 -0800, Dixit, Ashutosh wrote:
>
> On Fri, 31 Jan 2020 09:31:02 -0800, Ramalingam C wrote:
> >
> > Skip the test if the tiling is not supported on the platforms.
> >
> > Signed-off-by: Ramalingam C <ramalingam.c@intel.com>
> > ---
> >  tools/intel_dp_compliance.c | 2 ++
> >  1 file changed, 2 insertions(+)
> >
> > diff --git a/tools/intel_dp_compliance.c b/tools/intel_dp_compliance.c
> > index 5cc3d37a71d6..8f4ea3f3d328 100644
> > --- a/tools/intel_dp_compliance.c
> > +++ b/tools/intel_dp_compliance.c
> > @@ -1043,6 +1043,8 @@ int main(int argc, char **argv)
> >	drm_fd = drm_open_driver(DRIVER_ANY);
> >	gen = intel_gen(intel_get_drm_devid(drm_fd));
> >
> > +	/* Set tiling is not supported on newer platforms */
> > +	gem_require_mappable_ggtt(drm_fd);
>
> But the test exclusively uses LOCAL_DRM_FORMAT_MOD_NONE? We should see if
> it can use device_coherent() or see if we can drop this from this series
> for now and revisit later with the other display tests?

I think this can just use device_coherent().
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Re: [igt-dev] [PATCH i-g-t 2/9] tests/intel_dp_compliance: Skip tests as tiling is not supported

[Ramalingam C]

On 2020-02-03 at 21:55:51 -0800, Dixit, Ashutosh wrote:
> On Fri, 31 Jan 2020 21:55:05 -0800, Dixit, Ashutosh wrote:
> >
> > On Fri, 31 Jan 2020 09:31:02 -0800, Ramalingam C wrote:
> > >
> > > Skip the test if the tiling is not supported on the platforms.
> > >
> > > Signed-off-by: Ramalingam C <ramalingam.c@intel.com>
> > > ---
> > >  tools/intel_dp_compliance.c | 2 ++
> > >  1 file changed, 2 insertions(+)
> > >
> > > diff --git a/tools/intel_dp_compliance.c b/tools/intel_dp_compliance.c
> > > index 5cc3d37a71d6..8f4ea3f3d328 100644
> > > --- a/tools/intel_dp_compliance.c
> > > +++ b/tools/intel_dp_compliance.c
> > > @@ -1043,6 +1043,8 @@ int main(int argc, char **argv)
> > >	drm_fd = drm_open_driver(DRIVER_ANY);
> > >	gen = intel_gen(intel_get_drm_devid(drm_fd));
> > >
> > > +	/* Set tiling is not supported on newer platforms */
> > > +	gem_require_mappable_ggtt(drm_fd);
> >
> > But the test exclusively uses LOCAL_DRM_FORMAT_MOD_NONE? We should see if
> > it can use device_coherent() or see if we can drop this from this series
> > for now and revisit later with the other display tests?
> 
> I think this can just use device_coherent().
Ashutosh,

Still we have the set_tiling used in this flow. As per our discussion we
should skip when we try to do legacy tiling. Am I missing something
here?

-Ram
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Re: [igt-dev] [PATCH i-g-t 3/9] tests/prime_mmap_coherency: use device coherent mapping instead of mmap_gtt

[Dixit, Ashutosh]

On Fri, 31 Jan 2020 22:27:42 -0800, Dixit, Ashutosh wrote:
> On Fri, 31 Jan 2020 09:31:03 -0800, Ramalingam C wrote:
> >
> > Since on new discrete GPUs we dont have the mappable aperture, if that
> > is acceptable for the test purpose, we should use GEM_MMAP_OFFSET.
> > Hence using gem_mmap_device_coherent() which wraps the mmap options in
> > the order of gem_mmap_offset / gem_mmap / mmap_gtt
> >
> > Signed-off-by: Ramalingam C <ramalingam.c@intel.com>
> > ---
> >  tests/prime_mmap_coherency.c | 2 +-
> >  1 file changed, 1 insertion(+), 1 deletion(-)
> >
> > diff --git a/tests/prime_mmap_coherency.c b/tests/prime_mmap_coherency.c
> > index 39538767c68f..32d78ee1a771 100644
> > --- a/tests/prime_mmap_coherency.c
> > +++ b/tests/prime_mmap_coherency.c
> > @@ -69,7 +69,7 @@ static int test_read_flush(void)
> >
> >	/* STEP #3: write 0x11 into BO 1. */
> >	bo_2 = drm_intel_bo_alloc(bufmgr, "BO 2", width * height * 4, 4096);
> > -	ptr_gtt = gem_mmap__gtt(fd, bo_2->handle, width * height, PROT_READ | PROT_WRITE);
> > +	ptr_gtt = gem_mmap__device_coherent(fd, bo_2->handle, 0, width * height, PROT_READ | PROT_WRITE);
> >	gem_set_domain(fd, bo_2->handle,
> >		       I915_GEM_DOMAIN_GTT, I915_GEM_DOMAIN_GTT);
> >	memset(ptr_gtt, 0xc5, width * height);
>
> I think the patch is ok but did you check if the test passes/fails on
> devices with/without a mappable aperture? I sort of expect it to always
> fail, at least with WC, but not sure if it ever passes with the GTT mapping
> (since we haven't done a clflush).

According to Chris "the gtt mapping uses WC" so cache effects for both WC
and GTT mappings should be equivalent. Therefore:

Reviewed-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
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Re: [igt-dev] [PATCH i-g-t 2/9] tests/intel_dp_compliance: Skip tests as tiling is not supported

[Dixit, Ashutosh]

On Mon, 03 Feb 2020 22:00:27 -0800, Ramalingam C wrote:
>
> On 2020-02-03 at 21:55:51 -0800, Dixit, Ashutosh wrote:
> > On Fri, 31 Jan 2020 21:55:05 -0800, Dixit, Ashutosh wrote:
> > >
> > > On Fri, 31 Jan 2020 09:31:02 -0800, Ramalingam C wrote:
> > > >
> > > > Skip the test if the tiling is not supported on the platforms.
> > > >
> > > > Signed-off-by: Ramalingam C <ramalingam.c@intel.com>
> > > > ---
> > > >  tools/intel_dp_compliance.c | 2 ++
> > > >  1 file changed, 2 insertions(+)
> > > >
> > > > diff --git a/tools/intel_dp_compliance.c b/tools/intel_dp_compliance.c
> > > > index 5cc3d37a71d6..8f4ea3f3d328 100644
> > > > --- a/tools/intel_dp_compliance.c
> > > > +++ b/tools/intel_dp_compliance.c
> > > > @@ -1043,6 +1043,8 @@ int main(int argc, char **argv)
> > > >	drm_fd = drm_open_driver(DRIVER_ANY);
> > > >	gen = intel_gen(intel_get_drm_devid(drm_fd));
> > > >
> > > > +	/* Set tiling is not supported on newer platforms */
> > > > +	gem_require_mappable_ggtt(drm_fd);
> > >
> > > But the test exclusively uses LOCAL_DRM_FORMAT_MOD_NONE? We should see if
> > > it can use device_coherent() or see if we can drop this from this series
> > > for now and revisit later with the other display tests?
> >
> > I think this can just use device_coherent().
> Ashutosh,
>
> Still we have the set_tiling used in this flow. As per our discussion we
> should skip when we try to do legacy tiling. Am I missing something
> here?

Afais set_tiling is not used, only LOCAL_DRM_FORMAT_MOD_NONE is used.
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Re: [igt-dev] [PATCH i-g-t 4/9] tests/prime_mmap: use device coherent mapping instead of mmap_gtt

[Dixit, Ashutosh]

On Fri, 31 Jan 2020 22:57:29 -0800, Dixit, Ashutosh wrote:
>
> On Fri, 31 Jan 2020 09:31:04 -0800, Ramalingam C wrote:
> >
> > Since on new discrete GPUs we dont have the mappable aperture, if that
> > is acceptable for the test purpose, we should use GEM_MMAP_OFFSET.
> > Hence using gem_mmap_device_coherent() which wraps the mmap options in
> > the order of gem_mmap_offset / gem_mmap / mmap_gtt
> >
> > Signed-off-by: Ramalingam C <ramalingam.c@intel.com>
> > ---
> >  tests/prime_mmap.c | 4 ++--
> >  1 file changed, 2 insertions(+), 2 deletions(-)
> >
> > diff --git a/tests/prime_mmap.c b/tests/prime_mmap.c
> > index fc985784407b..1433424109c8 100644
> > --- a/tests/prime_mmap.c
> > +++ b/tests/prime_mmap.c
> > @@ -85,8 +85,8 @@ test_correct(void)
> >	dma_buf_fd = prime_handle_to_fd(fd, handle);
> >	igt_assert(errno == 0);
> >
> > -	/* Check correctness vs GEM_MMAP_GTT */
> > -	ptr1 = gem_mmap__gtt(fd, handle, BO_SIZE, PROT_READ);
> > +	/* Check correctness vs GEM_MMAP */
> > +	ptr1 = gem_mmap__device_coherent(fd, handle, 0, BO_SIZE, PROT_READ);
>
> Once again, does this test pass with gtt mapping but fail with wc mapping?
> I thought gtt mapping also bypasses the cache like wc? What about prime
> mmap's? Can someone please confirm? Otherwise I will try to look.

Similar to prime_mmap_coherency: according to Chris "the gtt mapping uses
WC" so cache effects for both WC and GTT mappings should be
equivalent. Also it is the regular handle not the prime handle which is
being mmap'd using gem_mmap__device_coherent(). Therefore:

Reviewed-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
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Re: [igt-dev] [PATCH i-g-t 5/9] tests/kms_psr: Skip tests on mmap_gtt, if no mappable aperture

[Dixit, Ashutosh]

On Fri, 31 Jan 2020 09:31:05 -0800, Ramalingam C wrote:
>
> Due to non availability of the mappable aperture on discrete GPUs,
> skip the tests specific to mmap_gtt
>
> Signed-off-by: Ramalingam C <ramalingam.c@intel.com>
> ---
>  tests/kms_psr.c | 1 +
>  1 file changed, 1 insertion(+)
>
> diff --git a/tests/kms_psr.c b/tests/kms_psr.c
> index d9be87d927b2..13ed02f46ac4 100644
> --- a/tests/kms_psr.c
> +++ b/tests/kms_psr.c
> @@ -270,6 +270,7 @@ static void run_test(data_t *data)
>		expected = "GREEN";
>		break;
>	case MMAP_GTT:
> +		gem_require_mappable_ggtt(data->drm_fd);
>		ptr = gem_mmap__gtt(data->drm_fd, handle, data->mod_size,
>				    PROT_WRITE);
>		gem_set_domain(data->drm_fd, handle,

This test is actually using tiling (using LOCAL_I915_FORMAT_MOD_X_TILED) so
probably more than this needs to be skipped?
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Re: [igt-dev] [PATCH i-g-t 6/9] tests/kms_available_modes_crc: Skip test if mappable aperture not supported

[Dixit, Ashutosh]

On Fri, 31 Jan 2020 09:31:06 -0800, Ramalingam C wrote:
>
> If the mappable aperture is not supported, skip the test.
>
> Signed-off-by: Ramalingam C <ramalingam.c@intel.com>
> ---
>  tests/kms_available_modes_crc.c | 1 +
>  1 file changed, 1 insertion(+)
>
> diff --git a/tests/kms_available_modes_crc.c b/tests/kms_available_modes_crc.c
> index d1b7b51708b0..12761343459a 100644
> --- a/tests/kms_available_modes_crc.c
> +++ b/tests/kms_available_modes_crc.c
> @@ -448,6 +448,7 @@ igt_main
>	data.commit = data.display.is_atomic ? COMMIT_ATOMIC : COMMIT_LEGACY;
>
>	igt_subtest("available_mode_test_crc") {
> +		gem_require_mappable_ggtt(data.gfx_fd);
>		test_available_modes(&data);

The test uses tiling, mmap_gtt. So for now from what I can see it's ok to
skip till a different way if any is devised to fix these display tests:

Reviewed-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
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[igt-dev] ✗ Fi.CI.IGT: failure for Handling mmap_gtt

[Patchwork]

== Series Details ==

Series: Handling mmap_gtt
URL   : https://patchwork.freedesktop.org/series/72837/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_7853_full -> IGTPW_4065_full
====================================================

Summary
-------

  **FAILURE**

  Serious unknown changes coming with IGTPW_4065_full absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in IGTPW_4065_full, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4065/index.html

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in IGTPW_4065_full:

### IGT changes ###

#### Possible regressions ####

  * igt@kms_big_fb@x-tiled-64bpp-rotate-0:
    - shard-iclb:         [PASS][1] -> [SKIP][2] +1 similar issue
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7853/shard-iclb1/igt@kms_big_fb@x-tiled-64bpp-rotate-0.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4065/shard-iclb7/igt@kms_big_fb@x-tiled-64bpp-rotate-0.html

  
Known issues
------------

  Here are the changes found in IGTPW_4065_full that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@gem_ctx_persistence@idempotent:
    - shard-tglb:         [PASS][3] -> [SKIP][4] ([fdo#112179] / [i915#1099])
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7853/shard-tglb3/igt@gem_ctx_persistence@idempotent.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4065/shard-tglb7/igt@gem_ctx_persistence@idempotent.html
    - shard-apl:          [PASS][5] -> [SKIP][6] ([fdo#109271] / [i915#1099])
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7853/shard-apl1/igt@gem_ctx_persistence@idempotent.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4065/shard-apl3/igt@gem_ctx_persistence@idempotent.html
    - shard-glk:          [PASS][7] -> [SKIP][8] ([fdo#109271] / [i915#1099])
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7853/shard-glk9/igt@gem_ctx_persistence@idempotent.html
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4065/shard-glk7/igt@gem_ctx_persistence@idempotent.html
    - shard-iclb:         [PASS][9] -> [SKIP][10] ([fdo#112179] / [i915#1099])
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7853/shard-iclb5/igt@gem_ctx_persistence@idempotent.html
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4065/shard-iclb1/igt@gem_ctx_persistence@idempotent.html

  * igt@gem_exec_schedule@preempt-queue-chain-bsd2:
    - shard-iclb:         [PASS][11] -> [SKIP][12] ([fdo#109276]) +8 similar issues
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7853/shard-iclb4/igt@gem_exec_schedule@preempt-queue-chain-bsd2.html
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4065/shard-iclb8/igt@gem_exec_schedule@preempt-queue-chain-bsd2.html

  * igt@gem_exec_schedule@wide-bsd:
    - shard-iclb:         [PASS][13] -> [SKIP][14] ([fdo#112146]) +4 similar issues
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7853/shard-iclb6/igt@gem_exec_schedule@wide-bsd.html
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4065/shard-iclb2/igt@gem_exec_schedule@wide-bsd.html

  * igt@gem_partial_pwrite_pread@reads-snoop:
    - shard-snb:          [PASS][15] -> [DMESG-WARN][16] ([fdo#110789] / [i915#478])
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7853/shard-snb5/igt@gem_partial_pwrite_pread@reads-snoop.html
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4065/shard-snb5/igt@gem_partial_pwrite_pread@reads-snoop.html

  * igt@i915_pm_rps@reset:
    - shard-iclb:         [PASS][17] -> [FAIL][18] ([i915#413]) +1 similar issue
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7853/shard-iclb8/igt@i915_pm_rps@reset.html
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4065/shard-iclb5/igt@i915_pm_rps@reset.html

  * igt@kms_flip@flip-vs-suspend-interruptible:
    - shard-hsw:          [PASS][19] -> [INCOMPLETE][20] ([i915#61]) +1 similar issue
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7853/shard-hsw7/igt@kms_flip@flip-vs-suspend-interruptible.html
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4065/shard-hsw5/igt@kms_flip@flip-vs-suspend-interruptible.html

  * igt@kms_frontbuffer_tracking@fbc-suspend:
    - shard-apl:          [PASS][21] -> [DMESG-WARN][22] ([i915#180]) +1 similar issue
   [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7853/shard-apl8/igt@kms_frontbuffer_tracking@fbc-suspend.html
   [22]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4065/shard-apl4/igt@kms_frontbuffer_tracking@fbc-suspend.html

  * igt@kms_frontbuffer_tracking@psr-slowdraw:
    - shard-tglb:         [PASS][23] -> [SKIP][24] ([i915#668]) +5 similar issues
   [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7853/shard-tglb8/igt@kms_frontbuffer_tracking@psr-slowdraw.html
   [24]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4065/shard-tglb2/igt@kms_frontbuffer_tracking@psr-slowdraw.html

  * igt@kms_psr@psr2_cursor_mmap_gtt:
    - shard-iclb:         [PASS][25] -> [SKIP][26] ([fdo#109441])
   [25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7853/shard-iclb2/igt@kms_psr@psr2_cursor_mmap_gtt.html
   [26]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4065/shard-iclb6/igt@kms_psr@psr2_cursor_mmap_gtt.html

  * igt@perf_pmu@busy-no-semaphores-vcs1:
    - shard-iclb:         [PASS][27] -> [SKIP][28] ([fdo#112080]) +10 similar issues
   [27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7853/shard-iclb2/igt@perf_pmu@busy-no-semaphores-vcs1.html
   [28]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4065/shard-iclb7/igt@perf_pmu@busy-no-semaphores-vcs1.html

  
#### Possible fixes ####

  * igt@gem_ctx_isolation@rcs0-s3:
    - shard-apl:          [DMESG-WARN][29] ([i915#180]) -> [PASS][30] +2 similar issues
   [29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7853/shard-apl6/igt@gem_ctx_isolation@rcs0-s3.html
   [30]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4065/shard-apl8/igt@gem_ctx_isolation@rcs0-s3.html

  * {igt@gem_ctx_persistence@hang}:
    - shard-tglb:         [SKIP][31] ([i915#1099]) -> [PASS][32]
   [31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7853/shard-tglb3/igt@gem_ctx_persistence@hang.html
   [32]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4065/shard-tglb6/igt@gem_ctx_persistence@hang.html
    - shard-iclb:         [SKIP][33] ([i915#1099]) -> [PASS][34]
   [33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7853/shard-iclb2/igt@gem_ctx_persistence@hang.html
   [34]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4065/shard-iclb7/igt@gem_ctx_persistence@hang.html

  * igt@gem_ctx_persistence@processes:
    - shard-apl:          [SKIP][35] ([fdo#109271] / [i915#1099]) -> [PASS][36] +1 similar issue
   [35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7853/shard-apl7/igt@gem_ctx_persistence@processes.html
   [36]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4065/shard-apl2/igt@gem_ctx_persistence@processes.html
    - shard-iclb:         [SKIP][37] ([fdo#112179] / [i915#1099]) -> [PASS][38]
   [37]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7853/shard-iclb3/igt@gem_ctx_persistence@processes.html
   [38]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4065/shard-iclb5/igt@gem_ctx_persistence@processes.html
    - shard-glk:          [SKIP][39] ([fdo#109271] / [i915#1099]) -> [PASS][40] +1 similar issue
   [39]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7853/shard-glk1/igt@gem_ctx_persistence@processes.html
   [40]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4065/shard-glk4/igt@gem_ctx_persistence@processes.html
    - shard-tglb:         [SKIP][41] ([fdo#112179] / [i915#1099]) -> [PASS][42]
   [41]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7853/shard-tglb3/igt@gem_ctx_persistence@processes.html
   [42]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4065/shard-tglb5/igt@gem_ctx_persistence@processes.html

  * igt@gem_exec_parallel@vcs1-fds:
    - shard-iclb:         [SKIP][43] ([fdo#112080]) -> [PASS][44] +12 similar issues
   [43]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7853/shard-iclb6/igt@gem_exec_parallel@vcs1-fds.html
   [44]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4065/shard-iclb2/igt@gem_exec_parallel@vcs1-fds.html

  * igt@gem_exec_schedule@independent-bsd2:
    - shard-iclb:         [SKIP][45] ([fdo#109276]) -> [PASS][46] +23 similar issues
   [45]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7853/shard-iclb6/igt@gem_exec_schedule@independent-bsd2.html
   [46]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4065/shard-iclb2/igt@gem_exec_schedule@independent-bsd2.html

  * igt@gem_exec_schedule@pi-distinct-iova-bsd:
    - shard-iclb:         [SKIP][47] ([i915#677]) -> [PASS][48]
   [47]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7853/shard-iclb4/igt@gem_exec_schedule@pi-distinct-iova-bsd.html
   [48]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4065/shard-iclb3/igt@gem_exec_schedule@pi-distinct-iova-bsd.html

  * igt@gem_exec_schedule@preempt-other-chain-bsd:
    - shard-iclb:         [SKIP][49] ([fdo#112146]) -> [PASS][50] +1 similar issue
   [49]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7853/shard-iclb1/igt@gem_exec_schedule@preempt-other-chain-bsd.html
   [50]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4065/shard-iclb3/igt@gem_exec_schedule@preempt-other-chain-bsd.html

  * igt@i915_pm_dc@dc6-psr:
    - shard-iclb:         [FAIL][51] ([i915#454]) -> [PASS][52]
   [51]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7853/shard-iclb6/igt@i915_pm_dc@dc6-psr.html
   [52]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4065/shard-iclb7/igt@i915_pm_dc@dc6-psr.html

  * igt@kms_busy@basic-flip-pipe-a:
    - shard-tglb:         [DMESG-WARN][53] ([i915#402]) -> [PASS][54]
   [53]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7853/shard-tglb3/igt@kms_busy@basic-flip-pipe-a.html
   [54]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4065/shard-tglb7/igt@kms_busy@basic-flip-pipe-a.html

  * igt@kms_busy@extended-pageflip-modeset-hang-oldfb-render-pipe-b:
    - shard-glk:          [INCOMPLETE][55] ([CI#80] / [i915#58] / [k.org#198133]) -> [PASS][56]
   [55]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7853/shard-glk5/igt@kms_busy@extended-pageflip-modeset-hang-oldfb-render-pipe-b.html
   [56]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4065/shard-glk3/igt@kms_busy@extended-pageflip-modeset-hang-oldfb-render-pipe-b.html

  * igt@kms_draw_crc@draw-method-xrgb8888-blt-xtiled:
    - shard-glk:          [FAIL][57] ([i915#52] / [i915#54]) -> [PASS][58]
   [57]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7853/shard-glk4/igt@kms_draw_crc@draw-method-xrgb8888-blt-xtiled.html
   [58]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4065/shard-glk5/igt@kms_draw_crc@draw-method-xrgb8888-blt-xtiled.html

  * igt@kms_frontbuffer_tracking@fbc-rgb101010-draw-mmap-gtt:
    - shard-snb:          [DMESG-WARN][59] ([i915#478]) -> [PASS][60]
   [59]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7853/shard-snb6/igt@kms_frontbuffer_tracking@fbc-rgb101010-draw-mmap-gtt.html
   [60]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4065/shard-snb4/igt@kms_frontbuffer_tracking@fbc-rgb101010-draw-mmap-gtt.html

  * igt@kms_frontbuffer_tracking@fbc-suspend:
    - shard-kbl:          [DMESG-WARN][61] ([i915#180]) -> [PASS][62]
   [61]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7853/shard-kbl4/igt@kms_frontbuffer_tracking@fbc-suspend.html
   [62]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4065/shard-kbl2/igt@kms_frontbuffer_tracking@fbc-suspend.html

  * igt@kms_frontbuffer_tracking@fbcpsr-rgb565-draw-mmap-cpu:
    - shard-tglb:         [SKIP][63] ([i915#668]) -> [PASS][64] +14 similar issues
   [63]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7853/shard-tglb3/igt@kms_frontbuffer_tracking@fbcpsr-rgb565-draw-mmap-cpu.html
   [64]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4065/shard-tglb2/igt@kms_frontbuffer_tracking@fbcpsr-rgb565-draw-mmap-cpu.html

  * igt@kms_psr@psr2_sprite_plane_onoff:
    - shard-iclb:         [SKIP][65] ([fdo#109441]) -> [PASS][66]
   [65]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7853/shard-iclb1/igt@kms_psr@psr2_sprite_plane_onoff.html
   [66]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4065/shard-iclb2/igt@kms_psr@psr2_sprite_plane_onoff.html

  
#### Warnings ####

  * igt@runner@aborted:
    - shard-snb:          ([FAIL][67], [FAIL][68], [FAIL][69], [FAIL][70], [FAIL][71], [FAIL][72], [FAIL][73], [FAIL][74]) ([fdo#111870] / [i915#1077] / [i915#698]) -> ([FAIL][75], [FAIL][76], [FAIL][77], [FAIL][78], [FAIL][79], [FAIL][80], [FAIL][81], [FAIL][82]) ([fdo#111870] / [i915#1077])
   [67]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7853/shard-snb5/igt@runner@aborted.html
   [68]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7853/shard-snb4/igt@runner@aborted.html
   [69]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7853/shard-snb6/igt@runner@aborted.html
   [70]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7853/shard-snb2/igt@runner@aborted.html
   [71]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7853/shard-snb5/igt@runner@aborted.html
   [72]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7853/shard-snb6/igt@runner@aborted.html
   [73]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7853/shard-snb2/igt@runner@aborted.html
   [74]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7853/shard-snb2/igt@runner@aborted.html
   [75]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4065/shard-snb6/igt@runner@aborted.html
   [76]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4065/shard-snb5/igt@runner@aborted.html
   [77]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4065/shard-snb1/igt@runner@aborted.html
   [78]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4065/shard-snb6/igt@runner@aborted.html
   [79]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4065/shard-snb5/igt@runner@aborted.html
   [80]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4065/shard-snb1/igt@runner@aborted.html
   [81]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4065/shard-snb5/igt@runner@aborted.html
   [82]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4065/shard-snb2/igt@runner@aborted.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [CI#80]: https://gitlab.freedesktop.org/gfx-ci/i915-infra/issues/80
  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [fdo#109276]: https://bugs.freedesktop.org/show_bug.cgi?id=109276
  [fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441
  [fdo#110789]: https://bugs.freedesktop.org/show_bug.cgi?id=110789
  [fdo#111870]: https://bugs.freedesktop.org/show_bug.cgi?id=111870
  [fdo#112080]: https://bugs.freedesktop.org/show_bug.cgi?id=112080
  [fdo#112146]: https://bugs.freedesktop.org/show_bug.cgi?id=112146
  [fdo#112179]: https://bugs.freedesktop.org/show_bug.cgi?id=112179
  [i915#1077]: https://gitlab.freedesktop.org/drm/intel/issues/1077
  [i915#1099]: https://gitlab.freedesktop.org/drm/intel/issues/1099
  [i915#180]: https://gitlab.freedesktop.org/drm/intel/issues/180
  [i915#402]: https://gitlab.freedesktop.org/drm/intel/issues/402
  [i915#413]: https://gitlab.freedesktop.org/drm/intel/issues/413
  [i915#454]: https://gitlab.freedesktop.org/drm/intel/issues/454
  [i915#478]: https://gitlab.freedesktop.org/drm/intel/issues/478
  [i915#52]: https://gitlab.freedesktop.org/drm/intel/issues/52
  [i915#54]: https://gitlab.freedesktop.org/drm/intel/issues/54
  [i915#58]: https://gitlab.freedesktop.org/drm/intel/issues/58
  [i915#61]: https://gitlab.freedesktop.org/drm/intel/issues/61
  [i915#668]: https://gitlab.freedesktop.org/drm/intel/issues/668
  [i915#677]: https://gitlab.freedesktop.org/drm/intel/issues/677
  [i915#698]: https://gitlab.freedesktop.org/drm/intel/issues/698
  [k.org#198133]: https://bugzilla.kernel.org/show_bug.cgi?id=198133


Participating hosts (10 -> 8)
------------------------------

  Missing    (2): pig-skl-6260u pig-glk-j5005 


Build changes
-------------

  * CI: CI-20190529 -> None
  * IGT: IGT_5409 -> IGTPW_4065
  * Piglit: piglit_4509 -> None

  CI-20190529: 20190529
  CI_DRM_7853: 1df04205c16923e525efe9c26d6e98612d38c9b3 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGTPW_4065: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4065/index.html
  IGT_5409: 93aefe6baa3fabf8c0cabe83e185f7b8f8d8753d @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4065/index.html
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Re: [igt-dev] [PATCH i-g-t 7/9] tests/i915_pm_rpm: use device coherent mapping instead of mmap_gtt

[Dixit, Ashutosh]

On Fri, 31 Jan 2020 09:31:07 -0800, Ramalingam C wrote:
>
> Since on new discrete GPUs we dont have the mappable aperture, if that
> is acceptable for the test purpose, we should use GEM_MMAP_OFFSET.
> Hence using gem_mmap_device_coherent() which wraps the mmap options in
> the order of gem_mmap_offset / gem_mmap / mmap_gtt
>
> Incase of fencing/gtt related tests, we mandate the existance of the
> mmap_gtt.
>
> Signed-off-by: Ramalingam C <ramalingam.c@intel.com>
> ---
>  tests/i915/i915_pm_rpm.c | 24 +++++++++++++++---------
>  1 file changed, 15 insertions(+), 9 deletions(-)
>
> diff --git a/tests/i915/i915_pm_rpm.c b/tests/i915/i915_pm_rpm.c
> index f5f813c3d952..9524d7d3a4dd 100644
> --- a/tests/i915/i915_pm_rpm.c
> +++ b/tests/i915/i915_pm_rpm.c
> @@ -1392,8 +1392,8 @@ static void gem_evict_pwrite_subtest(void)
>
>	for (n = 0; n < num_trash_bos; n++) {
>		trash_bos[n].handle = gem_create(drm_fd, 1024*1024);
> -		trash_bos[n].ptr = gem_mmap__gtt(drm_fd, trash_bos[n].handle,
> -						 1024*1024, PROT_WRITE);
> +		trash_bos[n].ptr = gem_mmap__device_coherent(drm_fd, trash_bos[n].handle,
> +							     0, 1024*1024, PROT_WRITE);
>		*trash_bos[n].ptr = 0;
>	}

What does gem_mappable_aperture_size() just above return when we don't have
a mappable aperture? Maybe this also needs to be skipped instead?

> @@ -1535,7 +1535,7 @@ static void fill_igt_fb(struct igt_fb *fb, uint32_t color)
>	int i;
>	uint32_t *ptr;
>
> -	ptr = gem_mmap__gtt(drm_fd, fb->gem_handle, fb->size, PROT_WRITE);
> +	ptr = gem_mmap__device_coherent(drm_fd, fb->gem_handle, 0, fb->size, PROT_WRITE);
>	for (i = 0; i < fb->size/sizeof(uint32_t); i++)
>		ptr[i] = color;
>	igt_assert(munmap(ptr, fb->size) == 0);

Even though fill_igt_fb() is called with tiling set, I think it is still ok
to do this since all we are doing is filling a solid color for which tiling
is immaterial.

> @@ -1827,8 +1827,8 @@ static void pm_test_tiling(void)
>		for (j = 0, k = 1 << off_bit;
>		     k <= gtt_obj_max_size; k <<= 1, j++) {
>			handles[j] = gem_create(drm_fd, k);
> -			gem_bufs[j] = gem_mmap__gtt(drm_fd, handles[j],
> -						    k, PROT_WRITE);
> +			gem_bufs[j] = gem_mmap__device_coherent(drm_fd, handles[j],
> +								0, k, PROT_WRITE);
>			memset(gem_bufs[j], 0x0, k);
>		}

Maybe we should skip this instead because set/get tiling calls below will
fail/assert?

> @@ -1872,7 +1872,7 @@ static void pm_test_caching(void)
>
>	handle = gem_create(drm_fd, gtt_obj_max_size);
>	default_cache_level = gem_get_caching(drm_fd, handle);
> -	gem_buf = gem_mmap__gtt(drm_fd, handle, gtt_obj_max_size, PROT_WRITE);
> +	gem_buf = gem_mmap__device_coherent(drm_fd, handle, 0, gtt_obj_max_size, PROT_WRITE);
>
>	for (i = 0; i < ARRAY_SIZE(cache_levels); i++) {
>		igt_assert(wait_for_suspended());

Does the test work ok or assert with this change? Also I am not sure but
from the comments it seems the purpose of the test is to really do with
GGTT so it should be skipped when we don't have aperture?

> @@ -2016,8 +2016,10 @@ igt_main_args("", long_options, help_str, opt_handler, NULL)
>	/* GEM */
>	igt_subtest("gem-mmap-cpu")
>		gem_mmap_subtest(false);
> -	igt_subtest("gem-mmap-gtt")
> +	igt_subtest("gem-mmap-gtt") {
> +		gem_require_mappable_ggtt(drm_fd);
>		gem_mmap_subtest(true);
> +	}
>	igt_subtest("gem-pread")
>		gem_pread_subtest();
>	igt_subtest("gem-execbuf")
> @@ -2058,10 +2060,14 @@ igt_main_args("", long_options, help_str, opt_handler, NULL)
>		dpms_mode_unset_subtest(SCREEN_TYPE_LPSP);
>	igt_subtest("dpms-mode-unset-non-lpsp")
>		dpms_mode_unset_subtest(SCREEN_TYPE_NON_LPSP);
> -	igt_subtest("fences")
> +	igt_subtest("fences") {
> +		gem_require_mappable_ggtt(drm_fd);
>		fences_subtest(false);
> -	igt_subtest("fences-dpms")
> +	}
> +	igt_subtest("fences-dpms") {
> +		gem_require_mappable_ggtt(drm_fd);
>		fences_subtest(true);
> +	}

These skips look ok to me.
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Re: [igt-dev] [PATCH i-g-t 9/9] tests/gem_tiling_max_stride: Skip if set tiling is not supported

[Antonio Argenziano]

On 31/01/20 09:31, Ramalingam C wrote:
> When mmapable aperture is not supported set tiling also not supported.
> Hence skip the test.
> 
> Signed-off-by: Ramalingam C <ramalingam.c@intel.com>
> ---
>   tests/i915/gem_tiling_max_stride.c | 1 +
>   1 file changed, 1 insertion(+)
> 
> diff --git a/tests/i915/gem_tiling_max_stride.c b/tests/i915/gem_tiling_max_stride.c
> index 0e99d979f0ca..77f7223ba19b 100644
> --- a/tests/i915/gem_tiling_max_stride.c
> +++ b/tests/i915/gem_tiling_max_stride.c
> @@ -71,6 +71,7 @@ igt_simple_main
>   	fd = drm_open_driver(DRIVER_INTEL);
>   
>   	devid = intel_get_drm_devid(fd);
> +	gem_require_mappable_ggtt(fd);

AFAICT it would not work without tiled access.

Acked-by: Antonio Argenziano <antonio.argenziano@intel.com>

>   
>   	if (intel_gen(devid) >= 7) {
>   		stride = 256 * 1024;
> 
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Re: [igt-dev] [PATCH i-g-t 9/9] tests/gem_tiling_max_stride: Skip if set tiling is not supported

[Dixit, Ashutosh]

On Tue, 04 Feb 2020 16:43:01 -0800, Antonio Argenziano wrote:
> On 31/01/20 09:31, Ramalingam C wrote:
> > When mmapable aperture is not supported set tiling also not supported.
> > Hence skip the test.
> >
> > Signed-off-by: Ramalingam C <ramalingam.c@intel.com>
> > ---
> >   tests/i915/gem_tiling_max_stride.c | 1 +
> >   1 file changed, 1 insertion(+)
> >
> > diff --git a/tests/i915/gem_tiling_max_stride.c b/tests/i915/gem_tiling_max_stride.c
> > index 0e99d979f0ca..77f7223ba19b 100644
> > --- a/tests/i915/gem_tiling_max_stride.c
> > +++ b/tests/i915/gem_tiling_max_stride.c
> > @@ -71,6 +71,7 @@ igt_simple_main
> >	fd = drm_open_driver(DRIVER_INTEL);
> >		devid = intel_get_drm_devid(fd);
> > +	gem_require_mappable_ggtt(fd);
>
> AFAICT it would not work without tiled access.
>
> Acked-by: Antonio Argenziano <antonio.argenziano@intel.com>

Agreed:

Reviewed-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
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Re: [igt-dev] [PATCH i-g-t 8/9] tests/i915_suspend: skip fence related tests, if no mmap_gtt

[Dixit, Ashutosh]

On Fri, 31 Jan 2020 09:31:08 -0800, Ramalingam C wrote:
>
> When mappable aperture is not available, skip the fencing related tests.
>
> Signed-off-by: Ramalingam C <ramalingam.c@intel.com>
> ---
>  tests/i915/i915_suspend.c | 16 ++++++++++++----
>  1 file changed, 12 insertions(+), 4 deletions(-)
>
> diff --git a/tests/i915/i915_suspend.c b/tests/i915/i915_suspend.c
> index 5a2ec76699d6..47e134b12086 100644
> --- a/tests/i915/i915_suspend.c
> +++ b/tests/i915/i915_suspend.c
> @@ -208,11 +208,15 @@ igt_main
>	igt_fixture
>		fd = drm_open_driver(DRIVER_INTEL);
>
> -	igt_subtest("fence-restore-tiled2untiled")
> +	igt_subtest("fence-restore-tiled2untiled") {
> +		gem_require_mappable_ggtt(fd);
>		test_fence_restore(fd, true, false);
> +	}
>
> -	igt_subtest("fence-restore-untiled")
> +	igt_subtest("fence-restore-untiled") {
> +		gem_require_mappable_ggtt(fd);
>		test_fence_restore(fd, false, false);
> +	}
>
>	igt_subtest("debugfs-reader")
>		test_debugfs_reader(fd, false);
> @@ -226,11 +230,15 @@ igt_main
>	igt_subtest("forcewake")
>		test_forcewake(fd, false);
>
> -	igt_subtest("fence-restore-tiled2untiled-hibernate")
> +	igt_subtest("fence-restore-tiled2untiled-hibernate") {
> +		gem_require_mappable_ggtt(fd);
>		test_fence_restore(fd, true, true);
> +	}
>
> -	igt_subtest("fence-restore-untiled-hibernate")
> +	igt_subtest("fence-restore-untiled-hibernate") {
> +		gem_require_mappable_ggtt(fd);
>		test_fence_restore(fd, false, true);
> +	}

Afaict test_fence_restore() is intimately related with gtt and tiling. So
skipping makes sense:

Reviewed-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
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Re: [igt-dev] [PATCH i-g-t 7/9] tests/i915_pm_rpm: use device coherent mapping instead of mmap_gtt

[Ramalingam C]

On 2020-02-04 at 16:16:38 -0800, Dixit, Ashutosh wrote:
> On Fri, 31 Jan 2020 09:31:07 -0800, Ramalingam C wrote:
> >
> > Since on new discrete GPUs we dont have the mappable aperture, if that
> > is acceptable for the test purpose, we should use GEM_MMAP_OFFSET.
> > Hence using gem_mmap_device_coherent() which wraps the mmap options in
> > the order of gem_mmap_offset / gem_mmap / mmap_gtt
> >
> > Incase of fencing/gtt related tests, we mandate the existance of the
> > mmap_gtt.
> >
> > Signed-off-by: Ramalingam C <ramalingam.c@intel.com>
> > ---
> >  tests/i915/i915_pm_rpm.c | 24 +++++++++++++++---------
> >  1 file changed, 15 insertions(+), 9 deletions(-)
> >
> > diff --git a/tests/i915/i915_pm_rpm.c b/tests/i915/i915_pm_rpm.c
> > index f5f813c3d952..9524d7d3a4dd 100644
> > --- a/tests/i915/i915_pm_rpm.c
> > +++ b/tests/i915/i915_pm_rpm.c
> > @@ -1392,8 +1392,8 @@ static void gem_evict_pwrite_subtest(void)
> >
> >	for (n = 0; n < num_trash_bos; n++) {
> >		trash_bos[n].handle = gem_create(drm_fd, 1024*1024);
> > -		trash_bos[n].ptr = gem_mmap__gtt(drm_fd, trash_bos[n].handle,
> > -						 1024*1024, PROT_WRITE);
> > +		trash_bos[n].ptr = gem_mmap__device_coherent(drm_fd, trash_bos[n].handle,
> > +							     0, 1024*1024, PROT_WRITE);
> >		*trash_bos[n].ptr = 0;
> >	}
> 
> What does gem_mappable_aperture_size() just above return when we don't have
> a mappable aperture? Maybe this also needs to be skipped instead?
Actually the tests are skipped because igt_pm_dmc_loaded(debugfs) is
failing at setup_environment. So all gtt related cases are hidden. But
yes this has to be skipped as aperture size is used or rewritten for
display. For now I am choosing the skipping path.
> 
> > @@ -1535,7 +1535,7 @@ static void fill_igt_fb(struct igt_fb *fb, uint32_t color)
> >	int i;
> >	uint32_t *ptr;
> >
> > -	ptr = gem_mmap__gtt(drm_fd, fb->gem_handle, fb->size, PROT_WRITE);
> > +	ptr = gem_mmap__device_coherent(drm_fd, fb->gem_handle, 0, fb->size, PROT_WRITE);
> >	for (i = 0; i < fb->size/sizeof(uint32_t); i++)
> >		ptr[i] = color;
> >	igt_assert(munmap(ptr, fb->size) == 0);
> 
> Even though fill_igt_fb() is called with tiling set, I think it is still ok
> to do this since all we are doing is filling a solid color for which tiling
> is immaterial.
> 
> > @@ -1827,8 +1827,8 @@ static void pm_test_tiling(void)
> >		for (j = 0, k = 1 << off_bit;
> >		     k <= gtt_obj_max_size; k <<= 1, j++) {
> >			handles[j] = gem_create(drm_fd, k);
> > -			gem_bufs[j] = gem_mmap__gtt(drm_fd, handles[j],
> > -						    k, PROT_WRITE);
> > +			gem_bufs[j] = gem_mmap__device_coherent(drm_fd, handles[j],
> > +								0, k, PROT_WRITE);
> >			memset(gem_bufs[j], 0x0, k);
> >		}
> 
> Maybe we should skip this instead because set/get tiling calls below will
> fail/assert?
Yes I will skip.
> 
> > @@ -1872,7 +1872,7 @@ static void pm_test_caching(void)
> >
> >	handle = gem_create(drm_fd, gtt_obj_max_size);
> >	default_cache_level = gem_get_caching(drm_fd, handle);
> > -	gem_buf = gem_mmap__gtt(drm_fd, handle, gtt_obj_max_size, PROT_WRITE);
> > +	gem_buf = gem_mmap__device_coherent(drm_fd, handle, 0, gtt_obj_max_size, PROT_WRITE);
> >
> >	for (i = 0; i < ARRAY_SIZE(cache_levels); i++) {
> >		igt_assert(wait_for_suspended());
> 
> Does the test work ok or assert with this change? Also I am not sure but
> from the comments it seems the purpose of the test is to really do with
> GGTT so it should be skipped when we don't have aperture?
since all tests are skipping, I am not sure about the functional impact.
True comments talk about GGTT mapping. Better skip as of now. I will do
the changes

Ram
> 
> > @@ -2016,8 +2016,10 @@ igt_main_args("", long_options, help_str, opt_handler, NULL)
> >	/* GEM */
> >	igt_subtest("gem-mmap-cpu")
> >		gem_mmap_subtest(false);
> > -	igt_subtest("gem-mmap-gtt")
> > +	igt_subtest("gem-mmap-gtt") {
> > +		gem_require_mappable_ggtt(drm_fd);
> >		gem_mmap_subtest(true);
> > +	}
> >	igt_subtest("gem-pread")
> >		gem_pread_subtest();
> >	igt_subtest("gem-execbuf")
> > @@ -2058,10 +2060,14 @@ igt_main_args("", long_options, help_str, opt_handler, NULL)
> >		dpms_mode_unset_subtest(SCREEN_TYPE_LPSP);
> >	igt_subtest("dpms-mode-unset-non-lpsp")
> >		dpms_mode_unset_subtest(SCREEN_TYPE_NON_LPSP);
> > -	igt_subtest("fences")
> > +	igt_subtest("fences") {
> > +		gem_require_mappable_ggtt(drm_fd);
> >		fences_subtest(false);
> > -	igt_subtest("fences-dpms")
> > +	}
> > +	igt_subtest("fences-dpms") {
> > +		gem_require_mappable_ggtt(drm_fd);
> >		fences_subtest(true);
> > +	}
> 
> These skips look ok to me.
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Re: [igt-dev] [PATCH i-g-t 5/9] tests/kms_psr: Skip tests on mmap_gtt, if no mappable aperture

[Dixit, Ashutosh]

On Mon, 03 Feb 2020 22:38:59 -0800, Dixit, Ashutosh wrote:
>
> On Fri, 31 Jan 2020 09:31:05 -0800, Ramalingam C wrote:
> >
> > Due to non availability of the mappable aperture on discrete GPUs,
> > skip the tests specific to mmap_gtt
> >
> > Signed-off-by: Ramalingam C <ramalingam.c@intel.com>
> > ---
> >  tests/kms_psr.c | 1 +
> >  1 file changed, 1 insertion(+)
> >
> > diff --git a/tests/kms_psr.c b/tests/kms_psr.c
> > index d9be87d927b2..13ed02f46ac4 100644
> > --- a/tests/kms_psr.c
> > +++ b/tests/kms_psr.c
> > @@ -270,6 +270,7 @@ static void run_test(data_t *data)
> >		expected = "GREEN";
> >		break;
> >	case MMAP_GTT:
> > +		gem_require_mappable_ggtt(data->drm_fd);
> >		ptr = gem_mmap__gtt(data->drm_fd, handle, data->mod_size,
> >				    PROT_WRITE);
> >		gem_set_domain(data->drm_fd, handle,
>
> This test is actually using tiling (using LOCAL_I915_FORMAT_MOD_X_TILED) so
> probably more than this needs to be skipped?

Sorry, my earlier assessment was incorrect:

Reviewed-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
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