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* [Intel-gfx] [PATCH 1/3] drm/i915/display: Defer application of initial chv_phy_control
@ 2020-02-03  9:31 Chris Wilson
  2020-02-03  9:31 ` [Intel-gfx] [PATCH 2/3] drm/i915/display: Fix NULL-crtc deref in calc_min_cdclk() Chris Wilson
                   ` (5 more replies)
  0 siblings, 6 replies; 9+ messages in thread
From: Chris Wilson @ 2020-02-03  9:31 UTC (permalink / raw)
  To: intel-gfx; +Cc: jani.nikula

To write to the DISPLAY_PHY_CONTROL requires holding the powerwells,
which during early resume we have not yet acquired until later in
intel_display_power_init_hw(). So compute the initial chv_phy_control,
but leave the HW unset until we first acquire the powerwell.

<7> [120.055984] i915 0000:00:02.0: [drm:intel_power_domains_init_hw [i915]] rawclk rate: 200000 kHz
<4> [120.056381] ------------[ cut here ]------------
<4> [120.056621] i915 0000:00:02.0: Unclaimed write to register 0x1e0100
<4> [120.056924] WARNING: CPU: 1 PID: 164 at drivers/gpu/drm/i915/intel_uncore.c:1166 __unclaimed_reg_debug+0x69/0x80 [i915]
<4> [120.056935] Modules linked in: vgem snd_hda_codec_hdmi snd_hda_codec_realtek snd_hda_codec_generic btusb btrtl btbcm btintel i915 bluetooth coretemp crct10dif_pclmul crc32_pclmul snd_hda_intel snd_intel_dspcfg snd_hda_codec ghash_clmulni_intel snd_hwdep ecdh_generic ecc snd_hda_core r8169 snd_pcm lpc_ich realtek pinctrl_cherryview i2c_designware_pci prime_numbers
<4> [120.057027] CPU: 1 PID: 164 Comm: kworker/u4:3 Tainted: G     U            5.5.0-CI-CI_DRM_7854+ #1
<4> [120.057038] Hardware name:  /NUC5CPYB, BIOS PYBSWCEL.86A.0055.2016.0812.1130 08/12/2016
<4> [120.057058] Workqueue: events_unbound async_run_entry_fn
<4> [120.057275] RIP: 0010:__unclaimed_reg_debug+0x69/0x80 [i915]
<4> [120.057289] Code: 48 8b 78 18 48 8b 5f 50 48 85 db 74 2d e8 1f a0 3f e1 45 89 e8 48 89 e9 48 89 da 48 89 c6 48 c7 c7 00 8c 48 a0 e8 67 82 df e0 <0f> 0b 83 2d ce e2 2b 00 01 5b 5d 41 5c 41 5d c3 48 8b 1f eb ce 66
<4> [120.057301] RSP: 0018:ffffc90000bcfd08 EFLAGS: 00010082
<4> [120.057315] RAX: 0000000000000000 RBX: ffff888079919b60 RCX: 0000000000000003
<4> [120.057326] RDX: 0000000080000003 RSI: 0000000000000000 RDI: 00000000ffffffff
<4> [120.057336] RBP: ffffffffa04c9f4e R08: 0000000000000000 R09: 0000000000000001
<4> [120.057348] R10: 0000000025c3d560 R11: 000000006815f798 R12: 0000000000000000
<4> [120.057359] R13: 00000000001e0100 R14: 0000000000000286 R15: ffffffff8234a76b
<4> [120.057371] FS:  0000000000000000(0000) GS:ffff888074b00000(0000) knlGS:0000000000000000
<4> [120.057382] CS:  0010 DS: 0000 ES: 0000 CR0: 0000000080050033
<4> [120.057393] CR2: 000055f4197df0d8 CR3: 000000006f326000 CR4: 00000000001006e0
<4> [120.057404] Call Trace:
<4> [120.057635]  fwtable_write32+0x114/0x1d0 [i915]
<4> [120.057892]  intel_power_domains_init_hw+0x4ff/0x650 [i915]
<4> [120.058150]  intel_power_domains_resume+0x3d/0x70 [i915]
<4> [120.058363]  i915_drm_resume_early+0x97/0xd0 [i915]
<4> [120.058575]  ? i915_resume_switcheroo+0x30/0x30 [i915]
<4> [120.058594]  dpm_run_callback+0x64/0x280
<4> [120.058626]  device_resume_early+0xa7/0xe0
<4> [120.058652]  async_resume_early+0x14/0x40

Closes: https://gitlab.freedesktop.org/drm/intel/issues/1089
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Imre Deak <imre.deak@intel.com>
---
 drivers/gpu/drm/i915/display/intel_display_power.c | 5 ++---
 1 file changed, 2 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c b/drivers/gpu/drm/i915/display/intel_display_power.c
index 64943179c05e..492668d5a193 100644
--- a/drivers/gpu/drm/i915/display/intel_display_power.c
+++ b/drivers/gpu/drm/i915/display/intel_display_power.c
@@ -5163,11 +5163,10 @@ static void chv_phy_control_init(struct drm_i915_private *dev_priv)
 		dev_priv->chv_phy_assert[DPIO_PHY1] = true;
 	}
 
-	intel_de_write(dev_priv, DISPLAY_PHY_CONTROL,
-		       dev_priv->chv_phy_control);
-
 	drm_dbg_kms(&dev_priv->drm, "Initial PHY_CONTROL=0x%08x\n",
 		    dev_priv->chv_phy_control);
+
+	/* Defer application of initial phy_control to enabling the powerwell */
 }
 
 static void vlv_cmnlane_wa(struct drm_i915_private *dev_priv)
-- 
2.25.0

_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply related	[flat|nested] 9+ messages in thread

* [Intel-gfx] [PATCH 2/3] drm/i915/display: Fix NULL-crtc deref in calc_min_cdclk()
  2020-02-03  9:31 [Intel-gfx] [PATCH 1/3] drm/i915/display: Defer application of initial chv_phy_control Chris Wilson
@ 2020-02-03  9:31 ` Chris Wilson
  2020-02-03  9:31 ` [Intel-gfx] [PATCH 3/3] drm/i915/audio: Skip the cdclk modeset if no pipes attached Chris Wilson
                   ` (4 subsequent siblings)
  5 siblings, 0 replies; 9+ messages in thread
From: Chris Wilson @ 2020-02-03  9:31 UTC (permalink / raw)
  To: intel-gfx; +Cc: jani.nikula

[   23.419442] BUG: KASAN: null-ptr-deref in intel_plane_calc_min_cdclk+0x82/0x440 [i915]
[   23.419527] Read of size 4 at addr 00000000000000f8 by task insmod/735
[   23.419578]
[   23.419644] CPU: 2 PID: 735 Comm: insmod Not tainted 5.5.0+ #114
[   23.419716] Hardware name: ��������������������������������� ���������������������������������/���������������������������������, BIOS RYBDWi35.86A.0246.2
[   23.419793] Call Trace:
[   23.419864]  dump_stack+0xef/0x16e
[   23.419927]  __kasan_report.cold+0x60/0x90
[   23.420157]  ? intel_plane_calc_min_cdclk+0x82/0x440 [i915]
[   23.420397]  intel_plane_calc_min_cdclk+0x82/0x440 [i915]
[   23.420630]  intel_atomic_check+0x455f/0x65a0 [i915]
[   23.420708]  ? mark_held_locks+0x90/0x90
[   23.420929]  ? intel_crtc_duplicate_state+0x2e/0x1b0 [i915]
[   23.421172]  ? intel_plane_duplicate_state+0x2d/0xc0 [i915]
[   23.421239]  ? __drm_dbg+0xa4/0x120
[   23.421303]  ? __kasan_kmalloc.constprop.0+0xc2/0xd0
[   23.421355]  ? __kmalloc_track_caller+0x23a/0x320
[   23.421602]  ? intel_calc_active_pipes+0x1c0/0x1c0 [i915]
[   23.421852]  sanitize_watermarks+0x220/0x510 [i915]
[   23.422092]  ? intel_atomic_check+0x65a0/0x65a0 [i915]
[   23.422164]  ? drm_modeset_unlock_all+0x88/0x130
[   23.422402]  intel_modeset_init+0x1b76/0x3c90 [i915]
[   23.422647]  ? intel_finish_reset+0x2d0/0x2d0 [i915]
[   23.422851]  ? intel_irq_install+0x12c/0x210 [i915]
[   23.423076]  i915_driver_probe+0x13e7/0x2930 [i915]

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/intel_atomic_plane.c | 11 ++++++-----
 1 file changed, 6 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_atomic_plane.c b/drivers/gpu/drm/i915/display/intel_atomic_plane.c
index 91ab6e2ab1fd..83505bd8ad80 100644
--- a/drivers/gpu/drm/i915/display/intel_atomic_plane.c
+++ b/drivers/gpu/drm/i915/display/intel_atomic_plane.c
@@ -165,14 +165,15 @@ int intel_plane_calc_min_cdclk(struct intel_atomic_state *state,
 		intel_atomic_get_new_plane_state(state, plane);
 	struct intel_crtc *crtc = to_intel_crtc(plane_state->hw.crtc);
 	const struct intel_cdclk_state *cdclk_state;
-	struct intel_crtc_state *new_crtc_state =
-		intel_atomic_get_new_crtc_state(state, crtc);
-	const struct intel_crtc_state *old_crtc_state =
-		intel_atomic_get_old_crtc_state(state, crtc);
+	const struct intel_crtc_state *old_crtc_state;
+	struct intel_crtc_state *new_crtc_state;
 
-	if (!plane_state->uapi.visible || !plane->min_cdclk)
+	if (!crtc || !plane_state->uapi.visible || !plane->min_cdclk)
 		return 0;
 
+	old_crtc_state = intel_atomic_get_old_crtc_state(state, crtc);
+	new_crtc_state = intel_atomic_get_new_crtc_state(state, crtc);
+
 	new_crtc_state->min_cdclk[plane->id] =
 		plane->min_cdclk(new_crtc_state, plane_state);
 
-- 
2.25.0

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply related	[flat|nested] 9+ messages in thread

* [Intel-gfx] [PATCH 3/3] drm/i915/audio: Skip the cdclk modeset if no pipes attached
  2020-02-03  9:31 [Intel-gfx] [PATCH 1/3] drm/i915/display: Defer application of initial chv_phy_control Chris Wilson
  2020-02-03  9:31 ` [Intel-gfx] [PATCH 2/3] drm/i915/display: Fix NULL-crtc deref in calc_min_cdclk() Chris Wilson
@ 2020-02-03  9:31 ` Chris Wilson
  2020-02-03  9:53 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/3] drm/i915/display: Defer application of initial chv_phy_control Patchwork
                   ` (3 subsequent siblings)
  5 siblings, 0 replies; 9+ messages in thread
From: Chris Wilson @ 2020-02-03  9:31 UTC (permalink / raw)
  To: intel-gfx; +Cc: jani.nikula

If the display is not driving any pipes, we cannot change the bclk and
doing so risks chasing NULL pointers:

<6> [278.907105] snd_hda_intel 0000:00:0e.0: DSP detected with PCI class/subclass/prog-if info 0x040100
<6> [278.909936] snd_hda_intel 0000:00:0e.0: bound 0000:00:02.0 (ops i915_audio_component_bind_ops [i915])
<7> [278.910078] i915 0000:00:02.0: [drm:intel_power_well_enable [i915]] enabling power well 2
<1> [278.910228] BUG: kernel NULL pointer dereference, address: 0000000000000080
<1> [278.910243] #PF: supervisor read access in kernel mode
<1> [278.910251] #PF: error_code(0x0000) - not-present page
<6> [278.910260] PGD 0 P4D 0
<4> [278.910267] Oops: 0000 [#1] PREEMPT SMP PTI
<4> [278.910276] CPU: 0 PID: 5 Comm: kworker/0:0 Tainted: G     U            5.5.0-CI-CI_DRM_7853+ #1
<4> [278.910289] Hardware name: Intel Corp. Geminilake/GLK RVP2 LP4SD (07), BIOS GELKRVPA.X64.0062.B30.1708222146 08/22/2017
<4> [278.910312] Workqueue: events azx_probe_work [snd_hda_intel]
<4> [278.910327] RIP: 0010:__ww_mutex_lock.constprop.15+0x5e/0x1090
<4> [278.910338] Code: 75 88 be a7 03 00 00 65 48 8b 04 25 28 00 00 00 48 89 45 c8 31 c0 4c 89 c3 e8 5e b3 6d ff 44 8b 3d 2f 24 37 02 45 85 ff 75 0a <4d> 3b 6d 58 0f 85 3f 07 00 00 48 85 db 74 22 49 8b 95 80 00 00 00
<4> [278.910362] RSP: 0018:ffffc9000008bc10 EFLAGS: 00010246
<4> [278.910371] RAX: 0000000000000246 RBX: ffffc9000008bd30 RCX: 0000000000000001
<4> [278.910382] RDX: 0000000000000000 RSI: ffffffff82647c60 RDI: ffff88817b27d848
<4> [278.910393] RBP: ffffc9000008bcc0 R08: 0000000000000000 R09: 0000000000000001
<4> [278.910404] R10: ffffc9000008bce0 R11: 0000000000000000 R12: ffffffff8168f0fc
<4> [278.910414] R13: 0000000000000028 R14: ffffc9000008bd60 R15: 0000000000000000
<4> [278.910425] FS:  0000000000000000(0000) GS:ffff88817bc00000(0000) knlGS:0000000000000000
<4> [278.910437] CS:  0010 DS: 0000 ES: 0000 CR0: 0000000080050033
<4> [278.910446] CR2: 0000000000000080 CR3: 00000001650da000 CR4: 0000000000340ef0
<4> [278.910456] Call Trace:
<4> [278.910468]  ? mark_held_locks+0x49/0x70
<4> [278.910479]  ? ww_mutex_lock+0x39/0x70
<4> [278.910487]  ww_mutex_lock+0x39/0x70
<4> [278.910497]  drm_modeset_lock+0x6c/0x120
<4> [278.910575]  glk_force_audio_cdclk+0x7d/0x140 [i915]
<4> [278.910656]  i915_audio_component_get_power+0xf2/0x110 [i915]
<4> [278.910673]  snd_hdac_display_power+0x7d/0x120 [snd_hda_core]
<4> [278.910686]  azx_probe_work+0x88/0x7e0 [snd_hda_intel]

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
---
 drivers/gpu/drm/i915/display/intel_audio.c | 15 ++++++++++-----
 1 file changed, 10 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_audio.c b/drivers/gpu/drm/i915/display/intel_audio.c
index 13833a7a8f27..a8ed58e29442 100644
--- a/drivers/gpu/drm/i915/display/intel_audio.c
+++ b/drivers/gpu/drm/i915/display/intel_audio.c
@@ -810,16 +810,14 @@ void intel_init_audio_hooks(struct drm_i915_private *dev_priv)
 	}
 }
 
-static int glk_force_audio_cdclk_commit(struct intel_atomic_state *state,
+static int glk_force_audio_cdclk_commit(struct intel_crtc *crtc,
+					struct intel_atomic_state *state,
 					bool enable)
 {
-	struct drm_i915_private *dev_priv = to_i915(state->base.dev);
 	struct intel_cdclk_state *cdclk_state;
-	struct intel_crtc *crtc;
 	int ret;
 
 	/* need to hold at least one crtc lock for the global state */
-	crtc = intel_get_crtc_for_pipe(dev_priv, PIPE_A);
 	ret = drm_modeset_lock(&crtc->base.mutex, state->base.acquire_ctx);
 	if (ret)
 		return ret;
@@ -843,8 +841,13 @@ static void glk_force_audio_cdclk(struct drm_i915_private *dev_priv,
 {
 	struct drm_modeset_acquire_ctx ctx;
 	struct drm_atomic_state *state;
+	struct intel_crtc *crtc;
 	int ret;
 
+	crtc = intel_get_crtc_for_pipe(dev_priv, PIPE_A);
+	if (!crtc)
+		return;
+
 	drm_modeset_acquire_init(&ctx, 0);
 	state = drm_atomic_state_alloc(&dev_priv->drm);
 	if (drm_WARN_ON(&dev_priv->drm, !state))
@@ -853,7 +856,9 @@ static void glk_force_audio_cdclk(struct drm_i915_private *dev_priv,
 	state->acquire_ctx = &ctx;
 
 retry:
-	ret = glk_force_audio_cdclk_commit(to_intel_atomic_state(state), enable);
+	ret = glk_force_audio_cdclk_commit(crtc,
+					   to_intel_atomic_state(state),
+					   enable);
 	if (ret == -EDEADLK) {
 		drm_atomic_state_clear(state);
 		drm_modeset_backoff(&ctx);
-- 
2.25.0

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply related	[flat|nested] 9+ messages in thread

* [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/3] drm/i915/display: Defer application of initial chv_phy_control
  2020-02-03  9:31 [Intel-gfx] [PATCH 1/3] drm/i915/display: Defer application of initial chv_phy_control Chris Wilson
  2020-02-03  9:31 ` [Intel-gfx] [PATCH 2/3] drm/i915/display: Fix NULL-crtc deref in calc_min_cdclk() Chris Wilson
  2020-02-03  9:31 ` [Intel-gfx] [PATCH 3/3] drm/i915/audio: Skip the cdclk modeset if no pipes attached Chris Wilson
@ 2020-02-03  9:53 ` Patchwork
  2020-02-03 10:29 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
                   ` (2 subsequent siblings)
  5 siblings, 0 replies; 9+ messages in thread
From: Patchwork @ 2020-02-03  9:53 UTC (permalink / raw)
  To: Chris Wilson; +Cc: intel-gfx

== Series Details ==

Series: series starting with [1/3] drm/i915/display: Defer application of initial chv_phy_control
URL   : https://patchwork.freedesktop.org/series/72905/
State : warning

== Summary ==

$ dim checkpatch origin/drm-tip
9599b1400368 drm/i915/display: Defer application of initial chv_phy_control
-:12: WARNING:COMMIT_LOG_LONG_LINE: Possible unwrapped commit description (prefer a maximum 75 chars per line)
#12: 
<7> [120.055984] i915 0000:00:02.0: [drm:intel_power_domains_init_hw [i915]] rawclk rate: 200000 kHz

total: 0 errors, 1 warnings, 0 checks, 13 lines checked
79cc55ca7ceb drm/i915/display: Fix NULL-crtc deref in calc_min_cdclk()
bfbeab6879a9 drm/i915/audio: Skip the cdclk modeset if no pipes attached
-:9: WARNING:COMMIT_LOG_LONG_LINE: Possible unwrapped commit description (prefer a maximum 75 chars per line)
#9: 
<6> [278.907105] snd_hda_intel 0000:00:0e.0: DSP detected with PCI class/subclass/prog-if info 0x040100

total: 0 errors, 1 warnings, 0 checks, 41 lines checked

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 9+ messages in thread

* [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/3] drm/i915/display: Defer application of initial chv_phy_control
  2020-02-03  9:31 [Intel-gfx] [PATCH 1/3] drm/i915/display: Defer application of initial chv_phy_control Chris Wilson
                   ` (2 preceding siblings ...)
  2020-02-03  9:53 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/3] drm/i915/display: Defer application of initial chv_phy_control Patchwork
@ 2020-02-03 10:29 ` Patchwork
  2020-02-03 13:17 ` [Intel-gfx] [PATCH 1/3] " Imre Deak
  2020-02-05 16:12 ` [Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/3] " Patchwork
  5 siblings, 0 replies; 9+ messages in thread
From: Patchwork @ 2020-02-03 10:29 UTC (permalink / raw)
  To: Chris Wilson; +Cc: intel-gfx

== Series Details ==

Series: series starting with [1/3] drm/i915/display: Defer application of initial chv_phy_control
URL   : https://patchwork.freedesktop.org/series/72905/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_7857 -> Patchwork_16389
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16389/index.html

Known issues
------------

  Here are the changes found in Patchwork_16389 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@kms_chamelium@hdmi-hpd-fast:
    - fi-icl-u2:          [PASS][1] -> [FAIL][2] ([i915#217])
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7857/fi-icl-u2/igt@kms_chamelium@hdmi-hpd-fast.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16389/fi-icl-u2/igt@kms_chamelium@hdmi-hpd-fast.html

  
#### Possible fixes ####

  * igt@gem_close_race@basic-threads:
    - fi-byt-j1900:       [TIMEOUT][3] ([fdo#112271] / [i915#1084] / [i915#816]) -> [PASS][4]
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7857/fi-byt-j1900/igt@gem_close_race@basic-threads.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16389/fi-byt-j1900/igt@gem_close_race@basic-threads.html

  * igt@gem_exec_suspend@basic-s0:
    - fi-bsw-kefka:       [TIMEOUT][5] ([i915#1089]) -> [PASS][6]
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7857/fi-bsw-kefka/igt@gem_exec_suspend@basic-s0.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16389/fi-bsw-kefka/igt@gem_exec_suspend@basic-s0.html

  * igt@i915_module_load@reload-no-display:
    - fi-glk-dsi:         [TIMEOUT][7] ([i915#1095]) -> [PASS][8]
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7857/fi-glk-dsi/igt@i915_module_load@reload-no-display.html
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16389/fi-glk-dsi/igt@i915_module_load@reload-no-display.html

  * igt@i915_selftest@live_gem_contexts:
    - fi-cfl-guc:         [INCOMPLETE][9] ([fdo#106070] / [i915#424]) -> [PASS][10]
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7857/fi-cfl-guc/igt@i915_selftest@live_gem_contexts.html
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16389/fi-cfl-guc/igt@i915_selftest@live_gem_contexts.html

  
#### Warnings ####

  * igt@i915_selftest@live_blt:
    - fi-hsw-4770r:       [DMESG-FAIL][11] ([i915#553] / [i915#725]) -> [DMESG-FAIL][12] ([i915#563])
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7857/fi-hsw-4770r/igt@i915_selftest@live_blt.html
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16389/fi-hsw-4770r/igt@i915_selftest@live_blt.html
    - fi-hsw-4770:        [DMESG-FAIL][13] ([i915#553] / [i915#725]) -> [DMESG-FAIL][14] ([i915#770])
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7857/fi-hsw-4770/igt@i915_selftest@live_blt.html
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16389/fi-hsw-4770/igt@i915_selftest@live_blt.html

  * igt@kms_chamelium@hdmi-hpd-fast:
    - fi-kbl-7500u:       [FAIL][15] ([fdo#111096] / [i915#323]) -> [FAIL][16] ([fdo#111407])
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7857/fi-kbl-7500u/igt@kms_chamelium@hdmi-hpd-fast.html
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16389/fi-kbl-7500u/igt@kms_chamelium@hdmi-hpd-fast.html

  
  [fdo#106070]: https://bugs.freedesktop.org/show_bug.cgi?id=106070
  [fdo#111096]: https://bugs.freedesktop.org/show_bug.cgi?id=111096
  [fdo#111407]: https://bugs.freedesktop.org/show_bug.cgi?id=111407
  [fdo#112271]: https://bugs.freedesktop.org/show_bug.cgi?id=112271
  [i915#1084]: https://gitlab.freedesktop.org/drm/intel/issues/1084
  [i915#1089]: https://gitlab.freedesktop.org/drm/intel/issues/1089
  [i915#1095]: https://gitlab.freedesktop.org/drm/intel/issues/1095
  [i915#217]: https://gitlab.freedesktop.org/drm/intel/issues/217
  [i915#323]: https://gitlab.freedesktop.org/drm/intel/issues/323
  [i915#424]: https://gitlab.freedesktop.org/drm/intel/issues/424
  [i915#553]: https://gitlab.freedesktop.org/drm/intel/issues/553
  [i915#563]: https://gitlab.freedesktop.org/drm/intel/issues/563
  [i915#725]: https://gitlab.freedesktop.org/drm/intel/issues/725
  [i915#770]: https://gitlab.freedesktop.org/drm/intel/issues/770
  [i915#816]: https://gitlab.freedesktop.org/drm/intel/issues/816


Participating hosts (47 -> 39)
------------------------------

  Additional (2): fi-bwr-2160 fi-bsw-nick 
  Missing    (10): fi-hsw-4200u fi-bsw-n3050 fi-hsw-peppy fi-byt-squawks fi-bsw-cyan fi-gdg-551 fi-blb-e6850 fi-byt-n2820 fi-byt-clapper fi-bdw-samus 


Build changes
-------------

  * CI: CI-20190529 -> None
  * Linux: CI_DRM_7857 -> Patchwork_16389

  CI-20190529: 20190529
  CI_DRM_7857: 8ec40a15b9a930df9e445f17c5e01cdb6f80353a @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_5411: 86c6ab8a0b6696bdb2153febd350af7fa02fbb00 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_16389: bfbeab6879a9d9ecad2399e41dd457eb8472d728 @ git://anongit.freedesktop.org/gfx-ci/linux


== Linux commits ==

bfbeab6879a9 drm/i915/audio: Skip the cdclk modeset if no pipes attached
79cc55ca7ceb drm/i915/display: Fix NULL-crtc deref in calc_min_cdclk()
9599b1400368 drm/i915/display: Defer application of initial chv_phy_control

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16389/index.html
_______________________________________________
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https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 9+ messages in thread

* Re: [Intel-gfx] [PATCH 1/3] drm/i915/display: Defer application of initial chv_phy_control
  2020-02-03  9:31 [Intel-gfx] [PATCH 1/3] drm/i915/display: Defer application of initial chv_phy_control Chris Wilson
                   ` (3 preceding siblings ...)
  2020-02-03 10:29 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
@ 2020-02-03 13:17 ` Imre Deak
  2020-02-03 13:26   ` Chris Wilson
  2020-02-05 16:12 ` [Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/3] " Patchwork
  5 siblings, 1 reply; 9+ messages in thread
From: Imre Deak @ 2020-02-03 13:17 UTC (permalink / raw)
  To: Chris Wilson; +Cc: jani.nikula, intel-gfx

On Mon, Feb 03, 2020 at 09:31:08AM +0000, Chris Wilson wrote:
> To write to the DISPLAY_PHY_CONTROL requires holding the powerwells,
> which during early resume we have not yet acquired until later in
> intel_display_power_init_hw(). So compute the initial chv_phy_control,
> but leave the HW unset until we first acquire the powerwell.
> 
> <7> [120.055984] i915 0000:00:02.0: [drm:intel_power_domains_init_hw [i915]] rawclk rate: 200000 kHz
> <4> [120.056381] ------------[ cut here ]------------
> <4> [120.056621] i915 0000:00:02.0: Unclaimed write to register 0x1e0100
> <4> [120.056924] WARNING: CPU: 1 PID: 164 at drivers/gpu/drm/i915/intel_uncore.c:1166 __unclaimed_reg_debug+0x69/0x80 [i915]
> <4> [120.056935] Modules linked in: vgem snd_hda_codec_hdmi snd_hda_codec_realtek snd_hda_codec_generic btusb btrtl btbcm btintel i915 bluetooth coretemp crct10dif_pclmul crc32_pclmul snd_hda_intel snd_intel_dspcfg snd_hda_codec ghash_clmulni_intel snd_hwdep ecdh_generic ecc snd_hda_core r8169 snd_pcm lpc_ich realtek pinctrl_cherryview i2c_designware_pci prime_numbers
> <4> [120.057027] CPU: 1 PID: 164 Comm: kworker/u4:3 Tainted: G     U            5.5.0-CI-CI_DRM_7854+ #1
> <4> [120.057038] Hardware name:  /NUC5CPYB, BIOS PYBSWCEL.86A.0055.2016.0812.1130 08/12/2016
> <4> [120.057058] Workqueue: events_unbound async_run_entry_fn
> <4> [120.057275] RIP: 0010:__unclaimed_reg_debug+0x69/0x80 [i915]
> <4> [120.057289] Code: 48 8b 78 18 48 8b 5f 50 48 85 db 74 2d e8 1f a0 3f e1 45 89 e8 48 89 e9 48 89 da 48 89 c6 48 c7 c7 00 8c 48 a0 e8 67 82 df e0 <0f> 0b 83 2d ce e2 2b 00 01 5b 5d 41 5c 41 5d c3 48 8b 1f eb ce 66
> <4> [120.057301] RSP: 0018:ffffc90000bcfd08 EFLAGS: 00010082
> <4> [120.057315] RAX: 0000000000000000 RBX: ffff888079919b60 RCX: 0000000000000003
> <4> [120.057326] RDX: 0000000080000003 RSI: 0000000000000000 RDI: 00000000ffffffff
> <4> [120.057336] RBP: ffffffffa04c9f4e R08: 0000000000000000 R09: 0000000000000001
> <4> [120.057348] R10: 0000000025c3d560 R11: 000000006815f798 R12: 0000000000000000
> <4> [120.057359] R13: 00000000001e0100 R14: 0000000000000286 R15: ffffffff8234a76b
> <4> [120.057371] FS:  0000000000000000(0000) GS:ffff888074b00000(0000) knlGS:0000000000000000
> <4> [120.057382] CS:  0010 DS: 0000 ES: 0000 CR0: 0000000080050033
> <4> [120.057393] CR2: 000055f4197df0d8 CR3: 000000006f326000 CR4: 00000000001006e0
> <4> [120.057404] Call Trace:
> <4> [120.057635]  fwtable_write32+0x114/0x1d0 [i915]
> <4> [120.057892]  intel_power_domains_init_hw+0x4ff/0x650 [i915]
> <4> [120.058150]  intel_power_domains_resume+0x3d/0x70 [i915]
> <4> [120.058363]  i915_drm_resume_early+0x97/0xd0 [i915]
> <4> [120.058575]  ? i915_resume_switcheroo+0x30/0x30 [i915]
> <4> [120.058594]  dpm_run_callback+0x64/0x280
> <4> [120.058626]  device_resume_early+0xa7/0xe0
> <4> [120.058652]  async_resume_early+0x14/0x40
> 
> Closes: https://gitlab.freedesktop.org/drm/intel/issues/1089
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Imre Deak <imre.deak@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_display_power.c | 5 ++---
>  1 file changed, 2 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c b/drivers/gpu/drm/i915/display/intel_display_power.c
> index 64943179c05e..492668d5a193 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_power.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_power.c
> @@ -5163,11 +5163,10 @@ static void chv_phy_control_init(struct drm_i915_private *dev_priv)
>  		dev_priv->chv_phy_assert[DPIO_PHY1] = true;
>  	}
>  
> -	intel_de_write(dev_priv, DISPLAY_PHY_CONTROL,
> -		       dev_priv->chv_phy_control);
> -
>  	drm_dbg_kms(&dev_priv->drm, "Initial PHY_CONTROL=0x%08x\n",
>  		    dev_priv->chv_phy_control);
> +
> +	/* Defer application of initial phy_control to enabling the powerwell */

Ok in case nothing was enabled, but if a cmn power well was enabled we
should still write it to enable power saving.

>  }
>  
>  static void vlv_cmnlane_wa(struct drm_i915_private *dev_priv)
> -- 
> 2.25.0
> 
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 9+ messages in thread

* Re: [Intel-gfx] [PATCH 1/3] drm/i915/display: Defer application of initial chv_phy_control
  2020-02-03 13:17 ` [Intel-gfx] [PATCH 1/3] " Imre Deak
@ 2020-02-03 13:26   ` Chris Wilson
  2020-02-03 14:14     ` Ville Syrjälä
  0 siblings, 1 reply; 9+ messages in thread
From: Chris Wilson @ 2020-02-03 13:26 UTC (permalink / raw)
  To: Imre Deak; +Cc: jani.nikula, intel-gfx

Quoting Imre Deak (2020-02-03 13:17:23)
> On Mon, Feb 03, 2020 at 09:31:08AM +0000, Chris Wilson wrote:
> > To write to the DISPLAY_PHY_CONTROL requires holding the powerwells,
> > which during early resume we have not yet acquired until later in
> > intel_display_power_init_hw(). So compute the initial chv_phy_control,
> > but leave the HW unset until we first acquire the powerwell.
> > 
> > <7> [120.055984] i915 0000:00:02.0: [drm:intel_power_domains_init_hw [i915]] rawclk rate: 200000 kHz
> > <4> [120.056381] ------------[ cut here ]------------
> > <4> [120.056621] i915 0000:00:02.0: Unclaimed write to register 0x1e0100
> > <4> [120.056924] WARNING: CPU: 1 PID: 164 at drivers/gpu/drm/i915/intel_uncore.c:1166 __unclaimed_reg_debug+0x69/0x80 [i915]
> > <4> [120.056935] Modules linked in: vgem snd_hda_codec_hdmi snd_hda_codec_realtek snd_hda_codec_generic btusb btrtl btbcm btintel i915 bluetooth coretemp crct10dif_pclmul crc32_pclmul snd_hda_intel snd_intel_dspcfg snd_hda_codec ghash_clmulni_intel snd_hwdep ecdh_generic ecc snd_hda_core r8169 snd_pcm lpc_ich realtek pinctrl_cherryview i2c_designware_pci prime_numbers
> > <4> [120.057027] CPU: 1 PID: 164 Comm: kworker/u4:3 Tainted: G     U            5.5.0-CI-CI_DRM_7854+ #1
> > <4> [120.057038] Hardware name:  /NUC5CPYB, BIOS PYBSWCEL.86A.0055.2016.0812.1130 08/12/2016
> > <4> [120.057058] Workqueue: events_unbound async_run_entry_fn
> > <4> [120.057275] RIP: 0010:__unclaimed_reg_debug+0x69/0x80 [i915]
> > <4> [120.057289] Code: 48 8b 78 18 48 8b 5f 50 48 85 db 74 2d e8 1f a0 3f e1 45 89 e8 48 89 e9 48 89 da 48 89 c6 48 c7 c7 00 8c 48 a0 e8 67 82 df e0 <0f> 0b 83 2d ce e2 2b 00 01 5b 5d 41 5c 41 5d c3 48 8b 1f eb ce 66
> > <4> [120.057301] RSP: 0018:ffffc90000bcfd08 EFLAGS: 00010082
> > <4> [120.057315] RAX: 0000000000000000 RBX: ffff888079919b60 RCX: 0000000000000003
> > <4> [120.057326] RDX: 0000000080000003 RSI: 0000000000000000 RDI: 00000000ffffffff
> > <4> [120.057336] RBP: ffffffffa04c9f4e R08: 0000000000000000 R09: 0000000000000001
> > <4> [120.057348] R10: 0000000025c3d560 R11: 000000006815f798 R12: 0000000000000000
> > <4> [120.057359] R13: 00000000001e0100 R14: 0000000000000286 R15: ffffffff8234a76b
> > <4> [120.057371] FS:  0000000000000000(0000) GS:ffff888074b00000(0000) knlGS:0000000000000000
> > <4> [120.057382] CS:  0010 DS: 0000 ES: 0000 CR0: 0000000080050033
> > <4> [120.057393] CR2: 000055f4197df0d8 CR3: 000000006f326000 CR4: 00000000001006e0
> > <4> [120.057404] Call Trace:
> > <4> [120.057635]  fwtable_write32+0x114/0x1d0 [i915]
> > <4> [120.057892]  intel_power_domains_init_hw+0x4ff/0x650 [i915]
> > <4> [120.058150]  intel_power_domains_resume+0x3d/0x70 [i915]
> > <4> [120.058363]  i915_drm_resume_early+0x97/0xd0 [i915]
> > <4> [120.058575]  ? i915_resume_switcheroo+0x30/0x30 [i915]
> > <4> [120.058594]  dpm_run_callback+0x64/0x280
> > <4> [120.058626]  device_resume_early+0xa7/0xe0
> > <4> [120.058652]  async_resume_early+0x14/0x40
> > 
> > Closes: https://gitlab.freedesktop.org/drm/intel/issues/1089
> > Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> > Cc: Imre Deak <imre.deak@intel.com>
> > ---
> >  drivers/gpu/drm/i915/display/intel_display_power.c | 5 ++---
> >  1 file changed, 2 insertions(+), 3 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c b/drivers/gpu/drm/i915/display/intel_display_power.c
> > index 64943179c05e..492668d5a193 100644
> > --- a/drivers/gpu/drm/i915/display/intel_display_power.c
> > +++ b/drivers/gpu/drm/i915/display/intel_display_power.c
> > @@ -5163,11 +5163,10 @@ static void chv_phy_control_init(struct drm_i915_private *dev_priv)
> >               dev_priv->chv_phy_assert[DPIO_PHY1] = true;
> >       }
> >  
> > -     intel_de_write(dev_priv, DISPLAY_PHY_CONTROL,
> > -                    dev_priv->chv_phy_control);
> > -
> >       drm_dbg_kms(&dev_priv->drm, "Initial PHY_CONTROL=0x%08x\n",
> >                   dev_priv->chv_phy_control);
> > +
> > +     /* Defer application of initial phy_control to enabling the powerwell */
> 
> Ok in case nothing was enabled, but if a cmn power well was enabled we
> should still write it to enable power saving.

Would that be a good candidate for sync_hw?
-Chris
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 9+ messages in thread

* Re: [Intel-gfx] [PATCH 1/3] drm/i915/display: Defer application of initial chv_phy_control
  2020-02-03 13:26   ` Chris Wilson
@ 2020-02-03 14:14     ` Ville Syrjälä
  0 siblings, 0 replies; 9+ messages in thread
From: Ville Syrjälä @ 2020-02-03 14:14 UTC (permalink / raw)
  To: Chris Wilson; +Cc: jani.nikula, intel-gfx

On Mon, Feb 03, 2020 at 01:26:01PM +0000, Chris Wilson wrote:
> Quoting Imre Deak (2020-02-03 13:17:23)
> > On Mon, Feb 03, 2020 at 09:31:08AM +0000, Chris Wilson wrote:
> > > To write to the DISPLAY_PHY_CONTROL requires holding the powerwells,
> > > which during early resume we have not yet acquired until later in
> > > intel_display_power_init_hw(). So compute the initial chv_phy_control,
> > > but leave the HW unset until we first acquire the powerwell.
> > > 
> > > <7> [120.055984] i915 0000:00:02.0: [drm:intel_power_domains_init_hw [i915]] rawclk rate: 200000 kHz
> > > <4> [120.056381] ------------[ cut here ]------------
> > > <4> [120.056621] i915 0000:00:02.0: Unclaimed write to register 0x1e0100
> > > <4> [120.056924] WARNING: CPU: 1 PID: 164 at drivers/gpu/drm/i915/intel_uncore.c:1166 __unclaimed_reg_debug+0x69/0x80 [i915]
> > > <4> [120.056935] Modules linked in: vgem snd_hda_codec_hdmi snd_hda_codec_realtek snd_hda_codec_generic btusb btrtl btbcm btintel i915 bluetooth coretemp crct10dif_pclmul crc32_pclmul snd_hda_intel snd_intel_dspcfg snd_hda_codec ghash_clmulni_intel snd_hwdep ecdh_generic ecc snd_hda_core r8169 snd_pcm lpc_ich realtek pinctrl_cherryview i2c_designware_pci prime_numbers
> > > <4> [120.057027] CPU: 1 PID: 164 Comm: kworker/u4:3 Tainted: G     U            5.5.0-CI-CI_DRM_7854+ #1
> > > <4> [120.057038] Hardware name:  /NUC5CPYB, BIOS PYBSWCEL.86A.0055.2016.0812.1130 08/12/2016
> > > <4> [120.057058] Workqueue: events_unbound async_run_entry_fn
> > > <4> [120.057275] RIP: 0010:__unclaimed_reg_debug+0x69/0x80 [i915]
> > > <4> [120.057289] Code: 48 8b 78 18 48 8b 5f 50 48 85 db 74 2d e8 1f a0 3f e1 45 89 e8 48 89 e9 48 89 da 48 89 c6 48 c7 c7 00 8c 48 a0 e8 67 82 df e0 <0f> 0b 83 2d ce e2 2b 00 01 5b 5d 41 5c 41 5d c3 48 8b 1f eb ce 66
> > > <4> [120.057301] RSP: 0018:ffffc90000bcfd08 EFLAGS: 00010082
> > > <4> [120.057315] RAX: 0000000000000000 RBX: ffff888079919b60 RCX: 0000000000000003
> > > <4> [120.057326] RDX: 0000000080000003 RSI: 0000000000000000 RDI: 00000000ffffffff
> > > <4> [120.057336] RBP: ffffffffa04c9f4e R08: 0000000000000000 R09: 0000000000000001
> > > <4> [120.057348] R10: 0000000025c3d560 R11: 000000006815f798 R12: 0000000000000000
> > > <4> [120.057359] R13: 00000000001e0100 R14: 0000000000000286 R15: ffffffff8234a76b
> > > <4> [120.057371] FS:  0000000000000000(0000) GS:ffff888074b00000(0000) knlGS:0000000000000000
> > > <4> [120.057382] CS:  0010 DS: 0000 ES: 0000 CR0: 0000000080050033
> > > <4> [120.057393] CR2: 000055f4197df0d8 CR3: 000000006f326000 CR4: 00000000001006e0
> > > <4> [120.057404] Call Trace:
> > > <4> [120.057635]  fwtable_write32+0x114/0x1d0 [i915]
> > > <4> [120.057892]  intel_power_domains_init_hw+0x4ff/0x650 [i915]
> > > <4> [120.058150]  intel_power_domains_resume+0x3d/0x70 [i915]
> > > <4> [120.058363]  i915_drm_resume_early+0x97/0xd0 [i915]
> > > <4> [120.058575]  ? i915_resume_switcheroo+0x30/0x30 [i915]
> > > <4> [120.058594]  dpm_run_callback+0x64/0x280
> > > <4> [120.058626]  device_resume_early+0xa7/0xe0
> > > <4> [120.058652]  async_resume_early+0x14/0x40
> > > 
> > > Closes: https://gitlab.freedesktop.org/drm/intel/issues/1089
> > > Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> > > Cc: Imre Deak <imre.deak@intel.com>
> > > ---
> > >  drivers/gpu/drm/i915/display/intel_display_power.c | 5 ++---
> > >  1 file changed, 2 insertions(+), 3 deletions(-)
> > > 
> > > diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c b/drivers/gpu/drm/i915/display/intel_display_power.c
> > > index 64943179c05e..492668d5a193 100644
> > > --- a/drivers/gpu/drm/i915/display/intel_display_power.c
> > > +++ b/drivers/gpu/drm/i915/display/intel_display_power.c
> > > @@ -5163,11 +5163,10 @@ static void chv_phy_control_init(struct drm_i915_private *dev_priv)
> > >               dev_priv->chv_phy_assert[DPIO_PHY1] = true;
> > >       }
> > >  
> > > -     intel_de_write(dev_priv, DISPLAY_PHY_CONTROL,
> > > -                    dev_priv->chv_phy_control);
> > > -
> > >       drm_dbg_kms(&dev_priv->drm, "Initial PHY_CONTROL=0x%08x\n",
> > >                   dev_priv->chv_phy_control);
> > > +
> > > +     /* Defer application of initial phy_control to enabling the powerwell */
> > 
> > Ok in case nothing was enabled, but if a cmn power well was enabled we
> > should still write it to enable power saving.
> 
> Would that be a good candidate for sync_hw?

Hmm, yeah moving the write into the chv pipe pw .sync_hw()
seems like a sensible idea to me.

-- 
Ville Syrjälä
Intel
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 9+ messages in thread

* [Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/3] drm/i915/display: Defer application of initial chv_phy_control
  2020-02-03  9:31 [Intel-gfx] [PATCH 1/3] drm/i915/display: Defer application of initial chv_phy_control Chris Wilson
                   ` (4 preceding siblings ...)
  2020-02-03 13:17 ` [Intel-gfx] [PATCH 1/3] " Imre Deak
@ 2020-02-05 16:12 ` Patchwork
  5 siblings, 0 replies; 9+ messages in thread
From: Patchwork @ 2020-02-05 16:12 UTC (permalink / raw)
  To: Chris Wilson; +Cc: intel-gfx

== Series Details ==

Series: series starting with [1/3] drm/i915/display: Defer application of initial chv_phy_control
URL   : https://patchwork.freedesktop.org/series/72905/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_7857_full -> Patchwork_16389_full
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  

Known issues
------------

  Here are the changes found in Patchwork_16389_full that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@gem_busy@busy-vcs1:
    - shard-iclb:         [PASS][1] -> [SKIP][2] ([fdo#112080]) +11 similar issues
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7857/shard-iclb4/igt@gem_busy@busy-vcs1.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16389/shard-iclb6/igt@gem_busy@busy-vcs1.html

  * igt@gem_ctx_isolation@rcs0-s3:
    - shard-kbl:          [PASS][3] -> [DMESG-WARN][4] ([i915#180]) +9 similar issues
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7857/shard-kbl6/igt@gem_ctx_isolation@rcs0-s3.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16389/shard-kbl4/igt@gem_ctx_isolation@rcs0-s3.html

  * igt@gem_exec_schedule@independent-bsd2:
    - shard-iclb:         [PASS][5] -> [SKIP][6] ([fdo#109276]) +20 similar issues
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7857/shard-iclb2/igt@gem_exec_schedule@independent-bsd2.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16389/shard-iclb7/igt@gem_exec_schedule@independent-bsd2.html

  * igt@gem_exec_schedule@reorder-wide-bsd:
    - shard-iclb:         [PASS][7] -> [SKIP][8] ([fdo#112146]) +7 similar issues
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7857/shard-iclb3/igt@gem_exec_schedule@reorder-wide-bsd.html
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16389/shard-iclb2/igt@gem_exec_schedule@reorder-wide-bsd.html

  * igt@gem_partial_pwrite_pread@write:
    - shard-hsw:          [PASS][9] -> [FAIL][10] ([i915#694])
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7857/shard-hsw5/igt@gem_partial_pwrite_pread@write.html
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16389/shard-hsw2/igt@gem_partial_pwrite_pread@write.html

  * igt@gem_softpin@noreloc-s3:
    - shard-apl:          [PASS][11] -> [DMESG-WARN][12] ([i915#180]) +2 similar issues
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7857/shard-apl3/igt@gem_softpin@noreloc-s3.html
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16389/shard-apl6/igt@gem_softpin@noreloc-s3.html

  * igt@gen9_exec_parse@allowed-single:
    - shard-skl:          [PASS][13] -> [TIMEOUT][14] ([i915#716])
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7857/shard-skl4/igt@gen9_exec_parse@allowed-single.html
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16389/shard-skl3/igt@gen9_exec_parse@allowed-single.html

  * igt@kms_color@pipe-b-ctm-0-5:
    - shard-skl:          [PASS][15] -> [DMESG-WARN][16] ([i915#109])
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7857/shard-skl2/igt@kms_color@pipe-b-ctm-0-5.html
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16389/shard-skl5/igt@kms_color@pipe-b-ctm-0-5.html

  * igt@kms_flip@2x-flip-vs-expired-vblank:
    - shard-glk:          [PASS][17] -> [FAIL][18] ([i915#79])
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7857/shard-glk3/igt@kms_flip@2x-flip-vs-expired-vblank.html
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16389/shard-glk8/igt@kms_flip@2x-flip-vs-expired-vblank.html

  * igt@kms_flip@flip-vs-expired-vblank-interruptible:
    - shard-skl:          [PASS][19] -> [FAIL][20] ([i915#79])
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7857/shard-skl10/igt@kms_flip@flip-vs-expired-vblank-interruptible.html
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16389/shard-skl6/igt@kms_flip@flip-vs-expired-vblank-interruptible.html

  * igt@kms_flip@plain-flip-fb-recreate-interruptible:
    - shard-skl:          [PASS][21] -> [FAIL][22] ([i915#34])
   [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7857/shard-skl6/igt@kms_flip@plain-flip-fb-recreate-interruptible.html
   [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16389/shard-skl10/igt@kms_flip@plain-flip-fb-recreate-interruptible.html

  * igt@kms_frontbuffer_tracking@psr-rgb101010-draw-blt:
    - shard-tglb:         [PASS][23] -> [SKIP][24] ([i915#668]) +5 similar issues
   [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7857/shard-tglb8/igt@kms_frontbuffer_tracking@psr-rgb101010-draw-blt.html
   [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16389/shard-tglb3/igt@kms_frontbuffer_tracking@psr-rgb101010-draw-blt.html

  * igt@kms_plane@pixel-format-pipe-b-planes-source-clamping:
    - shard-snb:          [PASS][25] -> [SKIP][26] ([fdo#109271])
   [25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7857/shard-snb1/igt@kms_plane@pixel-format-pipe-b-planes-source-clamping.html
   [26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16389/shard-snb1/igt@kms_plane@pixel-format-pipe-b-planes-source-clamping.html

  * igt@kms_plane_alpha_blend@pipe-b-constant-alpha-min:
    - shard-skl:          [PASS][27] -> [FAIL][28] ([fdo#108145])
   [27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7857/shard-skl6/igt@kms_plane_alpha_blend@pipe-b-constant-alpha-min.html
   [28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16389/shard-skl10/igt@kms_plane_alpha_blend@pipe-b-constant-alpha-min.html

  * igt@kms_plane_alpha_blend@pipe-b-coverage-7efc:
    - shard-skl:          [PASS][29] -> [FAIL][30] ([fdo#108145] / [i915#265])
   [29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7857/shard-skl7/igt@kms_plane_alpha_blend@pipe-b-coverage-7efc.html
   [30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16389/shard-skl7/igt@kms_plane_alpha_blend@pipe-b-coverage-7efc.html

  * igt@kms_psr@psr2_no_drrs:
    - shard-iclb:         [PASS][31] -> [SKIP][32] ([fdo#109441]) +3 similar issues
   [31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7857/shard-iclb2/igt@kms_psr@psr2_no_drrs.html
   [32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16389/shard-iclb4/igt@kms_psr@psr2_no_drrs.html

  * igt@kms_setmode@basic:
    - shard-apl:          [PASS][33] -> [FAIL][34] ([i915#31])
   [33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7857/shard-apl7/igt@kms_setmode@basic.html
   [34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16389/shard-apl1/igt@kms_setmode@basic.html
    - shard-skl:          [PASS][35] -> [FAIL][36] ([i915#31])
   [35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7857/shard-skl2/igt@kms_setmode@basic.html
   [36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16389/shard-skl5/igt@kms_setmode@basic.html

  * igt@prime_mmap_coherency@ioctl-errors:
    - shard-hsw:          [PASS][37] -> [FAIL][38] ([i915#831])
   [37]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7857/shard-hsw2/igt@prime_mmap_coherency@ioctl-errors.html
   [38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16389/shard-hsw2/igt@prime_mmap_coherency@ioctl-errors.html

  * igt@prime_mmap_coherency@read:
    - shard-hsw:          [PASS][39] -> [FAIL][40] ([i915#914])
   [39]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7857/shard-hsw7/igt@prime_mmap_coherency@read.html
   [40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16389/shard-hsw5/igt@prime_mmap_coherency@read.html

  
#### Possible fixes ####

  * igt@gem_exec_schedule@pi-userfault-bsd:
    - shard-iclb:         [SKIP][41] ([i915#677]) -> [PASS][42]
   [41]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7857/shard-iclb4/igt@gem_exec_schedule@pi-userfault-bsd.html
   [42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16389/shard-iclb6/igt@gem_exec_schedule@pi-userfault-bsd.html

  * igt@gem_exec_schedule@preempt-other-chain-bsd:
    - shard-iclb:         [SKIP][43] ([fdo#112146]) -> [PASS][44] +5 similar issues
   [43]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7857/shard-iclb2/igt@gem_exec_schedule@preempt-other-chain-bsd.html
   [44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16389/shard-iclb7/igt@gem_exec_schedule@preempt-other-chain-bsd.html

  * igt@gem_exec_schedule@preempt-queue-bsd2:
    - shard-iclb:         [SKIP][45] ([fdo#109276]) -> [PASS][46] +11 similar issues
   [45]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7857/shard-iclb5/igt@gem_exec_schedule@preempt-queue-bsd2.html
   [46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16389/shard-iclb1/igt@gem_exec_schedule@preempt-queue-bsd2.html

  * igt@gem_partial_pwrite_pread@reads-display:
    - shard-hsw:          [FAIL][47] ([i915#694]) -> [PASS][48]
   [47]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7857/shard-hsw7/igt@gem_partial_pwrite_pread@reads-display.html
   [48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16389/shard-hsw5/igt@gem_partial_pwrite_pread@reads-display.html

  * igt@gem_ppgtt@flink-and-close-vma-leak:
    - shard-glk:          [FAIL][49] ([i915#644]) -> [PASS][50]
   [49]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7857/shard-glk7/igt@gem_ppgtt@flink-and-close-vma-leak.html
   [50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16389/shard-glk2/igt@gem_ppgtt@flink-and-close-vma-leak.html

  * igt@i915_pm_rps@reset:
    - shard-tglb:         [FAIL][51] ([i915#413]) -> [PASS][52]
   [51]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7857/shard-tglb5/igt@i915_pm_rps@reset.html
   [52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16389/shard-tglb6/igt@i915_pm_rps@reset.html

  * igt@i915_pm_rps@waitboost:
    - shard-iclb:         [FAIL][53] ([i915#413]) -> [PASS][54]
   [53]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7857/shard-iclb6/igt@i915_pm_rps@waitboost.html
   [54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16389/shard-iclb4/igt@i915_pm_rps@waitboost.html

  * igt@i915_selftest@live_blt:
    - shard-hsw:          [DMESG-FAIL][55] ([i915#770]) -> [PASS][56]
   [55]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7857/shard-hsw1/igt@i915_selftest@live_blt.html
   [56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16389/shard-hsw4/igt@i915_selftest@live_blt.html

  * igt@i915_suspend@sysfs-reader:
    - shard-apl:          [DMESG-WARN][57] ([i915#180]) -> [PASS][58] +3 similar issues
   [57]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7857/shard-apl6/igt@i915_suspend@sysfs-reader.html
   [58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16389/shard-apl2/igt@i915_suspend@sysfs-reader.html

  * igt@kms_cursor_crc@pipe-a-cursor-suspend:
    - shard-kbl:          [DMESG-WARN][59] ([i915#180]) -> [PASS][60] +4 similar issues
   [59]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7857/shard-kbl2/igt@kms_cursor_crc@pipe-a-cursor-suspend.html
   [60]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16389/shard-kbl4/igt@kms_cursor_crc@pipe-a-cursor-suspend.html

  * igt@kms_flip@plain-flip-fb-recreate:
    - shard-skl:          [FAIL][61] ([i915#34]) -> [PASS][62]
   [61]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7857/shard-skl7/igt@kms_flip@plain-flip-fb-recreate.html
   [62]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16389/shard-skl7/igt@kms_flip@plain-flip-fb-recreate.html

  * igt@kms_frontbuffer_tracking@fbcpsr-1p-offscren-pri-shrfb-draw-pwrite:
    - shard-tglb:         [SKIP][63] ([i915#668]) -> [PASS][64] +3 similar issues
   [63]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7857/shard-tglb3/igt@kms_frontbuffer_tracking@fbcpsr-1p-offscren-pri-shrfb-draw-pwrite.html
   [64]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16389/shard-tglb6/igt@kms_frontbuffer_tracking@fbcpsr-1p-offscren-pri-shrfb-draw-pwrite.html

  * igt@kms_plane_alpha_blend@pipe-c-constant-alpha-min:
    - shard-skl:          [FAIL][65] ([fdo#108145]) -> [PASS][66]
   [65]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7857/shard-skl6/igt@kms_plane_alpha_blend@pipe-c-constant-alpha-min.html
   [66]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16389/shard-skl8/igt@kms_plane_alpha_blend@pipe-c-constant-alpha-min.html

  * igt@kms_plane_alpha_blend@pipe-c-coverage-7efc:
    - shard-skl:          [FAIL][67] ([fdo#108145] / [i915#265]) -> [PASS][68]
   [67]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7857/shard-skl8/igt@kms_plane_alpha_blend@pipe-c-coverage-7efc.html
   [68]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16389/shard-skl5/igt@kms_plane_alpha_blend@pipe-c-coverage-7efc.html

  * igt@kms_psr@psr2_sprite_mmap_cpu:
    - shard-iclb:         [SKIP][69] ([fdo#109441]) -> [PASS][70] +1 similar issue
   [69]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7857/shard-iclb7/igt@kms_psr@psr2_sprite_mmap_cpu.html
   [70]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16389/shard-iclb2/igt@kms_psr@psr2_sprite_mmap_cpu.html

  * igt@kms_vblank@pipe-b-ts-continuation-dpms-suspend:
    - shard-skl:          [INCOMPLETE][71] ([i915#69]) -> [PASS][72]
   [71]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7857/shard-skl8/igt@kms_vblank@pipe-b-ts-continuation-dpms-suspend.html
   [72]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16389/shard-skl6/igt@kms_vblank@pipe-b-ts-continuation-dpms-suspend.html

  * igt@perf_pmu@busy-no-semaphores-vcs1:
    - shard-iclb:         [SKIP][73] ([fdo#112080]) -> [PASS][74] +13 similar issues
   [73]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7857/shard-iclb6/igt@perf_pmu@busy-no-semaphores-vcs1.html
   [74]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16389/shard-iclb4/igt@perf_pmu@busy-no-semaphores-vcs1.html

  
#### Warnings ####

  * igt@gem_ctx_isolation@vcs1-nonpriv:
    - shard-iclb:         [FAIL][75] ([IGT#28]) -> [SKIP][76] ([fdo#112080]) +1 similar issue
   [75]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7857/shard-iclb2/igt@gem_ctx_isolation@vcs1-nonpriv.html
   [76]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16389/shard-iclb8/igt@gem_ctx_isolation@vcs1-nonpriv.html

  * igt@gem_tiled_blits@normal:
    - shard-hsw:          [FAIL][77] ([i915#818]) -> [FAIL][78] ([i915#694]) +1 similar issue
   [77]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7857/shard-hsw5/igt@gem_tiled_blits@normal.html
   [78]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16389/shard-hsw7/igt@gem_tiled_blits@normal.html

  * igt@i915_pm_rpm@legacy-planes:
    - shard-snb:          [INCOMPLETE][79] ([i915#82]) -> [SKIP][80] ([fdo#109271])
   [79]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7857/shard-snb6/igt@i915_pm_rpm@legacy-planes.html
   [80]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16389/shard-snb4/igt@i915_pm_rpm@legacy-planes.html

  * igt@kms_dp_dsc@basic-dsc-enable-edp:
    - shard-iclb:         [SKIP][81] ([fdo#109349]) -> [DMESG-WARN][82] ([fdo#107724])
   [81]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7857/shard-iclb4/igt@kms_dp_dsc@basic-dsc-enable-edp.html
   [82]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16389/shard-iclb2/igt@kms_dp_dsc@basic-dsc-enable-edp.html

  
  [IGT#28]: https://gitlab.freedesktop.org/drm/igt-gpu-tools/issues/28
  [fdo#107724]: https://bugs.freedesktop.org/show_bug.cgi?id=107724
  [fdo#108145]: https://bugs.freedesktop.org/show_bug.cgi?id=108145
  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [fdo#109276]: https://bugs.freedesktop.org/show_bug.cgi?id=109276
  [fdo#109349]: https://bugs.freedesktop.org/show_bug.cgi?id=109349
  [fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441
  [fdo#112080]: https://bugs.freedesktop.org/show_bug.cgi?id=112080
  [fdo#112146]: https://bugs.freedesktop.org/show_bug.cgi?id=112146
  [i915#109]: https://gitlab.freedesktop.org/drm/intel/issues/109
  [i915#180]: https://gitlab.freedesktop.org/drm/intel/issues/180
  [i915#265]: https://gitlab.freedesktop.org/drm/intel/issues/265
  [i915#31]: https://gitlab.freedesktop.org/drm/intel/issues/31
  [i915#34]: https://gitlab.freedesktop.org/drm/intel/issues/34
  [i915#413]: https://gitlab.freedesktop.org/drm/intel/issues/413
  [i915#644]: https://gitlab.freedesktop.org/drm/intel/issues/644
  [i915#668]: https://gitlab.freedesktop.org/drm/intel/issues/668
  [i915#677]: https://gitlab.freedesktop.org/drm/intel/issues/677
  [i915#69]: https://gitlab.freedesktop.org/drm/intel/issues/69
  [i915#694]: https://gitlab.freedesktop.org/drm/intel/issues/694
  [i915#716]: https://gitlab.freedesktop.org/drm/intel/issues/716
  [i915#770]: https://gitlab.freedesktop.org/drm/intel/issues/770
  [i915#79]: https://gitlab.freedesktop.org/drm/intel/issues/79
  [i915#818]: https://gitlab.freedesktop.org/drm/intel/issues/818
  [i915#82]: https://gitlab.freedesktop.org/drm/intel/issues/82
  [i915#831]: https://gitlab.freedesktop.org/drm/intel/issues/831
  [i915#914]: https://gitlab.freedesktop.org/drm/intel/issues/914


Participating hosts (10 -> 10)
------------------------------

  No changes in participating hosts


Build changes
-------------

  * CI: CI-20190529 -> None
  * Linux: CI_DRM_7857 -> Patchwork_16389

  CI-20190529: 20190529
  CI_DRM_7857: 8ec40a15b9a930df9e445f17c5e01cdb6f80353a @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_5411: 86c6ab8a0b6696bdb2153febd350af7fa02fbb00 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_16389: bfbeab6879a9d9ecad2399e41dd457eb8472d728 @ git://anongit.freedesktop.org/gfx-ci/linux
  piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16389/index.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

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Thread overview: 9+ messages (download: mbox.gz / follow: Atom feed)
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2020-02-03  9:31 [Intel-gfx] [PATCH 1/3] drm/i915/display: Defer application of initial chv_phy_control Chris Wilson
2020-02-03  9:31 ` [Intel-gfx] [PATCH 2/3] drm/i915/display: Fix NULL-crtc deref in calc_min_cdclk() Chris Wilson
2020-02-03  9:31 ` [Intel-gfx] [PATCH 3/3] drm/i915/audio: Skip the cdclk modeset if no pipes attached Chris Wilson
2020-02-03  9:53 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/3] drm/i915/display: Defer application of initial chv_phy_control Patchwork
2020-02-03 10:29 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2020-02-03 13:17 ` [Intel-gfx] [PATCH 1/3] " Imre Deak
2020-02-03 13:26   ` Chris Wilson
2020-02-03 14:14     ` Ville Syrjälä
2020-02-05 16:12 ` [Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/3] " Patchwork

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