From: Sasha Levin <sashal@kernel.org> To: Sasha Levin <sashal@kernel.org> To: Chris Wilson <chris@chris-wilson.co.uk> To: dri-devel@lists.freedesktop.org Cc: , intel-gfx@lists.freedesktop.org, stable@vger.kernel.org Subject: Re: [PATCH 4/5] drm/i915: Wean off drm_pci_alloc/drm_pci_free Date: Wed, 05 Feb 2020 14:45:17 +0000 [thread overview] Message-ID: <20200205144518.7084D222C2@mail.kernel.org> (raw) In-Reply-To: <20200202171635.4039044-4-chris@chris-wilson.co.uk> Hi, [This is an automated email] This commit has been processed because it contains a "Fixes:" tag, fixing commit: de09d31dd38a ("page-flags: define PG_reserved behavior on compound pages"). The bot has tested the following trees: v5.5.1, v5.4.17, v4.19.101, v4.14.169, v4.9.212. v5.5.1: Build OK! v5.4.17: Build OK! v4.19.101: Failed to apply! Possible dependencies: 4a3d3f6785be ("drm/i915: Match code to comment and enforce ppgtt for execlists") 4bdafb9ddfa4 ("drm/i915: Remove i915.enable_ppgtt override") 5771caf885ae ("drm/i915/skl+: Decode memory bandwidth and parameters") 6323113b7af6 ("drm/i915: Move SKL IPC WA to HAS_IPC()") 79556df293b2 ("drm/i915/gtt: Enable full-ppgtt by default everywhere") 86b592876cb6 ("drm/i915: Implement 16GB dimm wa for latency level-0") 8a6c5447635c ("drm/i915/kbl+: Enable IPC only for symmetric memory configurations") 900ccf30f9e1 ("drm/i915: Only force GGTT coherency w/a on required chipsets") cbfa59d4b331 ("drm/i915/bxt: Decode memory bandwidth and parameters") d53db442db36 ("drm/i915: Move display device info capabilities to its own struct") f361912aa9bf ("drm/i915/skl+: don't trust IPC value set by BIOS") fd847b8e60e0 ("drm/i915: Do not modifiy reserved bit in gens that do not have IPC") v4.14.169: Failed to apply! Possible dependencies: 0d6fc92a73e0 ("drm/i915: Separate RPS and RC6 handling for VLV") 37d933fc1728 ("drm/i915: Introduce separate status variable for RC6 and LLC ring frequency setup") 3e8ddd9e5071 ("drm/i915: Nuke some bogus tabs from the pcode defines") 562d9bae08a1 ("drm/i915: Name structure in dev_priv that contains RPS/RC6 state as "gt_pm"") 61843f0e6212 ("drm/i915: Name the IPS_PCODE_CONTROL bit") 771decb0b4d7 ("drm/i915: Rename intel_enable_rc6 to intel_rc6_enabled") 960e54652cee ("drm/i915: Separate RPS and RC6 handling for gen6+") 9f817501bd7f ("drm/i915: Move rps.hw_lock to dev_priv and s/hw_lock/pcu_lock") c56b89f16dd0 ("drm/i915: Use INTEL_GEN everywhere") d46b00dc38c8 ("drm/i915: Separate RPS and RC6 handling for CHV") d53db442db36 ("drm/i915: Move display device info capabilities to its own struct") fb6db0f5bf1d ("drm/i915: Remove unsafe i915.enable_rc6") v4.9.212: Failed to apply! Possible dependencies: 0031fb96859c ("drm/i915: Assorted dev_priv cleanups") 03cdc1d4f795 ("drm/i915: Store port enum in intel_encoder") 4f8036a28112 ("drm/i915: Make HAS_DDI and HAS_PCH_LPT_LP only take dev_priv") 50a0bc905416 ("drm/i915: Make INTEL_DEVID only take dev_priv") 6e266956a57f ("drm/i915: Make INTEL_PCH_TYPE & co only take dev_priv") 8652744b647e ("drm/i915: Make IS_BROADWELL only take dev_priv") d53db442db36 ("drm/i915: Move display device info capabilities to its own struct") NOTE: The patch will not be queued to stable trees until it is upstream. How should we proceed with this patch? -- Thanks, Sasha _______________________________________________ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
WARNING: multiple messages have this Message-ID (diff)
From: Sasha Levin <sashal@kernel.org> To: Sasha Levin <sashal@kernel.org> To: Chris Wilson <chris@chris-wilson.co.uk> To: dri-devel@lists.freedesktop.org Cc: , intel-gfx@lists.freedesktop.org, stable@vger.kernel.org Subject: Re: [Intel-gfx] [PATCH 4/5] drm/i915: Wean off drm_pci_alloc/drm_pci_free Date: Wed, 05 Feb 2020 14:45:17 +0000 [thread overview] Message-ID: <20200205144518.7084D222C2@mail.kernel.org> (raw) In-Reply-To: <20200202171635.4039044-4-chris@chris-wilson.co.uk> Hi, [This is an automated email] This commit has been processed because it contains a "Fixes:" tag, fixing commit: de09d31dd38a ("page-flags: define PG_reserved behavior on compound pages"). The bot has tested the following trees: v5.5.1, v5.4.17, v4.19.101, v4.14.169, v4.9.212. v5.5.1: Build OK! v5.4.17: Build OK! v4.19.101: Failed to apply! Possible dependencies: 4a3d3f6785be ("drm/i915: Match code to comment and enforce ppgtt for execlists") 4bdafb9ddfa4 ("drm/i915: Remove i915.enable_ppgtt override") 5771caf885ae ("drm/i915/skl+: Decode memory bandwidth and parameters") 6323113b7af6 ("drm/i915: Move SKL IPC WA to HAS_IPC()") 79556df293b2 ("drm/i915/gtt: Enable full-ppgtt by default everywhere") 86b592876cb6 ("drm/i915: Implement 16GB dimm wa for latency level-0") 8a6c5447635c ("drm/i915/kbl+: Enable IPC only for symmetric memory configurations") 900ccf30f9e1 ("drm/i915: Only force GGTT coherency w/a on required chipsets") cbfa59d4b331 ("drm/i915/bxt: Decode memory bandwidth and parameters") d53db442db36 ("drm/i915: Move display device info capabilities to its own struct") f361912aa9bf ("drm/i915/skl+: don't trust IPC value set by BIOS") fd847b8e60e0 ("drm/i915: Do not modifiy reserved bit in gens that do not have IPC") v4.14.169: Failed to apply! Possible dependencies: 0d6fc92a73e0 ("drm/i915: Separate RPS and RC6 handling for VLV") 37d933fc1728 ("drm/i915: Introduce separate status variable for RC6 and LLC ring frequency setup") 3e8ddd9e5071 ("drm/i915: Nuke some bogus tabs from the pcode defines") 562d9bae08a1 ("drm/i915: Name structure in dev_priv that contains RPS/RC6 state as "gt_pm"") 61843f0e6212 ("drm/i915: Name the IPS_PCODE_CONTROL bit") 771decb0b4d7 ("drm/i915: Rename intel_enable_rc6 to intel_rc6_enabled") 960e54652cee ("drm/i915: Separate RPS and RC6 handling for gen6+") 9f817501bd7f ("drm/i915: Move rps.hw_lock to dev_priv and s/hw_lock/pcu_lock") c56b89f16dd0 ("drm/i915: Use INTEL_GEN everywhere") d46b00dc38c8 ("drm/i915: Separate RPS and RC6 handling for CHV") d53db442db36 ("drm/i915: Move display device info capabilities to its own struct") fb6db0f5bf1d ("drm/i915: Remove unsafe i915.enable_rc6") v4.9.212: Failed to apply! Possible dependencies: 0031fb96859c ("drm/i915: Assorted dev_priv cleanups") 03cdc1d4f795 ("drm/i915: Store port enum in intel_encoder") 4f8036a28112 ("drm/i915: Make HAS_DDI and HAS_PCH_LPT_LP only take dev_priv") 50a0bc905416 ("drm/i915: Make INTEL_DEVID only take dev_priv") 6e266956a57f ("drm/i915: Make INTEL_PCH_TYPE & co only take dev_priv") 8652744b647e ("drm/i915: Make IS_BROADWELL only take dev_priv") d53db442db36 ("drm/i915: Move display device info capabilities to its own struct") NOTE: The patch will not be queued to stable trees until it is upstream. How should we proceed with this patch? -- Thanks, Sasha _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
next prev parent reply other threads:[~2020-02-05 14:45 UTC|newest] Thread overview: 42+ messages / expand[flat|nested] mbox.gz Atom feed top 2020-02-02 17:16 [PATCH 1/5] drm: Remove PageReserved manipulation from drm_pci_alloc Chris Wilson 2020-02-02 17:16 ` [Intel-gfx] " Chris Wilson 2020-02-02 17:16 ` Chris Wilson 2020-02-02 17:16 ` [PATCH 2/5] drm: Remove the dma_alloc_coherent wrapper for internal usage Chris Wilson 2020-02-02 17:16 ` [Intel-gfx] " Chris Wilson 2020-02-03 21:50 ` Alex Deucher 2020-02-03 21:50 ` [Intel-gfx] " Alex Deucher 2020-02-02 17:16 ` [PATCH 3/5] drm/r128: Wean off drm_pci_alloc Chris Wilson 2020-02-02 17:16 ` [Intel-gfx] " Chris Wilson 2020-02-03 21:53 ` Alex Deucher 2020-02-03 21:53 ` [Intel-gfx] " Alex Deucher 2020-02-04 2:29 ` kbuild test robot 2020-02-04 2:29 ` kbuild test robot 2020-02-04 2:29 ` [Intel-gfx] " kbuild test robot 2020-02-02 17:16 ` [PATCH 4/5] drm/i915: Wean off drm_pci_alloc/drm_pci_free Chris Wilson 2020-02-02 17:16 ` [Intel-gfx] " Chris Wilson 2020-02-02 17:16 ` Chris Wilson 2020-02-05 14:45 ` Sasha Levin [this message] 2020-02-05 14:45 ` [Intel-gfx] " Sasha Levin 2020-02-02 17:16 ` [PATCH 5/5] drm: Remove exports for drm_pci_alloc/drm_pci_free Chris Wilson 2020-02-02 17:16 ` [Intel-gfx] " Chris Wilson 2020-02-03 21:55 ` Alex Deucher 2020-02-03 21:55 ` [Intel-gfx] " Alex Deucher 2020-02-04 4:46 ` kbuild test robot 2020-02-04 4:46 ` kbuild test robot 2020-02-04 4:46 ` [Intel-gfx] " kbuild test robot 2020-02-04 8:34 ` kbuild test robot 2020-02-04 8:34 ` kbuild test robot 2020-02-04 8:34 ` [Intel-gfx] " kbuild test robot 2020-02-04 14:18 ` Daniel Vetter 2020-02-04 14:18 ` Daniel Vetter 2020-02-02 17:25 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/5] drm: Remove PageReserved manipulation from drm_pci_alloc Patchwork 2020-02-02 17:49 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork 2020-02-02 18:35 ` [PATCH 1/5] " Sam Ravnborg 2020-02-02 18:35 ` [Intel-gfx] " Sam Ravnborg 2020-02-02 18:35 ` Sam Ravnborg 2020-02-03 21:49 ` Alex Deucher 2020-02-03 21:49 ` [Intel-gfx] " Alex Deucher 2020-02-03 21:49 ` Alex Deucher 2020-02-04 22:59 ` Chris Wilson 2020-02-04 22:59 ` [Intel-gfx] " Chris Wilson 2020-02-04 22:59 ` Chris Wilson
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