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* [Intel-gfx] [PATCH] drm/i915/gt: Apply Enable Boot Fetch to MBC control register
@ 2020-02-06 17:46 Chris Wilson
  2020-02-06 17:49 ` [Intel-gfx] ✗ Fi.CI.BUILD: failure for " Patchwork
                   ` (3 more replies)
  0 siblings, 4 replies; 9+ messages in thread
From: Chris Wilson @ 2020-02-06 17:46 UTC (permalink / raw)
  To: intel-gfx

Mika spotted that we should be setting BIT(4) of MBCTL prior to
execution.

"The driver must set this bit in the following scenarios:
- To reload the HW boot context every time it gets loaded through the OS.
- After an FLR clears the register (the BIOS won’t run afterwards)."

Make it so.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
---
 drivers/gpu/drm/i915/gt/intel_workarounds.c | 18 +++++++++++++++++-
 1 file changed, 17 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c b/drivers/gpu/drm/i915/gt/intel_workarounds.c
index 61106129287f..04901cd1593a 100644
--- a/drivers/gpu/drm/i915/gt/intel_workarounds.c
+++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c
@@ -778,6 +778,18 @@ cfl_gt_workarounds_init(struct drm_i915_private *i915, struct i915_wa_list *wal)
 		    GAMT_ECO_ENABLE_IN_PLACE_DECOMPRESS);
 }
 
+static void
+gen7_gt_workarounds_init(struct drm_i915_private *i915, struct i915_wa_list *wal)
+{
+	wa_write_or(wal, GEN6_MBCTL, GEN6_MBCTL_ENABLE_BOOT_FETCH);
+}
+
+static void
+gen6_gt_workarounds_init(struct drm_i915_private *i915, struct i915_wa_list *wal)
+{
+	wa_write_or(wal, GEN6_MBCTL, GEN6_MBCTL_ENABLE_BOOT_FETCH);
+}
+
 static void
 wa_init_mcr(struct drm_i915_private *i915, struct i915_wa_list *wal)
 {
@@ -962,7 +974,11 @@ gt_init_workarounds(struct drm_i915_private *i915, struct i915_wa_list *wal)
 		bxt_gt_workarounds_init(i915, wal);
 	else if (IS_SKYLAKE(i915))
 		skl_gt_workarounds_init(i915, wal);
-	else if (INTEL_GEN(i915) <= 8)
+	else if (IS_GEN(i915, 7))
+		gen7_gt_workarounds(i915, wal);
+	else if (IS_GEN(i915, 6))
+		gen6_gt_workarounds(i915, wal);
+	else if (INTEL_GEN(i915) < 6)
 		return;
 	else
 		MISSING_CASE(INTEL_GEN(i915));
-- 
2.25.0

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^ permalink raw reply related	[flat|nested] 9+ messages in thread

end of thread, other threads:[~2020-02-09  3:12 UTC | newest]

Thread overview: 9+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2020-02-06 17:46 [Intel-gfx] [PATCH] drm/i915/gt: Apply Enable Boot Fetch to MBC control register Chris Wilson
2020-02-06 17:49 ` [Intel-gfx] ✗ Fi.CI.BUILD: failure for " Patchwork
2020-02-06 17:53 ` [Intel-gfx] [PATCH] " Chris Wilson
2020-02-06 18:33 ` [Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915/gt: Apply Enable Boot Fetch to MBC control register (rev2) Patchwork
2020-02-06 18:45   ` Chris Wilson
2020-02-07  9:44     ` Mika Kuoppala
2020-02-07  9:49       ` Chris Wilson
2020-02-09  3:11 ` [Intel-gfx] [PATCH] drm/i915/gt: Apply Enable Boot Fetch to MBC control register kbuild test robot
2020-02-09  3:11   ` kbuild test robot

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