* [Intel-gfx] [PATCH 1/2] drm/i915: Fix g4x+ sprite dotclock limit for upscaling
@ 2020-02-06 20:12 Ville Syrjala
2020-02-06 20:12 ` [Intel-gfx] [PATCH 2/2] drm/i915: Use fb->format->is_yuv for the g4x+ sprite RGB vs. YUV check Ville Syrjala
` (3 more replies)
0 siblings, 4 replies; 9+ messages in thread
From: Ville Syrjala @ 2020-02-06 20:12 UTC (permalink / raw)
To: intel-gfx
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
Even if we're not doing downscaling we should account for
some of the extra dotclock limitations for g4x+ sprites. In
particular we must never exceed the 90% rule, and with RGB
that limits actually drops to 80%.
So instead of bailing out when upscaling let's clamp the
scaling factor appropriately and go through the rest of
calculation normally. By luck we already did the full
calculations for the 1:1 case.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/display/intel_sprite.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_sprite.c b/drivers/gpu/drm/i915/display/intel_sprite.c
index 7abeefe8dce5..6e2e22d9bbaa 100644
--- a/drivers/gpu/drm/i915/display/intel_sprite.c
+++ b/drivers/gpu/drm/i915/display/intel_sprite.c
@@ -1611,8 +1611,7 @@ static int g4x_sprite_min_cdclk(const struct intel_crtc_state *crtc_state,
hscale = drm_rect_calc_hscale(&plane_state->uapi.src,
&plane_state->uapi.dst,
0, INT_MAX);
- if (hscale < 0x10000)
- return pixel_rate;
+ hscale = max(hscale, 0x10000u);
/* Decimation steps at 2x,4x,8x,16x */
decimate = ilog2(hscale >> 16);
--
2.24.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 9+ messages in thread
* [Intel-gfx] [PATCH 2/2] drm/i915: Use fb->format->is_yuv for the g4x+ sprite RGB vs. YUV check
2020-02-06 20:12 [Intel-gfx] [PATCH 1/2] drm/i915: Fix g4x+ sprite dotclock limit for upscaling Ville Syrjala
@ 2020-02-06 20:12 ` Ville Syrjala
2020-09-11 18:13 ` Jani Nikula
2020-02-06 21:17 ` [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915: Fix g4x+ sprite dotclock limit for upscaling Patchwork
` (2 subsequent siblings)
3 siblings, 1 reply; 9+ messages in thread
From: Ville Syrjala @ 2020-02-06 20:12 UTC (permalink / raw)
To: intel-gfx
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
g4x+ sprites have an extra cdclk limitation listed for RGB formats.
For some random reason I chose to use cpp>=4 as the check for that.
While that does actually work let's deobfuscate it by checking
for !is_yuv instead. I suspect is_yuv didn't exist way back when
I originally write the code.
Also drop the duplicate comment.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/display/intel_sprite.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_sprite.c b/drivers/gpu/drm/i915/display/intel_sprite.c
index 6e2e22d9bbaa..f95fe2c99468 100644
--- a/drivers/gpu/drm/i915/display/intel_sprite.c
+++ b/drivers/gpu/drm/i915/display/intel_sprite.c
@@ -1624,8 +1624,8 @@ static int g4x_sprite_min_cdclk(const struct intel_crtc_state *crtc_state,
limit -= decimate;
/* -10% for RGB */
- if (fb->format->cpp[0] >= 4)
- limit--; /* -10% for RGB */
+ if (!fb->format->is_yuv)
+ limit--;
/*
* We should also do -10% if sprite scaling is enabled
--
2.24.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 9+ messages in thread
* [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915: Fix g4x+ sprite dotclock limit for upscaling
2020-02-06 20:12 [Intel-gfx] [PATCH 1/2] drm/i915: Fix g4x+ sprite dotclock limit for upscaling Ville Syrjala
2020-02-06 20:12 ` [Intel-gfx] [PATCH 2/2] drm/i915: Use fb->format->is_yuv for the g4x+ sprite RGB vs. YUV check Ville Syrjala
@ 2020-02-06 21:17 ` Patchwork
2020-02-09 20:20 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
2020-09-11 18:03 ` [Intel-gfx] [PATCH 1/2] " Jani Nikula
3 siblings, 0 replies; 9+ messages in thread
From: Patchwork @ 2020-02-06 21:17 UTC (permalink / raw)
To: Ville Syrjala; +Cc: intel-gfx
== Series Details ==
Series: series starting with [1/2] drm/i915: Fix g4x+ sprite dotclock limit for upscaling
URL : https://patchwork.freedesktop.org/series/73115/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7878 -> Patchwork_16469
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16469/index.html
Known issues
------------
Here are the changes found in Patchwork_16469 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@gem_exec_parallel@contexts:
- fi-byt-n2820: [PASS][1] -> [FAIL][2] ([i915#694])
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7878/fi-byt-n2820/igt@gem_exec_parallel@contexts.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16469/fi-byt-n2820/igt@gem_exec_parallel@contexts.html
* igt@i915_selftest@live_execlists:
- fi-icl-y: [PASS][3] -> [DMESG-FAIL][4] ([fdo#108569])
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7878/fi-icl-y/igt@i915_selftest@live_execlists.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16469/fi-icl-y/igt@i915_selftest@live_execlists.html
* igt@kms_chamelium@hdmi-hpd-fast:
- fi-kbl-7500u: [PASS][5] -> [FAIL][6] ([fdo#111096] / [i915#323])
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7878/fi-kbl-7500u/igt@kms_chamelium@hdmi-hpd-fast.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16469/fi-kbl-7500u/igt@kms_chamelium@hdmi-hpd-fast.html
#### Possible fixes ####
* igt@i915_module_load@reload:
- fi-skl-6770hq: [DMESG-WARN][7] ([i915#92]) -> [PASS][8]
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7878/fi-skl-6770hq/igt@i915_module_load@reload.html
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16469/fi-skl-6770hq/igt@i915_module_load@reload.html
* igt@i915_selftest@live_blt:
- fi-hsw-4770r: [DMESG-FAIL][9] ([i915#725]) -> [PASS][10]
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7878/fi-hsw-4770r/igt@i915_selftest@live_blt.html
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16469/fi-hsw-4770r/igt@i915_selftest@live_blt.html
- fi-ivb-3770: [DMESG-FAIL][11] ([i915#725]) -> [PASS][12]
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7878/fi-ivb-3770/igt@i915_selftest@live_blt.html
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16469/fi-ivb-3770/igt@i915_selftest@live_blt.html
* igt@i915_selftest@live_gem_contexts:
- fi-byt-n2820: [DMESG-FAIL][13] ([i915#722]) -> [PASS][14]
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7878/fi-byt-n2820/igt@i915_selftest@live_gem_contexts.html
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16469/fi-byt-n2820/igt@i915_selftest@live_gem_contexts.html
* igt@kms_pipe_crc_basic@read-crc-pipe-a-frame-sequence:
- fi-skl-6770hq: [SKIP][15] ([fdo#109271]) -> [PASS][16] +4 similar issues
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7878/fi-skl-6770hq/igt@kms_pipe_crc_basic@read-crc-pipe-a-frame-sequence.html
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16469/fi-skl-6770hq/igt@kms_pipe_crc_basic@read-crc-pipe-a-frame-sequence.html
* igt@kms_pipe_crc_basic@read-crc-pipe-c:
- fi-skl-6770hq: [DMESG-WARN][17] ([i915#106] / [i915#188]) -> [PASS][18]
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7878/fi-skl-6770hq/igt@kms_pipe_crc_basic@read-crc-pipe-c.html
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16469/fi-skl-6770hq/igt@kms_pipe_crc_basic@read-crc-pipe-c.html
#### Warnings ####
* igt@i915_pm_rpm@module-reload:
- fi-skl-6770hq: [DMESG-WARN][19] ([i915#92]) -> [FAIL][20] ([i915#178])
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7878/fi-skl-6770hq/igt@i915_pm_rpm@module-reload.html
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16469/fi-skl-6770hq/igt@i915_pm_rpm@module-reload.html
[fdo#108569]: https://bugs.freedesktop.org/show_bug.cgi?id=108569
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#111096]: https://bugs.freedesktop.org/show_bug.cgi?id=111096
[i915#106]: https://gitlab.freedesktop.org/drm/intel/issues/106
[i915#178]: https://gitlab.freedesktop.org/drm/intel/issues/178
[i915#188]: https://gitlab.freedesktop.org/drm/intel/issues/188
[i915#323]: https://gitlab.freedesktop.org/drm/intel/issues/323
[i915#694]: https://gitlab.freedesktop.org/drm/intel/issues/694
[i915#722]: https://gitlab.freedesktop.org/drm/intel/issues/722
[i915#725]: https://gitlab.freedesktop.org/drm/intel/issues/725
[i915#92]: https://gitlab.freedesktop.org/drm/intel/issues/92
Participating hosts (48 -> 41)
------------------------------
Additional (5): fi-bdw-5557u fi-hsw-peppy fi-bdw-gvtdvm fi-ilk-650 fi-kbl-7560u
Missing (12): fi-tgl-dsi fi-byt-j1900 fi-byt-squawks fi-bsw-cyan fi-bwr-2160 fi-ctg-p8600 fi-whl-u fi-cfl-8109u fi-elk-e7500 fi-byt-clapper fi-bdw-samus fi-snb-2600
Build changes
-------------
* CI: CI-20190529 -> None
* Linux: CI_DRM_7878 -> Patchwork_16469
CI-20190529: 20190529
CI_DRM_7878: b641da00ab129bfb28b11190cd5e9a4b4ed1e1ee @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_5423: 02ef996e76b3bae1c62d6a1298462aba0b7ac51a @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_16469: dbea9afb5f77aaa365d7a3438275f97bf597cb7b @ git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
dbea9afb5f77 drm/i915: Use fb->format->is_yuv for the g4x+ sprite RGB vs. YUV check
bbf311c19a0f drm/i915: Fix g4x+ sprite dotclock limit for upscaling
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16469/index.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 9+ messages in thread
* [Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/2] drm/i915: Fix g4x+ sprite dotclock limit for upscaling
2020-02-06 20:12 [Intel-gfx] [PATCH 1/2] drm/i915: Fix g4x+ sprite dotclock limit for upscaling Ville Syrjala
2020-02-06 20:12 ` [Intel-gfx] [PATCH 2/2] drm/i915: Use fb->format->is_yuv for the g4x+ sprite RGB vs. YUV check Ville Syrjala
2020-02-06 21:17 ` [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915: Fix g4x+ sprite dotclock limit for upscaling Patchwork
@ 2020-02-09 20:20 ` Patchwork
2020-09-11 18:03 ` [Intel-gfx] [PATCH 1/2] " Jani Nikula
3 siblings, 0 replies; 9+ messages in thread
From: Patchwork @ 2020-02-09 20:20 UTC (permalink / raw)
To: Ville Syrjälä; +Cc: intel-gfx
== Series Details ==
Series: series starting with [1/2] drm/i915: Fix g4x+ sprite dotclock limit for upscaling
URL : https://patchwork.freedesktop.org/series/73115/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7878_full -> Patchwork_16469_full
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Known issues
------------
Here are the changes found in Patchwork_16469_full that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@gem_busy@busy-vcs1:
- shard-iclb: [PASS][1] -> [SKIP][2] ([fdo#112080]) +12 similar issues
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7878/shard-iclb2/igt@gem_busy@busy-vcs1.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16469/shard-iclb7/igt@gem_busy@busy-vcs1.html
* igt@gem_ctx_persistence@processes:
- shard-skl: [PASS][3] -> [FAIL][4] ([i915#570] / [i915#679])
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7878/shard-skl8/igt@gem_ctx_persistence@processes.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16469/shard-skl9/igt@gem_ctx_persistence@processes.html
* igt@gem_ctx_shared@exec-single-timeline-bsd:
- shard-iclb: [PASS][5] -> [SKIP][6] ([fdo#110841])
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7878/shard-iclb6/igt@gem_ctx_shared@exec-single-timeline-bsd.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16469/shard-iclb1/igt@gem_ctx_shared@exec-single-timeline-bsd.html
* igt@gem_exec_schedule@pi-distinct-iova-bsd:
- shard-iclb: [PASS][7] -> [SKIP][8] ([i915#677])
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7878/shard-iclb6/igt@gem_exec_schedule@pi-distinct-iova-bsd.html
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16469/shard-iclb1/igt@gem_exec_schedule@pi-distinct-iova-bsd.html
* igt@gem_exec_schedule@reorder-wide-bsd:
- shard-iclb: [PASS][9] -> [SKIP][10] ([fdo#112146]) +7 similar issues
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7878/shard-iclb3/igt@gem_exec_schedule@reorder-wide-bsd.html
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16469/shard-iclb2/igt@gem_exec_schedule@reorder-wide-bsd.html
* igt@gem_wait@wait-bcs0:
- shard-hsw: [PASS][11] -> [INCOMPLETE][12] ([CI#80] / [i915#61])
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7878/shard-hsw1/igt@gem_wait@wait-bcs0.html
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16469/shard-hsw6/igt@gem_wait@wait-bcs0.html
* igt@gen9_exec_parse@allowed-all:
- shard-glk: [PASS][13] -> [DMESG-WARN][14] ([i915#716])
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7878/shard-glk5/igt@gen9_exec_parse@allowed-all.html
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16469/shard-glk5/igt@gen9_exec_parse@allowed-all.html
* igt@i915_pm_dc@dc5-dpms:
- shard-iclb: [PASS][15] -> [FAIL][16] ([i915#447])
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7878/shard-iclb8/igt@i915_pm_dc@dc5-dpms.html
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16469/shard-iclb3/igt@i915_pm_dc@dc5-dpms.html
* igt@i915_selftest@live_gt_heartbeat:
- shard-apl: [PASS][17] -> [DMESG-FAIL][18] ([fdo#112406])
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7878/shard-apl2/igt@i915_selftest@live_gt_heartbeat.html
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16469/shard-apl7/igt@i915_selftest@live_gt_heartbeat.html
* igt@i915_selftest@live_gtt:
- shard-kbl: [PASS][19] -> [TIMEOUT][20] ([fdo#112271])
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7878/shard-kbl3/igt@i915_selftest@live_gtt.html
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16469/shard-kbl3/igt@i915_selftest@live_gtt.html
* igt@kms_cursor_crc@pipe-a-cursor-suspend:
- shard-kbl: [PASS][21] -> [DMESG-WARN][22] ([i915#180]) +5 similar issues
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7878/shard-kbl1/igt@kms_cursor_crc@pipe-a-cursor-suspend.html
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16469/shard-kbl1/igt@kms_cursor_crc@pipe-a-cursor-suspend.html
* igt@kms_cursor_legacy@cursora-vs-flipb-atomic:
- shard-hsw: [PASS][23] -> [DMESG-WARN][24] ([i915#44])
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7878/shard-hsw7/igt@kms_cursor_legacy@cursora-vs-flipb-atomic.html
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16469/shard-hsw5/igt@kms_cursor_legacy@cursora-vs-flipb-atomic.html
* igt@kms_draw_crc@draw-method-xrgb8888-mmap-cpu-untiled:
- shard-skl: [PASS][25] -> [FAIL][26] ([i915#177] / [i915#52] / [i915#54])
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7878/shard-skl10/igt@kms_draw_crc@draw-method-xrgb8888-mmap-cpu-untiled.html
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16469/shard-skl1/igt@kms_draw_crc@draw-method-xrgb8888-mmap-cpu-untiled.html
* igt@kms_flip@flip-vs-expired-vblank-interruptible:
- shard-apl: [PASS][27] -> [FAIL][28] ([i915#79])
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7878/shard-apl1/igt@kms_flip@flip-vs-expired-vblank-interruptible.html
[28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16469/shard-apl2/igt@kms_flip@flip-vs-expired-vblank-interruptible.html
* igt@kms_flip@flip-vs-suspend-interruptible:
- shard-skl: [PASS][29] -> [INCOMPLETE][30] ([i915#221])
[29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7878/shard-skl8/igt@kms_flip@flip-vs-suspend-interruptible.html
[30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16469/shard-skl9/igt@kms_flip@flip-vs-suspend-interruptible.html
- shard-apl: [PASS][31] -> [DMESG-WARN][32] ([i915#180]) +2 similar issues
[31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7878/shard-apl7/igt@kms_flip@flip-vs-suspend-interruptible.html
[32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16469/shard-apl4/igt@kms_flip@flip-vs-suspend-interruptible.html
* igt@kms_flip_tiling@flip-yf-tiled:
- shard-skl: [PASS][33] -> [FAIL][34] ([fdo#108145])
[33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7878/shard-skl10/igt@kms_flip_tiling@flip-yf-tiled.html
[34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16469/shard-skl1/igt@kms_flip_tiling@flip-yf-tiled.html
* igt@kms_pipe_crc_basic@suspend-read-crc-pipe-b:
- shard-skl: [PASS][35] -> [INCOMPLETE][36] ([i915#69])
[35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7878/shard-skl10/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-b.html
[36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16469/shard-skl9/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-b.html
* igt@kms_plane_alpha_blend@pipe-c-coverage-7efc:
- shard-skl: [PASS][37] -> [FAIL][38] ([fdo#108145] / [i915#265])
[37]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7878/shard-skl2/igt@kms_plane_alpha_blend@pipe-c-coverage-7efc.html
[38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16469/shard-skl9/igt@kms_plane_alpha_blend@pipe-c-coverage-7efc.html
* igt@kms_psr@no_drrs:
- shard-iclb: [PASS][39] -> [FAIL][40] ([i915#173])
[39]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7878/shard-iclb2/igt@kms_psr@no_drrs.html
[40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16469/shard-iclb1/igt@kms_psr@no_drrs.html
* igt@kms_psr@psr2_sprite_plane_move:
- shard-iclb: [PASS][41] -> [SKIP][42] ([fdo#109441])
[41]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7878/shard-iclb2/igt@kms_psr@psr2_sprite_plane_move.html
[42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16469/shard-iclb4/igt@kms_psr@psr2_sprite_plane_move.html
* igt@kms_setmode@basic:
- shard-apl: [PASS][43] -> [FAIL][44] ([i915#31])
[43]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7878/shard-apl1/igt@kms_setmode@basic.html
[44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16469/shard-apl3/igt@kms_setmode@basic.html
- shard-skl: [PASS][45] -> [FAIL][46] ([i915#31])
[45]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7878/shard-skl8/igt@kms_setmode@basic.html
[46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16469/shard-skl8/igt@kms_setmode@basic.html
* igt@prime_busy@hang-bsd2:
- shard-iclb: [PASS][47] -> [SKIP][48] ([fdo#109276]) +19 similar issues
[47]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7878/shard-iclb2/igt@prime_busy@hang-bsd2.html
[48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16469/shard-iclb7/igt@prime_busy@hang-bsd2.html
#### Possible fixes ####
* igt@gem_exec_schedule@out-order-bsd2:
- shard-iclb: [SKIP][49] ([fdo#109276]) -> [PASS][50] +16 similar issues
[49]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7878/shard-iclb8/igt@gem_exec_schedule@out-order-bsd2.html
[50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16469/shard-iclb2/igt@gem_exec_schedule@out-order-bsd2.html
* igt@gem_exec_schedule@preempt-other-chain-bsd:
- shard-iclb: [SKIP][51] ([fdo#112146]) -> [PASS][52] +1 similar issue
[51]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7878/shard-iclb4/igt@gem_exec_schedule@preempt-other-chain-bsd.html
[52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16469/shard-iclb8/igt@gem_exec_schedule@preempt-other-chain-bsd.html
* igt@gem_partial_pwrite_pread@writes-after-reads-uncached:
- shard-hsw: [FAIL][53] ([i915#694]) -> [PASS][54]
[53]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7878/shard-hsw6/igt@gem_partial_pwrite_pread@writes-after-reads-uncached.html
[54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16469/shard-hsw2/igt@gem_partial_pwrite_pread@writes-after-reads-uncached.html
* igt@gen9_exec_parse@allowed-single:
- shard-skl: [DMESG-WARN][55] ([i915#716]) -> [PASS][56]
[55]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7878/shard-skl9/igt@gen9_exec_parse@allowed-single.html
[56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16469/shard-skl8/igt@gen9_exec_parse@allowed-single.html
* igt@i915_pm_rps@reset:
- shard-iclb: [FAIL][57] ([i915#413]) -> [PASS][58]
[57]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7878/shard-iclb5/igt@i915_pm_rps@reset.html
[58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16469/shard-iclb8/igt@i915_pm_rps@reset.html
* igt@i915_suspend@fence-restore-tiled2untiled:
- shard-apl: [DMESG-WARN][59] ([i915#180]) -> [PASS][60] +3 similar issues
[59]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7878/shard-apl4/igt@i915_suspend@fence-restore-tiled2untiled.html
[60]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16469/shard-apl3/igt@i915_suspend@fence-restore-tiled2untiled.html
* igt@kms_big_fb@x-tiled-32bpp-rotate-180:
- shard-kbl: [DMESG-WARN][61] ([i915#93] / [i915#95]) -> [PASS][62]
[61]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7878/shard-kbl6/igt@kms_big_fb@x-tiled-32bpp-rotate-180.html
[62]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16469/shard-kbl3/igt@kms_big_fb@x-tiled-32bpp-rotate-180.html
* igt@kms_cursor_crc@pipe-c-cursor-suspend:
- shard-kbl: [DMESG-WARN][63] ([i915#180]) -> [PASS][64] +3 similar issues
[63]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7878/shard-kbl1/igt@kms_cursor_crc@pipe-c-cursor-suspend.html
[64]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16469/shard-kbl7/igt@kms_cursor_crc@pipe-c-cursor-suspend.html
* igt@kms_flip@flip-vs-expired-vblank-interruptible:
- shard-skl: [FAIL][65] ([i915#79]) -> [PASS][66]
[65]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7878/shard-skl1/igt@kms_flip@flip-vs-expired-vblank-interruptible.html
[66]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16469/shard-skl2/igt@kms_flip@flip-vs-expired-vblank-interruptible.html
* igt@kms_plane@plane-panning-bottom-right-suspend-pipe-c-planes:
- shard-skl: [INCOMPLETE][67] ([i915#69]) -> [PASS][68]
[67]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7878/shard-skl8/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-c-planes.html
[68]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16469/shard-skl8/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-c-planes.html
* igt@kms_plane_lowres@pipe-a-tiling-x:
- shard-glk: [FAIL][69] ([i915#899]) -> [PASS][70]
[69]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7878/shard-glk1/igt@kms_plane_lowres@pipe-a-tiling-x.html
[70]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16469/shard-glk7/igt@kms_plane_lowres@pipe-a-tiling-x.html
* igt@kms_psr@psr2_primary_page_flip:
- shard-iclb: [SKIP][71] ([fdo#109441]) -> [PASS][72] +2 similar issues
[71]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7878/shard-iclb7/igt@kms_psr@psr2_primary_page_flip.html
[72]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16469/shard-iclb2/igt@kms_psr@psr2_primary_page_flip.html
* igt@kms_pwrite_crc:
- shard-snb: [SKIP][73] ([fdo#109271]) -> [PASS][74] +3 similar issues
[73]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7878/shard-snb5/igt@kms_pwrite_crc.html
[74]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16469/shard-snb5/igt@kms_pwrite_crc.html
* igt@kms_setmode@basic:
- shard-hsw: [FAIL][75] ([i915#31]) -> [PASS][76]
[75]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7878/shard-hsw8/igt@kms_setmode@basic.html
[76]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16469/shard-hsw7/igt@kms_setmode@basic.html
- shard-kbl: [FAIL][77] ([i915#31]) -> [PASS][78]
[77]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7878/shard-kbl4/igt@kms_setmode@basic.html
[78]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16469/shard-kbl6/igt@kms_setmode@basic.html
* igt@perf_pmu@busy-check-all-vcs1:
- shard-iclb: [SKIP][79] ([fdo#112080]) -> [PASS][80] +5 similar issues
[79]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7878/shard-iclb3/igt@perf_pmu@busy-check-all-vcs1.html
[80]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16469/shard-iclb1/igt@perf_pmu@busy-check-all-vcs1.html
* igt@prime_mmap_coherency@ioctl-errors:
- shard-hsw: [FAIL][81] ([i915#831]) -> [PASS][82]
[81]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7878/shard-hsw7/igt@prime_mmap_coherency@ioctl-errors.html
[82]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16469/shard-hsw5/igt@prime_mmap_coherency@ioctl-errors.html
* igt@prime_mmap_coherency@read:
- shard-hsw: [FAIL][83] ([i915#914]) -> [PASS][84]
[83]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7878/shard-hsw1/igt@prime_mmap_coherency@read.html
[84]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16469/shard-hsw7/igt@prime_mmap_coherency@read.html
#### Warnings ####
* igt@gem_ctx_isolation@vcs1-nonpriv-switch:
- shard-iclb: [SKIP][85] ([fdo#112080]) -> [FAIL][86] ([IGT#28])
[85]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7878/shard-iclb8/igt@gem_ctx_isolation@vcs1-nonpriv-switch.html
[86]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16469/shard-iclb2/igt@gem_ctx_isolation@vcs1-nonpriv-switch.html
* igt@gem_tiled_blits@interruptible:
- shard-hsw: [FAIL][87] ([i915#818]) -> [FAIL][88] ([i915#694])
[87]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7878/shard-hsw8/igt@gem_tiled_blits@interruptible.html
[88]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16469/shard-hsw8/igt@gem_tiled_blits@interruptible.html
* igt@i915_selftest@live_blt:
- shard-hsw: [DMESG-FAIL][89] ([i915#563]) -> [DMESG-FAIL][90] ([i915#725])
[89]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7878/shard-hsw2/igt@i915_selftest@live_blt.html
[90]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16469/shard-hsw5/igt@i915_selftest@live_blt.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[CI#80]: https://gitlab.freedesktop.org/gfx-ci/i915-infra/issues/80
[IGT#28]: https://gitlab.freedesktop.org/drm/igt-gpu-tools/issues/28
[fdo#103927]: https://bugs.freedesktop.org/show_bug.cgi?id=103927
[fdo#108145]: https://bugs.freedesktop.org/show_bug.cgi?id=108145
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#109276]: https://bugs.freedesktop.org/show_bug.cgi?id=109276
[fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441
[fdo#110841]: https://bugs.freedesktop.org/show_bug.cgi?id=110841
[fdo#112080]: https://bugs.freedesktop.org/show_bug.cgi?id=112080
[fdo#112146]: https://bugs.freedesktop.org/show_bug.cgi?id=112146
[fdo#112271]: https://bugs.freedesktop.org/show_bug.cgi?id=112271
[fdo#112406]: https://bugs.freedesktop.org/show_bug.cgi?id=112406
[i915#173]: https://gitlab.freedesktop.org/drm/intel/issues/173
[i915#177]: https://gitlab.freedesktop.org/drm/intel/issues/177
[i915#180]: https://gitlab.freedesktop.org/drm/intel/issues/180
[i915#221]: https://gitlab.freedesktop.org/drm/intel/issues/221
[i915#265]: https://gitlab.freedesktop.org/drm/intel/issues/265
[i915#31]: https://gitlab.freedesktop.org/drm/intel/issues/31
[i915#413]: https://gitlab.freedesktop.org/drm/intel/issues/413
[i915#44]: https://gitlab.freedesktop.org/drm/intel/issues/44
[i915#447]: https://gitlab.freedesktop.org/drm/intel/issues/447
[i915#52]: https://gitlab.freedesktop.org/drm/intel/issues/52
[i915#54]: https://gitlab.freedesktop.org/drm/intel/issues/54
[i915#563]: https://gitlab.freedesktop.org/drm/intel/issues/563
[i915#570]: https://gitlab.freedesktop.org/drm/intel/issues/570
[i915#61]: https://gitlab.freedesktop.org/drm/intel/issues/61
[i915#677]: https://gitlab.freedesktop.org/drm/intel/issues/677
[i915#679]: https://gitlab.freedesktop.org/drm/intel/issues/679
[i915#69]: https://gitlab.freedesktop.org/drm/intel/issues/69
[i915#694]: https://gitlab.freedesktop.org/drm/intel/issues/694
[i915#716]: https://gitlab.freedesktop.org/drm/intel/issues/716
[i915#725]: https://gitlab.freedesktop.org/drm/intel/issues/725
[i915#79]: https://gitlab.freedesktop.org/drm/intel/issues/79
[i915#818]: https://gitlab.freedesktop.org/drm/intel/issues/818
[i915#831]: https://gitlab.freedesktop.org/drm/intel/issues/831
[i915#899]: https://gitlab.freedesktop.org/drm/intel/issues/899
[i915#914]: https://gitlab.freedesktop.org/drm/intel/issues/914
[i915#93]: https://gitlab.freedesktop.org/drm/intel/issues/93
[i915#95]: https://gitlab.freedesktop.org/drm/intel/issues/95
Participating hosts (10 -> 10)
------------------------------
No changes in participating hosts
Build changes
-------------
* CI: CI-20190529 -> None
* Linux: CI_DRM_7878 -> Patchwork_16469
CI-20190529: 20190529
CI_DRM_7878: b641da00ab129bfb28b11190cd5e9a4b4ed1e1ee @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_5423: 02ef996e76b3bae1c62d6a1298462aba0b7ac51a @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_16469: dbea9afb5f77aaa365d7a3438275f97bf597cb7b @ git://anongit.freedesktop.org/gfx-ci/linux
piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16469/index.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [Intel-gfx] [PATCH 1/2] drm/i915: Fix g4x+ sprite dotclock limit for upscaling
2020-02-06 20:12 [Intel-gfx] [PATCH 1/2] drm/i915: Fix g4x+ sprite dotclock limit for upscaling Ville Syrjala
` (2 preceding siblings ...)
2020-02-09 20:20 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
@ 2020-09-11 18:03 ` Jani Nikula
2020-09-14 13:48 ` Ville Syrjälä
3 siblings, 1 reply; 9+ messages in thread
From: Jani Nikula @ 2020-09-11 18:03 UTC (permalink / raw)
To: Ville Syrjala, intel-gfx
On Thu, 06 Feb 2020, Ville Syrjala <ville.syrjala@linux.intel.com> wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> Even if we're not doing downscaling we should account for
> some of the extra dotclock limitations for g4x+ sprites. In
> particular we must never exceed the 90% rule, and with RGB
> that limits actually drops to 80%.
>
> So instead of bailing out when upscaling let's clamp the
> scaling factor appropriately and go through the rest of
> calculation normally. By luck we already did the full
> calculations for the 1:1 case.
>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_sprite.c | 3 +--
> 1 file changed, 1 insertion(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_sprite.c b/drivers/gpu/drm/i915/display/intel_sprite.c
> index 7abeefe8dce5..6e2e22d9bbaa 100644
> --- a/drivers/gpu/drm/i915/display/intel_sprite.c
> +++ b/drivers/gpu/drm/i915/display/intel_sprite.c
> @@ -1611,8 +1611,7 @@ static int g4x_sprite_min_cdclk(const struct intel_crtc_state *crtc_state,
> hscale = drm_rect_calc_hscale(&plane_state->uapi.src,
> &plane_state->uapi.dst,
> 0, INT_MAX);
> - if (hscale < 0x10000)
> - return pixel_rate;
> + hscale = max(hscale, 0x10000u);
It bugs me that drm_rect seems to be used for both integer and 16.16
fixed point and whatnot.
It also gives me an uneasy feeling that hscale is uint while
drm_rect_calc_hscale() may return -ERANGE... but I guess shouldn't
happen.
All in all,
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
>
> /* Decimation steps at 2x,4x,8x,16x */
> decimate = ilog2(hscale >> 16);
--
Jani Nikula, Intel Open Source Graphics Center
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [Intel-gfx] [PATCH 2/2] drm/i915: Use fb->format->is_yuv for the g4x+ sprite RGB vs. YUV check
2020-02-06 20:12 ` [Intel-gfx] [PATCH 2/2] drm/i915: Use fb->format->is_yuv for the g4x+ sprite RGB vs. YUV check Ville Syrjala
@ 2020-09-11 18:13 ` Jani Nikula
2020-09-14 13:44 ` Ville Syrjälä
0 siblings, 1 reply; 9+ messages in thread
From: Jani Nikula @ 2020-09-11 18:13 UTC (permalink / raw)
To: Ville Syrjala, intel-gfx
On Thu, 06 Feb 2020, Ville Syrjala <ville.syrjala@linux.intel.com> wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> g4x+ sprites have an extra cdclk limitation listed for RGB formats.
> For some random reason I chose to use cpp>=4 as the check for that.
> While that does actually work let's deobfuscate it by checking
> for !is_yuv instead. I suspect is_yuv didn't exist way back when
> I originally write the code.
Mmh, there are formats with cpp >= 4 && is_yuv == true making this look
like a functional change... but I presume those are not relevant and/or
this change is the right thing to do anyway.
Acked-by: Jani Nikula <jani.nikula@intel.com>
>
> Also drop the duplicate comment.
>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_sprite.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_sprite.c b/drivers/gpu/drm/i915/display/intel_sprite.c
> index 6e2e22d9bbaa..f95fe2c99468 100644
> --- a/drivers/gpu/drm/i915/display/intel_sprite.c
> +++ b/drivers/gpu/drm/i915/display/intel_sprite.c
> @@ -1624,8 +1624,8 @@ static int g4x_sprite_min_cdclk(const struct intel_crtc_state *crtc_state,
> limit -= decimate;
>
> /* -10% for RGB */
> - if (fb->format->cpp[0] >= 4)
> - limit--; /* -10% for RGB */
> + if (!fb->format->is_yuv)
> + limit--;
>
> /*
> * We should also do -10% if sprite scaling is enabled
--
Jani Nikula, Intel Open Source Graphics Center
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [Intel-gfx] [PATCH 2/2] drm/i915: Use fb->format->is_yuv for the g4x+ sprite RGB vs. YUV check
2020-09-11 18:13 ` Jani Nikula
@ 2020-09-14 13:44 ` Ville Syrjälä
2020-09-14 15:20 ` Jani Nikula
0 siblings, 1 reply; 9+ messages in thread
From: Ville Syrjälä @ 2020-09-14 13:44 UTC (permalink / raw)
To: Jani Nikula; +Cc: intel-gfx
On Fri, Sep 11, 2020 at 09:13:18PM +0300, Jani Nikula wrote:
> On Thu, 06 Feb 2020, Ville Syrjala <ville.syrjala@linux.intel.com> wrote:
> > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> >
> > g4x+ sprites have an extra cdclk limitation listed for RGB formats.
> > For some random reason I chose to use cpp>=4 as the check for that.
> > While that does actually work let's deobfuscate it by checking
> > for !is_yuv instead. I suspect is_yuv didn't exist way back when
> > I originally write the code.
>
> Mmh, there are formats with cpp >= 4 && is_yuv == true making this look
> like a functional change... but I presume those are not relevant and/or
> this change is the right thing to do anyway.
This only applies to g4x/ilk/snb which only support
YUYV/etc. (cpp==2), and 32/64bpp RGB (cpp==4/8).
>
> Acked-by: Jani Nikula <jani.nikula@intel.com>
>
> >
> > Also drop the duplicate comment.
> >
> > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > ---
> > drivers/gpu/drm/i915/display/intel_sprite.c | 4 ++--
> > 1 file changed, 2 insertions(+), 2 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_sprite.c b/drivers/gpu/drm/i915/display/intel_sprite.c
> > index 6e2e22d9bbaa..f95fe2c99468 100644
> > --- a/drivers/gpu/drm/i915/display/intel_sprite.c
> > +++ b/drivers/gpu/drm/i915/display/intel_sprite.c
> > @@ -1624,8 +1624,8 @@ static int g4x_sprite_min_cdclk(const struct intel_crtc_state *crtc_state,
> > limit -= decimate;
> >
> > /* -10% for RGB */
> > - if (fb->format->cpp[0] >= 4)
> > - limit--; /* -10% for RGB */
> > + if (!fb->format->is_yuv)
> > + limit--;
> >
> > /*
> > * We should also do -10% if sprite scaling is enabled
>
> --
> Jani Nikula, Intel Open Source Graphics Center
--
Ville Syrjälä
Intel
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^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [Intel-gfx] [PATCH 1/2] drm/i915: Fix g4x+ sprite dotclock limit for upscaling
2020-09-11 18:03 ` [Intel-gfx] [PATCH 1/2] " Jani Nikula
@ 2020-09-14 13:48 ` Ville Syrjälä
0 siblings, 0 replies; 9+ messages in thread
From: Ville Syrjälä @ 2020-09-14 13:48 UTC (permalink / raw)
To: Jani Nikula; +Cc: intel-gfx
On Fri, Sep 11, 2020 at 09:03:36PM +0300, Jani Nikula wrote:
> On Thu, 06 Feb 2020, Ville Syrjala <ville.syrjala@linux.intel.com> wrote:
> > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> >
> > Even if we're not doing downscaling we should account for
> > some of the extra dotclock limitations for g4x+ sprites. In
> > particular we must never exceed the 90% rule, and with RGB
> > that limits actually drops to 80%.
> >
> > So instead of bailing out when upscaling let's clamp the
> > scaling factor appropriately and go through the rest of
> > calculation normally. By luck we already did the full
> > calculations for the 1:1 case.
> >
> > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > ---
> > drivers/gpu/drm/i915/display/intel_sprite.c | 3 +--
> > 1 file changed, 1 insertion(+), 2 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_sprite.c b/drivers/gpu/drm/i915/display/intel_sprite.c
> > index 7abeefe8dce5..6e2e22d9bbaa 100644
> > --- a/drivers/gpu/drm/i915/display/intel_sprite.c
> > +++ b/drivers/gpu/drm/i915/display/intel_sprite.c
> > @@ -1611,8 +1611,7 @@ static int g4x_sprite_min_cdclk(const struct intel_crtc_state *crtc_state,
> > hscale = drm_rect_calc_hscale(&plane_state->uapi.src,
> > &plane_state->uapi.dst,
> > 0, INT_MAX);
> > - if (hscale < 0x10000)
> > - return pixel_rate;
> > + hscale = max(hscale, 0x10000u);
>
> It bugs me that drm_rect seems to be used for both integer and 16.16
> fixed point and whatnot.
In theory it can use any arbitrary precision. There are a few
functions which do assume .0 or .16 though.
>
> It also gives me an uneasy feeling that hscale is uint while
> drm_rect_calc_hscale() may return -ERANGE... but I guess shouldn't
> happen.
Yeah, should not happen since we've already done this
same calculation (+check for <0) earlier. I've occasionally
pondered about stashing the h/vscale from that first check
into the plane state so we wouldn't have to redo it here.
But I never found sufficient motivation to actually do it.
>
> All in all,
>
> Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Ta.
>
>
> >
> > /* Decimation steps at 2x,4x,8x,16x */
> > decimate = ilog2(hscale >> 16);
>
> --
> Jani Nikula, Intel Open Source Graphics Center
--
Ville Syrjälä
Intel
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^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [Intel-gfx] [PATCH 2/2] drm/i915: Use fb->format->is_yuv for the g4x+ sprite RGB vs. YUV check
2020-09-14 13:44 ` Ville Syrjälä
@ 2020-09-14 15:20 ` Jani Nikula
0 siblings, 0 replies; 9+ messages in thread
From: Jani Nikula @ 2020-09-14 15:20 UTC (permalink / raw)
To: Ville Syrjälä; +Cc: intel-gfx
On Mon, 14 Sep 2020, Ville Syrjälä <ville.syrjala@linux.intel.com> wrote:
> On Fri, Sep 11, 2020 at 09:13:18PM +0300, Jani Nikula wrote:
>> On Thu, 06 Feb 2020, Ville Syrjala <ville.syrjala@linux.intel.com> wrote:
>> > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>> >
>> > g4x+ sprites have an extra cdclk limitation listed for RGB formats.
>> > For some random reason I chose to use cpp>=4 as the check for that.
>> > While that does actually work let's deobfuscate it by checking
>> > for !is_yuv instead. I suspect is_yuv didn't exist way back when
>> > I originally write the code.
>>
>> Mmh, there are formats with cpp >= 4 && is_yuv == true making this look
>> like a functional change... but I presume those are not relevant and/or
>> this change is the right thing to do anyway.
>
> This only applies to g4x/ilk/snb which only support
> YUYV/etc. (cpp==2), and 32/64bpp RGB (cpp==4/8).
Ack.
>
>>
>> Acked-by: Jani Nikula <jani.nikula@intel.com>
>>
>> >
>> > Also drop the duplicate comment.
>> >
>> > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
>> > ---
>> > drivers/gpu/drm/i915/display/intel_sprite.c | 4 ++--
>> > 1 file changed, 2 insertions(+), 2 deletions(-)
>> >
>> > diff --git a/drivers/gpu/drm/i915/display/intel_sprite.c b/drivers/gpu/drm/i915/display/intel_sprite.c
>> > index 6e2e22d9bbaa..f95fe2c99468 100644
>> > --- a/drivers/gpu/drm/i915/display/intel_sprite.c
>> > +++ b/drivers/gpu/drm/i915/display/intel_sprite.c
>> > @@ -1624,8 +1624,8 @@ static int g4x_sprite_min_cdclk(const struct intel_crtc_state *crtc_state,
>> > limit -= decimate;
>> >
>> > /* -10% for RGB */
>> > - if (fb->format->cpp[0] >= 4)
>> > - limit--; /* -10% for RGB */
>> > + if (!fb->format->is_yuv)
>> > + limit--;
>> >
>> > /*
>> > * We should also do -10% if sprite scaling is enabled
>>
>> --
>> Jani Nikula, Intel Open Source Graphics Center
--
Jani Nikula, Intel Open Source Graphics Center
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^ permalink raw reply [flat|nested] 9+ messages in thread
end of thread, other threads:[~2020-09-14 15:20 UTC | newest]
Thread overview: 9+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2020-02-06 20:12 [Intel-gfx] [PATCH 1/2] drm/i915: Fix g4x+ sprite dotclock limit for upscaling Ville Syrjala
2020-02-06 20:12 ` [Intel-gfx] [PATCH 2/2] drm/i915: Use fb->format->is_yuv for the g4x+ sprite RGB vs. YUV check Ville Syrjala
2020-09-11 18:13 ` Jani Nikula
2020-09-14 13:44 ` Ville Syrjälä
2020-09-14 15:20 ` Jani Nikula
2020-02-06 21:17 ` [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915: Fix g4x+ sprite dotclock limit for upscaling Patchwork
2020-02-09 20:20 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
2020-09-11 18:03 ` [Intel-gfx] [PATCH 1/2] " Jani Nikula
2020-09-14 13:48 ` Ville Syrjälä
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