[Intel-gfx] [PATCH 1/4] drm/i915/selftests: Disable capturing forced error states

[Intel-gfx] [PATCH 1/4] drm/i915/selftests: Disable capturing forced error states

[Chris Wilson]

When we are forcing the error for a selftest, we don't need to capture
the GPU state (typically).

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
---
 drivers/gpu/drm/i915/gem/selftests/mock_context.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/gpu/drm/i915/gem/selftests/mock_context.c b/drivers/gpu/drm/i915/gem/selftests/mock_context.c
index 81764289cf0d..b12ea1daa29d 100644
--- a/drivers/gpu/drm/i915/gem/selftests/mock_context.c
+++ b/drivers/gpu/drm/i915/gem/selftests/mock_context.c
@@ -107,6 +107,7 @@ kernel_context(struct drm_i915_private *i915)
 
 	i915_gem_context_clear_bannable(ctx);
 	i915_gem_context_set_persistence(ctx);
+	i915_gem_context_set_no_error_capture(ctx);
 
 	return ctx;
 }
-- 
2.25.0

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[Intel-gfx] [PATCH 2/4] drm/i915/selftests: Drop live_preempt_hang

[Chris Wilson]

live_preempt_hang's use of hang injection has been superseded by
live_preempt_reset's use of an non-preemptable spinner. The latter does
not require intrusive hacks into the code.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
---
 drivers/gpu/drm/i915/gt/intel_engine.h       |  20 ---
 drivers/gpu/drm/i915/gt/intel_engine_types.h |   1 -
 drivers/gpu/drm/i915/gt/intel_lrc.c          |   8 +-
 drivers/gpu/drm/i915/gt/selftest_lrc.c       | 122 -------------------
 4 files changed, 4 insertions(+), 147 deletions(-)

diff --git a/drivers/gpu/drm/i915/gt/intel_engine.h b/drivers/gpu/drm/i915/gt/intel_engine.h
index b36ec1fddc3d..29c8c03c5caa 100644
--- a/drivers/gpu/drm/i915/gt/intel_engine.h
+++ b/drivers/gpu/drm/i915/gt/intel_engine.h
@@ -305,26 +305,6 @@ intel_engine_find_active_request(struct intel_engine_cs *engine);
 
 u32 intel_engine_context_size(struct intel_gt *gt, u8 class);
 
-#if IS_ENABLED(CONFIG_DRM_I915_SELFTEST)
-
-static inline bool inject_preempt_hang(struct intel_engine_execlists *execlists)
-{
-	if (!execlists->preempt_hang.inject_hang)
-		return false;
-
-	complete(&execlists->preempt_hang.completion);
-	return true;
-}
-
-#else
-
-static inline bool inject_preempt_hang(struct intel_engine_execlists *execlists)
-{
-	return false;
-}
-
-#endif
-
 void intel_engine_init_active(struct intel_engine_cs *engine,
 			      unsigned int subclass);
 #define ENGINE_PHYSICAL	0
diff --git a/drivers/gpu/drm/i915/gt/intel_engine_types.h b/drivers/gpu/drm/i915/gt/intel_engine_types.h
index 45e36d963ea7..b23366a81048 100644
--- a/drivers/gpu/drm/i915/gt/intel_engine_types.h
+++ b/drivers/gpu/drm/i915/gt/intel_engine_types.h
@@ -127,7 +127,6 @@ DECLARE_EWMA(_engine_latency, 6, 4)
 struct st_preempt_hang {
 	struct completion completion;
 	unsigned int count;
-	bool inject_hang;
 };
 
 /**
diff --git a/drivers/gpu/drm/i915/gt/intel_lrc.c b/drivers/gpu/drm/i915/gt/intel_lrc.c
index 230470c58ec9..929be03bbe7e 100644
--- a/drivers/gpu/drm/i915/gt/intel_lrc.c
+++ b/drivers/gpu/drm/i915/gt/intel_lrc.c
@@ -2296,19 +2296,19 @@ static void process_csb(struct intel_engine_cs *engine)
 		if (promote) {
 			struct i915_request * const *old = execlists->active;
 
+			GEM_BUG_ON(!assert_pending_valid(execlists, "promote"));
+
+			ring_set_paused(engine, 0);
+
 			/* Point active to the new ELSP; prevent overwriting */
 			WRITE_ONCE(execlists->active, execlists->pending);
 
-			if (!inject_preempt_hang(execlists))
-				ring_set_paused(engine, 0);
-
 			/* cancel old inflight, prepare for switch */
 			trace_ports(execlists, "preempted", old);
 			while (*old)
 				execlists_schedule_out(*old++);
 
 			/* switch pending to inflight */
-			GEM_BUG_ON(!assert_pending_valid(execlists, "promote"));
 			WRITE_ONCE(execlists->active,
 				   memcpy(execlists->inflight,
 					  execlists->pending,
diff --git a/drivers/gpu/drm/i915/gt/selftest_lrc.c b/drivers/gpu/drm/i915/gt/selftest_lrc.c
index 79b9f7d092e4..7ef68500b2bd 100644
--- a/drivers/gpu/drm/i915/gt/selftest_lrc.c
+++ b/drivers/gpu/drm/i915/gt/selftest_lrc.c
@@ -2431,127 +2431,6 @@ static int live_preempt_gang(void *arg)
 	return 0;
 }
 
-static int live_preempt_hang(void *arg)
-{
-	struct intel_gt *gt = arg;
-	struct i915_gem_context *ctx_hi, *ctx_lo;
-	struct igt_spinner spin_hi, spin_lo;
-	struct intel_engine_cs *engine;
-	enum intel_engine_id id;
-	int err = -ENOMEM;
-
-	if (!HAS_LOGICAL_RING_PREEMPTION(gt->i915))
-		return 0;
-
-	if (!intel_has_reset_engine(gt))
-		return 0;
-
-	if (igt_spinner_init(&spin_hi, gt))
-		return -ENOMEM;
-
-	if (igt_spinner_init(&spin_lo, gt))
-		goto err_spin_hi;
-
-	ctx_hi = kernel_context(gt->i915);
-	if (!ctx_hi)
-		goto err_spin_lo;
-	ctx_hi->sched.priority =
-		I915_USER_PRIORITY(I915_CONTEXT_MAX_USER_PRIORITY);
-
-	ctx_lo = kernel_context(gt->i915);
-	if (!ctx_lo)
-		goto err_ctx_hi;
-	ctx_lo->sched.priority =
-		I915_USER_PRIORITY(I915_CONTEXT_MIN_USER_PRIORITY);
-
-	for_each_engine(engine, gt, id) {
-		unsigned long heartbeat;
-		struct i915_request *rq;
-
-		if (!intel_engine_has_preemption(engine))
-			continue;
-
-		engine_heartbeat_disable(engine, &heartbeat);
-
-		rq = spinner_create_request(&spin_lo, ctx_lo, engine,
-					    MI_ARB_CHECK);
-		if (IS_ERR(rq)) {
-			err = PTR_ERR(rq);
-			engine_heartbeat_enable(engine, heartbeat);
-			goto err_ctx_lo;
-		}
-
-		i915_request_add(rq);
-		if (!igt_wait_for_spinner(&spin_lo, rq)) {
-			GEM_TRACE("lo spinner failed to start\n");
-			GEM_TRACE_DUMP();
-			intel_gt_set_wedged(gt);
-			err = -EIO;
-			engine_heartbeat_enable(engine, heartbeat);
-			goto err_ctx_lo;
-		}
-
-		rq = spinner_create_request(&spin_hi, ctx_hi, engine,
-					    MI_ARB_CHECK);
-		if (IS_ERR(rq)) {
-			igt_spinner_end(&spin_lo);
-			engine_heartbeat_enable(engine, heartbeat);
-			err = PTR_ERR(rq);
-			goto err_ctx_lo;
-		}
-
-		init_completion(&engine->execlists.preempt_hang.completion);
-		engine->execlists.preempt_hang.inject_hang = true;
-
-		i915_request_add(rq);
-
-		if (!wait_for_completion_timeout(&engine->execlists.preempt_hang.completion,
-						 HZ / 10)) {
-			pr_err("Preemption did not occur within timeout!");
-			GEM_TRACE_DUMP();
-			intel_gt_set_wedged(gt);
-			engine_heartbeat_enable(engine, heartbeat);
-			err = -EIO;
-			goto err_ctx_lo;
-		}
-
-		set_bit(I915_RESET_ENGINE + id, &gt->reset.flags);
-		intel_engine_reset(engine, NULL);
-		clear_bit(I915_RESET_ENGINE + id, &gt->reset.flags);
-
-		engine->execlists.preempt_hang.inject_hang = false;
-
-		if (!igt_wait_for_spinner(&spin_hi, rq)) {
-			GEM_TRACE("hi spinner failed to start\n");
-			GEM_TRACE_DUMP();
-			intel_gt_set_wedged(gt);
-			engine_heartbeat_enable(engine, heartbeat);
-			err = -EIO;
-			goto err_ctx_lo;
-		}
-
-		igt_spinner_end(&spin_hi);
-		igt_spinner_end(&spin_lo);
-		engine_heartbeat_enable(engine, heartbeat);
-
-		if (igt_flush_test(gt->i915)) {
-			err = -EIO;
-			goto err_ctx_lo;
-		}
-	}
-
-	err = 0;
-err_ctx_lo:
-	kernel_context_close(ctx_lo);
-err_ctx_hi:
-	kernel_context_close(ctx_hi);
-err_spin_lo:
-	igt_spinner_fini(&spin_lo);
-err_spin_hi:
-	igt_spinner_fini(&spin_hi);
-	return err;
-}
-
 static int live_preempt_timeout(void *arg)
 {
 	struct intel_gt *gt = arg;
@@ -3750,7 +3629,6 @@ int intel_execlists_live_selftests(struct drm_i915_private *i915)
 		SUBTEST(live_suppress_wait_preempt),
 		SUBTEST(live_chain_preempt),
 		SUBTEST(live_preempt_gang),
-		SUBTEST(live_preempt_hang),
 		SUBTEST(live_preempt_timeout),
 		SUBTEST(live_preempt_smoke),
 		SUBTEST(live_virtual_engine),
-- 
2.25.0

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Re: [Intel-gfx] [PATCH 2/4] drm/i915/selftests: Drop live_preempt_hang

[Mika Kuoppala]

Chris Wilson <chris@chris-wilson.co.uk> writes:

> live_preempt_hang's use of hang injection has been superseded by
> live_preempt_reset's use of an non-preemptable spinner. The latter does
> not require intrusive hacks into the code.
>
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>

Good riddance,

Reviewed-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>

> ---
>  drivers/gpu/drm/i915/gt/intel_engine.h       |  20 ---
>  drivers/gpu/drm/i915/gt/intel_engine_types.h |   1 -
>  drivers/gpu/drm/i915/gt/intel_lrc.c          |   8 +-
>  drivers/gpu/drm/i915/gt/selftest_lrc.c       | 122 -------------------
>  4 files changed, 4 insertions(+), 147 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/gt/intel_engine.h b/drivers/gpu/drm/i915/gt/intel_engine.h
> index b36ec1fddc3d..29c8c03c5caa 100644
> --- a/drivers/gpu/drm/i915/gt/intel_engine.h
> +++ b/drivers/gpu/drm/i915/gt/intel_engine.h
> @@ -305,26 +305,6 @@ intel_engine_find_active_request(struct intel_engine_cs *engine);
>  
>  u32 intel_engine_context_size(struct intel_gt *gt, u8 class);
>  
> -#if IS_ENABLED(CONFIG_DRM_I915_SELFTEST)
> -
> -static inline bool inject_preempt_hang(struct intel_engine_execlists *execlists)
> -{
> -	if (!execlists->preempt_hang.inject_hang)
> -		return false;
> -
> -	complete(&execlists->preempt_hang.completion);
> -	return true;
> -}
> -
> -#else
> -
> -static inline bool inject_preempt_hang(struct intel_engine_execlists *execlists)
> -{
> -	return false;
> -}
> -
> -#endif
> -
>  void intel_engine_init_active(struct intel_engine_cs *engine,
>  			      unsigned int subclass);
>  #define ENGINE_PHYSICAL	0
> diff --git a/drivers/gpu/drm/i915/gt/intel_engine_types.h b/drivers/gpu/drm/i915/gt/intel_engine_types.h
> index 45e36d963ea7..b23366a81048 100644
> --- a/drivers/gpu/drm/i915/gt/intel_engine_types.h
> +++ b/drivers/gpu/drm/i915/gt/intel_engine_types.h
> @@ -127,7 +127,6 @@ DECLARE_EWMA(_engine_latency, 6, 4)
>  struct st_preempt_hang {
>  	struct completion completion;
>  	unsigned int count;
> -	bool inject_hang;
>  };
>  
>  /**
> diff --git a/drivers/gpu/drm/i915/gt/intel_lrc.c b/drivers/gpu/drm/i915/gt/intel_lrc.c
> index 230470c58ec9..929be03bbe7e 100644
> --- a/drivers/gpu/drm/i915/gt/intel_lrc.c
> +++ b/drivers/gpu/drm/i915/gt/intel_lrc.c
> @@ -2296,19 +2296,19 @@ static void process_csb(struct intel_engine_cs *engine)
>  		if (promote) {
>  			struct i915_request * const *old = execlists->active;
>  
> +			GEM_BUG_ON(!assert_pending_valid(execlists, "promote"));
> +
> +			ring_set_paused(engine, 0);
> +
>  			/* Point active to the new ELSP; prevent overwriting */
>  			WRITE_ONCE(execlists->active, execlists->pending);
>  
> -			if (!inject_preempt_hang(execlists))
> -				ring_set_paused(engine, 0);
> -
>  			/* cancel old inflight, prepare for switch */
>  			trace_ports(execlists, "preempted", old);
>  			while (*old)
>  				execlists_schedule_out(*old++);
>  
>  			/* switch pending to inflight */
> -			GEM_BUG_ON(!assert_pending_valid(execlists, "promote"));
>  			WRITE_ONCE(execlists->active,
>  				   memcpy(execlists->inflight,
>  					  execlists->pending,
> diff --git a/drivers/gpu/drm/i915/gt/selftest_lrc.c b/drivers/gpu/drm/i915/gt/selftest_lrc.c
> index 79b9f7d092e4..7ef68500b2bd 100644
> --- a/drivers/gpu/drm/i915/gt/selftest_lrc.c
> +++ b/drivers/gpu/drm/i915/gt/selftest_lrc.c
> @@ -2431,127 +2431,6 @@ static int live_preempt_gang(void *arg)
>  	return 0;
>  }
>  
> -static int live_preempt_hang(void *arg)
> -{
> -	struct intel_gt *gt = arg;
> -	struct i915_gem_context *ctx_hi, *ctx_lo;
> -	struct igt_spinner spin_hi, spin_lo;
> -	struct intel_engine_cs *engine;
> -	enum intel_engine_id id;
> -	int err = -ENOMEM;
> -
> -	if (!HAS_LOGICAL_RING_PREEMPTION(gt->i915))
> -		return 0;
> -
> -	if (!intel_has_reset_engine(gt))
> -		return 0;
> -
> -	if (igt_spinner_init(&spin_hi, gt))
> -		return -ENOMEM;
> -
> -	if (igt_spinner_init(&spin_lo, gt))
> -		goto err_spin_hi;
> -
> -	ctx_hi = kernel_context(gt->i915);
> -	if (!ctx_hi)
> -		goto err_spin_lo;
> -	ctx_hi->sched.priority =
> -		I915_USER_PRIORITY(I915_CONTEXT_MAX_USER_PRIORITY);
> -
> -	ctx_lo = kernel_context(gt->i915);
> -	if (!ctx_lo)
> -		goto err_ctx_hi;
> -	ctx_lo->sched.priority =
> -		I915_USER_PRIORITY(I915_CONTEXT_MIN_USER_PRIORITY);
> -
> -	for_each_engine(engine, gt, id) {
> -		unsigned long heartbeat;
> -		struct i915_request *rq;
> -
> -		if (!intel_engine_has_preemption(engine))
> -			continue;
> -
> -		engine_heartbeat_disable(engine, &heartbeat);
> -
> -		rq = spinner_create_request(&spin_lo, ctx_lo, engine,
> -					    MI_ARB_CHECK);
> -		if (IS_ERR(rq)) {
> -			err = PTR_ERR(rq);
> -			engine_heartbeat_enable(engine, heartbeat);
> -			goto err_ctx_lo;
> -		}
> -
> -		i915_request_add(rq);
> -		if (!igt_wait_for_spinner(&spin_lo, rq)) {
> -			GEM_TRACE("lo spinner failed to start\n");
> -			GEM_TRACE_DUMP();
> -			intel_gt_set_wedged(gt);
> -			err = -EIO;
> -			engine_heartbeat_enable(engine, heartbeat);
> -			goto err_ctx_lo;
> -		}
> -
> -		rq = spinner_create_request(&spin_hi, ctx_hi, engine,
> -					    MI_ARB_CHECK);
> -		if (IS_ERR(rq)) {
> -			igt_spinner_end(&spin_lo);
> -			engine_heartbeat_enable(engine, heartbeat);
> -			err = PTR_ERR(rq);
> -			goto err_ctx_lo;
> -		}
> -
> -		init_completion(&engine->execlists.preempt_hang.completion);
> -		engine->execlists.preempt_hang.inject_hang = true;
> -
> -		i915_request_add(rq);
> -
> -		if (!wait_for_completion_timeout(&engine->execlists.preempt_hang.completion,
> -						 HZ / 10)) {
> -			pr_err("Preemption did not occur within timeout!");
> -			GEM_TRACE_DUMP();
> -			intel_gt_set_wedged(gt);
> -			engine_heartbeat_enable(engine, heartbeat);
> -			err = -EIO;
> -			goto err_ctx_lo;
> -		}
> -
> -		set_bit(I915_RESET_ENGINE + id, &gt->reset.flags);
> -		intel_engine_reset(engine, NULL);
> -		clear_bit(I915_RESET_ENGINE + id, &gt->reset.flags);
> -
> -		engine->execlists.preempt_hang.inject_hang = false;
> -
> -		if (!igt_wait_for_spinner(&spin_hi, rq)) {
> -			GEM_TRACE("hi spinner failed to start\n");
> -			GEM_TRACE_DUMP();
> -			intel_gt_set_wedged(gt);
> -			engine_heartbeat_enable(engine, heartbeat);
> -			err = -EIO;
> -			goto err_ctx_lo;
> -		}
> -
> -		igt_spinner_end(&spin_hi);
> -		igt_spinner_end(&spin_lo);
> -		engine_heartbeat_enable(engine, heartbeat);
> -
> -		if (igt_flush_test(gt->i915)) {
> -			err = -EIO;
> -			goto err_ctx_lo;
> -		}
> -	}
> -
> -	err = 0;
> -err_ctx_lo:
> -	kernel_context_close(ctx_lo);
> -err_ctx_hi:
> -	kernel_context_close(ctx_hi);
> -err_spin_lo:
> -	igt_spinner_fini(&spin_lo);
> -err_spin_hi:
> -	igt_spinner_fini(&spin_hi);
> -	return err;
> -}
> -
>  static int live_preempt_timeout(void *arg)
>  {
>  	struct intel_gt *gt = arg;
> @@ -3750,7 +3629,6 @@ int intel_execlists_live_selftests(struct drm_i915_private *i915)
>  		SUBTEST(live_suppress_wait_preempt),
>  		SUBTEST(live_chain_preempt),
>  		SUBTEST(live_preempt_gang),
> -		SUBTEST(live_preempt_hang),
>  		SUBTEST(live_preempt_timeout),
>  		SUBTEST(live_preempt_smoke),
>  		SUBTEST(live_virtual_engine),
> -- 
> 2.25.0
>
> _______________________________________________
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> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
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[Intel-gfx] [PATCH 3/4] drm/i915/selftests: Exercise timeslice rewinding

[Chris Wilson]

Originally, I did not expect having to rewind a context upon
timeslicing: the point was to replace the executing context with an idle
one! However, given a second context that depends on requests from the
first, we may have to split the requests along the first context to
execute the second, causing us to replay the first context and have to
rewind the RING_TAIL.

References: 5ba32c7be81e ("drm/i915/execlists: Always force a context reload when rewinding RING_TAIL")
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
---
 drivers/gpu/drm/i915/gt/selftest_lrc.c | 202 ++++++++++++++++++++++++-
 1 file changed, 201 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/gt/selftest_lrc.c b/drivers/gpu/drm/i915/gt/selftest_lrc.c
index 7ef68500b2bd..0895b1b4b579 100644
--- a/drivers/gpu/drm/i915/gt/selftest_lrc.c
+++ b/drivers/gpu/drm/i915/gt/selftest_lrc.c
@@ -76,8 +76,11 @@ static int wait_for_submit(struct intel_engine_cs *engine,
 	do {
 		cond_resched();
 		intel_engine_flush_submission(engine);
-		if (i915_request_is_active(rq))
+		if (i915_request_is_active(rq) &&
+		    !READ_ONCE(engine->execlists.pending[0])) {
+			tasklet_unlock_wait(&engine->execlists.tasklet);
 			return 0;
+		}
 	} while (time_before(jiffies, timeout));
 
 	return -ETIME;
@@ -772,6 +775,202 @@ static int live_timeslice_preempt(void *arg)
 	return err;
 }
 
+static struct i915_request *
+create_rewinder(struct intel_context *ce,
+		struct i915_request *wait,
+		int slot)
+{
+	struct i915_request *rq;
+	u32 offset = i915_ggtt_offset(ce->engine->status_page.vma) + 4000;
+	u32 *cs;
+	int err;
+
+	rq = intel_context_create_request(ce);
+	if (IS_ERR(rq))
+		return rq;
+
+	if (wait) {
+		err = i915_request_await_dma_fence(rq, &wait->fence);
+		if (err)
+			goto err;
+	}
+
+	cs = intel_ring_begin(rq, 10);
+	if (IS_ERR(cs)) {
+		err = PTR_ERR(cs);
+		goto err;
+	}
+
+	*cs++ = MI_ARB_ON_OFF | MI_ARB_ENABLE;
+	*cs++ = MI_NOOP;
+
+	*cs++ = MI_SEMAPHORE_WAIT |
+		MI_SEMAPHORE_GLOBAL_GTT |
+		MI_SEMAPHORE_POLL |
+		MI_SEMAPHORE_SAD_NEQ_SDD;
+	*cs++ = 0;
+	*cs++ = offset;
+	*cs++ = 0;
+
+	*cs++ = MI_STORE_REGISTER_MEM_GEN8 | MI_USE_GGTT;
+	*cs++ = i915_mmio_reg_offset(RING_TIMESTAMP(rq->engine->mmio_base));
+	*cs++ = offset + slot * sizeof(u32);
+	*cs++ = 0;
+
+	intel_ring_advance(rq, cs);
+
+	rq->sched.attr.priority = I915_PRIORITY_MASK;
+	err = 0;
+err:
+	i915_request_get(rq);
+	i915_request_add(rq);
+	if (err) {
+		i915_request_put(rq);
+		return ERR_PTR(err);
+	}
+
+	return rq;
+}
+
+static int live_timeslice_rewind(void *arg)
+{
+	struct intel_gt *gt = arg;
+	struct intel_engine_cs *engine;
+	enum intel_engine_id id;
+
+	/*
+	 * The usual presumption on timeslice expiration is that we replace
+	 * the active context with another. However, given a chain of
+	 * dependencies we may end up with replacing the context with itself,
+	 * but only a few of those requests, forcing us to rewind the
+	 * RING_TAIL of the original request.
+	 */
+	if (!IS_ACTIVE(CONFIG_DRM_I915_TIMESLICE_DURATION))
+		return 0;
+
+	for_each_engine(engine, gt, id) {
+		struct i915_request *rq[3] = {};
+		struct intel_context *ce;
+		unsigned long heartbeat;
+		unsigned long timeslice;
+		int i, err = 0;
+		u32 *slot;
+
+		if (!intel_engine_has_timeslices(engine))
+			continue;
+
+		/*
+		 * A:rq1 -- semaphore wait, timestamp X
+		 * A:rq2 -- write timestamp Y
+		 *
+		 * B:rq1 [await A:rq1] -- write timestamp Z
+		 *
+		 * Force timeslice, release sempahore.
+		 *
+		 * Expect evaluation order XZY
+		 */
+
+		engine_heartbeat_disable(engine, &heartbeat);
+		timeslice = xchg(&engine->props.timeslice_duration_ms, 1);
+
+		slot = memset(engine->status_page.addr + 1000,
+			      0, 4 * sizeof(u32));
+
+		ce = intel_context_create(engine);
+		if (IS_ERR(ce)) {
+			err = PTR_ERR(ce);
+			goto err;
+		}
+
+		rq[0] = create_rewinder(ce, NULL, 1);
+		if (IS_ERR(rq[0])) {
+			intel_context_put(ce);
+			goto err;
+		}
+
+		rq[1] = create_rewinder(ce, NULL, 2);
+		intel_context_put(ce);
+		if (IS_ERR(rq[1]))
+			goto err;
+
+		err = wait_for_submit(engine, rq[1], HZ / 2);
+		if (err) {
+			pr_err("%s: failed to submit first context\n",
+			       engine->name);
+			goto err;
+		}
+
+		ce = intel_context_create(engine);
+		if (IS_ERR(ce)) {
+			err = PTR_ERR(ce);
+			goto err;
+		}
+
+		rq[2] = create_rewinder(ce, rq[0], 3);
+		intel_context_put(ce);
+		if (IS_ERR(rq[2]))
+			goto err;
+
+		err = wait_for_submit(engine, rq[2], HZ / 2);
+		if (err) {
+			pr_err("%s: failed to submit second context\n",
+			       engine->name);
+			goto err;
+		}
+		GEM_BUG_ON(!timer_pending(&engine->execlists.timer));
+
+		/* Wait for the timeslice to kick in */
+		del_timer(&engine->execlists.timer);
+		tasklet_hi_schedule(&engine->execlists.tasklet);
+		intel_engine_flush_submission(engine);
+
+		/* Release the hounds! */
+		slot[0] = 1;
+		wmb();
+
+		for (i = 1; i <= 3; i++) {
+			unsigned long timeout = jiffies + HZ / 2;
+
+			while (!READ_ONCE(slot[i]) &&
+			       time_before(jiffies, timeout))
+				;
+
+			if (!time_before(jiffies, timeout)) {
+				pr_err("%s: rq[%d] timed out\n",
+				       engine->name, i - 1);
+				err = -ETIME;
+				goto err;
+			}
+
+			pr_debug("%s: slot[%d]:%x\n", engine->name, i, slot[i]);
+		}
+
+		/* XZY: XZ < XY */
+		if (slot[3] - slot[1] >= slot[2] - slot[1]) {
+			pr_err("%s: timeslicing did not run context B [%u] before A [%u]!\n",
+			       engine->name,
+			       slot[3] - slot[1],
+			       slot[2] - slot[1]);
+			err = -EINVAL;
+		}
+
+err:
+		memset(slot, 0xff, 4 * sizeof(u32));
+		wmb();
+
+		engine->props.timeslice_duration_ms = timeslice;
+		engine_heartbeat_enable(engine, heartbeat);
+		for (i = 0; i < 3; i++)
+			i915_request_put(rq[i]);
+		if (igt_flush_test(gt->i915))
+			err = -EIO;
+		if (err)
+			return err;
+	}
+
+	return 0;
+}
+
 static struct i915_request *nop_request(struct intel_engine_cs *engine)
 {
 	struct i915_request *rq;
@@ -3619,6 +3818,7 @@ int intel_execlists_live_selftests(struct drm_i915_private *i915)
 		SUBTEST(live_hold_reset),
 		SUBTEST(live_error_interrupt),
 		SUBTEST(live_timeslice_preempt),
+		SUBTEST(live_timeslice_rewind),
 		SUBTEST(live_timeslice_queue),
 		SUBTEST(live_busywait_preempt),
 		SUBTEST(live_preempt),
-- 
2.25.0

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[Intel-gfx] [PATCH 4/4] drm/i915/selftests: Relax timeout for error-interrupt reset processing

[Chris Wilson]

We can not require that the system process a tasklet in reasonable time
(thanks be to ksoftirqd), but we can insist that having waited
sufficiently for the error interrupt to have been raised and having
kicked the tasklet, the reset has begun and the request will be marked
as in error (if not already completed).

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
---
 drivers/gpu/drm/i915/gt/selftest_lrc.c | 15 +++++++++++----
 1 file changed, 11 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/i915/gt/selftest_lrc.c b/drivers/gpu/drm/i915/gt/selftest_lrc.c
index 0895b1b4b579..3215d5a9964c 100644
--- a/drivers/gpu/drm/i915/gt/selftest_lrc.c
+++ b/drivers/gpu/drm/i915/gt/selftest_lrc.c
@@ -503,14 +503,21 @@ static int live_error_interrupt(void *arg)
 			}
 
 			for (i = 0; i < ARRAY_SIZE(client); i++) {
-				if (i915_request_wait(client[i], 0, HZ / 5) < 0) {
-					pr_err("%s: %s request still executing!\n",
-					       engine->name,
-					       error_repr(p->error[i]));
+				if (i915_request_wait(client[i], 0, HZ / 5) < 0)
+					pr_debug("%s: %s request incomplete!\n",
+						 engine->name,
+						 error_repr(p->error[i]));
+
+				if (!i915_request_started(client[i])) {
+					pr_debug("%s: %s request not stated!\n",
+						 engine->name,
+						 error_repr(p->error[i]));
 					err = -ETIME;
 					goto out;
 				}
 
+				/* Kick the tasklet to process the error */
+				intel_engine_flush_submission(engine);
 				if (client[i]->fence.error != p->error[i]) {
 					pr_err("%s: %s request completed with wrong error code: %d\n",
 					       engine->name,
-- 
2.25.0

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Re: [Intel-gfx] [PATCH 1/4] drm/i915/selftests: Disable capturing forced error states

[Mika Kuoppala]

Chris Wilson <chris@chris-wilson.co.uk> writes:

> When we are forcing the error for a selftest, we don't need to capture
> the GPU state (typically).
>
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>

Reviewed-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>

> ---
>  drivers/gpu/drm/i915/gem/selftests/mock_context.c | 1 +
>  1 file changed, 1 insertion(+)
>
> diff --git a/drivers/gpu/drm/i915/gem/selftests/mock_context.c b/drivers/gpu/drm/i915/gem/selftests/mock_context.c
> index 81764289cf0d..b12ea1daa29d 100644
> --- a/drivers/gpu/drm/i915/gem/selftests/mock_context.c
> +++ b/drivers/gpu/drm/i915/gem/selftests/mock_context.c
> @@ -107,6 +107,7 @@ kernel_context(struct drm_i915_private *i915)
>  
>  	i915_gem_context_clear_bannable(ctx);
>  	i915_gem_context_set_persistence(ctx);
> +	i915_gem_context_set_no_error_capture(ctx);
>  
>  	return ctx;
>  }
> -- 
> 2.25.0
>
> _______________________________________________
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> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
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[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/4] drm/i915/selftests: Disable capturing forced error states

[Patchwork]

== Series Details ==

Series: series starting with [1/4] drm/i915/selftests: Disable capturing forced error states
URL   : https://patchwork.freedesktop.org/series/73221/
State : warning

== Summary ==

$ dim checkpatch origin/drm-tip
c6407ea9ac72 drm/i915/selftests: Disable capturing forced error states
e34be8809aed drm/i915/selftests: Drop live_preempt_hang
-:7: WARNING:TYPO_SPELLING: 'preemptable' may be misspelled - perhaps 'preemptible'?
#7: 
live_preempt_reset's use of an non-preemptable spinner. The latter does

total: 0 errors, 1 warnings, 0 checks, 190 lines checked
a25b770e208d drm/i915/selftests: Exercise timeslice rewinding
-:13: WARNING:COMMIT_LOG_LONG_LINE: Possible unwrapped commit description (prefer a maximum 75 chars per line)
#13: 
References: 5ba32c7be81e ("drm/i915/execlists: Always force a context reload when rewinding RING_TAIL")

-:13: ERROR:GIT_COMMIT_ID: Please use git commit description style 'commit <12+ chars of sha1> ("<title line>")' - ie: 'commit 5ba32c7be81e ("drm/i915/execlists: Always force a context reload when rewinding RING_TAIL")'
#13: 
References: 5ba32c7be81e ("drm/i915/execlists: Always force a context reload when rewinding RING_TAIL")

-:189: WARNING:MEMORY_BARRIER: memory barrier without comment
#189: FILE: drivers/gpu/drm/i915/gt/selftest_lrc.c:929:
+		wmb();

-:219: WARNING:MEMORY_BARRIER: memory barrier without comment
#219: FILE: drivers/gpu/drm/i915/gt/selftest_lrc.c:959:
+		wmb();

total: 1 errors, 3 warnings, 0 checks, 221 lines checked
793720a0bed2 drm/i915/selftests: Relax timeout for error-interrupt reset processing

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[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/4] drm/i915/selftests: Disable capturing forced error states

[Patchwork]

== Series Details ==

Series: series starting with [1/4] drm/i915/selftests: Disable capturing forced error states
URL   : https://patchwork.freedesktop.org/series/73221/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_7900 -> Patchwork_16501
====================================================

Summary
-------

  **WARNING**

  Minor unknown changes coming with Patchwork_16501 need to be verified
  manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_16501, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16501/index.html

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in Patchwork_16501:

### IGT changes ###

#### Warnings ####

  * igt@gem_ctx_create@basic-files:
    - fi-whl-u:           [INCOMPLETE][1] ([i915#1194]) -> [INCOMPLETE][2]
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7900/fi-whl-u/igt@gem_ctx_create@basic-files.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16501/fi-whl-u/igt@gem_ctx_create@basic-files.html

  
Known issues
------------

  Here are the changes found in Patchwork_16501 that come from known issues:

### IGT changes ###

#### Possible fixes ####

  * igt@i915_selftest@live_execlists:
    - fi-icl-y:           [DMESG-FAIL][3] ([fdo#108569]) -> [PASS][4]
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7900/fi-icl-y/igt@i915_selftest@live_execlists.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16501/fi-icl-y/igt@i915_selftest@live_execlists.html

  * igt@i915_selftest@live_gtt:
    - fi-skl-6770hq:      [TIMEOUT][5] ([fdo#111732] / [fdo#112271]) -> [PASS][6]
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7900/fi-skl-6770hq/igt@i915_selftest@live_gtt.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16501/fi-skl-6770hq/igt@i915_selftest@live_gtt.html
    - fi-skl-6600u:       [TIMEOUT][7] ([fdo#111732] / [fdo#112271]) -> [PASS][8]
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7900/fi-skl-6600u/igt@i915_selftest@live_gtt.html
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16501/fi-skl-6600u/igt@i915_selftest@live_gtt.html

  * igt@kms_chamelium@hdmi-crc-fast:
    - fi-kbl-7500u:       [FAIL][9] ([fdo#109635] / [i915#217]) -> [PASS][10]
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7900/fi-kbl-7500u/igt@kms_chamelium@hdmi-crc-fast.html
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16501/fi-kbl-7500u/igt@kms_chamelium@hdmi-crc-fast.html

  * igt@kms_chamelium@hdmi-hpd-fast:
    - fi-kbl-7500u:       [FAIL][11] ([fdo#111407]) -> [PASS][12]
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7900/fi-kbl-7500u/igt@kms_chamelium@hdmi-hpd-fast.html
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16501/fi-kbl-7500u/igt@kms_chamelium@hdmi-hpd-fast.html

  
  [fdo#108569]: https://bugs.freedesktop.org/show_bug.cgi?id=108569
  [fdo#109635]: https://bugs.freedesktop.org/show_bug.cgi?id=109635
  [fdo#111407]: https://bugs.freedesktop.org/show_bug.cgi?id=111407
  [fdo#111732]: https://bugs.freedesktop.org/show_bug.cgi?id=111732
  [fdo#112271]: https://bugs.freedesktop.org/show_bug.cgi?id=112271
  [i915#1194]: https://gitlab.freedesktop.org/drm/intel/issues/1194
  [i915#217]: https://gitlab.freedesktop.org/drm/intel/issues/217


Participating hosts (51 -> 44)
------------------------------

  Additional (2): fi-kbl-7560u fi-byt-n2820 
  Missing    (9): fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-ivb-3770 fi-cfl-8109u fi-skl-lmem fi-byt-clapper fi-bdw-samus 


Build changes
-------------

  * CI: CI-20190529 -> None
  * Linux: CI_DRM_7900 -> Patchwork_16501

  CI-20190529: 20190529
  CI_DRM_7900: f4ab479a4e3c9e0bc9120f6618b9876bfdece9cc @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_5432: 6677811be6e9be9000b3217e8862353b3945a4f3 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_16501: 793720a0bed295a9b3564ea372092d61a522ac62 @ git://anongit.freedesktop.org/gfx-ci/linux


== Linux commits ==

793720a0bed2 drm/i915/selftests: Relax timeout for error-interrupt reset processing
a25b770e208d drm/i915/selftests: Exercise timeslice rewinding
e34be8809aed drm/i915/selftests: Drop live_preempt_hang
c6407ea9ac72 drm/i915/selftests: Disable capturing forced error states

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16501/index.html
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