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From: "Uwe Kleine-König" <u.kleine-koenig@pengutronix.de>
To: Anson Huang <Anson.Huang@nxp.com>
Cc: robh+dt@kernel.org, mark.rutland@arm.com, shawnguo@kernel.org,
	s.hauer@pengutronix.de, kernel@pengutronix.de,
	festevam@gmail.com, devicetree@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org, Linux-imx@nxp.com
Subject: Re: [PATCH V2 3/7] ARM: dts: imx6sx-nitrogen6sx: Use new pin names with DCE/DTE for UART pins
Date: Mon, 17 Feb 2020 09:35:12 +0100	[thread overview]
Message-ID: <20200217083512.iiydfrdg2v5npte6@pengutronix.de> (raw)
In-Reply-To: <1581743758-4475-4-git-send-email-Anson.Huang@nxp.com>

On Sat, Feb 15, 2020 at 01:15:54PM +0800, Anson Huang wrote:
> Use new pin names containing DCE/DTE for UART RX/TX/RTS/CTS pins, this
> is to distinguish the DCE/DTE functions.
> 
> Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
> ---
>  arch/arm/boot/dts/imx6sx-nitrogen6sx.dts | 20 ++++++++++----------
>  1 file changed, 10 insertions(+), 10 deletions(-)
> 
> diff --git a/arch/arm/boot/dts/imx6sx-nitrogen6sx.dts b/arch/arm/boot/dts/imx6sx-nitrogen6sx.dts
> index 832b5c5..d84ea69 100644
> --- a/arch/arm/boot/dts/imx6sx-nitrogen6sx.dts
> +++ b/arch/arm/boot/dts/imx6sx-nitrogen6sx.dts
> @@ -484,31 +484,31 @@
>  
>  	pinctrl_uart1: uart1grp {
>  		fsl,pins = <
> -			MX6SX_PAD_GPIO1_IO04__UART1_TX		0x1b0b1
> -			MX6SX_PAD_GPIO1_IO05__UART1_RX		0x1b0b1
> +			MX6SX_PAD_GPIO1_IO04__UART1_DCE_TX		0x1b0b1
> +			MX6SX_PAD_GPIO1_IO05__UART1_DCE_RX		0x1b0b1
>  		>;
>  	};
>  
>  	pinctrl_uart2: uart2grp {
>  		fsl,pins = <
> -			MX6SX_PAD_GPIO1_IO06__UART2_TX		0x1b0b1
> -			MX6SX_PAD_GPIO1_IO07__UART2_RX		0x1b0b1
> +			MX6SX_PAD_GPIO1_IO06__UART2_DCE_TX		0x1b0b1
> +			MX6SX_PAD_GPIO1_IO07__UART2_DCE_RX		0x1b0b1
>  		>;
>  	};
>  
>  	pinctrl_uart3: uart3grp {
>  		fsl,pins = <
> -			MX6SX_PAD_QSPI1B_SS0_B__UART3_TX	0x1b0b1
> -			MX6SX_PAD_QSPI1B_SCLK__UART3_RX		0x1b0b1
> +			MX6SX_PAD_QSPI1B_SS0_B__UART3_DCE_TX		0x1b0b1
> +			MX6SX_PAD_QSPI1B_SCLK__UART3_DCE_RX		0x1b0b1

While reviewing this patch I noticed that the user of this pinctrl group
has the property uart-has-rtscts which seems wrong.

>  		>;
>  	};
>  
>  	pinctrl_uart5: uart5grp {
>  		fsl,pins = <
> -			MX6SX_PAD_KEY_COL3__UART5_TX		0x1b0b1
> -			MX6SX_PAD_KEY_ROW3__UART5_RX		0x1b0b1
> -			MX6SX_PAD_SD3_DATA6__UART3_RTS_B	0x1b0b1
> -			MX6SX_PAD_SD3_DATA7__UART3_CTS_B	0x1b0b1
> +			MX6SX_PAD_KEY_COL3__UART5_DCE_TX		0x1b0b1
> +			MX6SX_PAD_KEY_ROW3__UART5_DCE_RX		0x1b0b1
> +			MX6SX_PAD_SD3_DATA6__UART3_DCE_RTS		0x1b0b1
> +			MX6SX_PAD_SD3_DATA7__UART3_DCE_CTS		0x1b0b1

While the property is missing in &uart5.

But the patch is fine, so:

Reviewed-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>

Best regards
Uwe

-- 
Pengutronix e.K.                           | Uwe Kleine-König            |
Industrial Linux Solutions                 | https://www.pengutronix.de/ |

WARNING: multiple messages have this Message-ID (diff)
From: "Uwe Kleine-König" <u.kleine-koenig@pengutronix.de>
To: Anson Huang <Anson.Huang@nxp.com>
Cc: mark.rutland@arm.com, devicetree@vger.kernel.org,
	shawnguo@kernel.org, s.hauer@pengutronix.de,
	linux-kernel@vger.kernel.org, robh+dt@kernel.org,
	Linux-imx@nxp.com, kernel@pengutronix.de, festevam@gmail.com,
	linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH V2 3/7] ARM: dts: imx6sx-nitrogen6sx: Use new pin names with DCE/DTE for UART pins
Date: Mon, 17 Feb 2020 09:35:12 +0100	[thread overview]
Message-ID: <20200217083512.iiydfrdg2v5npte6@pengutronix.de> (raw)
In-Reply-To: <1581743758-4475-4-git-send-email-Anson.Huang@nxp.com>

On Sat, Feb 15, 2020 at 01:15:54PM +0800, Anson Huang wrote:
> Use new pin names containing DCE/DTE for UART RX/TX/RTS/CTS pins, this
> is to distinguish the DCE/DTE functions.
> 
> Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
> ---
>  arch/arm/boot/dts/imx6sx-nitrogen6sx.dts | 20 ++++++++++----------
>  1 file changed, 10 insertions(+), 10 deletions(-)
> 
> diff --git a/arch/arm/boot/dts/imx6sx-nitrogen6sx.dts b/arch/arm/boot/dts/imx6sx-nitrogen6sx.dts
> index 832b5c5..d84ea69 100644
> --- a/arch/arm/boot/dts/imx6sx-nitrogen6sx.dts
> +++ b/arch/arm/boot/dts/imx6sx-nitrogen6sx.dts
> @@ -484,31 +484,31 @@
>  
>  	pinctrl_uart1: uart1grp {
>  		fsl,pins = <
> -			MX6SX_PAD_GPIO1_IO04__UART1_TX		0x1b0b1
> -			MX6SX_PAD_GPIO1_IO05__UART1_RX		0x1b0b1
> +			MX6SX_PAD_GPIO1_IO04__UART1_DCE_TX		0x1b0b1
> +			MX6SX_PAD_GPIO1_IO05__UART1_DCE_RX		0x1b0b1
>  		>;
>  	};
>  
>  	pinctrl_uart2: uart2grp {
>  		fsl,pins = <
> -			MX6SX_PAD_GPIO1_IO06__UART2_TX		0x1b0b1
> -			MX6SX_PAD_GPIO1_IO07__UART2_RX		0x1b0b1
> +			MX6SX_PAD_GPIO1_IO06__UART2_DCE_TX		0x1b0b1
> +			MX6SX_PAD_GPIO1_IO07__UART2_DCE_RX		0x1b0b1
>  		>;
>  	};
>  
>  	pinctrl_uart3: uart3grp {
>  		fsl,pins = <
> -			MX6SX_PAD_QSPI1B_SS0_B__UART3_TX	0x1b0b1
> -			MX6SX_PAD_QSPI1B_SCLK__UART3_RX		0x1b0b1
> +			MX6SX_PAD_QSPI1B_SS0_B__UART3_DCE_TX		0x1b0b1
> +			MX6SX_PAD_QSPI1B_SCLK__UART3_DCE_RX		0x1b0b1

While reviewing this patch I noticed that the user of this pinctrl group
has the property uart-has-rtscts which seems wrong.

>  		>;
>  	};
>  
>  	pinctrl_uart5: uart5grp {
>  		fsl,pins = <
> -			MX6SX_PAD_KEY_COL3__UART5_TX		0x1b0b1
> -			MX6SX_PAD_KEY_ROW3__UART5_RX		0x1b0b1
> -			MX6SX_PAD_SD3_DATA6__UART3_RTS_B	0x1b0b1
> -			MX6SX_PAD_SD3_DATA7__UART3_CTS_B	0x1b0b1
> +			MX6SX_PAD_KEY_COL3__UART5_DCE_TX		0x1b0b1
> +			MX6SX_PAD_KEY_ROW3__UART5_DCE_RX		0x1b0b1
> +			MX6SX_PAD_SD3_DATA6__UART3_DCE_RTS		0x1b0b1
> +			MX6SX_PAD_SD3_DATA7__UART3_DCE_CTS		0x1b0b1

While the property is missing in &uart5.

But the patch is fine, so:

Reviewed-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>

Best regards
Uwe

-- 
Pengutronix e.K.                           | Uwe Kleine-König            |
Industrial Linux Solutions                 | https://www.pengutronix.de/ |

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  reply	other threads:[~2020-02-17  8:35 UTC|newest]

Thread overview: 30+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-02-15  5:15 [PATCH V2 0/7] Add missing UART DCE/DTE pins macro defines Anson Huang
2020-02-15  5:15 ` Anson Huang
2020-02-15  5:15 ` [PATCH V2 1/7] ARM: dts: imx6sx: Improve UART " Anson Huang
2020-02-15  5:15   ` Anson Huang
2020-02-17  8:23   ` Uwe Kleine-König
2020-02-17  8:23     ` Uwe Kleine-König
2020-02-15  5:15 ` [PATCH V2 2/7] ARM: dts: imx6sx: Add missing UART RTS/CTS pins mux Anson Huang
2020-02-15  5:15   ` Anson Huang
2020-02-17  8:26   ` Uwe Kleine-König
2020-02-17  8:26     ` Uwe Kleine-König
2020-02-15  5:15 ` [PATCH V2 3/7] ARM: dts: imx6sx-nitrogen6sx: Use new pin names with DCE/DTE for UART pins Anson Huang
2020-02-15  5:15   ` Anson Huang
2020-02-17  8:35   ` Uwe Kleine-König [this message]
2020-02-17  8:35     ` Uwe Kleine-König
2020-02-15  5:15 ` [PATCH V2 4/7] ARM: dts: imx6sx-sabreauto: " Anson Huang
2020-02-15  5:15   ` Anson Huang
2020-02-17  8:35   ` Uwe Kleine-König
2020-02-17  8:35     ` Uwe Kleine-König
2020-02-15  5:15 ` [PATCH V2 5/7] ARM: dts: imx6sx-sdb: " Anson Huang
2020-02-15  5:15   ` Anson Huang
2020-02-17  8:36   ` Uwe Kleine-König
2020-02-17  8:36     ` Uwe Kleine-König
2020-02-15  5:15 ` [PATCH V2 6/7] ARM: dts: imx6sx-softing-vining-2000: " Anson Huang
2020-02-15  5:15   ` Anson Huang
2020-02-17  8:37   ` Uwe Kleine-König
2020-02-17  8:37     ` Uwe Kleine-König
2020-02-15  5:15 ` [PATCH V2 7/7] ARM: dts: imx6sx-udoo-neo: " Anson Huang
2020-02-15  5:15   ` Anson Huang
2020-02-17  8:38   ` Uwe Kleine-König
2020-02-17  8:38     ` Uwe Kleine-König

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