[igt-dev] [PATCH i-g-t 1/2] lib/igt_debugfs: Add igt_crc_get_previous()

[igt-dev] [PATCH i-g-t 1/2] lib/igt_debugfs: Add igt_crc_get_previous()

[Ville Syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Add a new helper to return the most recently captured crc
without waiting for the current frame's crc to be captured.
Useful when we pipeline flips and crc captures more deeply
to eliminate dead time between the flips.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 lib/igt_debugfs.c | 29 +++++++++++++++++++++++++++++
 lib/igt_debugfs.h |  1 +
 2 files changed, 30 insertions(+)

diff --git a/lib/igt_debugfs.c b/lib/igt_debugfs.c
index 8cac9d1e148e..844763d51c3e 100644
--- a/lib/igt_debugfs.c
+++ b/lib/igt_debugfs.c
@@ -970,6 +970,35 @@ igt_pipe_crc_get_current(int drm_fd, igt_pipe_crc_t *pipe_crc, igt_crc_t *crc)
 	crc_sanity_checks(pipe_crc, crc);
 }
 
+/**
+ * igt_pipe_crc_get_previous:
+ * @drm_fd: Pointer to drm fd for vblank counter
+ * @pipe_crc: pipe CRC object
+ * @crc: buffer pointer for the captured CRC value
+ *
+ * Same as igt_pipe_crc_get_current(), but will return the crc
+ * most recently captured (ie. does not wait an extra frame for
+ * the crc computation for the current frame to finish).
+ */
+void
+igt_pipe_crc_get_previous(int drm_fd, igt_pipe_crc_t *pipe_crc, igt_crc_t *crc)
+{
+	unsigned vblank = kmstest_get_vblank(drm_fd, pipe_crc->pipe, 0);
+
+	do {
+		read_one_crc(pipe_crc, crc);
+
+		/* Only works with valid frame counter */
+		if (!crc->has_valid_frame) {
+			igt_pipe_crc_drain(pipe_crc);
+			igt_pipe_crc_get_single(pipe_crc, crc);
+			return;
+		}
+	} while (igt_vblank_before(crc->frame, vblank));
+
+	crc_sanity_checks(pipe_crc, crc);
+}
+
 /**
  * igt_pipe_crc_collect_crc:
  * @pipe_crc: pipe CRC object
diff --git a/lib/igt_debugfs.h b/lib/igt_debugfs.h
index 1e0cc108d6fb..69f65f789bd3 100644
--- a/lib/igt_debugfs.h
+++ b/lib/igt_debugfs.h
@@ -104,6 +104,7 @@ int igt_pipe_crc_get_crcs(igt_pipe_crc_t *pipe_crc, int n_crcs,
 void igt_pipe_crc_drain(igt_pipe_crc_t *pipe_crc);
 void igt_pipe_crc_get_single(igt_pipe_crc_t *pipe_crc, igt_crc_t *out_crc);
 void igt_pipe_crc_get_current(int drm_fd, igt_pipe_crc_t *pipe_crc, igt_crc_t *crc);
+void igt_pipe_crc_get_previous(int drm_fd, igt_pipe_crc_t *pipe_crc, igt_crc_t *crc);
 
 void igt_pipe_crc_collect_crc(igt_pipe_crc_t *pipe_crc, igt_crc_t *out_crc);
 
-- 
2.24.1

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[igt-dev] [PATCH i-g-t 2/2] tests/kms_plane: Pipeline crc capture and flips

[Ville Syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Eliminate some dead time used to wait for crcs by pipelining
the flips and crc capture.

On KBL:
time kms_plane --r pixel-format-pipe-A-planes
- real	0m22,592s
+ real	0m14,527s

time kms_plane --r pixel-format-pipe-A-planes --extended
- real	1m8,090s
+ real	0m38,738s

To keep the code somewhat sane we only pipeline while
capturing the colors for a single pixel format. That does
still leave a few non-pipelined frames when switching from
one pixel format to another. Which explains why the extended
test gets closer to the -50% mark as it tests more colors and
thus has a larger proportion of optimally pipelined flips.

Not sure how horrible the code would become if we tried to
maintain the pipelining throughout the test. For now let's
just accept the small victory and move on.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 tests/kms_plane.c | 70 ++++++++++++++++++++++++++++++++---------------
 1 file changed, 48 insertions(+), 22 deletions(-)

diff --git a/tests/kms_plane.c b/tests/kms_plane.c
index 9ef3a7f3c1b0..9ad366824c0d 100644
--- a/tests/kms_plane.c
+++ b/tests/kms_plane.c
@@ -500,8 +500,9 @@ static void test_format_plane_color(data_t *data, enum pipe pipe,
 		igt_plane_set_size(plane, width, height);
 	}
 
+	if (crc)
+		igt_pipe_crc_get_previous(data->drm_fd, data->pipe_crc, crc);
 	igt_display_commit2(&data->display, data->display.is_atomic ? COMMIT_ATOMIC : COMMIT_UNIVERSAL);
-	igt_pipe_crc_get_current(data->display.drm_fd, data->pipe_crc, crc);
 
 	igt_remove_fb(data->drm_fd, &old_fb);
 }
@@ -525,6 +526,42 @@ static int num_unique_crcs(const igt_crc_t crc[], int num_crc)
 	return num_unique_crc;
 }
 
+static void capture_format_crcs(data_t *data, enum pipe pipe,
+				igt_plane_t *plane,
+				uint32_t format, uint64_t modifier,
+				int width, int height,
+				enum igt_color_encoding encoding,
+				enum igt_color_range range,
+				igt_crc_t crc[], struct igt_fb *fb)
+{
+	int i;
+
+	for (i = 0; i < data->num_colors; i++) {
+		const color_t *c = &data->colors[i];
+
+		/*
+		 * The flip issued during frame N will latch
+		 * at the start of frame N+1, and its CRC will
+		 * be ready at the start of frame N+2. So the
+		 * CRC captured here before the flip is issued
+		 * is for frame N-2.
+		 */
+		test_format_plane_color(data, pipe, plane, format, modifier,
+					width, height, encoding, range, c,
+					i >= 2 ? &crc[i - 2] : NULL, fb);
+	}
+
+	/*
+	 * Get the remaining two crcs
+	 *
+	 * TODO: avoid the extra wait by maintaining the pipeline
+	 * between different pixel formats as well? Could get messy.
+	 */
+	igt_pipe_crc_get_previous(data->drm_fd, data->pipe_crc, &crc[i - 2]);
+	i++;
+	igt_pipe_crc_get_current(data->drm_fd, data->pipe_crc, &crc[i - 2]);
+}
+
 static bool test_format_plane_colors(data_t *data, enum pipe pipe,
 				     igt_plane_t *plane,
 				     uint32_t format, uint64_t modifier,
@@ -534,21 +571,17 @@ static bool test_format_plane_colors(data_t *data, enum pipe pipe,
 				     igt_crc_t ref_crc[],
 				     struct igt_fb *fb)
 {
-	int crc_mismatch_count = 0;
+	igt_crc_t crc[ARRAY_SIZE(colors_extended)];
 	unsigned int crc_mismatch_mask = 0;
+	int crc_mismatch_count = 0;
 	bool result = true;
+	int i;
 
-	for (int i = 0; i < data->num_colors; i++) {
-		const color_t *c = &data->colors[i];
-		igt_crc_t crc;
-
-		test_format_plane_color(data, pipe, plane,
-					format, modifier,
-					width, height,
-					encoding, range,
-					c, &crc, fb);
+	capture_format_crcs(data, pipe, plane, format, modifier,
+			    width, height, encoding, range, crc, fb);
 
-		if (!igt_check_crc_equal(&crc, &ref_crc[i])) {
+	for (i = 0; i < data->num_colors; i++) {
+		if (!igt_check_crc_equal(&crc[i], &ref_crc[i])) {
 			crc_mismatch_count++;
 			crc_mismatch_mask |= (1 << i);
 			result = false;
@@ -700,16 +733,9 @@ static bool test_format_plane(data_t *data, enum pipe pipe,
 		igt_remove_fb(data->drm_fd, &test_fb);
 	}
 
-	for (int i = 0; i < data->num_colors; i++) {
-		const color_t *c = &data->colors[i];
-
-		test_format_plane_color(data, pipe, plane,
-					format, modifier,
-					width, height,
-					IGT_COLOR_YCBCR_BT709,
-					IGT_COLOR_YCBCR_LIMITED_RANGE,
-					c, &ref_crc[i], &fb);
-	}
+	capture_format_crcs(data, pipe, plane, format, modifier,
+			    width, height, IGT_COLOR_YCBCR_BT709,
+			    IGT_COLOR_YCBCR_LIMITED_RANGE, ref_crc, &fb);
 
 	/*
 	 * Make sure we have some difference between the colors. This
-- 
2.24.1

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Re: [igt-dev] [PATCH i-g-t 2/2] tests/kms_plane: Pipeline crc capture and flips

[Ville Syrjälä]

On Fri, Feb 21, 2020 at 08:26:57PM +0200, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> Eliminate some dead time used to wait for crcs by pipelining
> the flips and crc capture.
> 
> On KBL:
> time kms_plane --r pixel-format-pipe-A-planes
> - real	0m22,592s
> + real	0m14,527s
> 
> time kms_plane --r pixel-format-pipe-A-planes --extended
> - real	1m8,090s
> + real	0m38,738s
> 
> To keep the code somewhat sane we only pipeline while
> capturing the colors for a single pixel format. That does
> still leave a few non-pipelined frames when switching from
> one pixel format to another. Which explains why the extended
> test gets closer to the -50% mark as it tests more colors and
> thus has a larger proportion of optimally pipelined flips.
> 
> Not sure how horrible the code would become if we tried to
> maintain the pipelining throughout the test. For now let's
> just accept the small victory and move on.
> 
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
>  tests/kms_plane.c | 70 ++++++++++++++++++++++++++++++++---------------
>  1 file changed, 48 insertions(+), 22 deletions(-)
> 
> diff --git a/tests/kms_plane.c b/tests/kms_plane.c
> index 9ef3a7f3c1b0..9ad366824c0d 100644
> --- a/tests/kms_plane.c
> +++ b/tests/kms_plane.c
> @@ -500,8 +500,9 @@ static void test_format_plane_color(data_t *data, enum pipe pipe,
>  		igt_plane_set_size(plane, width, height);
>  	}
>  
> +	if (crc)
> +		igt_pipe_crc_get_previous(data->drm_fd, data->pipe_crc, crc);

Actually need to do this before painting the new fb as that can be
slow. If it takes more than a frame then we'd read the crc for frame N-1
instead of N-2 as we intended. But that's still a bit fragile perhaps.
I guess what I really need to do is sample the frame counter when I do
the flip so that I know exactly which crc I need.

>  	igt_display_commit2(&data->display, data->display.is_atomic ? COMMIT_ATOMIC : COMMIT_UNIVERSAL);
> -	igt_pipe_crc_get_current(data->display.drm_fd, data->pipe_crc, crc);
>  
>  	igt_remove_fb(data->drm_fd, &old_fb);
>  }
> @@ -525,6 +526,42 @@ static int num_unique_crcs(const igt_crc_t crc[], int num_crc)
>  	return num_unique_crc;
>  }
>  
> +static void capture_format_crcs(data_t *data, enum pipe pipe,
> +				igt_plane_t *plane,
> +				uint32_t format, uint64_t modifier,
> +				int width, int height,
> +				enum igt_color_encoding encoding,
> +				enum igt_color_range range,
> +				igt_crc_t crc[], struct igt_fb *fb)
> +{
> +	int i;
> +
> +	for (i = 0; i < data->num_colors; i++) {
> +		const color_t *c = &data->colors[i];
> +
> +		/*
> +		 * The flip issued during frame N will latch
> +		 * at the start of frame N+1, and its CRC will
> +		 * be ready at the start of frame N+2. So the
> +		 * CRC captured here before the flip is issued
> +		 * is for frame N-2.
> +		 */
> +		test_format_plane_color(data, pipe, plane, format, modifier,
> +					width, height, encoding, range, c,
> +					i >= 2 ? &crc[i - 2] : NULL, fb);
> +	}
> +
> +	/*
> +	 * Get the remaining two crcs
> +	 *
> +	 * TODO: avoid the extra wait by maintaining the pipeline
> +	 * between different pixel formats as well? Could get messy.
> +	 */
> +	igt_pipe_crc_get_previous(data->drm_fd, data->pipe_crc, &crc[i - 2]);
> +	i++;
> +	igt_pipe_crc_get_current(data->drm_fd, data->pipe_crc, &crc[i - 2]);
> +}
> +
>  static bool test_format_plane_colors(data_t *data, enum pipe pipe,
>  				     igt_plane_t *plane,
>  				     uint32_t format, uint64_t modifier,
> @@ -534,21 +571,17 @@ static bool test_format_plane_colors(data_t *data, enum pipe pipe,
>  				     igt_crc_t ref_crc[],
>  				     struct igt_fb *fb)
>  {
> -	int crc_mismatch_count = 0;
> +	igt_crc_t crc[ARRAY_SIZE(colors_extended)];
>  	unsigned int crc_mismatch_mask = 0;
> +	int crc_mismatch_count = 0;
>  	bool result = true;
> +	int i;
>  
> -	for (int i = 0; i < data->num_colors; i++) {
> -		const color_t *c = &data->colors[i];
> -		igt_crc_t crc;
> -
> -		test_format_plane_color(data, pipe, plane,
> -					format, modifier,
> -					width, height,
> -					encoding, range,
> -					c, &crc, fb);
> +	capture_format_crcs(data, pipe, plane, format, modifier,
> +			    width, height, encoding, range, crc, fb);
>  
> -		if (!igt_check_crc_equal(&crc, &ref_crc[i])) {
> +	for (i = 0; i < data->num_colors; i++) {
> +		if (!igt_check_crc_equal(&crc[i], &ref_crc[i])) {
>  			crc_mismatch_count++;
>  			crc_mismatch_mask |= (1 << i);
>  			result = false;
> @@ -700,16 +733,9 @@ static bool test_format_plane(data_t *data, enum pipe pipe,
>  		igt_remove_fb(data->drm_fd, &test_fb);
>  	}
>  
> -	for (int i = 0; i < data->num_colors; i++) {
> -		const color_t *c = &data->colors[i];
> -
> -		test_format_plane_color(data, pipe, plane,
> -					format, modifier,
> -					width, height,
> -					IGT_COLOR_YCBCR_BT709,
> -					IGT_COLOR_YCBCR_LIMITED_RANGE,
> -					c, &ref_crc[i], &fb);
> -	}
> +	capture_format_crcs(data, pipe, plane, format, modifier,
> +			    width, height, IGT_COLOR_YCBCR_BT709,
> +			    IGT_COLOR_YCBCR_LIMITED_RANGE, ref_crc, &fb);
>  
>  	/*
>  	 * Make sure we have some difference between the colors. This
> -- 
> 2.24.1

-- 
Ville Syrjälä
Intel
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[igt-dev] ✗ Fi.CI.BAT: failure for series starting with [i-g-t,1/2] lib/igt_debugfs: Add igt_crc_get_previous()

[Patchwork]

== Series Details ==

Series: series starting with [i-g-t,1/2] lib/igt_debugfs: Add igt_crc_get_previous()
URL   : https://patchwork.freedesktop.org/series/73787/
State : failure

== Summary ==

CI Bug Log - changes from IGT_5458 -> IGTPW_4213
====================================================

Summary
-------

  **FAILURE**

  Serious unknown changes coming with IGTPW_4213 absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in IGTPW_4213, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4213/index.html

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in IGTPW_4213:

### IGT changes ###

#### Possible regressions ####

  * igt@i915_selftest@live_gt_engines:
    - fi-bwr-2160:        [PASS][1] -> [INCOMPLETE][2]
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5458/fi-bwr-2160/igt@i915_selftest@live_gt_engines.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4213/fi-bwr-2160/igt@i915_selftest@live_gt_engines.html

  
Known issues
------------

  Here are the changes found in IGTPW_4213 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@gem_close_race@basic-process:
    - fi-byt-j1900:       [PASS][3] -> [FAIL][4] ([i915#694])
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5458/fi-byt-j1900/igt@gem_close_race@basic-process.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4213/fi-byt-j1900/igt@gem_close_race@basic-process.html

  * igt@i915_selftest@live_sanitycheck:
    - fi-icl-u3:          [PASS][5] -> [DMESG-WARN][6] ([i915#585])
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5458/fi-icl-u3/igt@i915_selftest@live_sanitycheck.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4213/fi-icl-u3/igt@i915_selftest@live_sanitycheck.html

  * igt@kms_chamelium@hdmi-hpd-fast:
    - fi-kbl-7500u:       [PASS][7] -> [FAIL][8] ([fdo#111096] / [i915#323])
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5458/fi-kbl-7500u/igt@kms_chamelium@hdmi-hpd-fast.html
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4213/fi-kbl-7500u/igt@kms_chamelium@hdmi-hpd-fast.html

  * igt@prime_self_import@basic-with_fd_dup:
    - fi-tgl-y:           [PASS][9] -> [DMESG-WARN][10] ([CI#94] / [i915#402]) +1 similar issue
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5458/fi-tgl-y/igt@prime_self_import@basic-with_fd_dup.html
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4213/fi-tgl-y/igt@prime_self_import@basic-with_fd_dup.html

  
#### Possible fixes ####

  * igt@gem_close_race@basic-threads:
    - fi-byt-n2820:       [INCOMPLETE][11] ([i915#45]) -> [PASS][12]
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5458/fi-byt-n2820/igt@gem_close_race@basic-threads.html
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4213/fi-byt-n2820/igt@gem_close_race@basic-threads.html
    - fi-hsw-4770:        [TIMEOUT][13] ([fdo#112271] / [i915#1084]) -> [PASS][14]
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5458/fi-hsw-4770/igt@gem_close_race@basic-threads.html
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4213/fi-hsw-4770/igt@gem_close_race@basic-threads.html

  * igt@i915_selftest@live_gem_contexts:
    - fi-cfl-guc:         [DMESG-FAIL][15] ([i915#623]) -> [PASS][16]
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5458/fi-cfl-guc/igt@i915_selftest@live_gem_contexts.html
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4213/fi-cfl-guc/igt@i915_selftest@live_gem_contexts.html

  * igt@i915_selftest@live_gtt:
    - fi-skl-6600u:       [TIMEOUT][17] ([fdo#111732] / [fdo#112271]) -> [PASS][18]
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5458/fi-skl-6600u/igt@i915_selftest@live_gtt.html
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4213/fi-skl-6600u/igt@i915_selftest@live_gtt.html

  * igt@kms_addfb_basic@addfb25-y-tiled:
    - fi-tgl-y:           [DMESG-WARN][19] ([CI#94] / [i915#402]) -> [PASS][20] +1 similar issue
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5458/fi-tgl-y/igt@kms_addfb_basic@addfb25-y-tiled.html
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4213/fi-tgl-y/igt@kms_addfb_basic@addfb25-y-tiled.html

  
#### Warnings ####

  * igt@amdgpu/amd_prime@amd-to-i915:
    - fi-icl-u3:          [SKIP][21] ([fdo#109315] / [i915#585]) -> [SKIP][22] ([fdo#109315])
   [21]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5458/fi-icl-u3/igt@amdgpu/amd_prime@amd-to-i915.html
   [22]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4213/fi-icl-u3/igt@amdgpu/amd_prime@amd-to-i915.html

  * igt@gem_close_race@basic-threads:
    - fi-byt-j1900:       [INCOMPLETE][23] ([i915#45]) -> [TIMEOUT][24] ([fdo#112271] / [i915#1084] / [i915#816])
   [23]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5458/fi-byt-j1900/igt@gem_close_race@basic-threads.html
   [24]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4213/fi-byt-j1900/igt@gem_close_race@basic-threads.html

  
  [CI#94]: https://gitlab.freedesktop.org/gfx-ci/i915-infra/issues/94
  [fdo#109315]: https://bugs.freedesktop.org/show_bug.cgi?id=109315
  [fdo#111096]: https://bugs.freedesktop.org/show_bug.cgi?id=111096
  [fdo#111732]: https://bugs.freedesktop.org/show_bug.cgi?id=111732
  [fdo#112271]: https://bugs.freedesktop.org/show_bug.cgi?id=112271
  [i915#1084]: https://gitlab.freedesktop.org/drm/intel/issues/1084
  [i915#323]: https://gitlab.freedesktop.org/drm/intel/issues/323
  [i915#402]: https://gitlab.freedesktop.org/drm/intel/issues/402
  [i915#45]: https://gitlab.freedesktop.org/drm/intel/issues/45
  [i915#585]: https://gitlab.freedesktop.org/drm/intel/issues/585
  [i915#623]: https://gitlab.freedesktop.org/drm/intel/issues/623
  [i915#694]: https://gitlab.freedesktop.org/drm/intel/issues/694
  [i915#816]: https://gitlab.freedesktop.org/drm/intel/issues/816


Participating hosts (53 -> 45)
------------------------------

  Missing    (8): fi-ilk-m540 fi-hsw-4200u fi-skl-6770hq fi-byt-squawks fi-bsw-cyan fi-ctg-p8600 fi-byt-clapper fi-bdw-samus 


Build changes
-------------

  * CI: CI-20190529 -> None
  * IGT: IGT_5458 -> IGTPW_4213

  CI-20190529: 20190529
  CI_DRM_7982: f02659605b48dcabb562bbb96db2996b334e57fd @ git://anongit.freedesktop.org/gfx-ci/linux
  IGTPW_4213: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4213/index.html
  IGT_5458: 5f7e4ae6a91ed2c104593b8abd5b71a6cc96fc10 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4213/index.html
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