* [Intel-gfx] [PATCH v3 0/7] 3 display pipes combination system support
@ 2020-02-24 12:39 Anshuman Gupta
2020-02-24 12:39 ` [Intel-gfx] [PATCH v3 1/7] drm/i915: Iterate over pipes and skip the disabled one Anshuman Gupta
` (11 more replies)
0 siblings, 12 replies; 19+ messages in thread
From: Anshuman Gupta @ 2020-02-24 12:39 UTC (permalink / raw)
To: intel-gfx; +Cc: jani.nikula
This update is Rebased and fixes the review comment provided by
Ville.
Anshuman Gupta (7):
drm/i915: Iterate over pipes and skip the disabled one
drm/i915: Remove (pipe == crtc->index) assumption
drm/i915: Fix broken transcoder err state
drm/i915: Fix wrongly populated plane possible_crtcs bit mask
drm/i915: Get first crtc instead of PIPE_A crtc
drm/i915: Add WARN_ON in intel_get_crtc_for_pipe()
drm/i915: Fix broken num_entries in skl_ddb_allocation_overlaps
drivers/gpu/drm/i915/display/intel_audio.c | 2 +-
drivers/gpu/drm/i915/display/intel_display.c | 44 ++++++++++++++-----
drivers/gpu/drm/i915/display/intel_display.h | 5 ++-
.../drm/i915/display/intel_display_types.h | 15 ++++++-
drivers/gpu/drm/i915/display/intel_sprite.c | 5 +--
drivers/gpu/drm/i915/i915_irq.c | 28 ++++++++----
6 files changed, 71 insertions(+), 28 deletions(-)
--
2.24.0
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^ permalink raw reply [flat|nested] 19+ messages in thread
* [Intel-gfx] [PATCH v3 1/7] drm/i915: Iterate over pipes and skip the disabled one
2020-02-24 12:39 [Intel-gfx] [PATCH v3 0/7] 3 display pipes combination system support Anshuman Gupta
@ 2020-02-24 12:39 ` Anshuman Gupta
2020-02-24 12:39 ` [Intel-gfx] [PATCH v3 2/7] drm/i915: Remove (pipe == crtc->index) assumption Anshuman Gupta
` (10 subsequent siblings)
11 siblings, 0 replies; 19+ messages in thread
From: Anshuman Gupta @ 2020-02-24 12:39 UTC (permalink / raw)
To: intel-gfx; +Cc: jani.nikula
It should not be assumed that a disabled display pipe will be
always last the pipe.
for_each_pipe() should iterate over I915_MAX_PIPES and check
for the disabled pipe and skip that pipe so that it should not
initialize the intel crtc for any disabled pipes.
Due to changes in for_each_pipe() macro, it requires to handle
the below compilation error.
"suggest explicit braces to avoid ambiguous ‘else’
[-Werror=dangling-else]"
v2:
- Cosmetic changes, removed unwanted parentheses. [Ville]
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Anshuman Gupta <anshuman.gupta@intel.com>
---
drivers/gpu/drm/i915/display/intel_display.h | 5 +++--
drivers/gpu/drm/i915/i915_irq.c | 6 ++++--
2 files changed, 7 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display.h b/drivers/gpu/drm/i915/display/intel_display.h
index f92efbbec838..2d688feb2ef3 100644
--- a/drivers/gpu/drm/i915/display/intel_display.h
+++ b/drivers/gpu/drm/i915/display/intel_display.h
@@ -313,10 +313,11 @@ enum phy_fia {
};
#define for_each_pipe(__dev_priv, __p) \
- for ((__p) = 0; (__p) < INTEL_NUM_PIPES(__dev_priv); (__p)++)
+ for ((__p) = 0; (__p) < I915_MAX_PIPES; (__p)++) \
+ for_each_if(INTEL_INFO(__dev_priv)->pipe_mask & BIT(__p))
#define for_each_pipe_masked(__dev_priv, __p, __mask) \
- for ((__p) = 0; (__p) < INTEL_NUM_PIPES(__dev_priv); (__p)++) \
+ for_each_pipe(__dev_priv, __p) \
for_each_if((__mask) & BIT(__p))
#define for_each_cpu_transcoder_masked(__dev_priv, __t, __mask) \
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index 5d1b11346145..854701aab4f1 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -1749,11 +1749,12 @@ static void ibx_irq_handler(struct drm_i915_private *dev_priv, u32 pch_iir)
if (pch_iir & SDE_POISON)
drm_err(&dev_priv->drm, "PCH poison interrupt\n");
- if (pch_iir & SDE_FDI_MASK)
+ if (pch_iir & SDE_FDI_MASK) {
for_each_pipe(dev_priv, pipe)
drm_dbg(&dev_priv->drm, " pipe %c FDI IIR: 0x%08x\n",
pipe_name(pipe),
I915_READ(FDI_RX_IIR(pipe)));
+ }
if (pch_iir & (SDE_TRANSB_CRC_DONE | SDE_TRANSA_CRC_DONE))
drm_dbg(&dev_priv->drm, "PCH transcoder CRC done interrupt\n");
@@ -1833,11 +1834,12 @@ static void cpt_irq_handler(struct drm_i915_private *dev_priv, u32 pch_iir)
if (pch_iir & SDE_AUDIO_CP_CHG_CPT)
drm_dbg(&dev_priv->drm, "Audio CP change interrupt\n");
- if (pch_iir & SDE_FDI_MASK_CPT)
+ if (pch_iir & SDE_FDI_MASK_CPT) {
for_each_pipe(dev_priv, pipe)
drm_dbg(&dev_priv->drm, " pipe %c FDI IIR: 0x%08x\n",
pipe_name(pipe),
I915_READ(FDI_RX_IIR(pipe)));
+ }
if (pch_iir & SDE_ERROR_CPT)
cpt_serr_int_handler(dev_priv);
--
2.24.0
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^ permalink raw reply related [flat|nested] 19+ messages in thread
* [Intel-gfx] [PATCH v3 2/7] drm/i915: Remove (pipe == crtc->index) assumption
2020-02-24 12:39 [Intel-gfx] [PATCH v3 0/7] 3 display pipes combination system support Anshuman Gupta
2020-02-24 12:39 ` [Intel-gfx] [PATCH v3 1/7] drm/i915: Iterate over pipes and skip the disabled one Anshuman Gupta
@ 2020-02-24 12:39 ` Anshuman Gupta
2020-02-24 12:40 ` [Intel-gfx] [PATCH v3 3/7] drm/i915: Fix broken transcoder err state Anshuman Gupta
` (9 subsequent siblings)
11 siblings, 0 replies; 19+ messages in thread
From: Anshuman Gupta @ 2020-02-24 12:39 UTC (permalink / raw)
To: intel-gfx; +Cc: jani.nikula
we can't have (pipe == crtc->index) assumption in
driver in order to support 3 non-contiguous
display pipe system.
FIXME: Remove the WARN_ON(drm_crtc_index(&crtc->base) != crtc->pipe)
when we will fix all such assumption.
changes since RFC:
- Added again removed (pipe == crtc->index) WARN_ON.
- Pass drm_crtc_index instead of intel pipe in order to
call drm_handle_vblank().
v2:
- Used drm_crtc_handle_vblank()/drm_crtc_wait_one_vblank()
instead of drm_handle_vblank/drm_wait_one_vblank(). [Jani]
- Introduced intel_handle_vblank() helper to avoid sprinkle
of intel_crtc across irq_handlers. [Ville]
v3:
- Moved intel_handle_vblank() from header to i915_irq.c. [Ville]
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Anshuman Gupta <anshuman.gupta@intel.com>
---
drivers/gpu/drm/i915/display/intel_display.c | 8 +++----
.../drm/i915/display/intel_display_types.h | 6 ++++-
drivers/gpu/drm/i915/i915_irq.c | 22 +++++++++++++------
3 files changed, 24 insertions(+), 12 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 3031e64ee518..3aab97573c0c 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -14299,11 +14299,11 @@ verify_single_dpll_state(struct drm_i915_private *dev_priv,
if (new_crtc_state->hw.active)
I915_STATE_WARN(!(pll->active_mask & crtc_mask),
"pll active mismatch (expected pipe %c in active mask 0x%02x)\n",
- pipe_name(drm_crtc_index(&crtc->base)), pll->active_mask);
+ pipe_name(crtc->pipe), pll->active_mask);
else
I915_STATE_WARN(pll->active_mask & crtc_mask,
"pll active mismatch (didn't expect pipe %c in active mask 0x%02x)\n",
- pipe_name(drm_crtc_index(&crtc->base)), pll->active_mask);
+ pipe_name(crtc->pipe), pll->active_mask);
I915_STATE_WARN(!(pll->state.crtc_mask & crtc_mask),
"pll enabled crtcs mismatch (expected 0x%x in 0x%02x)\n",
@@ -14332,10 +14332,10 @@ verify_shared_dpll_state(struct intel_crtc *crtc,
I915_STATE_WARN(pll->active_mask & crtc_mask,
"pll active mismatch (didn't expect pipe %c in active mask)\n",
- pipe_name(drm_crtc_index(&crtc->base)));
+ pipe_name(crtc->pipe));
I915_STATE_WARN(pll->state.crtc_mask & crtc_mask,
"pll enabled crtcs mismatch (found %x in enabled mask)\n",
- pipe_name(drm_crtc_index(&crtc->base)));
+ pipe_name(crtc->pipe));
}
}
diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
index 0d8a64305464..380ebe5ee26d 100644
--- a/drivers/gpu/drm/i915/display/intel_display_types.h
+++ b/drivers/gpu/drm/i915/display/intel_display_types.h
@@ -1598,11 +1598,15 @@ intel_crtc_has_dp_encoder(const struct intel_crtc_state *crtc_state)
(1 << INTEL_OUTPUT_DP_MST) |
(1 << INTEL_OUTPUT_EDP));
}
+
static inline void
intel_wait_for_vblank(struct drm_i915_private *dev_priv, enum pipe pipe)
{
- drm_wait_one_vblank(&dev_priv->drm, pipe);
+ struct intel_crtc *crtc = intel_get_crtc_for_pipe(dev_priv, pipe);
+
+ drm_crtc_wait_one_vblank(&crtc->base);
}
+
static inline void
intel_wait_for_vblank_if_active(struct drm_i915_private *dev_priv, enum pipe pipe)
{
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index 854701aab4f1..3bea519d985a 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -169,6 +169,14 @@ static const u32 hpd_tgp[HPD_NUM_PINS] = {
[HPD_PORT_I] = SDE_TC_HOTPLUG_ICP(PORT_TC6),
};
+static void
+intel_handle_vblank(struct drm_i915_private *dev_priv, enum pipe pipe)
+{
+ struct intel_crtc *crtc = intel_get_crtc_for_pipe(dev_priv, pipe);
+
+ drm_crtc_handle_vblank(&crtc->base);
+}
+
void gen3_irq_reset(struct intel_uncore *uncore, i915_reg_t imr,
i915_reg_t iir, i915_reg_t ier)
{
@@ -1374,7 +1382,7 @@ static void i8xx_pipestat_irq_handler(struct drm_i915_private *dev_priv,
for_each_pipe(dev_priv, pipe) {
if (pipe_stats[pipe] & PIPE_VBLANK_INTERRUPT_STATUS)
- drm_handle_vblank(&dev_priv->drm, pipe);
+ intel_handle_vblank(dev_priv, pipe);
if (pipe_stats[pipe] & PIPE_CRC_DONE_INTERRUPT_STATUS)
i9xx_pipe_crc_irq_handler(dev_priv, pipe);
@@ -1392,7 +1400,7 @@ static void i915_pipestat_irq_handler(struct drm_i915_private *dev_priv,
for_each_pipe(dev_priv, pipe) {
if (pipe_stats[pipe] & PIPE_VBLANK_INTERRUPT_STATUS)
- drm_handle_vblank(&dev_priv->drm, pipe);
+ intel_handle_vblank(dev_priv, pipe);
if (pipe_stats[pipe] & PIPE_LEGACY_BLC_EVENT_STATUS)
blc_event = true;
@@ -1416,7 +1424,7 @@ static void i965_pipestat_irq_handler(struct drm_i915_private *dev_priv,
for_each_pipe(dev_priv, pipe) {
if (pipe_stats[pipe] & PIPE_START_VBLANK_INTERRUPT_STATUS)
- drm_handle_vblank(&dev_priv->drm, pipe);
+ intel_handle_vblank(dev_priv, pipe);
if (pipe_stats[pipe] & PIPE_LEGACY_BLC_EVENT_STATUS)
blc_event = true;
@@ -1442,7 +1450,7 @@ static void valleyview_pipestat_irq_handler(struct drm_i915_private *dev_priv,
for_each_pipe(dev_priv, pipe) {
if (pipe_stats[pipe] & PIPE_START_VBLANK_INTERRUPT_STATUS)
- drm_handle_vblank(&dev_priv->drm, pipe);
+ intel_handle_vblank(dev_priv, pipe);
if (pipe_stats[pipe] & PIPE_CRC_DONE_INTERRUPT_STATUS)
i9xx_pipe_crc_irq_handler(dev_priv, pipe);
@@ -1980,7 +1988,7 @@ static void ilk_display_irq_handler(struct drm_i915_private *dev_priv,
for_each_pipe(dev_priv, pipe) {
if (de_iir & DE_PIPE_VBLANK(pipe))
- drm_handle_vblank(&dev_priv->drm, pipe);
+ intel_handle_vblank(dev_priv, pipe);
if (de_iir & DE_PIPE_FIFO_UNDERRUN(pipe))
intel_cpu_fifo_underrun_irq_handler(dev_priv, pipe);
@@ -2033,7 +2041,7 @@ static void ivb_display_irq_handler(struct drm_i915_private *dev_priv,
for_each_pipe(dev_priv, pipe) {
if (de_iir & (DE_PIPE_VBLANK_IVB(pipe)))
- drm_handle_vblank(&dev_priv->drm, pipe);
+ intel_handle_vblank(dev_priv, pipe);
}
/* check event from PCH */
@@ -2346,7 +2354,7 @@ gen8_de_irq_handler(struct drm_i915_private *dev_priv, u32 master_ctl)
I915_WRITE(GEN8_DE_PIPE_IIR(pipe), iir);
if (iir & GEN8_PIPE_VBLANK)
- drm_handle_vblank(&dev_priv->drm, pipe);
+ intel_handle_vblank(dev_priv, pipe);
if (iir & GEN8_PIPE_CDCLK_CRC_DONE)
hsw_pipe_crc_irq_handler(dev_priv, pipe);
--
2.24.0
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^ permalink raw reply related [flat|nested] 19+ messages in thread
* [Intel-gfx] [PATCH v3 3/7] drm/i915: Fix broken transcoder err state
2020-02-24 12:39 [Intel-gfx] [PATCH v3 0/7] 3 display pipes combination system support Anshuman Gupta
2020-02-24 12:39 ` [Intel-gfx] [PATCH v3 1/7] drm/i915: Iterate over pipes and skip the disabled one Anshuman Gupta
2020-02-24 12:39 ` [Intel-gfx] [PATCH v3 2/7] drm/i915: Remove (pipe == crtc->index) assumption Anshuman Gupta
@ 2020-02-24 12:40 ` Anshuman Gupta
2020-02-24 12:40 ` [Intel-gfx] [PATCH v3 4/7] drm/i915: Fix wrongly populated plane possible_crtcs bit mask Anshuman Gupta
` (8 subsequent siblings)
11 siblings, 0 replies; 19+ messages in thread
From: Anshuman Gupta @ 2020-02-24 12:40 UTC (permalink / raw)
To: intel-gfx; +Cc: jani.nikula
Skip the transcoder whose pipe is disabled while
initializing transcoder error state in 3 non-contiguous
display pipe system.
v2:
- Don't skip EDP_TRANSCODER error state. [Ville]
- Use a helper has_transcoder(). [Ville]
v3:
- Removed DSI transcoder case from has_transcoder(),
and few other cosmetic changes. [Ville]
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Anshuman Gupta <anshuman.gupta@intel.com>
---
drivers/gpu/drm/i915/display/intel_display.c | 11 ++++++++++-
1 file changed, 10 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 3aab97573c0c..aacbdc47fcea 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -249,6 +249,15 @@ intel_fdi_link_freq(struct drm_i915_private *dev_priv,
return dev_priv->fdi_pll_freq;
}
+static bool
+has_transcoder(struct drm_i915_private *dev_priv, enum transcoder cpu_transcoder)
+{
+ if (cpu_transcoder == TRANSCODER_EDP)
+ return HAS_TRANSCODER_EDP(dev_priv);
+ else
+ return INTEL_INFO(dev_priv)->pipe_mask & BIT(cpu_transcoder);
+}
+
static const struct intel_limit intel_limits_i8xx_dac = {
.dot = { .min = 25000, .max = 350000 },
.vco = { .min = 908000, .max = 1512000 },
@@ -18928,7 +18937,7 @@ intel_display_capture_error_state(struct drm_i915_private *dev_priv)
for (i = 0; i < ARRAY_SIZE(error->transcoder); i++) {
enum transcoder cpu_transcoder = transcoders[i];
- if (!INTEL_INFO(dev_priv)->trans_offsets[cpu_transcoder])
+ if (!has_transcoder(dev_priv, cpu_transcoder))
continue;
error->transcoder[i].available = true;
--
2.24.0
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^ permalink raw reply related [flat|nested] 19+ messages in thread
* [Intel-gfx] [PATCH v3 4/7] drm/i915: Fix wrongly populated plane possible_crtcs bit mask
2020-02-24 12:39 [Intel-gfx] [PATCH v3 0/7] 3 display pipes combination system support Anshuman Gupta
` (2 preceding siblings ...)
2020-02-24 12:40 ` [Intel-gfx] [PATCH v3 3/7] drm/i915: Fix broken transcoder err state Anshuman Gupta
@ 2020-02-24 12:40 ` Anshuman Gupta
2020-02-25 15:06 ` Ville Syrjälä
2020-02-26 16:35 ` [Intel-gfx] [PATCH v4 " Anshuman Gupta
2020-02-24 12:40 ` [Intel-gfx] [PATCH v3 5/7] drm/i915: Get first crtc instead of PIPE_A crtc Anshuman Gupta
` (7 subsequent siblings)
11 siblings, 2 replies; 19+ messages in thread
From: Anshuman Gupta @ 2020-02-24 12:40 UTC (permalink / raw)
To: intel-gfx; +Cc: jani.nikula
As a disabled pipe in pipe_mask is not having a valid intel crtc,
driver wrongly populates the possible_crtcs mask while initializing
the plane for a CRTC. Fixing up the plane possible_crtcs mask.
changes since RFC:
- Simplify the possible_crtcs initialization. [Ville]
v2:
- Removed the unnecessary stack garbage possible_crtcs to
drm_universal_plane_init. [Ville]
v3:
- Combine the intel_crtc assignment and declaration. [Ville]
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Anshuman Gupta <anshuman.gupta@intel.com>
---
drivers/gpu/drm/i915/display/intel_display.c | 13 +++++++++++++
drivers/gpu/drm/i915/display/intel_sprite.c | 5 +----
2 files changed, 14 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index aacbdc47fcea..41a0f2e9b6b9 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -16628,6 +16628,18 @@ static void intel_crtc_free(struct intel_crtc *crtc)
kfree(crtc);
}
+static void intel_plane_possible_crtcs_init(struct drm_i915_private *dev_priv)
+{
+ struct intel_plane *plane;
+
+ for_each_intel_plane(&dev_priv->drm, plane) {
+ struct intel_crtc *crtc = intel_get_crtc_for_pipe(dev_priv,
+ plane->pipe);
+
+ plane->base.possible_crtcs = drm_crtc_mask(&crtc->base);
+ }
+}
+
static int intel_crtc_init(struct drm_i915_private *dev_priv, enum pipe pipe)
{
struct intel_plane *primary, *cursor;
@@ -17843,6 +17855,7 @@ int intel_modeset_init(struct drm_i915_private *i915)
}
}
+ intel_plane_possible_crtcs_init(i915);
intel_shared_dpll_init(dev);
intel_update_fdi_pll_freq(i915);
diff --git a/drivers/gpu/drm/i915/display/intel_sprite.c b/drivers/gpu/drm/i915/display/intel_sprite.c
index 7abeefe8dce5..b5c7b271a1a4 100644
--- a/drivers/gpu/drm/i915/display/intel_sprite.c
+++ b/drivers/gpu/drm/i915/display/intel_sprite.c
@@ -3011,7 +3011,6 @@ skl_universal_plane_create(struct drm_i915_private *dev_priv,
struct intel_plane *plane;
enum drm_plane_type plane_type;
unsigned int supported_rotations;
- unsigned int possible_crtcs;
const u64 *modifiers;
const u32 *formats;
int num_formats;
@@ -3066,10 +3065,8 @@ skl_universal_plane_create(struct drm_i915_private *dev_priv,
else
plane_type = DRM_PLANE_TYPE_OVERLAY;
- possible_crtcs = BIT(pipe);
-
ret = drm_universal_plane_init(&dev_priv->drm, &plane->base,
- possible_crtcs, plane_funcs,
+ 0, plane_funcs,
formats, num_formats, modifiers,
plane_type,
"plane %d%c", plane_id + 1,
--
2.24.0
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^ permalink raw reply related [flat|nested] 19+ messages in thread
* [Intel-gfx] [PATCH v3 5/7] drm/i915: Get first crtc instead of PIPE_A crtc
2020-02-24 12:39 [Intel-gfx] [PATCH v3 0/7] 3 display pipes combination system support Anshuman Gupta
` (3 preceding siblings ...)
2020-02-24 12:40 ` [Intel-gfx] [PATCH v3 4/7] drm/i915: Fix wrongly populated plane possible_crtcs bit mask Anshuman Gupta
@ 2020-02-24 12:40 ` Anshuman Gupta
2020-02-24 12:40 ` [Intel-gfx] [PATCH v3 6/7] drm/i915: Add WARN_ON in intel_get_crtc_for_pipe() Anshuman Gupta
` (6 subsequent siblings)
11 siblings, 0 replies; 19+ messages in thread
From: Anshuman Gupta @ 2020-02-24 12:40 UTC (permalink / raw)
To: intel-gfx; +Cc: jani.nikula
intel_plane_fb_max_stride should return the max stride of
primary plane for first available pipe in intel device info
pipe_mask.
Similarly glk_force_audio_cdclk() should also use the first
available CRTC instead of pipe 'A' crtc to force the cdclk
changes.
changes since RFC:
- Introduced a helper to get first intel_crtc intel_get_first_crtc. [Ville]
v1:
- Used intel_get_first_crtc() instead of PIPE_A crtc in
glk_force_audio_cdclk(). [Ville]
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Anshuman Gupta <anshuman.gupta@intel.com>
---
drivers/gpu/drm/i915/display/intel_audio.c | 2 +-
drivers/gpu/drm/i915/display/intel_display.c | 5 +++--
drivers/gpu/drm/i915/display/intel_display_types.h | 6 ++++++
3 files changed, 10 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_audio.c b/drivers/gpu/drm/i915/display/intel_audio.c
index 30fb7c887ff0..19bf206037c2 100644
--- a/drivers/gpu/drm/i915/display/intel_audio.c
+++ b/drivers/gpu/drm/i915/display/intel_audio.c
@@ -844,7 +844,7 @@ static void glk_force_audio_cdclk(struct drm_i915_private *dev_priv,
struct intel_crtc *crtc;
int ret;
- crtc = intel_get_crtc_for_pipe(dev_priv, PIPE_A);
+ crtc = intel_get_first_crtc(dev_priv);
if (!crtc)
return;
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 41a0f2e9b6b9..172dbe8260c1 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -2729,9 +2729,10 @@ u32 intel_plane_fb_max_stride(struct drm_i915_private *dev_priv,
/*
* We assume the primary plane for pipe A has
- * the highest stride limits of them all.
+ * the highest stride limits of them all,
+ * if in case pipe A is disabled, use the first pipe from pipe_mask.
*/
- crtc = intel_get_crtc_for_pipe(dev_priv, PIPE_A);
+ crtc = intel_get_first_crtc(dev_priv);
if (!crtc)
return 0;
diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
index 380ebe5ee26d..3ca6cf7f3986 100644
--- a/drivers/gpu/drm/i915/display/intel_display_types.h
+++ b/drivers/gpu/drm/i915/display/intel_display_types.h
@@ -1406,6 +1406,12 @@ vlv_pipe_to_channel(enum pipe pipe)
}
}
+static inline struct intel_crtc *
+intel_get_first_crtc(struct drm_i915_private *dev_priv)
+{
+ return to_intel_crtc(drm_crtc_from_index(&dev_priv->drm, 0));
+}
+
static inline struct intel_crtc *
intel_get_crtc_for_pipe(struct drm_i915_private *dev_priv, enum pipe pipe)
{
--
2.24.0
_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 19+ messages in thread
* [Intel-gfx] [PATCH v3 6/7] drm/i915: Add WARN_ON in intel_get_crtc_for_pipe()
2020-02-24 12:39 [Intel-gfx] [PATCH v3 0/7] 3 display pipes combination system support Anshuman Gupta
` (4 preceding siblings ...)
2020-02-24 12:40 ` [Intel-gfx] [PATCH v3 5/7] drm/i915: Get first crtc instead of PIPE_A crtc Anshuman Gupta
@ 2020-02-24 12:40 ` Anshuman Gupta
2020-02-24 12:40 ` [Intel-gfx] [PATCH v3 7/7] drm/i915: Fix broken num_entries in skl_ddb_allocation_overlaps Anshuman Gupta
` (5 subsequent siblings)
11 siblings, 0 replies; 19+ messages in thread
From: Anshuman Gupta @ 2020-02-24 12:40 UTC (permalink / raw)
To: intel-gfx; +Cc: jani.nikula
Add a WARN_ON for a disabled pipe in pipe_mask at
intel_get_crtc_for_pipe() function.
v2:
- Use drm_WARN_ON instead of WARN_ON.
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Anshuman Gupta <anshuman.gupta@intel.com>
---
drivers/gpu/drm/i915/display/intel_display_types.h | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
index 3ca6cf7f3986..61f4628f5602 100644
--- a/drivers/gpu/drm/i915/display/intel_display_types.h
+++ b/drivers/gpu/drm/i915/display/intel_display_types.h
@@ -1415,6 +1415,9 @@ intel_get_first_crtc(struct drm_i915_private *dev_priv)
static inline struct intel_crtc *
intel_get_crtc_for_pipe(struct drm_i915_private *dev_priv, enum pipe pipe)
{
+ /* pipe_to_crtc_mapping may have hole on any of 3 display pipe system */
+ drm_WARN_ON(&dev_priv->drm,
+ !(INTEL_INFO(dev_priv)->pipe_mask & BIT(pipe)));
return dev_priv->pipe_to_crtc_mapping[pipe];
}
--
2.24.0
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 19+ messages in thread
* [Intel-gfx] [PATCH v3 7/7] drm/i915: Fix broken num_entries in skl_ddb_allocation_overlaps
2020-02-24 12:39 [Intel-gfx] [PATCH v3 0/7] 3 display pipes combination system support Anshuman Gupta
` (5 preceding siblings ...)
2020-02-24 12:40 ` [Intel-gfx] [PATCH v3 6/7] drm/i915: Add WARN_ON in intel_get_crtc_for_pipe() Anshuman Gupta
@ 2020-02-24 12:40 ` Anshuman Gupta
2020-02-24 17:05 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for 3 display pipes combination system support (rev4) Patchwork
` (4 subsequent siblings)
11 siblings, 0 replies; 19+ messages in thread
From: Anshuman Gupta @ 2020-02-24 12:40 UTC (permalink / raw)
To: intel-gfx; +Cc: jani.nikula
skl_ddb_allocation_overlaps() num_entries hass been passed as
INTEL_NUM_PIPES, it should be I915_MAX_PIPES.
v2:
- Rebased.
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Anshuman Gupta <anshuman.gupta@intel.com>
---
drivers/gpu/drm/i915/display/intel_display.c | 7 +++----
1 file changed, 3 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 172dbe8260c1..b654d007a037 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -15328,7 +15328,6 @@ static void skl_commit_modeset_enables(struct intel_atomic_state *state)
struct intel_crtc *crtc;
struct intel_crtc_state *old_crtc_state, *new_crtc_state;
struct skl_ddb_entry entries[I915_MAX_PIPES] = {};
- const u8 num_pipes = INTEL_NUM_PIPES(dev_priv);
u8 update_pipes = 0, modeset_pipes = 0;
int i;
@@ -15365,7 +15364,7 @@ static void skl_commit_modeset_enables(struct intel_atomic_state *state)
continue;
if (skl_ddb_allocation_overlaps(&new_crtc_state->wm.skl.ddb,
- entries, num_pipes, pipe))
+ entries, I915_MAX_PIPES, pipe))
continue;
entries[pipe] = new_crtc_state->wm.skl.ddb;
@@ -15403,7 +15402,7 @@ static void skl_commit_modeset_enables(struct intel_atomic_state *state)
continue;
drm_WARN_ON(&dev_priv->drm, skl_ddb_allocation_overlaps(&new_crtc_state->wm.skl.ddb,
- entries, num_pipes, pipe));
+ entries, I915_MAX_PIPES, pipe));
entries[pipe] = new_crtc_state->wm.skl.ddb;
modeset_pipes &= ~BIT(pipe);
@@ -15438,7 +15437,7 @@ static void skl_commit_modeset_enables(struct intel_atomic_state *state)
continue;
drm_WARN_ON(&dev_priv->drm, skl_ddb_allocation_overlaps(&new_crtc_state->wm.skl.ddb,
- entries, num_pipes, pipe));
+ entries, I915_MAX_PIPES, pipe));
entries[pipe] = new_crtc_state->wm.skl.ddb;
modeset_pipes &= ~BIT(pipe);
--
2.24.0
_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 19+ messages in thread
* [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for 3 display pipes combination system support (rev4)
2020-02-24 12:39 [Intel-gfx] [PATCH v3 0/7] 3 display pipes combination system support Anshuman Gupta
` (6 preceding siblings ...)
2020-02-24 12:40 ` [Intel-gfx] [PATCH v3 7/7] drm/i915: Fix broken num_entries in skl_ddb_allocation_overlaps Anshuman Gupta
@ 2020-02-24 17:05 ` Patchwork
2020-02-24 17:31 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
` (3 subsequent siblings)
11 siblings, 0 replies; 19+ messages in thread
From: Patchwork @ 2020-02-24 17:05 UTC (permalink / raw)
To: Anshuman Gupta; +Cc: intel-gfx
== Series Details ==
Series: 3 display pipes combination system support (rev4)
URL : https://patchwork.freedesktop.org/series/72468/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
0a8b363df1e1 drm/i915: Iterate over pipes and skip the disabled one
d9f35baa743a drm/i915: Remove (pipe == crtc->index) assumption
829657dac4f0 drm/i915: Fix broken transcoder err state
7ee86eedd4eb drm/i915: Fix wrongly populated plane possible_crtcs bit mask
65cf221f1fc2 drm/i915: Get first crtc instead of PIPE_A crtc
b89b145c598e drm/i915: Add WARN_ON in intel_get_crtc_for_pipe()
fbf356608f3d drm/i915: Fix broken num_entries in skl_ddb_allocation_overlaps
-:46: WARNING:LONG_LINE: line over 100 characters
#46: FILE: drivers/gpu/drm/i915/display/intel_display.c:15405:
+ entries, I915_MAX_PIPES, pipe));
-:55: WARNING:LONG_LINE: line over 100 characters
#55: FILE: drivers/gpu/drm/i915/display/intel_display.c:15440:
+ entries, I915_MAX_PIPES, pipe));
total: 0 errors, 2 warnings, 0 checks, 31 lines checked
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 19+ messages in thread
* [Intel-gfx] ✓ Fi.CI.BAT: success for 3 display pipes combination system support (rev4)
2020-02-24 12:39 [Intel-gfx] [PATCH v3 0/7] 3 display pipes combination system support Anshuman Gupta
` (7 preceding siblings ...)
2020-02-24 17:05 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for 3 display pipes combination system support (rev4) Patchwork
@ 2020-02-24 17:31 ` Patchwork
2020-02-26 0:26 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
` (2 subsequent siblings)
11 siblings, 0 replies; 19+ messages in thread
From: Patchwork @ 2020-02-24 17:31 UTC (permalink / raw)
To: Anshuman Gupta; +Cc: intel-gfx
== Series Details ==
Series: 3 display pipes combination system support (rev4)
URL : https://patchwork.freedesktop.org/series/72468/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7998 -> Patchwork_16687
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16687/index.html
Known issues
------------
Here are the changes found in Patchwork_16687 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@gem_close_race@basic-threads:
- fi-byt-j1900: [PASS][1] -> [INCOMPLETE][2] ([i915#45])
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7998/fi-byt-j1900/igt@gem_close_race@basic-threads.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16687/fi-byt-j1900/igt@gem_close_race@basic-threads.html
* igt@gem_exec_parallel@contexts:
- fi-byt-n2820: [PASS][3] -> [FAIL][4] ([i915#694])
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7998/fi-byt-n2820/igt@gem_exec_parallel@contexts.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16687/fi-byt-n2820/igt@gem_exec_parallel@contexts.html
* igt@i915_selftest@live_gem_contexts:
- fi-cfl-8700k: [PASS][5] -> [TIMEOUT][6] ([fdo#112271])
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7998/fi-cfl-8700k/igt@i915_selftest@live_gem_contexts.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16687/fi-cfl-8700k/igt@i915_selftest@live_gem_contexts.html
- fi-byt-n2820: [PASS][7] -> [DMESG-FAIL][8] ([i915#1052])
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7998/fi-byt-n2820/igt@i915_selftest@live_gem_contexts.html
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16687/fi-byt-n2820/igt@i915_selftest@live_gem_contexts.html
- fi-cml-s: [PASS][9] -> [DMESG-FAIL][10] ([i915#877])
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7998/fi-cml-s/igt@i915_selftest@live_gem_contexts.html
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16687/fi-cml-s/igt@i915_selftest@live_gem_contexts.html
* igt@prime_vgem@basic-gtt:
- fi-tgl-y: [PASS][11] -> [DMESG-WARN][12] ([CI#94] / [i915#402]) +1 similar issue
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7998/fi-tgl-y/igt@prime_vgem@basic-gtt.html
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16687/fi-tgl-y/igt@prime_vgem@basic-gtt.html
#### Possible fixes ####
* igt@gem_flink_basic@basic:
- fi-tgl-y: [DMESG-WARN][13] ([CI#94] / [i915#402]) -> [PASS][14] +1 similar issue
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7998/fi-tgl-y/igt@gem_flink_basic@basic.html
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16687/fi-tgl-y/igt@gem_flink_basic@basic.html
#### Warnings ####
* igt@runner@aborted:
- fi-byt-j1900: [FAIL][15] ([i915#999]) -> [FAIL][16] ([i915#816])
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7998/fi-byt-j1900/igt@runner@aborted.html
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16687/fi-byt-j1900/igt@runner@aborted.html
[CI#94]: https://gitlab.freedesktop.org/gfx-ci/i915-infra/issues/94
[fdo#112271]: https://bugs.freedesktop.org/show_bug.cgi?id=112271
[i915#1052]: https://gitlab.freedesktop.org/drm/intel/issues/1052
[i915#402]: https://gitlab.freedesktop.org/drm/intel/issues/402
[i915#45]: https://gitlab.freedesktop.org/drm/intel/issues/45
[i915#694]: https://gitlab.freedesktop.org/drm/intel/issues/694
[i915#816]: https://gitlab.freedesktop.org/drm/intel/issues/816
[i915#877]: https://gitlab.freedesktop.org/drm/intel/issues/877
[i915#999]: https://gitlab.freedesktop.org/drm/intel/issues/999
Participating hosts (51 -> 42)
------------------------------
Missing (9): fi-kbl-soraka fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-ctg-p8600 fi-pnv-d510 fi-bsw-kefka fi-byt-clapper
Build changes
-------------
* CI: CI-20190529 -> None
* Linux: CI_DRM_7998 -> Patchwork_16687
CI-20190529: 20190529
CI_DRM_7998: 7b1bb0188905d180ee11694d9c26c5dd656dc1d1 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_5463: d519c80219ebe558cd2fa378f26f9d73f9e35310 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_16687: fbf356608f3dd41fcfca8663085a7e4f081dca93 @ git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
fbf356608f3d drm/i915: Fix broken num_entries in skl_ddb_allocation_overlaps
b89b145c598e drm/i915: Add WARN_ON in intel_get_crtc_for_pipe()
65cf221f1fc2 drm/i915: Get first crtc instead of PIPE_A crtc
7ee86eedd4eb drm/i915: Fix wrongly populated plane possible_crtcs bit mask
829657dac4f0 drm/i915: Fix broken transcoder err state
d9f35baa743a drm/i915: Remove (pipe == crtc->index) assumption
0a8b363df1e1 drm/i915: Iterate over pipes and skip the disabled one
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16687/index.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 19+ messages in thread
* Re: [Intel-gfx] [PATCH v3 4/7] drm/i915: Fix wrongly populated plane possible_crtcs bit mask
2020-02-24 12:40 ` [Intel-gfx] [PATCH v3 4/7] drm/i915: Fix wrongly populated plane possible_crtcs bit mask Anshuman Gupta
@ 2020-02-25 15:06 ` Ville Syrjälä
2020-02-26 15:09 ` Ville Syrjälä
2020-02-26 16:35 ` [Intel-gfx] [PATCH v4 " Anshuman Gupta
1 sibling, 1 reply; 19+ messages in thread
From: Ville Syrjälä @ 2020-02-25 15:06 UTC (permalink / raw)
To: Anshuman Gupta; +Cc: jani.nikula, intel-gfx
On Mon, Feb 24, 2020 at 06:10:01PM +0530, Anshuman Gupta wrote:
> As a disabled pipe in pipe_mask is not having a valid intel crtc,
> driver wrongly populates the possible_crtcs mask while initializing
> the plane for a CRTC. Fixing up the plane possible_crtcs mask.
>
> changes since RFC:
> - Simplify the possible_crtcs initialization. [Ville]
> v2:
> - Removed the unnecessary stack garbage possible_crtcs to
> drm_universal_plane_init. [Ville]
> v3:
> - Combine the intel_crtc assignment and declaration. [Ville]
>
> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Signed-off-by: Anshuman Gupta <anshuman.gupta@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_display.c | 13 +++++++++++++
> drivers/gpu/drm/i915/display/intel_sprite.c | 5 +----
> 2 files changed, 14 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> index aacbdc47fcea..41a0f2e9b6b9 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -16628,6 +16628,18 @@ static void intel_crtc_free(struct intel_crtc *crtc)
> kfree(crtc);
> }
>
> +static void intel_plane_possible_crtcs_init(struct drm_i915_private *dev_priv)
> +{
> + struct intel_plane *plane;
> +
> + for_each_intel_plane(&dev_priv->drm, plane) {
> + struct intel_crtc *crtc = intel_get_crtc_for_pipe(dev_priv,
> + plane->pipe);
> +
> + plane->base.possible_crtcs = drm_crtc_mask(&crtc->base);
> + }
> +}
> +
> static int intel_crtc_init(struct drm_i915_private *dev_priv, enum pipe pipe)
> {
> struct intel_plane *primary, *cursor;
> @@ -17843,6 +17855,7 @@ int intel_modeset_init(struct drm_i915_private *i915)
> }
> }
>
> + intel_plane_possible_crtcs_init(i915);
> intel_shared_dpll_init(dev);
> intel_update_fdi_pll_freq(i915);
>
> diff --git a/drivers/gpu/drm/i915/display/intel_sprite.c b/drivers/gpu/drm/i915/display/intel_sprite.c
> index 7abeefe8dce5..b5c7b271a1a4 100644
> --- a/drivers/gpu/drm/i915/display/intel_sprite.c
> +++ b/drivers/gpu/drm/i915/display/intel_sprite.c
> @@ -3011,7 +3011,6 @@ skl_universal_plane_create(struct drm_i915_private *dev_priv,
> struct intel_plane *plane;
> enum drm_plane_type plane_type;
> unsigned int supported_rotations;
> - unsigned int possible_crtcs;
> const u64 *modifiers;
> const u32 *formats;
> int num_formats;
> @@ -3066,10 +3065,8 @@ skl_universal_plane_create(struct drm_i915_private *dev_priv,
> else
> plane_type = DRM_PLANE_TYPE_OVERLAY;
>
> - possible_crtcs = BIT(pipe);
> -
> ret = drm_universal_plane_init(&dev_priv->drm, &plane->base,
> - possible_crtcs, plane_funcs,
> + 0, plane_funcs,
> formats, num_formats, modifiers,
> plane_type,
> "plane %d%c", plane_id + 1,
Looks like you missed all the other places that do this:
intel_primary_plane_create(), intel_sprite_plane_create(),
intel_cursor_plane_create().
Apart from that everything in the series looks ready.
--
Ville Syrjälä
Intel
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 19+ messages in thread
* [Intel-gfx] ✓ Fi.CI.IGT: success for 3 display pipes combination system support (rev4)
2020-02-24 12:39 [Intel-gfx] [PATCH v3 0/7] 3 display pipes combination system support Anshuman Gupta
` (8 preceding siblings ...)
2020-02-24 17:31 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
@ 2020-02-26 0:26 ` Patchwork
2020-02-27 2:09 ` [Intel-gfx] ✓ Fi.CI.BAT: success for 3 display pipes combination system support (rev5) Patchwork
2020-02-27 19:45 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
11 siblings, 0 replies; 19+ messages in thread
From: Patchwork @ 2020-02-26 0:26 UTC (permalink / raw)
To: Anshuman Gupta; +Cc: intel-gfx
== Series Details ==
Series: 3 display pipes combination system support (rev4)
URL : https://patchwork.freedesktop.org/series/72468/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7998_full -> Patchwork_16687_full
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Known issues
------------
Here are the changes found in Patchwork_16687_full that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@gem_exec_balancer@smoke:
- shard-iclb: [PASS][1] -> [SKIP][2] ([fdo#110854])
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7998/shard-iclb2/igt@gem_exec_balancer@smoke.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16687/shard-iclb3/igt@gem_exec_balancer@smoke.html
* igt@gem_exec_schedule@fifo-bsd1:
- shard-iclb: [PASS][3] -> [SKIP][4] ([fdo#109276]) +12 similar issues
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7998/shard-iclb4/igt@gem_exec_schedule@fifo-bsd1.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16687/shard-iclb5/igt@gem_exec_schedule@fifo-bsd1.html
* igt@gem_exec_schedule@pi-distinct-iova-bsd:
- shard-iclb: [PASS][5] -> [SKIP][6] ([i915#677]) +1 similar issue
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7998/shard-iclb3/igt@gem_exec_schedule@pi-distinct-iova-bsd.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16687/shard-iclb4/igt@gem_exec_schedule@pi-distinct-iova-bsd.html
* igt@gem_exec_schedule@preempt-other-chain-bsd:
- shard-iclb: [PASS][7] -> [SKIP][8] ([fdo#112146]) +5 similar issues
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7998/shard-iclb5/igt@gem_exec_schedule@preempt-other-chain-bsd.html
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16687/shard-iclb2/igt@gem_exec_schedule@preempt-other-chain-bsd.html
* igt@gem_exec_suspend@basic-s3:
- shard-skl: [PASS][9] -> [INCOMPLETE][10] ([i915#69]) +1 similar issue
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7998/shard-skl7/igt@gem_exec_suspend@basic-s3.html
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16687/shard-skl9/igt@gem_exec_suspend@basic-s3.html
* igt@gem_ppgtt@flink-and-close-vma-leak:
- shard-skl: [PASS][11] -> [FAIL][12] ([i915#644])
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7998/shard-skl6/igt@gem_ppgtt@flink-and-close-vma-leak.html
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16687/shard-skl8/igt@gem_ppgtt@flink-and-close-vma-leak.html
* igt@gem_workarounds@suspend-resume-fd:
- shard-kbl: [PASS][13] -> [DMESG-WARN][14] ([i915#180]) +2 similar issues
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7998/shard-kbl7/igt@gem_workarounds@suspend-resume-fd.html
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16687/shard-kbl4/igt@gem_workarounds@suspend-resume-fd.html
* igt@i915_suspend@fence-restore-tiled2untiled:
- shard-apl: [PASS][15] -> [DMESG-WARN][16] ([i915#180]) +4 similar issues
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7998/shard-apl8/igt@i915_suspend@fence-restore-tiled2untiled.html
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16687/shard-apl4/igt@i915_suspend@fence-restore-tiled2untiled.html
* igt@kms_cursor_crc@pipe-b-cursor-dpms:
- shard-skl: [PASS][17] -> [FAIL][18] ([i915#54])
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7998/shard-skl5/igt@kms_cursor_crc@pipe-b-cursor-dpms.html
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16687/shard-skl7/igt@kms_cursor_crc@pipe-b-cursor-dpms.html
* igt@kms_flip@plain-flip-fb-recreate-interruptible:
- shard-skl: [PASS][19] -> [FAIL][20] ([i915#34])
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7998/shard-skl8/igt@kms_flip@plain-flip-fb-recreate-interruptible.html
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16687/shard-skl6/igt@kms_flip@plain-flip-fb-recreate-interruptible.html
* igt@kms_psr@psr2_sprite_blt:
- shard-tglb: [PASS][21] -> [SKIP][22] ([i915#668]) +4 similar issues
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7998/shard-tglb1/igt@kms_psr@psr2_sprite_blt.html
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16687/shard-tglb1/igt@kms_psr@psr2_sprite_blt.html
* igt@kms_psr@psr2_sprite_plane_move:
- shard-iclb: [PASS][23] -> [SKIP][24] ([fdo#109441]) +3 similar issues
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7998/shard-iclb2/igt@kms_psr@psr2_sprite_plane_move.html
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16687/shard-iclb6/igt@kms_psr@psr2_sprite_plane_move.html
* igt@perf_pmu@busy-vcs1:
- shard-iclb: [PASS][25] -> [SKIP][26] ([fdo#112080]) +12 similar issues
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7998/shard-iclb4/igt@perf_pmu@busy-vcs1.html
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16687/shard-iclb8/igt@perf_pmu@busy-vcs1.html
#### Possible fixes ####
* igt@gem_busy@busy-vcs1:
- shard-iclb: [SKIP][27] ([fdo#112080]) -> [PASS][28] +9 similar issues
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7998/shard-iclb7/igt@gem_busy@busy-vcs1.html
[28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16687/shard-iclb1/igt@gem_busy@busy-vcs1.html
* {igt@gem_exec_schedule@implicit-both-bsd1}:
- shard-iclb: [SKIP][29] ([fdo#109276] / [i915#677]) -> [PASS][30]
[29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7998/shard-iclb7/igt@gem_exec_schedule@implicit-both-bsd1.html
[30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16687/shard-iclb1/igt@gem_exec_schedule@implicit-both-bsd1.html
* igt@gem_exec_schedule@independent-bsd:
- shard-iclb: [SKIP][31] ([fdo#112146]) -> [PASS][32] +2 similar issues
[31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7998/shard-iclb2/igt@gem_exec_schedule@independent-bsd.html
[32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16687/shard-iclb3/igt@gem_exec_schedule@independent-bsd.html
* igt@gem_exec_schedule@pi-userfault-bsd:
- shard-iclb: [SKIP][33] ([i915#677]) -> [PASS][34]
[33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7998/shard-iclb4/igt@gem_exec_schedule@pi-userfault-bsd.html
[34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16687/shard-iclb8/igt@gem_exec_schedule@pi-userfault-bsd.html
* igt@gem_ppgtt@flink-and-close-vma-leak:
- shard-glk: [FAIL][35] ([i915#644]) -> [PASS][36]
[35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7998/shard-glk4/igt@gem_ppgtt@flink-and-close-vma-leak.html
[36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16687/shard-glk6/igt@gem_ppgtt@flink-and-close-vma-leak.html
- shard-tglb: [FAIL][37] ([i915#644]) -> [PASS][38]
[37]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7998/shard-tglb2/igt@gem_ppgtt@flink-and-close-vma-leak.html
[38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16687/shard-tglb7/igt@gem_ppgtt@flink-and-close-vma-leak.html
* igt@gen9_exec_parse@allowed-all:
- shard-glk: [DMESG-WARN][39] ([i915#716]) -> [PASS][40]
[39]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7998/shard-glk8/igt@gen9_exec_parse@allowed-all.html
[40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16687/shard-glk3/igt@gen9_exec_parse@allowed-all.html
* igt@kms_cursor_crc@pipe-c-cursor-suspend:
- shard-kbl: [DMESG-WARN][41] ([i915#180]) -> [PASS][42] +4 similar issues
[41]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7998/shard-kbl7/igt@kms_cursor_crc@pipe-c-cursor-suspend.html
[42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16687/shard-kbl1/igt@kms_cursor_crc@pipe-c-cursor-suspend.html
* igt@kms_flip@flip-vs-suspend:
- shard-skl: [INCOMPLETE][43] ([i915#146] / [i915#221]) -> [PASS][44]
[43]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7998/shard-skl6/igt@kms_flip@flip-vs-suspend.html
[44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16687/shard-skl8/igt@kms_flip@flip-vs-suspend.html
* {igt@kms_hdr@bpc-switch}:
- shard-skl: [FAIL][45] ([i915#1188]) -> [PASS][46]
[45]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7998/shard-skl3/igt@kms_hdr@bpc-switch.html
[46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16687/shard-skl9/igt@kms_hdr@bpc-switch.html
* igt@kms_plane@plane-panning-bottom-right-suspend-pipe-b-planes:
- shard-apl: [DMESG-WARN][47] ([i915#180]) -> [PASS][48] +1 similar issue
[47]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7998/shard-apl6/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-b-planes.html
[48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16687/shard-apl1/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-b-planes.html
* igt@kms_plane_alpha_blend@pipe-a-coverage-7efc:
- shard-skl: [FAIL][49] ([fdo#108145]) -> [PASS][50]
[49]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7998/shard-skl10/igt@kms_plane_alpha_blend@pipe-a-coverage-7efc.html
[50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16687/shard-skl5/igt@kms_plane_alpha_blend@pipe-a-coverage-7efc.html
* igt@kms_plane_lowres@pipe-a-tiling-x:
- shard-glk: [FAIL][51] ([i915#899]) -> [PASS][52] +1 similar issue
[51]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7998/shard-glk6/igt@kms_plane_lowres@pipe-a-tiling-x.html
[52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16687/shard-glk8/igt@kms_plane_lowres@pipe-a-tiling-x.html
* igt@kms_psr2_su@page_flip:
- shard-iclb: [SKIP][53] ([fdo#109642] / [fdo#111068]) -> [PASS][54]
[53]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7998/shard-iclb7/igt@kms_psr2_su@page_flip.html
[54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16687/shard-iclb2/igt@kms_psr2_su@page_flip.html
* igt@kms_psr@psr2_suspend:
- shard-iclb: [SKIP][55] ([fdo#109441]) -> [PASS][56] +1 similar issue
[55]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7998/shard-iclb4/igt@kms_psr@psr2_suspend.html
[56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16687/shard-iclb2/igt@kms_psr@psr2_suspend.html
* igt@kms_setmode@basic:
- shard-apl: [FAIL][57] ([i915#31]) -> [PASS][58]
[57]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7998/shard-apl4/igt@kms_setmode@basic.html
[58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16687/shard-apl6/igt@kms_setmode@basic.html
* igt@perf@oa-formats:
- shard-iclb: [FAIL][59] -> [PASS][60]
[59]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7998/shard-iclb1/igt@perf@oa-formats.html
[60]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16687/shard-iclb8/igt@perf@oa-formats.html
* igt@prime_vgem@fence-wait-bsd2:
- shard-iclb: [SKIP][61] ([fdo#109276]) -> [PASS][62] +21 similar issues
[61]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7998/shard-iclb8/igt@prime_vgem@fence-wait-bsd2.html
[62]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16687/shard-iclb4/igt@prime_vgem@fence-wait-bsd2.html
#### Warnings ####
* igt@gem_ctx_isolation@vcs1-nonpriv:
- shard-iclb: [SKIP][63] ([fdo#112080]) -> [FAIL][64] ([IGT#28])
[63]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7998/shard-iclb7/igt@gem_ctx_isolation@vcs1-nonpriv.html
[64]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16687/shard-iclb1/igt@gem_ctx_isolation@vcs1-nonpriv.html
* igt@i915_pm_dc@dc6-psr:
- shard-tglb: [SKIP][65] ([i915#468]) -> [FAIL][66] ([i915#454])
[65]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7998/shard-tglb2/igt@i915_pm_dc@dc6-psr.html
[66]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16687/shard-tglb6/igt@i915_pm_dc@dc6-psr.html
* igt@kms_content_protection@atomic:
- shard-kbl: [TIMEOUT][67] ([fdo#112271]) -> [TIMEOUT][68] ([fdo#112271] / [i915#727])
[67]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7998/shard-kbl1/igt@kms_content_protection@atomic.html
[68]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16687/shard-kbl7/igt@kms_content_protection@atomic.html
* igt@kms_content_protection@lic:
- shard-kbl: [TIMEOUT][69] ([fdo#112271] / [i915#727]) -> [TIMEOUT][70] ([fdo#112271])
[69]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7998/shard-kbl7/igt@kms_content_protection@lic.html
[70]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16687/shard-kbl4/igt@kms_content_protection@lic.html
* igt@kms_dp_dsc@basic-dsc-enable-edp:
- shard-iclb: [DMESG-WARN][71] ([i915#1226]) -> [SKIP][72] ([fdo#109349])
[71]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7998/shard-iclb2/igt@kms_dp_dsc@basic-dsc-enable-edp.html
[72]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16687/shard-iclb3/igt@kms_dp_dsc@basic-dsc-enable-edp.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[IGT#28]: https://gitlab.freedesktop.org/drm/igt-gpu-tools/issues/28
[fdo#108145]: https://bugs.freedesktop.org/show_bug.cgi?id=108145
[fdo#109276]: https://bugs.freedesktop.org/show_bug.cgi?id=109276
[fdo#109349]: https://bugs.freedesktop.org/show_bug.cgi?id=109349
[fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441
[fdo#109642]: https://bugs.freedesktop.org/show_bug.cgi?id=109642
[fdo#110854]: https://bugs.freedesktop.org/show_bug.cgi?id=110854
[fdo#111068]: https://bugs.freedesktop.org/show_bug.cgi?id=111068
[fdo#112080]: https://bugs.freedesktop.org/show_bug.cgi?id=112080
[fdo#112146]: https://bugs.freedesktop.org/show_bug.cgi?id=112146
[fdo#112271]: https://bugs.freedesktop.org/show_bug.cgi?id=112271
[i915#1188]: https://gitlab.freedesktop.org/drm/intel/issues/1188
[i915#1226]: https://gitlab.freedesktop.org/drm/intel/issues/1226
[i915#146]: https://gitlab.freedesktop.org/drm/intel/issues/146
[i915#180]: https://gitlab.freedesktop.org/drm/intel/issues/180
[i915#221]: https://gitlab.freedesktop.org/drm/intel/issues/221
[i915#31]: https://gitlab.freedesktop.org/drm/intel/issues/31
[i915#34]: https://gitlab.freedesktop.org/drm/intel/issues/34
[i915#454]: https://gitlab.freedesktop.org/drm/intel/issues/454
[i915#468]: https://gitlab.freedesktop.org/drm/intel/issues/468
[i915#54]: https://gitlab.freedesktop.org/drm/intel/issues/54
[i915#644]: https://gitlab.freedesktop.org/drm/intel/issues/644
[i915#668]: https://gitlab.freedesktop.org/drm/intel/issues/668
[i915#677]: https://gitlab.freedesktop.org/drm/intel/issues/677
[i915#69]: https://gitlab.freedesktop.org/drm/intel/issues/69
[i915#716]: https://gitlab.freedesktop.org/drm/intel/issues/716
[i915#727]: https://gitlab.freedesktop.org/drm/intel/issues/727
[i915#899]: https://gitlab.freedesktop.org/drm/intel/issues/899
Participating hosts (10 -> 10)
------------------------------
No changes in participating hosts
Build changes
-------------
* CI: CI-20190529 -> None
* Linux: CI_DRM_7998 -> Patchwork_16687
CI-20190529: 20190529
CI_DRM_7998: 7b1bb0188905d180ee11694d9c26c5dd656dc1d1 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_5463: d519c80219ebe558cd2fa378f26f9d73f9e35310 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_16687: fbf356608f3dd41fcfca8663085a7e4f081dca93 @ git://anongit.freedesktop.org/gfx-ci/linux
piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16687/index.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 19+ messages in thread
* Re: [Intel-gfx] [PATCH v3 4/7] drm/i915: Fix wrongly populated plane possible_crtcs bit mask
2020-02-25 15:06 ` Ville Syrjälä
@ 2020-02-26 15:09 ` Ville Syrjälä
2020-02-26 15:24 ` Anshuman Gupta
0 siblings, 1 reply; 19+ messages in thread
From: Ville Syrjälä @ 2020-02-26 15:09 UTC (permalink / raw)
To: Anshuman Gupta; +Cc: jani.nikula, intel-gfx
On Tue, Feb 25, 2020 at 05:06:39PM +0200, Ville Syrjälä wrote:
> On Mon, Feb 24, 2020 at 06:10:01PM +0530, Anshuman Gupta wrote:
> > As a disabled pipe in pipe_mask is not having a valid intel crtc,
> > driver wrongly populates the possible_crtcs mask while initializing
> > the plane for a CRTC. Fixing up the plane possible_crtcs mask.
> >
> > changes since RFC:
> > - Simplify the possible_crtcs initialization. [Ville]
> > v2:
> > - Removed the unnecessary stack garbage possible_crtcs to
> > drm_universal_plane_init. [Ville]
> > v3:
> > - Combine the intel_crtc assignment and declaration. [Ville]
> >
> > Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > Signed-off-by: Anshuman Gupta <anshuman.gupta@intel.com>
> > ---
> > drivers/gpu/drm/i915/display/intel_display.c | 13 +++++++++++++
> > drivers/gpu/drm/i915/display/intel_sprite.c | 5 +----
> > 2 files changed, 14 insertions(+), 4 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> > index aacbdc47fcea..41a0f2e9b6b9 100644
> > --- a/drivers/gpu/drm/i915/display/intel_display.c
> > +++ b/drivers/gpu/drm/i915/display/intel_display.c
> > @@ -16628,6 +16628,18 @@ static void intel_crtc_free(struct intel_crtc *crtc)
> > kfree(crtc);
> > }
> >
> > +static void intel_plane_possible_crtcs_init(struct drm_i915_private *dev_priv)
> > +{
> > + struct intel_plane *plane;
> > +
> > + for_each_intel_plane(&dev_priv->drm, plane) {
> > + struct intel_crtc *crtc = intel_get_crtc_for_pipe(dev_priv,
> > + plane->pipe);
> > +
> > + plane->base.possible_crtcs = drm_crtc_mask(&crtc->base);
> > + }
> > +}
> > +
> > static int intel_crtc_init(struct drm_i915_private *dev_priv, enum pipe pipe)
> > {
> > struct intel_plane *primary, *cursor;
> > @@ -17843,6 +17855,7 @@ int intel_modeset_init(struct drm_i915_private *i915)
> > }
> > }
> >
> > + intel_plane_possible_crtcs_init(i915);
> > intel_shared_dpll_init(dev);
> > intel_update_fdi_pll_freq(i915);
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_sprite.c b/drivers/gpu/drm/i915/display/intel_sprite.c
> > index 7abeefe8dce5..b5c7b271a1a4 100644
> > --- a/drivers/gpu/drm/i915/display/intel_sprite.c
> > +++ b/drivers/gpu/drm/i915/display/intel_sprite.c
> > @@ -3011,7 +3011,6 @@ skl_universal_plane_create(struct drm_i915_private *dev_priv,
> > struct intel_plane *plane;
> > enum drm_plane_type plane_type;
> > unsigned int supported_rotations;
> > - unsigned int possible_crtcs;
> > const u64 *modifiers;
> > const u32 *formats;
> > int num_formats;
> > @@ -3066,10 +3065,8 @@ skl_universal_plane_create(struct drm_i915_private *dev_priv,
> > else
> > plane_type = DRM_PLANE_TYPE_OVERLAY;
> >
> > - possible_crtcs = BIT(pipe);
> > -
> > ret = drm_universal_plane_init(&dev_priv->drm, &plane->base,
> > - possible_crtcs, plane_funcs,
> > + 0, plane_funcs,
> > formats, num_formats, modifiers,
> > plane_type,
> > "plane %d%c", plane_id + 1,
>
> Looks like you missed all the other places that do this:
> intel_primary_plane_create(), intel_sprite_plane_create(),
> intel_cursor_plane_create().
>
> Apart from that everything in the series looks ready.
I pushed the other patches to dinq. Thanks.
--
Ville Syrjälä
Intel
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 19+ messages in thread
* Re: [Intel-gfx] [PATCH v3 4/7] drm/i915: Fix wrongly populated plane possible_crtcs bit mask
2020-02-26 15:09 ` Ville Syrjälä
@ 2020-02-26 15:24 ` Anshuman Gupta
2020-02-26 17:27 ` Ville Syrjälä
0 siblings, 1 reply; 19+ messages in thread
From: Anshuman Gupta @ 2020-02-26 15:24 UTC (permalink / raw)
To: Ville Syrjälä; +Cc: jani.nikula, intel-gfx
On 2020-02-26 at 17:09:43 +0200, Ville Syrjälä wrote:
> On Tue, Feb 25, 2020 at 05:06:39PM +0200, Ville Syrjälä wrote:
> > On Mon, Feb 24, 2020 at 06:10:01PM +0530, Anshuman Gupta wrote:
> > > As a disabled pipe in pipe_mask is not having a valid intel crtc,
> > > driver wrongly populates the possible_crtcs mask while initializing
> > > the plane for a CRTC. Fixing up the plane possible_crtcs mask.
> > >
> > > changes since RFC:
> > > - Simplify the possible_crtcs initialization. [Ville]
> > > v2:
> > > - Removed the unnecessary stack garbage possible_crtcs to
> > > drm_universal_plane_init. [Ville]
> > > v3:
> > > - Combine the intel_crtc assignment and declaration. [Ville]
> > >
> > > Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > > Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > > Signed-off-by: Anshuman Gupta <anshuman.gupta@intel.com>
> > > ---
> > > drivers/gpu/drm/i915/display/intel_display.c | 13 +++++++++++++
> > > drivers/gpu/drm/i915/display/intel_sprite.c | 5 +----
> > > 2 files changed, 14 insertions(+), 4 deletions(-)
> > >
> > > diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> > > index aacbdc47fcea..41a0f2e9b6b9 100644
> > > --- a/drivers/gpu/drm/i915/display/intel_display.c
> > > +++ b/drivers/gpu/drm/i915/display/intel_display.c
> > > @@ -16628,6 +16628,18 @@ static void intel_crtc_free(struct intel_crtc *crtc)
> > > kfree(crtc);
> > > }
> > >
> > > +static void intel_plane_possible_crtcs_init(struct drm_i915_private *dev_priv)
> > > +{
> > > + struct intel_plane *plane;
> > > +
> > > + for_each_intel_plane(&dev_priv->drm, plane) {
> > > + struct intel_crtc *crtc = intel_get_crtc_for_pipe(dev_priv,
> > > + plane->pipe);
> > > +
> > > + plane->base.possible_crtcs = drm_crtc_mask(&crtc->base);
> > > + }
> > > +}
> > > +
> > > static int intel_crtc_init(struct drm_i915_private *dev_priv, enum pipe pipe)
> > > {
> > > struct intel_plane *primary, *cursor;
> > > @@ -17843,6 +17855,7 @@ int intel_modeset_init(struct drm_i915_private *i915)
> > > }
> > > }
> > >
> > > + intel_plane_possible_crtcs_init(i915);
> > > intel_shared_dpll_init(dev);
> > > intel_update_fdi_pll_freq(i915);
> > >
> > > diff --git a/drivers/gpu/drm/i915/display/intel_sprite.c b/drivers/gpu/drm/i915/display/intel_sprite.c
> > > index 7abeefe8dce5..b5c7b271a1a4 100644
> > > --- a/drivers/gpu/drm/i915/display/intel_sprite.c
> > > +++ b/drivers/gpu/drm/i915/display/intel_sprite.c
> > > @@ -3011,7 +3011,6 @@ skl_universal_plane_create(struct drm_i915_private *dev_priv,
> > > struct intel_plane *plane;
> > > enum drm_plane_type plane_type;
> > > unsigned int supported_rotations;
> > > - unsigned int possible_crtcs;
> > > const u64 *modifiers;
> > > const u32 *formats;
> > > int num_formats;
> > > @@ -3066,10 +3065,8 @@ skl_universal_plane_create(struct drm_i915_private *dev_priv,
> > > else
> > > plane_type = DRM_PLANE_TYPE_OVERLAY;
> > >
> > > - possible_crtcs = BIT(pipe);
> > > -
> > > ret = drm_universal_plane_init(&dev_priv->drm, &plane->base,
> > > - possible_crtcs, plane_funcs,
> > > + 0, plane_funcs,
> > > formats, num_formats, modifiers,
> > > plane_type,
> > > "plane %d%c", plane_id + 1,
> >
> > Looks like you missed all the other places that do this:
> > intel_primary_plane_create(), intel_sprite_plane_create(),
> > intel_cursor_plane_create().
Yes i missed intel_cursor_plane_create(), but other two sprite and
primary using the skl_universal_plane_create() for gen > gen9 and
having early return, considering that i have modiefied only
skl_universal_plane_create() and overlooked intel_cursor_plane_create().
Shall i fix this for all *plane_create() or just for cursor?
> >
> > Apart from that everything in the series looks ready.
>
> I pushed the other patches to dinq. Thanks.
Thanks for merging the pacthes.
Thanks,
Anshuman Gupta.
>
> --
> Ville Syrjälä
> Intel
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 19+ messages in thread
* [Intel-gfx] [PATCH v4 4/7] drm/i915: Fix wrongly populated plane possible_crtcs bit mask
2020-02-24 12:40 ` [Intel-gfx] [PATCH v3 4/7] drm/i915: Fix wrongly populated plane possible_crtcs bit mask Anshuman Gupta
2020-02-25 15:06 ` Ville Syrjälä
@ 2020-02-26 16:35 ` Anshuman Gupta
2020-02-28 13:50 ` Ville Syrjälä
1 sibling, 1 reply; 19+ messages in thread
From: Anshuman Gupta @ 2020-02-26 16:35 UTC (permalink / raw)
To: intel-gfx; +Cc: jani.nikula
As a disabled pipe in pipe_mask is not having a valid intel crtc,
driver wrongly populates the possible_crtcs mask while initializing
the plane for a CRTC. Fixing up the plane possible_crtcs mask.
changes since RFC:
- Simplify the possible_crtcs initialization. [Ville]
v2:
- Removed the unnecessary stack garbage possible_crtcs to
drm_universal_plane_init. [Ville]
v3:
- Combine the intel_crtc assignment and declaration. [Ville]
v4:
- Fix possible_crtcs abused bits from
intel_{primary,curosr,sprite}_plane_create(). [Ville]
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Anshuman Gupta <anshuman.gupta@intel.com>
---
drivers/gpu/drm/i915/display/intel_display.c | 25 +++++++++++++-------
drivers/gpu/drm/i915/display/intel_sprite.c | 10 ++------
2 files changed, 18 insertions(+), 17 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index aacbdc47fcea..071fda408116 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -16329,7 +16329,6 @@ intel_primary_plane_create(struct drm_i915_private *dev_priv, enum pipe pipe)
struct intel_plane *plane;
const struct drm_plane_funcs *plane_funcs;
unsigned int supported_rotations;
- unsigned int possible_crtcs;
const u32 *formats;
int num_formats;
int ret, zpos;
@@ -16410,18 +16409,16 @@ intel_primary_plane_create(struct drm_i915_private *dev_priv, enum pipe pipe)
plane->get_hw_state = i9xx_plane_get_hw_state;
plane->check_plane = i9xx_plane_check;
- possible_crtcs = BIT(pipe);
-
if (INTEL_GEN(dev_priv) >= 5 || IS_G4X(dev_priv))
ret = drm_universal_plane_init(&dev_priv->drm, &plane->base,
- possible_crtcs, plane_funcs,
+ 0, plane_funcs,
formats, num_formats,
i9xx_format_modifiers,
DRM_PLANE_TYPE_PRIMARY,
"primary %c", pipe_name(pipe));
else
ret = drm_universal_plane_init(&dev_priv->drm, &plane->base,
- possible_crtcs, plane_funcs,
+ 0, plane_funcs,
formats, num_formats,
i9xx_format_modifiers,
DRM_PLANE_TYPE_PRIMARY,
@@ -16463,7 +16460,6 @@ static struct intel_plane *
intel_cursor_plane_create(struct drm_i915_private *dev_priv,
enum pipe pipe)
{
- unsigned int possible_crtcs;
struct intel_plane *cursor;
int ret, zpos;
@@ -16496,10 +16492,8 @@ intel_cursor_plane_create(struct drm_i915_private *dev_priv,
if (IS_I845G(dev_priv) || IS_I865G(dev_priv) || HAS_CUR_FBC(dev_priv))
cursor->cursor.size = ~0;
- possible_crtcs = BIT(pipe);
-
ret = drm_universal_plane_init(&dev_priv->drm, &cursor->base,
- possible_crtcs, &intel_cursor_plane_funcs,
+ 0, &intel_cursor_plane_funcs,
intel_cursor_formats,
ARRAY_SIZE(intel_cursor_formats),
cursor_format_modifiers,
@@ -16628,6 +16622,18 @@ static void intel_crtc_free(struct intel_crtc *crtc)
kfree(crtc);
}
+static void intel_plane_possible_crtcs_init(struct drm_i915_private *dev_priv)
+{
+ struct intel_plane *plane;
+
+ for_each_intel_plane(&dev_priv->drm, plane) {
+ struct intel_crtc *crtc = intel_get_crtc_for_pipe(dev_priv,
+ plane->pipe);
+
+ plane->base.possible_crtcs = drm_crtc_mask(&crtc->base);
+ }
+}
+
static int intel_crtc_init(struct drm_i915_private *dev_priv, enum pipe pipe)
{
struct intel_plane *primary, *cursor;
@@ -17843,6 +17849,7 @@ int intel_modeset_init(struct drm_i915_private *i915)
}
}
+ intel_plane_possible_crtcs_init(i915);
intel_shared_dpll_init(dev);
intel_update_fdi_pll_freq(i915);
diff --git a/drivers/gpu/drm/i915/display/intel_sprite.c b/drivers/gpu/drm/i915/display/intel_sprite.c
index 7abeefe8dce5..53bb65666587 100644
--- a/drivers/gpu/drm/i915/display/intel_sprite.c
+++ b/drivers/gpu/drm/i915/display/intel_sprite.c
@@ -3011,7 +3011,6 @@ skl_universal_plane_create(struct drm_i915_private *dev_priv,
struct intel_plane *plane;
enum drm_plane_type plane_type;
unsigned int supported_rotations;
- unsigned int possible_crtcs;
const u64 *modifiers;
const u32 *formats;
int num_formats;
@@ -3066,10 +3065,8 @@ skl_universal_plane_create(struct drm_i915_private *dev_priv,
else
plane_type = DRM_PLANE_TYPE_OVERLAY;
- possible_crtcs = BIT(pipe);
-
ret = drm_universal_plane_init(&dev_priv->drm, &plane->base,
- possible_crtcs, plane_funcs,
+ 0, plane_funcs,
formats, num_formats, modifiers,
plane_type,
"plane %d%c", plane_id + 1,
@@ -3120,7 +3117,6 @@ intel_sprite_plane_create(struct drm_i915_private *dev_priv,
{
struct intel_plane *plane;
const struct drm_plane_funcs *plane_funcs;
- unsigned long possible_crtcs;
unsigned int supported_rotations;
const u64 *modifiers;
const u32 *formats;
@@ -3205,10 +3201,8 @@ intel_sprite_plane_create(struct drm_i915_private *dev_priv,
plane->id = PLANE_SPRITE0 + sprite;
plane->frontbuffer_bit = INTEL_FRONTBUFFER(pipe, plane->id);
- possible_crtcs = BIT(pipe);
-
ret = drm_universal_plane_init(&dev_priv->drm, &plane->base,
- possible_crtcs, plane_funcs,
+ 0, plane_funcs,
formats, num_formats, modifiers,
DRM_PLANE_TYPE_OVERLAY,
"sprite %c", sprite_name(pipe, sprite));
--
2.24.0
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 19+ messages in thread
* Re: [Intel-gfx] [PATCH v3 4/7] drm/i915: Fix wrongly populated plane possible_crtcs bit mask
2020-02-26 15:24 ` Anshuman Gupta
@ 2020-02-26 17:27 ` Ville Syrjälä
0 siblings, 0 replies; 19+ messages in thread
From: Ville Syrjälä @ 2020-02-26 17:27 UTC (permalink / raw)
To: Anshuman Gupta; +Cc: jani.nikula, intel-gfx
On Wed, Feb 26, 2020 at 08:54:08PM +0530, Anshuman Gupta wrote:
> On 2020-02-26 at 17:09:43 +0200, Ville Syrjälä wrote:
> > On Tue, Feb 25, 2020 at 05:06:39PM +0200, Ville Syrjälä wrote:
> > > On Mon, Feb 24, 2020 at 06:10:01PM +0530, Anshuman Gupta wrote:
> > > > As a disabled pipe in pipe_mask is not having a valid intel crtc,
> > > > driver wrongly populates the possible_crtcs mask while initializing
> > > > the plane for a CRTC. Fixing up the plane possible_crtcs mask.
> > > >
> > > > changes since RFC:
> > > > - Simplify the possible_crtcs initialization. [Ville]
> > > > v2:
> > > > - Removed the unnecessary stack garbage possible_crtcs to
> > > > drm_universal_plane_init. [Ville]
> > > > v3:
> > > > - Combine the intel_crtc assignment and declaration. [Ville]
> > > >
> > > > Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > > > Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > > > Signed-off-by: Anshuman Gupta <anshuman.gupta@intel.com>
> > > > ---
> > > > drivers/gpu/drm/i915/display/intel_display.c | 13 +++++++++++++
> > > > drivers/gpu/drm/i915/display/intel_sprite.c | 5 +----
> > > > 2 files changed, 14 insertions(+), 4 deletions(-)
> > > >
> > > > diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> > > > index aacbdc47fcea..41a0f2e9b6b9 100644
> > > > --- a/drivers/gpu/drm/i915/display/intel_display.c
> > > > +++ b/drivers/gpu/drm/i915/display/intel_display.c
> > > > @@ -16628,6 +16628,18 @@ static void intel_crtc_free(struct intel_crtc *crtc)
> > > > kfree(crtc);
> > > > }
> > > >
> > > > +static void intel_plane_possible_crtcs_init(struct drm_i915_private *dev_priv)
> > > > +{
> > > > + struct intel_plane *plane;
> > > > +
> > > > + for_each_intel_plane(&dev_priv->drm, plane) {
> > > > + struct intel_crtc *crtc = intel_get_crtc_for_pipe(dev_priv,
> > > > + plane->pipe);
> > > > +
> > > > + plane->base.possible_crtcs = drm_crtc_mask(&crtc->base);
> > > > + }
> > > > +}
> > > > +
> > > > static int intel_crtc_init(struct drm_i915_private *dev_priv, enum pipe pipe)
> > > > {
> > > > struct intel_plane *primary, *cursor;
> > > > @@ -17843,6 +17855,7 @@ int intel_modeset_init(struct drm_i915_private *i915)
> > > > }
> > > > }
> > > >
> > > > + intel_plane_possible_crtcs_init(i915);
> > > > intel_shared_dpll_init(dev);
> > > > intel_update_fdi_pll_freq(i915);
> > > >
> > > > diff --git a/drivers/gpu/drm/i915/display/intel_sprite.c b/drivers/gpu/drm/i915/display/intel_sprite.c
> > > > index 7abeefe8dce5..b5c7b271a1a4 100644
> > > > --- a/drivers/gpu/drm/i915/display/intel_sprite.c
> > > > +++ b/drivers/gpu/drm/i915/display/intel_sprite.c
> > > > @@ -3011,7 +3011,6 @@ skl_universal_plane_create(struct drm_i915_private *dev_priv,
> > > > struct intel_plane *plane;
> > > > enum drm_plane_type plane_type;
> > > > unsigned int supported_rotations;
> > > > - unsigned int possible_crtcs;
> > > > const u64 *modifiers;
> > > > const u32 *formats;
> > > > int num_formats;
> > > > @@ -3066,10 +3065,8 @@ skl_universal_plane_create(struct drm_i915_private *dev_priv,
> > > > else
> > > > plane_type = DRM_PLANE_TYPE_OVERLAY;
> > > >
> > > > - possible_crtcs = BIT(pipe);
> > > > -
> > > > ret = drm_universal_plane_init(&dev_priv->drm, &plane->base,
> > > > - possible_crtcs, plane_funcs,
> > > > + 0, plane_funcs,
> > > > formats, num_formats, modifiers,
> > > > plane_type,
> > > > "plane %d%c", plane_id + 1,
> > >
> > > Looks like you missed all the other places that do this:
> > > intel_primary_plane_create(), intel_sprite_plane_create(),
> > > intel_cursor_plane_create().
> Yes i missed intel_cursor_plane_create(), but other two sprite and
> primary using the skl_universal_plane_create() for gen > gen9 and
> having early return, considering that i have modiefied only
> skl_universal_plane_create() and overlooked intel_cursor_plane_create().
> Shall i fix this for all *plane_create() or just for cursor?
Just change all of them. We don't want to accumulate pointless
differences between the platforms.
--
Ville Syrjälä
Intel
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 19+ messages in thread
* [Intel-gfx] ✓ Fi.CI.BAT: success for 3 display pipes combination system support (rev5)
2020-02-24 12:39 [Intel-gfx] [PATCH v3 0/7] 3 display pipes combination system support Anshuman Gupta
` (9 preceding siblings ...)
2020-02-26 0:26 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
@ 2020-02-27 2:09 ` Patchwork
2020-02-27 19:45 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
11 siblings, 0 replies; 19+ messages in thread
From: Patchwork @ 2020-02-27 2:09 UTC (permalink / raw)
To: Anshuman Gupta; +Cc: intel-gfx
== Series Details ==
Series: 3 display pipes combination system support (rev5)
URL : https://patchwork.freedesktop.org/series/72468/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_8010 -> Patchwork_16721
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16721/index.html
Known issues
------------
Here are the changes found in Patchwork_16721 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@gem_exec_suspend@basic-s4-devices:
- fi-tgl-y: [PASS][1] -> [FAIL][2] ([CI#94])
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8010/fi-tgl-y/igt@gem_exec_suspend@basic-s4-devices.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16721/fi-tgl-y/igt@gem_exec_suspend@basic-s4-devices.html
* igt@i915_selftest@live_execlists:
- fi-icl-y: [PASS][3] -> [DMESG-FAIL][4] ([fdo#108569])
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8010/fi-icl-y/igt@i915_selftest@live_execlists.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16721/fi-icl-y/igt@i915_selftest@live_execlists.html
* igt@i915_selftest@live_hangcheck:
- fi-icl-dsi: [PASS][5] -> [INCOMPLETE][6] ([fdo#108569])
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8010/fi-icl-dsi/igt@i915_selftest@live_hangcheck.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16721/fi-icl-dsi/igt@i915_selftest@live_hangcheck.html
* igt@i915_selftest@live_perf:
- fi-apl-guc: [PASS][7] -> [INCOMPLETE][8] ([fdo#103927])
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8010/fi-apl-guc/igt@i915_selftest@live_perf.html
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16721/fi-apl-guc/igt@i915_selftest@live_perf.html
* igt@kms_addfb_basic@invalid-get-prop:
- fi-tgl-y: [PASS][9] -> [DMESG-WARN][10] ([CI#94] / [i915#402]) +1 similar issue
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8010/fi-tgl-y/igt@kms_addfb_basic@invalid-get-prop.html
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16721/fi-tgl-y/igt@kms_addfb_basic@invalid-get-prop.html
* igt@kms_chamelium@hdmi-hpd-fast:
- fi-kbl-7500u: [PASS][11] -> [FAIL][12] ([fdo#111407])
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8010/fi-kbl-7500u/igt@kms_chamelium@hdmi-hpd-fast.html
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16721/fi-kbl-7500u/igt@kms_chamelium@hdmi-hpd-fast.html
#### Possible fixes ####
* igt@i915_selftest@live_active:
- {fi-ehl-1}: [DMESG-FAIL][13] -> [PASS][14]
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8010/fi-ehl-1/igt@i915_selftest@live_active.html
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16721/fi-ehl-1/igt@i915_selftest@live_active.html
* igt@prime_vgem@basic-fence-flip:
- fi-tgl-y: [DMESG-WARN][15] ([CI#94] / [i915#402]) -> [PASS][16] +2 similar issues
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8010/fi-tgl-y/igt@prime_vgem@basic-fence-flip.html
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16721/fi-tgl-y/igt@prime_vgem@basic-fence-flip.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[CI#94]: https://gitlab.freedesktop.org/gfx-ci/i915-infra/issues/94
[fdo#103927]: https://bugs.freedesktop.org/show_bug.cgi?id=103927
[fdo#108569]: https://bugs.freedesktop.org/show_bug.cgi?id=108569
[fdo#111407]: https://bugs.freedesktop.org/show_bug.cgi?id=111407
[i915#1233]: https://gitlab.freedesktop.org/drm/intel/issues/1233
[i915#402]: https://gitlab.freedesktop.org/drm/intel/issues/402
Participating hosts (51 -> 44)
------------------------------
Missing (7): fi-cml-u2 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-ctg-p8600 fi-byt-clapper fi-bdw-samus
Build changes
-------------
* CI: CI-20190529 -> None
* Linux: CI_DRM_8010 -> Patchwork_16721
CI-20190529: 20190529
CI_DRM_8010: 97bbec4d80df1c6573fc7063ad830e8beefe07c8 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_5471: 668afe52887a164ee6a12fd1c898bc1c9086cf3e @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_16721: 8118ce3076f26f957429aa29e2eb25a0c16f9132 @ git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
8118ce3076f2 drm/i915: Fix wrongly populated plane possible_crtcs bit mask
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16721/index.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 19+ messages in thread
* [Intel-gfx] ✓ Fi.CI.IGT: success for 3 display pipes combination system support (rev5)
2020-02-24 12:39 [Intel-gfx] [PATCH v3 0/7] 3 display pipes combination system support Anshuman Gupta
` (10 preceding siblings ...)
2020-02-27 2:09 ` [Intel-gfx] ✓ Fi.CI.BAT: success for 3 display pipes combination system support (rev5) Patchwork
@ 2020-02-27 19:45 ` Patchwork
11 siblings, 0 replies; 19+ messages in thread
From: Patchwork @ 2020-02-27 19:45 UTC (permalink / raw)
To: Anshuman Gupta; +Cc: intel-gfx
== Series Details ==
Series: 3 display pipes combination system support (rev5)
URL : https://patchwork.freedesktop.org/series/72468/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_8010_full -> Patchwork_16721_full
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Known issues
------------
Here are the changes found in Patchwork_16721_full that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@gem_exec_async@concurrent-writes-bsd:
- shard-iclb: [PASS][1] -> [SKIP][2] ([fdo#112146]) +6 similar issues
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8010/shard-iclb5/igt@gem_exec_async@concurrent-writes-bsd.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16721/shard-iclb4/igt@gem_exec_async@concurrent-writes-bsd.html
* igt@gem_exec_parallel@vcs1-fds:
- shard-iclb: [PASS][3] -> [SKIP][4] ([fdo#112080]) +7 similar issues
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8010/shard-iclb2/igt@gem_exec_parallel@vcs1-fds.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16721/shard-iclb5/igt@gem_exec_parallel@vcs1-fds.html
* igt@gem_exec_schedule@implicit-read-write-bsd2:
- shard-iclb: [PASS][5] -> [SKIP][6] ([fdo#109276] / [i915#677]) +1 similar issue
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8010/shard-iclb4/igt@gem_exec_schedule@implicit-read-write-bsd2.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16721/shard-iclb3/igt@gem_exec_schedule@implicit-read-write-bsd2.html
* igt@gem_exec_schedule@pi-common-bsd:
- shard-iclb: [PASS][7] -> [SKIP][8] ([i915#677]) +2 similar issues
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8010/shard-iclb7/igt@gem_exec_schedule@pi-common-bsd.html
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16721/shard-iclb4/igt@gem_exec_schedule@pi-common-bsd.html
* igt@gem_exec_schedule@promotion-bsd1:
- shard-iclb: [PASS][9] -> [SKIP][10] ([fdo#109276]) +14 similar issues
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8010/shard-iclb2/igt@gem_exec_schedule@promotion-bsd1.html
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16721/shard-iclb5/igt@gem_exec_schedule@promotion-bsd1.html
* igt@gem_ppgtt@flink-and-close-vma-leak:
- shard-kbl: [PASS][11] -> [FAIL][12] ([i915#644])
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8010/shard-kbl3/igt@gem_ppgtt@flink-and-close-vma-leak.html
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16721/shard-kbl7/igt@gem_ppgtt@flink-and-close-vma-leak.html
* igt@kms_cursor_crc@pipe-a-cursor-128x128-random:
- shard-skl: [PASS][13] -> [FAIL][14] ([i915#54]) +1 similar issue
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8010/shard-skl10/igt@kms_cursor_crc@pipe-a-cursor-128x128-random.html
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16721/shard-skl1/igt@kms_cursor_crc@pipe-a-cursor-128x128-random.html
* igt@kms_cursor_legacy@2x-long-flip-vs-cursor-legacy:
- shard-glk: [PASS][15] -> [FAIL][16] ([i915#72])
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8010/shard-glk9/igt@kms_cursor_legacy@2x-long-flip-vs-cursor-legacy.html
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16721/shard-glk3/igt@kms_cursor_legacy@2x-long-flip-vs-cursor-legacy.html
* igt@kms_flip@flip-vs-suspend-interruptible:
- shard-apl: [PASS][17] -> [DMESG-WARN][18] ([i915#180]) +3 similar issues
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8010/shard-apl2/igt@kms_flip@flip-vs-suspend-interruptible.html
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16721/shard-apl6/igt@kms_flip@flip-vs-suspend-interruptible.html
* igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-pri-indfb-draw-blt:
- shard-glk: [PASS][19] -> [FAIL][20] ([i915#49])
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8010/shard-glk9/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-pri-indfb-draw-blt.html
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16721/shard-glk7/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-pri-indfb-draw-blt.html
* igt@kms_hdr@bpc-switch:
- shard-skl: [PASS][21] -> [FAIL][22] ([i915#1188])
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8010/shard-skl5/igt@kms_hdr@bpc-switch.html
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16721/shard-skl5/igt@kms_hdr@bpc-switch.html
* igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a:
- shard-kbl: [PASS][23] -> [DMESG-WARN][24] ([i915#180]) +2 similar issues
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8010/shard-kbl3/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a.html
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16721/shard-kbl7/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a.html
* igt@kms_plane_lowres@pipe-a-tiling-y:
- shard-glk: [PASS][25] -> [FAIL][26] ([i915#899])
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8010/shard-glk9/igt@kms_plane_lowres@pipe-a-tiling-y.html
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16721/shard-glk7/igt@kms_plane_lowres@pipe-a-tiling-y.html
* igt@kms_psr@psr2_primary_page_flip:
- shard-iclb: [PASS][27] -> [SKIP][28] ([fdo#109441]) +3 similar issues
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8010/shard-iclb2/igt@kms_psr@psr2_primary_page_flip.html
[28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16721/shard-iclb5/igt@kms_psr@psr2_primary_page_flip.html
#### Possible fixes ####
* igt@gem_exec_schedule@deep-bsd:
- shard-iclb: [SKIP][29] ([fdo#112146]) -> [PASS][30] +1 similar issue
[29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8010/shard-iclb4/igt@gem_exec_schedule@deep-bsd.html
[30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16721/shard-iclb3/igt@gem_exec_schedule@deep-bsd.html
* igt@gem_exec_schedule@implicit-both-bsd1:
- shard-iclb: [SKIP][31] ([fdo#109276] / [i915#677]) -> [PASS][32] +1 similar issue
[31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8010/shard-iclb8/igt@gem_exec_schedule@implicit-both-bsd1.html
[32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16721/shard-iclb4/igt@gem_exec_schedule@implicit-both-bsd1.html
* igt@gem_exec_schedule@implicit-write-read-bsd:
- shard-iclb: [SKIP][33] ([i915#677]) -> [PASS][34]
[33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8010/shard-iclb2/igt@gem_exec_schedule@implicit-write-read-bsd.html
[34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16721/shard-iclb5/igt@gem_exec_schedule@implicit-write-read-bsd.html
* igt@gem_exec_schedule@preempt-queue-bsd2:
- shard-iclb: [SKIP][35] ([fdo#109276]) -> [PASS][36] +5 similar issues
[35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8010/shard-iclb7/igt@gem_exec_schedule@preempt-queue-bsd2.html
[36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16721/shard-iclb4/igt@gem_exec_schedule@preempt-queue-bsd2.html
* igt@gem_exec_whisper@basic-queues-forked:
- shard-iclb: [INCOMPLETE][37] ([i915#1120]) -> [PASS][38]
[37]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8010/shard-iclb4/igt@gem_exec_whisper@basic-queues-forked.html
[38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16721/shard-iclb2/igt@gem_exec_whisper@basic-queues-forked.html
* igt@gem_ppgtt@flink-and-close-vma-leak:
- shard-glk: [FAIL][39] ([i915#644]) -> [PASS][40]
[39]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8010/shard-glk1/igt@gem_ppgtt@flink-and-close-vma-leak.html
[40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16721/shard-glk1/igt@gem_ppgtt@flink-and-close-vma-leak.html
- shard-skl: [FAIL][41] ([i915#644]) -> [PASS][42]
[41]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8010/shard-skl7/igt@gem_ppgtt@flink-and-close-vma-leak.html
[42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16721/shard-skl1/igt@gem_ppgtt@flink-and-close-vma-leak.html
- shard-iclb: [FAIL][43] ([i915#644]) -> [PASS][44]
[43]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8010/shard-iclb7/igt@gem_ppgtt@flink-and-close-vma-leak.html
[44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16721/shard-iclb6/igt@gem_ppgtt@flink-and-close-vma-leak.html
* igt@i915_suspend@sysfs-reader:
- shard-kbl: [DMESG-WARN][45] ([i915#180]) -> [PASS][46] +4 similar issues
[45]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8010/shard-kbl6/igt@i915_suspend@sysfs-reader.html
[46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16721/shard-kbl3/igt@i915_suspend@sysfs-reader.html
* igt@kms_flip@flip-vs-expired-vblank-interruptible:
- shard-skl: [FAIL][47] ([i915#79]) -> [PASS][48]
[47]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8010/shard-skl6/igt@kms_flip@flip-vs-expired-vblank-interruptible.html
[48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16721/shard-skl2/igt@kms_flip@flip-vs-expired-vblank-interruptible.html
- shard-apl: [FAIL][49] ([i915#79]) -> [PASS][50]
[49]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8010/shard-apl8/igt@kms_flip@flip-vs-expired-vblank-interruptible.html
[50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16721/shard-apl8/igt@kms_flip@flip-vs-expired-vblank-interruptible.html
- shard-glk: [FAIL][51] ([i915#79]) -> [PASS][52]
[51]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8010/shard-glk4/igt@kms_flip@flip-vs-expired-vblank-interruptible.html
[52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16721/shard-glk3/igt@kms_flip@flip-vs-expired-vblank-interruptible.html
* igt@kms_flip@flip-vs-suspend:
- shard-skl: [INCOMPLETE][53] ([i915#221]) -> [PASS][54]
[53]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8010/shard-skl8/igt@kms_flip@flip-vs-suspend.html
[54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16721/shard-skl7/igt@kms_flip@flip-vs-suspend.html
* igt@kms_plane_alpha_blend@pipe-a-coverage-7efc:
- shard-skl: [FAIL][55] ([fdo#108145]) -> [PASS][56]
[55]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8010/shard-skl9/igt@kms_plane_alpha_blend@pipe-a-coverage-7efc.html
[56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16721/shard-skl9/igt@kms_plane_alpha_blend@pipe-a-coverage-7efc.html
* igt@kms_psr2_su@page_flip:
- shard-iclb: [SKIP][57] ([fdo#109642] / [fdo#111068]) -> [PASS][58]
[57]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8010/shard-iclb1/igt@kms_psr2_su@page_flip.html
[58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16721/shard-iclb2/igt@kms_psr2_su@page_flip.html
* igt@kms_psr@psr2_sprite_plane_move:
- shard-iclb: [SKIP][59] ([fdo#109441]) -> [PASS][60]
[59]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8010/shard-iclb1/igt@kms_psr@psr2_sprite_plane_move.html
[60]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16721/shard-iclb2/igt@kms_psr@psr2_sprite_plane_move.html
* igt@perf_pmu@init-busy-vcs1:
- shard-iclb: [SKIP][61] ([fdo#112080]) -> [PASS][62] +7 similar issues
[61]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8010/shard-iclb8/igt@perf_pmu@init-busy-vcs1.html
[62]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16721/shard-iclb4/igt@perf_pmu@init-busy-vcs1.html
#### Warnings ####
* igt@gem_ctx_isolation@vcs1-nonpriv-switch:
- shard-iclb: [SKIP][63] ([fdo#112080]) -> [FAIL][64] ([IGT#28])
[63]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8010/shard-iclb8/igt@gem_ctx_isolation@vcs1-nonpriv-switch.html
[64]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16721/shard-iclb4/igt@gem_ctx_isolation@vcs1-nonpriv-switch.html
* igt@kms_content_protection@atomic:
- shard-kbl: [TIMEOUT][65] ([i915#1319] / [i915#727]) -> [TIMEOUT][66] ([i915#1319]) +1 similar issue
[65]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8010/shard-kbl2/igt@kms_content_protection@atomic.html
[66]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16721/shard-kbl1/igt@kms_content_protection@atomic.html
* igt@kms_dp_dsc@basic-dsc-enable-edp:
- shard-iclb: [DMESG-WARN][67] ([i915#1226]) -> [SKIP][68] ([fdo#109349])
[67]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8010/shard-iclb2/igt@kms_dp_dsc@basic-dsc-enable-edp.html
[68]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16721/shard-iclb5/igt@kms_dp_dsc@basic-dsc-enable-edp.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[IGT#28]: https://gitlab.freedesktop.org/drm/igt-gpu-tools/issues/28
[fdo#103665]: https://bugs.freedesktop.org/show_bug.cgi?id=103665
[fdo#103927]: https://bugs.freedesktop.org/show_bug.cgi?id=103927
[fdo#108145]: https://bugs.freedesktop.org/show_bug.cgi?id=108145
[fdo#109276]: https://bugs.freedesktop.org/show_bug.cgi?id=109276
[fdo#109349]: https://bugs.freedesktop.org/show_bug.cgi?id=109349
[fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441
[fdo#109642]: https://bugs.freedesktop.org/show_bug.cgi?id=109642
[fdo#111068]: https://bugs.freedesktop.org/show_bug.cgi?id=111068
[fdo#112080]: https://bugs.freedesktop.org/show_bug.cgi?id=112080
[fdo#112146]: https://bugs.freedesktop.org/show_bug.cgi?id=112146
[i915#1120]: https://gitlab.freedesktop.org/drm/intel/issues/1120
[i915#1188]: https://gitlab.freedesktop.org/drm/intel/issues/1188
[i915#1226]: https://gitlab.freedesktop.org/drm/intel/issues/1226
[i915#1319]: https://gitlab.freedesktop.org/drm/intel/issues/1319
[i915#180]: https://gitlab.freedesktop.org/drm/intel/issues/180
[i915#221]: https://gitlab.freedesktop.org/drm/intel/issues/221
[i915#49]: https://gitlab.freedesktop.org/drm/intel/issues/49
[i915#54]: https://gitlab.freedesktop.org/drm/intel/issues/54
[i915#644]: https://gitlab.freedesktop.org/drm/intel/issues/644
[i915#677]: https://gitlab.freedesktop.org/drm/intel/issues/677
[i915#72]: https://gitlab.freedesktop.org/drm/intel/issues/72
[i915#727]: https://gitlab.freedesktop.org/drm/intel/issues/727
[i915#79]: https://gitlab.freedesktop.org/drm/intel/issues/79
[i915#899]: https://gitlab.freedesktop.org/drm/intel/issues/899
Participating hosts (10 -> 10)
------------------------------
No changes in participating hosts
Build changes
-------------
* CI: CI-20190529 -> None
* Linux: CI_DRM_8010 -> Patchwork_16721
CI-20190529: 20190529
CI_DRM_8010: 97bbec4d80df1c6573fc7063ad830e8beefe07c8 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_5471: 668afe52887a164ee6a12fd1c898bc1c9086cf3e @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_16721: 8118ce3076f26f957429aa29e2eb25a0c16f9132 @ git://anongit.freedesktop.org/gfx-ci/linux
piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16721/index.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 19+ messages in thread
* Re: [Intel-gfx] [PATCH v4 4/7] drm/i915: Fix wrongly populated plane possible_crtcs bit mask
2020-02-26 16:35 ` [Intel-gfx] [PATCH v4 " Anshuman Gupta
@ 2020-02-28 13:50 ` Ville Syrjälä
0 siblings, 0 replies; 19+ messages in thread
From: Ville Syrjälä @ 2020-02-28 13:50 UTC (permalink / raw)
To: Anshuman Gupta; +Cc: jani.nikula, intel-gfx
On Wed, Feb 26, 2020 at 10:05:17PM +0530, Anshuman Gupta wrote:
> As a disabled pipe in pipe_mask is not having a valid intel crtc,
> driver wrongly populates the possible_crtcs mask while initializing
> the plane for a CRTC. Fixing up the plane possible_crtcs mask.
>
> changes since RFC:
> - Simplify the possible_crtcs initialization. [Ville]
> v2:
> - Removed the unnecessary stack garbage possible_crtcs to
> drm_universal_plane_init. [Ville]
> v3:
> - Combine the intel_crtc assignment and declaration. [Ville]
> v4:
> - Fix possible_crtcs abused bits from
> intel_{primary,curosr,sprite}_plane_create(). [Ville]
>
> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Signed-off-by: Anshuman Gupta <anshuman.gupta@intel.com>
Thanks. Pushed to dinq.
> ---
> drivers/gpu/drm/i915/display/intel_display.c | 25 +++++++++++++-------
> drivers/gpu/drm/i915/display/intel_sprite.c | 10 ++------
> 2 files changed, 18 insertions(+), 17 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> index aacbdc47fcea..071fda408116 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -16329,7 +16329,6 @@ intel_primary_plane_create(struct drm_i915_private *dev_priv, enum pipe pipe)
> struct intel_plane *plane;
> const struct drm_plane_funcs *plane_funcs;
> unsigned int supported_rotations;
> - unsigned int possible_crtcs;
> const u32 *formats;
> int num_formats;
> int ret, zpos;
> @@ -16410,18 +16409,16 @@ intel_primary_plane_create(struct drm_i915_private *dev_priv, enum pipe pipe)
> plane->get_hw_state = i9xx_plane_get_hw_state;
> plane->check_plane = i9xx_plane_check;
>
> - possible_crtcs = BIT(pipe);
> -
> if (INTEL_GEN(dev_priv) >= 5 || IS_G4X(dev_priv))
> ret = drm_universal_plane_init(&dev_priv->drm, &plane->base,
> - possible_crtcs, plane_funcs,
> + 0, plane_funcs,
> formats, num_formats,
> i9xx_format_modifiers,
> DRM_PLANE_TYPE_PRIMARY,
> "primary %c", pipe_name(pipe));
> else
> ret = drm_universal_plane_init(&dev_priv->drm, &plane->base,
> - possible_crtcs, plane_funcs,
> + 0, plane_funcs,
> formats, num_formats,
> i9xx_format_modifiers,
> DRM_PLANE_TYPE_PRIMARY,
> @@ -16463,7 +16460,6 @@ static struct intel_plane *
> intel_cursor_plane_create(struct drm_i915_private *dev_priv,
> enum pipe pipe)
> {
> - unsigned int possible_crtcs;
> struct intel_plane *cursor;
> int ret, zpos;
>
> @@ -16496,10 +16492,8 @@ intel_cursor_plane_create(struct drm_i915_private *dev_priv,
> if (IS_I845G(dev_priv) || IS_I865G(dev_priv) || HAS_CUR_FBC(dev_priv))
> cursor->cursor.size = ~0;
>
> - possible_crtcs = BIT(pipe);
> -
> ret = drm_universal_plane_init(&dev_priv->drm, &cursor->base,
> - possible_crtcs, &intel_cursor_plane_funcs,
> + 0, &intel_cursor_plane_funcs,
> intel_cursor_formats,
> ARRAY_SIZE(intel_cursor_formats),
> cursor_format_modifiers,
> @@ -16628,6 +16622,18 @@ static void intel_crtc_free(struct intel_crtc *crtc)
> kfree(crtc);
> }
>
> +static void intel_plane_possible_crtcs_init(struct drm_i915_private *dev_priv)
> +{
> + struct intel_plane *plane;
> +
> + for_each_intel_plane(&dev_priv->drm, plane) {
> + struct intel_crtc *crtc = intel_get_crtc_for_pipe(dev_priv,
> + plane->pipe);
> +
> + plane->base.possible_crtcs = drm_crtc_mask(&crtc->base);
> + }
> +}
> +
> static int intel_crtc_init(struct drm_i915_private *dev_priv, enum pipe pipe)
> {
> struct intel_plane *primary, *cursor;
> @@ -17843,6 +17849,7 @@ int intel_modeset_init(struct drm_i915_private *i915)
> }
> }
>
> + intel_plane_possible_crtcs_init(i915);
> intel_shared_dpll_init(dev);
> intel_update_fdi_pll_freq(i915);
>
> diff --git a/drivers/gpu/drm/i915/display/intel_sprite.c b/drivers/gpu/drm/i915/display/intel_sprite.c
> index 7abeefe8dce5..53bb65666587 100644
> --- a/drivers/gpu/drm/i915/display/intel_sprite.c
> +++ b/drivers/gpu/drm/i915/display/intel_sprite.c
> @@ -3011,7 +3011,6 @@ skl_universal_plane_create(struct drm_i915_private *dev_priv,
> struct intel_plane *plane;
> enum drm_plane_type plane_type;
> unsigned int supported_rotations;
> - unsigned int possible_crtcs;
> const u64 *modifiers;
> const u32 *formats;
> int num_formats;
> @@ -3066,10 +3065,8 @@ skl_universal_plane_create(struct drm_i915_private *dev_priv,
> else
> plane_type = DRM_PLANE_TYPE_OVERLAY;
>
> - possible_crtcs = BIT(pipe);
> -
> ret = drm_universal_plane_init(&dev_priv->drm, &plane->base,
> - possible_crtcs, plane_funcs,
> + 0, plane_funcs,
> formats, num_formats, modifiers,
> plane_type,
> "plane %d%c", plane_id + 1,
> @@ -3120,7 +3117,6 @@ intel_sprite_plane_create(struct drm_i915_private *dev_priv,
> {
> struct intel_plane *plane;
> const struct drm_plane_funcs *plane_funcs;
> - unsigned long possible_crtcs;
> unsigned int supported_rotations;
> const u64 *modifiers;
> const u32 *formats;
> @@ -3205,10 +3201,8 @@ intel_sprite_plane_create(struct drm_i915_private *dev_priv,
> plane->id = PLANE_SPRITE0 + sprite;
> plane->frontbuffer_bit = INTEL_FRONTBUFFER(pipe, plane->id);
>
> - possible_crtcs = BIT(pipe);
> -
> ret = drm_universal_plane_init(&dev_priv->drm, &plane->base,
> - possible_crtcs, plane_funcs,
> + 0, plane_funcs,
> formats, num_formats, modifiers,
> DRM_PLANE_TYPE_OVERLAY,
> "sprite %c", sprite_name(pipe, sprite));
> --
> 2.24.0
--
Ville Syrjälä
Intel
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 19+ messages in thread
end of thread, other threads:[~2020-02-28 13:50 UTC | newest]
Thread overview: 19+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2020-02-24 12:39 [Intel-gfx] [PATCH v3 0/7] 3 display pipes combination system support Anshuman Gupta
2020-02-24 12:39 ` [Intel-gfx] [PATCH v3 1/7] drm/i915: Iterate over pipes and skip the disabled one Anshuman Gupta
2020-02-24 12:39 ` [Intel-gfx] [PATCH v3 2/7] drm/i915: Remove (pipe == crtc->index) assumption Anshuman Gupta
2020-02-24 12:40 ` [Intel-gfx] [PATCH v3 3/7] drm/i915: Fix broken transcoder err state Anshuman Gupta
2020-02-24 12:40 ` [Intel-gfx] [PATCH v3 4/7] drm/i915: Fix wrongly populated plane possible_crtcs bit mask Anshuman Gupta
2020-02-25 15:06 ` Ville Syrjälä
2020-02-26 15:09 ` Ville Syrjälä
2020-02-26 15:24 ` Anshuman Gupta
2020-02-26 17:27 ` Ville Syrjälä
2020-02-26 16:35 ` [Intel-gfx] [PATCH v4 " Anshuman Gupta
2020-02-28 13:50 ` Ville Syrjälä
2020-02-24 12:40 ` [Intel-gfx] [PATCH v3 5/7] drm/i915: Get first crtc instead of PIPE_A crtc Anshuman Gupta
2020-02-24 12:40 ` [Intel-gfx] [PATCH v3 6/7] drm/i915: Add WARN_ON in intel_get_crtc_for_pipe() Anshuman Gupta
2020-02-24 12:40 ` [Intel-gfx] [PATCH v3 7/7] drm/i915: Fix broken num_entries in skl_ddb_allocation_overlaps Anshuman Gupta
2020-02-24 17:05 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for 3 display pipes combination system support (rev4) Patchwork
2020-02-24 17:31 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2020-02-26 0:26 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
2020-02-27 2:09 ` [Intel-gfx] ✓ Fi.CI.BAT: success for 3 display pipes combination system support (rev5) Patchwork
2020-02-27 19:45 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
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