From: Pratyush Yadav <p.yadav@ti.com> To: Tudor Ambarus <tudor.ambarus@microchip.com>, Miquel Raynal <miquel.raynal@bootlin.com>, Richard Weinberger <richard@nod.at>, Vignesh Raghavendra <vigneshr@ti.com>, Mark Brown <broonie@kernel.org>, Rob Herring <robh+dt@kernel.org>, Mark Rutland <mark.rutland@arm.com> Cc: Pratyush Yadav <p.yadav@ti.com>, <linux-mtd@lists.infradead.org>, <linux-kernel@vger.kernel.org>, <linux-spi@vger.kernel.org>, <devicetree@vger.kernel.org>, Sekhar Nori <nsekhar@ti.com> Subject: [PATCH v2 08/11] mtd: spi-nor: parse xSPI Profile 1.0 table Date: Wed, 26 Feb 2020 15:07:00 +0530 [thread overview] Message-ID: <20200226093703.19765-9-p.yadav@ti.com> (raw) In-Reply-To: <20200226093703.19765-1-p.yadav@ti.com> This table is indication that the flash is xSPI compliant and hence supports octal DTR mode. Extract information like the fast read opcode, the number of dummy cycles needed for a Read Status Register command, and the number of address bytes needed for a Read Status Register command. The default dummy cycles for a fast octal DTR read are set to 20. Since there is no simple way of determining the dummy cycles needed for the fast read command, flashes that use a different value should update it in their flash-specific hooks. Signed-off-by: Pratyush Yadav <p.yadav@ti.com> --- drivers/mtd/spi-nor/spi-nor.c | 80 +++++++++++++++++++++++++++++++++++ include/linux/mtd/spi-nor.h | 5 +++ 2 files changed, 85 insertions(+) diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c index c86c1537f76e..22784c403d77 100644 --- a/drivers/mtd/spi-nor/spi-nor.c +++ b/drivers/mtd/spi-nor/spi-nor.c @@ -16,6 +16,7 @@ #include <linux/sizes.h> #include <linux/slab.h> #include <linux/sort.h> +#include <linux/bitfield.h> #include <linux/mtd/mtd.h> #include <linux/of_platform.h> @@ -58,12 +59,14 @@ struct sfdp_parameter_header { #define SFDP_BFPT_ID 0xff00 /* Basic Flash Parameter Table */ #define SFDP_SECTOR_MAP_ID 0xff81 /* Sector Map Table */ #define SFDP_4BAIT_ID 0xff84 /* 4-byte Address Instruction Table */ +#define SFDP_PROFILE1_ID 0xff05 /* xSPI Profile 1.0 table. */ #define SFDP_SIGNATURE 0x50444653U #define SFDP_JESD216_MAJOR 1 #define SFDP_JESD216_MINOR 0 #define SFDP_JESD216A_MINOR 5 #define SFDP_JESD216B_MINOR 6 +#define SFDP_JESD216D_MINOR 8 struct sfdp_header { u32 signature; /* Ox50444653U <=> "SFDP" */ @@ -158,6 +161,11 @@ struct sfdp_bfpt { u32 dwords[BFPT_DWORD_MAX]; }; +/* xSPI Profile 1.0 table (from JESD216D.01). */ +#define PROFILE1_DWORD1_RD_FAST_CMD GENMASK(15, 8) +#define PROFILE1_DWORD1_RDSR_DUMMY BIT(28) +#define PROFILE1_DWORD1_RDSR_ADDR_BYTES BIT(29) + /** * struct spi_nor_fixups - SPI NOR fixup hooks * @default_init: called after default flash parameters init. Used to tweak @@ -4426,6 +4434,74 @@ static int spi_nor_parse_4bait(struct spi_nor *nor, return ret; } +/** + * spi_nor_parse_profile1() - parse the xSPI Profile 1.0 table + * @nor: pointer to a 'struct spi_nor' + * @param_header: pointer to the 'struct sfdp_parameter_header' describing + * the 4-Byte Address Instruction Table length and version. + * @params: pointer to the 'struct spi_nor_flash_parameter' to be. + * + * Return: 0 on success, -errno otherwise. + */ +static int spi_nor_parse_profile1(struct spi_nor *nor, + const struct sfdp_parameter_header *profile1_header, + struct spi_nor_flash_parameter *params) +{ + u32 *table, opcode, addr; + size_t len; + int ret, i; + + len = profile1_header->length * sizeof(*table); + table = kmalloc(len, GFP_KERNEL); + if (!table) + return -ENOMEM; + + addr = SFDP_PARAM_HEADER_PTP(profile1_header); + ret = spi_nor_read_sfdp(nor, addr, len, table); + if (ret) + goto out; + + /* Fix endianness of the table DWORDs. */ + for (i = 0; i < profile1_header->length; i++) + table[i] = le32_to_cpu(table[i]); + + /* Get 8D-8D-8D fast read opcode and dummy cycles. */ + opcode = FIELD_GET(PROFILE1_DWORD1_RD_FAST_CMD, table[0]); + + /* + * Update the fast read settings. We set the default dummy cycles to 20 + * here. Flashes can change this value if they need to when enabling + * octal mode. + */ + params->hwcaps.mask |= SNOR_HWCAPS_READ_8_8_8_DTR; + spi_nor_set_read_settings(¶ms->reads[SNOR_CMD_READ_8_8_8_DTR], + 0, 20, opcode, + SNOR_PROTO_8_8_8_DTR); + + /* + * Since the flash supports xSPI DTR reads, it should also support DTR + * Page Program opcodes. + */ + params->hwcaps.mask |= SNOR_HWCAPS_PP_8_8_8_DTR; + + /* + * Set the Read Status Register dummy cycles and dummy address bytes. + */ + if (table[0] & PROFILE1_DWORD1_RDSR_DUMMY) + params->rdsr_dummy = 8; + else + params->rdsr_dummy = 4; + + if (table[0] & PROFILE1_DWORD1_RDSR_ADDR_BYTES) + params->rdsr_addr_nbytes = 4; + else + params->rdsr_addr_nbytes = 0; + +out: + kfree(table); + return ret; +} + /** * spi_nor_parse_sfdp() - parse the Serial Flash Discoverable Parameters. * @nor: pointer to a 'struct spi_nor' @@ -4527,6 +4603,10 @@ static int spi_nor_parse_sfdp(struct spi_nor *nor, err = spi_nor_parse_4bait(nor, param_header, params); break; + case SFDP_PROFILE1_ID: + err = spi_nor_parse_profile1(nor, param_header, params); + break; + default: break; } diff --git a/include/linux/mtd/spi-nor.h b/include/linux/mtd/spi-nor.h index 364f37276d78..f54dbd0f86ab 100644 --- a/include/linux/mtd/spi-nor.h +++ b/include/linux/mtd/spi-nor.h @@ -515,6 +515,9 @@ struct spi_nor_locking_ops { * * @size: the flash memory density in bytes. * @page_size: the page size of the SPI NOR flash memory. + * @rdsr_dummy: dummy cycles needed for Read Status Register command. + * @rdsr_addr_nbytes: dummy address bytes needed for Read Status Register + * command. * @hwcaps: describes the read and page program hardware * capabilities. * @reads: read capabilities ordered by priority: the higher index @@ -537,6 +540,8 @@ struct spi_nor_locking_ops { struct spi_nor_flash_parameter { u64 size; u32 page_size; + u8 rdsr_dummy; + u8 rdsr_addr_nbytes; struct spi_nor_hwcaps hwcaps; struct spi_nor_read_command reads[SNOR_CMD_READ_MAX]; -- 2.25.0
WARNING: multiple messages have this Message-ID (diff)
From: Pratyush Yadav <p.yadav@ti.com> To: Tudor Ambarus <tudor.ambarus@microchip.com>, Miquel Raynal <miquel.raynal@bootlin.com>, Richard Weinberger <richard@nod.at>, Vignesh Raghavendra <vigneshr@ti.com>, Mark Brown <broonie@kernel.org>, Rob Herring <robh+dt@kernel.org>, Mark Rutland <mark.rutland@arm.com> Cc: devicetree@vger.kernel.org, Sekhar Nori <nsekhar@ti.com>, linux-kernel@vger.kernel.org, linux-spi@vger.kernel.org, linux-mtd@lists.infradead.org, Pratyush Yadav <p.yadav@ti.com> Subject: [PATCH v2 08/11] mtd: spi-nor: parse xSPI Profile 1.0 table Date: Wed, 26 Feb 2020 15:07:00 +0530 [thread overview] Message-ID: <20200226093703.19765-9-p.yadav@ti.com> (raw) In-Reply-To: <20200226093703.19765-1-p.yadav@ti.com> This table is indication that the flash is xSPI compliant and hence supports octal DTR mode. Extract information like the fast read opcode, the number of dummy cycles needed for a Read Status Register command, and the number of address bytes needed for a Read Status Register command. The default dummy cycles for a fast octal DTR read are set to 20. Since there is no simple way of determining the dummy cycles needed for the fast read command, flashes that use a different value should update it in their flash-specific hooks. Signed-off-by: Pratyush Yadav <p.yadav@ti.com> --- drivers/mtd/spi-nor/spi-nor.c | 80 +++++++++++++++++++++++++++++++++++ include/linux/mtd/spi-nor.h | 5 +++ 2 files changed, 85 insertions(+) diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c index c86c1537f76e..22784c403d77 100644 --- a/drivers/mtd/spi-nor/spi-nor.c +++ b/drivers/mtd/spi-nor/spi-nor.c @@ -16,6 +16,7 @@ #include <linux/sizes.h> #include <linux/slab.h> #include <linux/sort.h> +#include <linux/bitfield.h> #include <linux/mtd/mtd.h> #include <linux/of_platform.h> @@ -58,12 +59,14 @@ struct sfdp_parameter_header { #define SFDP_BFPT_ID 0xff00 /* Basic Flash Parameter Table */ #define SFDP_SECTOR_MAP_ID 0xff81 /* Sector Map Table */ #define SFDP_4BAIT_ID 0xff84 /* 4-byte Address Instruction Table */ +#define SFDP_PROFILE1_ID 0xff05 /* xSPI Profile 1.0 table. */ #define SFDP_SIGNATURE 0x50444653U #define SFDP_JESD216_MAJOR 1 #define SFDP_JESD216_MINOR 0 #define SFDP_JESD216A_MINOR 5 #define SFDP_JESD216B_MINOR 6 +#define SFDP_JESD216D_MINOR 8 struct sfdp_header { u32 signature; /* Ox50444653U <=> "SFDP" */ @@ -158,6 +161,11 @@ struct sfdp_bfpt { u32 dwords[BFPT_DWORD_MAX]; }; +/* xSPI Profile 1.0 table (from JESD216D.01). */ +#define PROFILE1_DWORD1_RD_FAST_CMD GENMASK(15, 8) +#define PROFILE1_DWORD1_RDSR_DUMMY BIT(28) +#define PROFILE1_DWORD1_RDSR_ADDR_BYTES BIT(29) + /** * struct spi_nor_fixups - SPI NOR fixup hooks * @default_init: called after default flash parameters init. Used to tweak @@ -4426,6 +4434,74 @@ static int spi_nor_parse_4bait(struct spi_nor *nor, return ret; } +/** + * spi_nor_parse_profile1() - parse the xSPI Profile 1.0 table + * @nor: pointer to a 'struct spi_nor' + * @param_header: pointer to the 'struct sfdp_parameter_header' describing + * the 4-Byte Address Instruction Table length and version. + * @params: pointer to the 'struct spi_nor_flash_parameter' to be. + * + * Return: 0 on success, -errno otherwise. + */ +static int spi_nor_parse_profile1(struct spi_nor *nor, + const struct sfdp_parameter_header *profile1_header, + struct spi_nor_flash_parameter *params) +{ + u32 *table, opcode, addr; + size_t len; + int ret, i; + + len = profile1_header->length * sizeof(*table); + table = kmalloc(len, GFP_KERNEL); + if (!table) + return -ENOMEM; + + addr = SFDP_PARAM_HEADER_PTP(profile1_header); + ret = spi_nor_read_sfdp(nor, addr, len, table); + if (ret) + goto out; + + /* Fix endianness of the table DWORDs. */ + for (i = 0; i < profile1_header->length; i++) + table[i] = le32_to_cpu(table[i]); + + /* Get 8D-8D-8D fast read opcode and dummy cycles. */ + opcode = FIELD_GET(PROFILE1_DWORD1_RD_FAST_CMD, table[0]); + + /* + * Update the fast read settings. We set the default dummy cycles to 20 + * here. Flashes can change this value if they need to when enabling + * octal mode. + */ + params->hwcaps.mask |= SNOR_HWCAPS_READ_8_8_8_DTR; + spi_nor_set_read_settings(¶ms->reads[SNOR_CMD_READ_8_8_8_DTR], + 0, 20, opcode, + SNOR_PROTO_8_8_8_DTR); + + /* + * Since the flash supports xSPI DTR reads, it should also support DTR + * Page Program opcodes. + */ + params->hwcaps.mask |= SNOR_HWCAPS_PP_8_8_8_DTR; + + /* + * Set the Read Status Register dummy cycles and dummy address bytes. + */ + if (table[0] & PROFILE1_DWORD1_RDSR_DUMMY) + params->rdsr_dummy = 8; + else + params->rdsr_dummy = 4; + + if (table[0] & PROFILE1_DWORD1_RDSR_ADDR_BYTES) + params->rdsr_addr_nbytes = 4; + else + params->rdsr_addr_nbytes = 0; + +out: + kfree(table); + return ret; +} + /** * spi_nor_parse_sfdp() - parse the Serial Flash Discoverable Parameters. * @nor: pointer to a 'struct spi_nor' @@ -4527,6 +4603,10 @@ static int spi_nor_parse_sfdp(struct spi_nor *nor, err = spi_nor_parse_4bait(nor, param_header, params); break; + case SFDP_PROFILE1_ID: + err = spi_nor_parse_profile1(nor, param_header, params); + break; + default: break; } diff --git a/include/linux/mtd/spi-nor.h b/include/linux/mtd/spi-nor.h index 364f37276d78..f54dbd0f86ab 100644 --- a/include/linux/mtd/spi-nor.h +++ b/include/linux/mtd/spi-nor.h @@ -515,6 +515,9 @@ struct spi_nor_locking_ops { * * @size: the flash memory density in bytes. * @page_size: the page size of the SPI NOR flash memory. + * @rdsr_dummy: dummy cycles needed for Read Status Register command. + * @rdsr_addr_nbytes: dummy address bytes needed for Read Status Register + * command. * @hwcaps: describes the read and page program hardware * capabilities. * @reads: read capabilities ordered by priority: the higher index @@ -537,6 +540,8 @@ struct spi_nor_locking_ops { struct spi_nor_flash_parameter { u64 size; u32 page_size; + u8 rdsr_dummy; + u8 rdsr_addr_nbytes; struct spi_nor_hwcaps hwcaps; struct spi_nor_read_command reads[SNOR_CMD_READ_MAX]; -- 2.25.0 ______________________________________________________ Linux MTD discussion mailing list http://lists.infradead.org/mailman/listinfo/linux-mtd/
next prev parent reply other threads:[~2020-02-26 9:38 UTC|newest] Thread overview: 84+ messages / expand[flat|nested] mbox.gz Atom feed top 2020-02-26 9:36 [PATCH v2 00/11] mtd: spi-nor: add xSPI Octal DTR support Pratyush Yadav 2020-02-26 9:36 ` Pratyush Yadav 2020-02-26 9:36 ` [PATCH v2 01/11] dt-bindings: spi: allow expressing DTR capability Pratyush Yadav 2020-02-26 9:36 ` Pratyush Yadav 2020-02-27 16:11 ` Boris Brezillon 2020-02-27 16:11 ` Boris Brezillon 2020-02-27 16:11 ` Boris Brezillon 2020-02-27 16:28 ` Mark Brown 2020-02-27 16:28 ` Mark Brown 2020-02-27 16:28 ` Mark Brown 2020-02-27 16:40 ` Geert Uytterhoeven 2020-02-27 16:40 ` Geert Uytterhoeven 2020-02-27 16:40 ` Geert Uytterhoeven 2020-02-27 16:44 ` Mark Brown 2020-02-27 16:44 ` Mark Brown 2020-02-27 16:44 ` Mark Brown 2020-02-27 17:03 ` Geert Uytterhoeven 2020-02-27 17:03 ` Geert Uytterhoeven 2020-02-27 17:03 ` Geert Uytterhoeven 2020-03-02 9:53 ` Pratyush Yadav 2020-03-02 9:53 ` Pratyush Yadav 2020-02-27 17:06 ` Boris Brezillon 2020-02-27 17:06 ` Boris Brezillon 2020-02-27 17:06 ` Boris Brezillon 2020-02-27 16:29 ` Geert Uytterhoeven 2020-02-27 16:29 ` Geert Uytterhoeven 2020-02-27 16:29 ` Geert Uytterhoeven 2020-02-28 9:46 ` Pratyush Yadav 2020-02-28 9:46 ` Pratyush Yadav 2020-02-26 9:36 ` [PATCH v2 02/11] spi: set mode bits for "spi-rx-dtr" and "spi-tx-dtr" Pratyush Yadav 2020-02-26 9:36 ` Pratyush Yadav 2020-02-27 16:23 ` Boris Brezillon 2020-02-27 16:23 ` Boris Brezillon 2020-02-27 16:23 ` Boris Brezillon 2020-03-02 9:48 ` Pratyush Yadav 2020-03-02 9:48 ` Pratyush Yadav 2020-03-02 10:20 ` Boris Brezillon 2020-03-02 10:20 ` Boris Brezillon 2020-03-02 10:20 ` Boris Brezillon 2020-02-26 9:36 ` [PATCH v2 03/11] spi: spi-mem: allow specifying whether an op is DTR or not Pratyush Yadav 2020-02-26 9:36 ` Pratyush Yadav 2020-02-27 16:36 ` Boris Brezillon 2020-02-27 16:36 ` Boris Brezillon 2020-02-27 16:36 ` Boris Brezillon 2020-02-26 9:36 ` [PATCH v2 04/11] spi: spi-mem: allow specifying a command's extension Pratyush Yadav 2020-02-26 9:36 ` Pratyush Yadav 2020-02-27 16:44 ` Boris Brezillon 2020-02-27 16:44 ` Boris Brezillon 2020-02-27 16:44 ` Boris Brezillon 2020-02-28 9:41 ` Pratyush Yadav 2020-02-28 9:41 ` Pratyush Yadav 2020-02-26 9:36 ` [PATCH v2 05/11] spi: cadence-quadspi: Add support for octal DTR flashes Pratyush Yadav 2020-02-26 9:36 ` Pratyush Yadav 2020-02-26 9:36 ` Pratyush Yadav 2020-02-26 9:36 ` [PATCH v2 06/11] mtd: spi-nor: add support for DTR protocol Pratyush Yadav 2020-02-26 9:36 ` Pratyush Yadav 2020-02-26 9:36 ` Pratyush Yadav 2020-02-27 16:58 ` Boris Brezillon 2020-02-27 16:58 ` Boris Brezillon 2020-02-28 9:36 ` Pratyush Yadav 2020-02-28 9:36 ` Pratyush Yadav 2020-02-28 9:36 ` Pratyush Yadav 2020-02-28 10:53 ` Boris Brezillon 2020-02-28 10:53 ` Boris Brezillon 2020-02-28 10:53 ` Boris Brezillon 2020-02-28 12:07 ` Pratyush Yadav 2020-02-28 12:07 ` Pratyush Yadav 2020-02-28 12:07 ` Pratyush Yadav 2020-02-28 13:18 ` Boris Brezillon 2020-02-28 13:18 ` Boris Brezillon 2020-02-28 13:18 ` Boris Brezillon 2020-02-26 9:36 ` [PATCH v2 07/11] mtd: spi-nor: get command opcode extension type from BFPT Pratyush Yadav 2020-02-26 9:36 ` Pratyush Yadav 2020-02-26 9:37 ` Pratyush Yadav [this message] 2020-02-26 9:37 ` [PATCH v2 08/11] mtd: spi-nor: parse xSPI Profile 1.0 table Pratyush Yadav 2020-02-26 9:37 ` [PATCH v2 09/11] mtd: spi-nor: use dummy cycle and address width info from SFDP Pratyush Yadav 2020-02-26 9:37 ` Pratyush Yadav 2020-02-26 9:37 ` Pratyush Yadav 2020-02-26 9:37 ` [PATCH v2 10/11] mtd: spi-nor: enable octal DTR mode when possible Pratyush Yadav 2020-02-26 9:37 ` Pratyush Yadav 2020-02-26 9:37 ` Pratyush Yadav 2020-02-26 9:37 ` [PATCH v2 11/11] mtd: spi-nor: add support for Cypress Semper flash Pratyush Yadav 2020-02-26 9:37 ` Pratyush Yadav 2020-02-26 9:37 ` Pratyush Yadav
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