* Re: [PATCH v1 1/2] hw/arm: versal: Add support for the LPD ADMAs
2020-02-27 15:44 ` [PATCH v1 1/2] hw/arm: versal: Add support for the LPD ADMAs Edgar E. Iglesias
@ 2020-02-27 9:02 ` KONRAD Frederic
2020-02-27 9:48 ` Francisco Iglesias
` (2 subsequent siblings)
3 siblings, 0 replies; 10+ messages in thread
From: KONRAD Frederic @ 2020-02-27 9:02 UTC (permalink / raw)
To: Edgar E. Iglesias, qemu-devel
Cc: figlesia, peter.maydell, sstabellini, edgar.iglesias,
sai.pavan.boddu, frasse.iglesias, alistair, richard.henderson,
qemu-arm, philmd, luc.michel
Le 2/27/20 à 4:44 PM, Edgar E. Iglesias a écrit :
> From: "Edgar E. Iglesias" <edgar.iglesias@xilinx.com>
>
> Add support for the Versal LPD ADMAs.
>
> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Looks good to me.
Reviewed-by: KONRAD Frederic <frederic.konrad@adacore.com>
> ---
> hw/arm/xlnx-versal.c | 24 ++++++++++++++++++++++++
> include/hw/arm/xlnx-versal.h | 6 ++++++
> 2 files changed, 30 insertions(+)
>
> diff --git a/hw/arm/xlnx-versal.c b/hw/arm/xlnx-versal.c
> index 1cf3daaf4f..f9beba07ed 100644
> --- a/hw/arm/xlnx-versal.c
> +++ b/hw/arm/xlnx-versal.c
> @@ -193,6 +193,29 @@ static void versal_create_gems(Versal *s, qemu_irq *pic)
> }
> }
>
> +static void versal_create_admas(Versal *s, qemu_irq *pic)
> +{
> + int i;
> +
> + for (i = 0; i < ARRAY_SIZE(s->lpd.iou.adma); i++) {
> + char *name = g_strdup_printf("adma%d", i);
> + DeviceState *dev;
> + MemoryRegion *mr;
> +
> + dev = qdev_create(NULL, "xlnx.zdma");
> + s->lpd.iou.adma[i] = SYS_BUS_DEVICE(dev);
> + object_property_add_child(OBJECT(s), name, OBJECT(dev), &error_fatal);
> + qdev_init_nofail(dev);
> +
> + mr = sysbus_mmio_get_region(s->lpd.iou.adma[i], 0);
> + memory_region_add_subregion(&s->mr_ps,
> + MM_ADMA_CH0 + i * MM_ADMA_CH0_SIZE, mr);
> +
> + sysbus_connect_irq(s->lpd.iou.adma[i], 0, pic[VERSAL_ADMA_IRQ_0 + i]);
> + g_free(name);
> + }
> +}
> +
> /* This takes the board allocated linear DDR memory and creates aliases
> * for each split DDR range/aperture on the Versal address map.
> */
> @@ -274,6 +297,7 @@ static void versal_realize(DeviceState *dev, Error **errp)
> versal_create_apu_gic(s, pic);
> versal_create_uarts(s, pic);
> versal_create_gems(s, pic);
> + versal_create_admas(s, pic);
> versal_map_ddr(s);
> versal_unimp(s);
>
> diff --git a/include/hw/arm/xlnx-versal.h b/include/hw/arm/xlnx-versal.h
> index d844c4ffe4..6c0a692b2f 100644
> --- a/include/hw/arm/xlnx-versal.h
> +++ b/include/hw/arm/xlnx-versal.h
> @@ -22,6 +22,7 @@
> #define XLNX_VERSAL_NR_ACPUS 2
> #define XLNX_VERSAL_NR_UARTS 2
> #define XLNX_VERSAL_NR_GEMS 2
> +#define XLNX_VERSAL_NR_ADMAS 8
> #define XLNX_VERSAL_NR_IRQS 192
>
> typedef struct Versal {
> @@ -50,6 +51,7 @@ typedef struct Versal {
> struct {
> SysBusDevice *uart[XLNX_VERSAL_NR_UARTS];
> SysBusDevice *gem[XLNX_VERSAL_NR_GEMS];
> + SysBusDevice *adma[XLNX_VERSAL_NR_ADMAS];
> } iou;
> } lpd;
>
> @@ -74,6 +76,7 @@ typedef struct Versal {
> #define VERSAL_GEM0_WAKE_IRQ_0 57
> #define VERSAL_GEM1_IRQ_0 58
> #define VERSAL_GEM1_WAKE_IRQ_0 59
> +#define VERSAL_ADMA_IRQ_0 60
>
> /* Architecturally reserved IRQs suitable for virtualization. */
> #define VERSAL_RSVD_IRQ_FIRST 111
> @@ -96,6 +99,9 @@ typedef struct Versal {
> #define MM_GEM1 0xff0d0000U
> #define MM_GEM1_SIZE 0x10000
>
> +#define MM_ADMA_CH0 0xffa80000U
> +#define MM_ADMA_CH0_SIZE 0x10000
> +
> #define MM_OCM 0xfffc0000U
> #define MM_OCM_SIZE 0x40000
>
>
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH v1 2/2] hw/arm: versal: Generate xlnx-versal-virt zdma FDT nodes
2020-02-27 15:44 ` [PATCH v1 2/2] hw/arm: versal: Generate xlnx-versal-virt zdma FDT nodes Edgar E. Iglesias
@ 2020-02-27 9:04 ` KONRAD Frederic
2020-02-27 9:48 ` Francisco Iglesias
2020-03-02 11:07 ` Luc Michel
2 siblings, 0 replies; 10+ messages in thread
From: KONRAD Frederic @ 2020-02-27 9:04 UTC (permalink / raw)
To: Edgar E. Iglesias, qemu-devel
Cc: figlesia, peter.maydell, sstabellini, edgar.iglesias,
sai.pavan.boddu, frasse.iglesias, alistair, richard.henderson,
qemu-arm, philmd, luc.michel
Le 2/27/20 à 4:44 PM, Edgar E. Iglesias a écrit :
> From: "Edgar E. Iglesias" <edgar.iglesias@xilinx.com>
>
> Generate xlnx-versal-virt zdma FDT nodes.
>
> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: KONRAD Frederic <frederic.konrad@adacore.com>
> ---
> hw/arm/xlnx-versal-virt.c | 28 ++++++++++++++++++++++++++++
> 1 file changed, 28 insertions(+)
>
> diff --git a/hw/arm/xlnx-versal-virt.c b/hw/arm/xlnx-versal-virt.c
> index e7f4ca8bf9..878a275140 100644
> --- a/hw/arm/xlnx-versal-virt.c
> +++ b/hw/arm/xlnx-versal-virt.c
> @@ -229,6 +229,33 @@ static void fdt_add_gem_nodes(VersalVirt *s)
> }
> }
>
> +static void fdt_add_zdma_nodes(VersalVirt *s)
> +{
> + const char clocknames[] = "clk_main\0clk_apb";
> + const char compat[] = "xlnx,zynqmp-dma-1.0";
> + int i;
> +
> + for (i = XLNX_VERSAL_NR_ADMAS - 1; i >= 0; i--) {
> + uint64_t addr = MM_ADMA_CH0 + MM_ADMA_CH0_SIZE * i;
> + char *name = g_strdup_printf("/dma@%" PRIx64, addr);
> +
> + qemu_fdt_add_subnode(s->fdt, name);
> +
> + qemu_fdt_setprop_cell(s->fdt, name, "xlnx,bus-width", 64);
> + qemu_fdt_setprop_cells(s->fdt, name, "clocks",
> + s->phandle.clk_25Mhz, s->phandle.clk_25Mhz);
> + qemu_fdt_setprop(s->fdt, name, "clock-names",
> + clocknames, sizeof(clocknames));
> + qemu_fdt_setprop_cells(s->fdt, name, "interrupts",
> + GIC_FDT_IRQ_TYPE_SPI, VERSAL_ADMA_IRQ_0 + i,
> + GIC_FDT_IRQ_FLAGS_LEVEL_HI);
> + qemu_fdt_setprop_sized_cells(s->fdt, name, "reg",
> + 2, addr, 2, 0x1000);
> + qemu_fdt_setprop(s->fdt, name, "compatible", compat, sizeof(compat));
> + g_free(name);
> + }
> +}
> +
> static void fdt_nop_memory_nodes(void *fdt, Error **errp)
> {
> Error *err = NULL;
> @@ -427,6 +454,7 @@ static void versal_virt_init(MachineState *machine)
> fdt_add_uart_nodes(s);
> fdt_add_gic_nodes(s);
> fdt_add_timer_nodes(s);
> + fdt_add_zdma_nodes(s);
> fdt_add_cpu_nodes(s, psci_conduit);
> fdt_add_clk_node(s, "/clk125", 125000000, s->phandle.clk_125Mhz);
> fdt_add_clk_node(s, "/clk25", 25000000, s->phandle.clk_25Mhz);
>
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH v1 1/2] hw/arm: versal: Add support for the LPD ADMAs
2020-02-27 15:44 ` [PATCH v1 1/2] hw/arm: versal: Add support for the LPD ADMAs Edgar E. Iglesias
2020-02-27 9:02 ` KONRAD Frederic
@ 2020-02-27 9:48 ` Francisco Iglesias
2020-03-02 11:06 ` Luc Michel
2020-03-02 11:22 ` Peter Maydell
3 siblings, 0 replies; 10+ messages in thread
From: Francisco Iglesias @ 2020-02-27 9:48 UTC (permalink / raw)
To: Edgar E. Iglesias
Cc: figlesia, peter.maydell, sstabellini, edgar.iglesias,
sai.pavan.boddu, alistair, richard.henderson, qemu-devel,
frederic.konrad, qemu-arm, philmd, luc.michel
On [2020 Feb 27] Thu 16:44:23, Edgar E. Iglesias wrote:
> From: "Edgar E. Iglesias" <edgar.iglesias@xilinx.com>
>
> Add support for the Versal LPD ADMAs.
>
> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Francisco Iglesias <frasse.iglesias@gmail.com>
> ---
> hw/arm/xlnx-versal.c | 24 ++++++++++++++++++++++++
> include/hw/arm/xlnx-versal.h | 6 ++++++
> 2 files changed, 30 insertions(+)
>
> diff --git a/hw/arm/xlnx-versal.c b/hw/arm/xlnx-versal.c
> index 1cf3daaf4f..f9beba07ed 100644
> --- a/hw/arm/xlnx-versal.c
> +++ b/hw/arm/xlnx-versal.c
> @@ -193,6 +193,29 @@ static void versal_create_gems(Versal *s, qemu_irq *pic)
> }
> }
>
> +static void versal_create_admas(Versal *s, qemu_irq *pic)
> +{
> + int i;
> +
> + for (i = 0; i < ARRAY_SIZE(s->lpd.iou.adma); i++) {
> + char *name = g_strdup_printf("adma%d", i);
> + DeviceState *dev;
> + MemoryRegion *mr;
> +
> + dev = qdev_create(NULL, "xlnx.zdma");
> + s->lpd.iou.adma[i] = SYS_BUS_DEVICE(dev);
> + object_property_add_child(OBJECT(s), name, OBJECT(dev), &error_fatal);
> + qdev_init_nofail(dev);
> +
> + mr = sysbus_mmio_get_region(s->lpd.iou.adma[i], 0);
> + memory_region_add_subregion(&s->mr_ps,
> + MM_ADMA_CH0 + i * MM_ADMA_CH0_SIZE, mr);
> +
> + sysbus_connect_irq(s->lpd.iou.adma[i], 0, pic[VERSAL_ADMA_IRQ_0 + i]);
> + g_free(name);
> + }
> +}
> +
> /* This takes the board allocated linear DDR memory and creates aliases
> * for each split DDR range/aperture on the Versal address map.
> */
> @@ -274,6 +297,7 @@ static void versal_realize(DeviceState *dev, Error **errp)
> versal_create_apu_gic(s, pic);
> versal_create_uarts(s, pic);
> versal_create_gems(s, pic);
> + versal_create_admas(s, pic);
> versal_map_ddr(s);
> versal_unimp(s);
>
> diff --git a/include/hw/arm/xlnx-versal.h b/include/hw/arm/xlnx-versal.h
> index d844c4ffe4..6c0a692b2f 100644
> --- a/include/hw/arm/xlnx-versal.h
> +++ b/include/hw/arm/xlnx-versal.h
> @@ -22,6 +22,7 @@
> #define XLNX_VERSAL_NR_ACPUS 2
> #define XLNX_VERSAL_NR_UARTS 2
> #define XLNX_VERSAL_NR_GEMS 2
> +#define XLNX_VERSAL_NR_ADMAS 8
> #define XLNX_VERSAL_NR_IRQS 192
>
> typedef struct Versal {
> @@ -50,6 +51,7 @@ typedef struct Versal {
> struct {
> SysBusDevice *uart[XLNX_VERSAL_NR_UARTS];
> SysBusDevice *gem[XLNX_VERSAL_NR_GEMS];
> + SysBusDevice *adma[XLNX_VERSAL_NR_ADMAS];
> } iou;
> } lpd;
>
> @@ -74,6 +76,7 @@ typedef struct Versal {
> #define VERSAL_GEM0_WAKE_IRQ_0 57
> #define VERSAL_GEM1_IRQ_0 58
> #define VERSAL_GEM1_WAKE_IRQ_0 59
> +#define VERSAL_ADMA_IRQ_0 60
>
> /* Architecturally reserved IRQs suitable for virtualization. */
> #define VERSAL_RSVD_IRQ_FIRST 111
> @@ -96,6 +99,9 @@ typedef struct Versal {
> #define MM_GEM1 0xff0d0000U
> #define MM_GEM1_SIZE 0x10000
>
> +#define MM_ADMA_CH0 0xffa80000U
> +#define MM_ADMA_CH0_SIZE 0x10000
> +
> #define MM_OCM 0xfffc0000U
> #define MM_OCM_SIZE 0x40000
>
> --
> 2.20.1
>
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH v1 2/2] hw/arm: versal: Generate xlnx-versal-virt zdma FDT nodes
2020-02-27 15:44 ` [PATCH v1 2/2] hw/arm: versal: Generate xlnx-versal-virt zdma FDT nodes Edgar E. Iglesias
2020-02-27 9:04 ` KONRAD Frederic
@ 2020-02-27 9:48 ` Francisco Iglesias
2020-03-02 11:07 ` Luc Michel
2 siblings, 0 replies; 10+ messages in thread
From: Francisco Iglesias @ 2020-02-27 9:48 UTC (permalink / raw)
To: Edgar E. Iglesias
Cc: figlesia, peter.maydell, sstabellini, edgar.iglesias,
sai.pavan.boddu, alistair, richard.henderson, qemu-devel,
frederic.konrad, qemu-arm, philmd, luc.michel
On [2020 Feb 27] Thu 16:44:24, Edgar E. Iglesias wrote:
> From: "Edgar E. Iglesias" <edgar.iglesias@xilinx.com>
>
> Generate xlnx-versal-virt zdma FDT nodes.
>
> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Francisco Iglesias <frasse.iglesias@gmail.com>
> ---
> hw/arm/xlnx-versal-virt.c | 28 ++++++++++++++++++++++++++++
> 1 file changed, 28 insertions(+)
>
> diff --git a/hw/arm/xlnx-versal-virt.c b/hw/arm/xlnx-versal-virt.c
> index e7f4ca8bf9..878a275140 100644
> --- a/hw/arm/xlnx-versal-virt.c
> +++ b/hw/arm/xlnx-versal-virt.c
> @@ -229,6 +229,33 @@ static void fdt_add_gem_nodes(VersalVirt *s)
> }
> }
>
> +static void fdt_add_zdma_nodes(VersalVirt *s)
> +{
> + const char clocknames[] = "clk_main\0clk_apb";
> + const char compat[] = "xlnx,zynqmp-dma-1.0";
> + int i;
> +
> + for (i = XLNX_VERSAL_NR_ADMAS - 1; i >= 0; i--) {
> + uint64_t addr = MM_ADMA_CH0 + MM_ADMA_CH0_SIZE * i;
> + char *name = g_strdup_printf("/dma@%" PRIx64, addr);
> +
> + qemu_fdt_add_subnode(s->fdt, name);
> +
> + qemu_fdt_setprop_cell(s->fdt, name, "xlnx,bus-width", 64);
> + qemu_fdt_setprop_cells(s->fdt, name, "clocks",
> + s->phandle.clk_25Mhz, s->phandle.clk_25Mhz);
> + qemu_fdt_setprop(s->fdt, name, "clock-names",
> + clocknames, sizeof(clocknames));
> + qemu_fdt_setprop_cells(s->fdt, name, "interrupts",
> + GIC_FDT_IRQ_TYPE_SPI, VERSAL_ADMA_IRQ_0 + i,
> + GIC_FDT_IRQ_FLAGS_LEVEL_HI);
> + qemu_fdt_setprop_sized_cells(s->fdt, name, "reg",
> + 2, addr, 2, 0x1000);
> + qemu_fdt_setprop(s->fdt, name, "compatible", compat, sizeof(compat));
> + g_free(name);
> + }
> +}
> +
> static void fdt_nop_memory_nodes(void *fdt, Error **errp)
> {
> Error *err = NULL;
> @@ -427,6 +454,7 @@ static void versal_virt_init(MachineState *machine)
> fdt_add_uart_nodes(s);
> fdt_add_gic_nodes(s);
> fdt_add_timer_nodes(s);
> + fdt_add_zdma_nodes(s);
> fdt_add_cpu_nodes(s, psci_conduit);
> fdt_add_clk_node(s, "/clk125", 125000000, s->phandle.clk_125Mhz);
> fdt_add_clk_node(s, "/clk25", 25000000, s->phandle.clk_25Mhz);
> --
> 2.20.1
>
^ permalink raw reply [flat|nested] 10+ messages in thread
* [PATCH v1 0/2] hw/arm: versal: Add the LPD zDMAs
@ 2020-02-27 15:44 Edgar E. Iglesias
2020-02-27 15:44 ` [PATCH v1 1/2] hw/arm: versal: Add support for the LPD ADMAs Edgar E. Iglesias
2020-02-27 15:44 ` [PATCH v1 2/2] hw/arm: versal: Generate xlnx-versal-virt zdma FDT nodes Edgar E. Iglesias
0 siblings, 2 replies; 10+ messages in thread
From: Edgar E. Iglesias @ 2020-02-27 15:44 UTC (permalink / raw)
To: qemu-devel
Cc: figlesia, peter.maydell, sstabellini, edgar.iglesias,
sai.pavan.boddu, frasse.iglesias, alistair, richard.henderson,
frederic.konrad, qemu-arm, philmd, luc.michel
From: "Edgar E. Iglesias" <edgar.iglesias@xilinx.com>
Instantiate the Versal LPD zDMAs.
Cheers,
Edgar
Edgar E. Iglesias (2):
hw/arm: versal: Add support for the LPD ADMAs
hw/arm: versal: Generate xlnx-versal-virt zdma FDT nodes
hw/arm/xlnx-versal-virt.c | 28 ++++++++++++++++++++++++++++
hw/arm/xlnx-versal.c | 24 ++++++++++++++++++++++++
include/hw/arm/xlnx-versal.h | 6 ++++++
3 files changed, 58 insertions(+)
--
2.20.1
^ permalink raw reply [flat|nested] 10+ messages in thread
* [PATCH v1 1/2] hw/arm: versal: Add support for the LPD ADMAs
2020-02-27 15:44 [PATCH v1 0/2] hw/arm: versal: Add the LPD zDMAs Edgar E. Iglesias
@ 2020-02-27 15:44 ` Edgar E. Iglesias
2020-02-27 9:02 ` KONRAD Frederic
` (3 more replies)
2020-02-27 15:44 ` [PATCH v1 2/2] hw/arm: versal: Generate xlnx-versal-virt zdma FDT nodes Edgar E. Iglesias
1 sibling, 4 replies; 10+ messages in thread
From: Edgar E. Iglesias @ 2020-02-27 15:44 UTC (permalink / raw)
To: qemu-devel
Cc: figlesia, peter.maydell, sstabellini, edgar.iglesias,
sai.pavan.boddu, frasse.iglesias, alistair, richard.henderson,
frederic.konrad, qemu-arm, philmd, luc.michel
From: "Edgar E. Iglesias" <edgar.iglesias@xilinx.com>
Add support for the Versal LPD ADMAs.
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
---
hw/arm/xlnx-versal.c | 24 ++++++++++++++++++++++++
include/hw/arm/xlnx-versal.h | 6 ++++++
2 files changed, 30 insertions(+)
diff --git a/hw/arm/xlnx-versal.c b/hw/arm/xlnx-versal.c
index 1cf3daaf4f..f9beba07ed 100644
--- a/hw/arm/xlnx-versal.c
+++ b/hw/arm/xlnx-versal.c
@@ -193,6 +193,29 @@ static void versal_create_gems(Versal *s, qemu_irq *pic)
}
}
+static void versal_create_admas(Versal *s, qemu_irq *pic)
+{
+ int i;
+
+ for (i = 0; i < ARRAY_SIZE(s->lpd.iou.adma); i++) {
+ char *name = g_strdup_printf("adma%d", i);
+ DeviceState *dev;
+ MemoryRegion *mr;
+
+ dev = qdev_create(NULL, "xlnx.zdma");
+ s->lpd.iou.adma[i] = SYS_BUS_DEVICE(dev);
+ object_property_add_child(OBJECT(s), name, OBJECT(dev), &error_fatal);
+ qdev_init_nofail(dev);
+
+ mr = sysbus_mmio_get_region(s->lpd.iou.adma[i], 0);
+ memory_region_add_subregion(&s->mr_ps,
+ MM_ADMA_CH0 + i * MM_ADMA_CH0_SIZE, mr);
+
+ sysbus_connect_irq(s->lpd.iou.adma[i], 0, pic[VERSAL_ADMA_IRQ_0 + i]);
+ g_free(name);
+ }
+}
+
/* This takes the board allocated linear DDR memory and creates aliases
* for each split DDR range/aperture on the Versal address map.
*/
@@ -274,6 +297,7 @@ static void versal_realize(DeviceState *dev, Error **errp)
versal_create_apu_gic(s, pic);
versal_create_uarts(s, pic);
versal_create_gems(s, pic);
+ versal_create_admas(s, pic);
versal_map_ddr(s);
versal_unimp(s);
diff --git a/include/hw/arm/xlnx-versal.h b/include/hw/arm/xlnx-versal.h
index d844c4ffe4..6c0a692b2f 100644
--- a/include/hw/arm/xlnx-versal.h
+++ b/include/hw/arm/xlnx-versal.h
@@ -22,6 +22,7 @@
#define XLNX_VERSAL_NR_ACPUS 2
#define XLNX_VERSAL_NR_UARTS 2
#define XLNX_VERSAL_NR_GEMS 2
+#define XLNX_VERSAL_NR_ADMAS 8
#define XLNX_VERSAL_NR_IRQS 192
typedef struct Versal {
@@ -50,6 +51,7 @@ typedef struct Versal {
struct {
SysBusDevice *uart[XLNX_VERSAL_NR_UARTS];
SysBusDevice *gem[XLNX_VERSAL_NR_GEMS];
+ SysBusDevice *adma[XLNX_VERSAL_NR_ADMAS];
} iou;
} lpd;
@@ -74,6 +76,7 @@ typedef struct Versal {
#define VERSAL_GEM0_WAKE_IRQ_0 57
#define VERSAL_GEM1_IRQ_0 58
#define VERSAL_GEM1_WAKE_IRQ_0 59
+#define VERSAL_ADMA_IRQ_0 60
/* Architecturally reserved IRQs suitable for virtualization. */
#define VERSAL_RSVD_IRQ_FIRST 111
@@ -96,6 +99,9 @@ typedef struct Versal {
#define MM_GEM1 0xff0d0000U
#define MM_GEM1_SIZE 0x10000
+#define MM_ADMA_CH0 0xffa80000U
+#define MM_ADMA_CH0_SIZE 0x10000
+
#define MM_OCM 0xfffc0000U
#define MM_OCM_SIZE 0x40000
--
2.20.1
^ permalink raw reply related [flat|nested] 10+ messages in thread
* [PATCH v1 2/2] hw/arm: versal: Generate xlnx-versal-virt zdma FDT nodes
2020-02-27 15:44 [PATCH v1 0/2] hw/arm: versal: Add the LPD zDMAs Edgar E. Iglesias
2020-02-27 15:44 ` [PATCH v1 1/2] hw/arm: versal: Add support for the LPD ADMAs Edgar E. Iglesias
@ 2020-02-27 15:44 ` Edgar E. Iglesias
2020-02-27 9:04 ` KONRAD Frederic
` (2 more replies)
1 sibling, 3 replies; 10+ messages in thread
From: Edgar E. Iglesias @ 2020-02-27 15:44 UTC (permalink / raw)
To: qemu-devel
Cc: figlesia, peter.maydell, sstabellini, edgar.iglesias,
sai.pavan.boddu, frasse.iglesias, alistair, richard.henderson,
frederic.konrad, qemu-arm, philmd, luc.michel
From: "Edgar E. Iglesias" <edgar.iglesias@xilinx.com>
Generate xlnx-versal-virt zdma FDT nodes.
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
---
hw/arm/xlnx-versal-virt.c | 28 ++++++++++++++++++++++++++++
1 file changed, 28 insertions(+)
diff --git a/hw/arm/xlnx-versal-virt.c b/hw/arm/xlnx-versal-virt.c
index e7f4ca8bf9..878a275140 100644
--- a/hw/arm/xlnx-versal-virt.c
+++ b/hw/arm/xlnx-versal-virt.c
@@ -229,6 +229,33 @@ static void fdt_add_gem_nodes(VersalVirt *s)
}
}
+static void fdt_add_zdma_nodes(VersalVirt *s)
+{
+ const char clocknames[] = "clk_main\0clk_apb";
+ const char compat[] = "xlnx,zynqmp-dma-1.0";
+ int i;
+
+ for (i = XLNX_VERSAL_NR_ADMAS - 1; i >= 0; i--) {
+ uint64_t addr = MM_ADMA_CH0 + MM_ADMA_CH0_SIZE * i;
+ char *name = g_strdup_printf("/dma@%" PRIx64, addr);
+
+ qemu_fdt_add_subnode(s->fdt, name);
+
+ qemu_fdt_setprop_cell(s->fdt, name, "xlnx,bus-width", 64);
+ qemu_fdt_setprop_cells(s->fdt, name, "clocks",
+ s->phandle.clk_25Mhz, s->phandle.clk_25Mhz);
+ qemu_fdt_setprop(s->fdt, name, "clock-names",
+ clocknames, sizeof(clocknames));
+ qemu_fdt_setprop_cells(s->fdt, name, "interrupts",
+ GIC_FDT_IRQ_TYPE_SPI, VERSAL_ADMA_IRQ_0 + i,
+ GIC_FDT_IRQ_FLAGS_LEVEL_HI);
+ qemu_fdt_setprop_sized_cells(s->fdt, name, "reg",
+ 2, addr, 2, 0x1000);
+ qemu_fdt_setprop(s->fdt, name, "compatible", compat, sizeof(compat));
+ g_free(name);
+ }
+}
+
static void fdt_nop_memory_nodes(void *fdt, Error **errp)
{
Error *err = NULL;
@@ -427,6 +454,7 @@ static void versal_virt_init(MachineState *machine)
fdt_add_uart_nodes(s);
fdt_add_gic_nodes(s);
fdt_add_timer_nodes(s);
+ fdt_add_zdma_nodes(s);
fdt_add_cpu_nodes(s, psci_conduit);
fdt_add_clk_node(s, "/clk125", 125000000, s->phandle.clk_125Mhz);
fdt_add_clk_node(s, "/clk25", 25000000, s->phandle.clk_25Mhz);
--
2.20.1
^ permalink raw reply related [flat|nested] 10+ messages in thread
* Re: [PATCH v1 1/2] hw/arm: versal: Add support for the LPD ADMAs
2020-02-27 15:44 ` [PATCH v1 1/2] hw/arm: versal: Add support for the LPD ADMAs Edgar E. Iglesias
2020-02-27 9:02 ` KONRAD Frederic
2020-02-27 9:48 ` Francisco Iglesias
@ 2020-03-02 11:06 ` Luc Michel
2020-03-02 11:22 ` Peter Maydell
3 siblings, 0 replies; 10+ messages in thread
From: Luc Michel @ 2020-03-02 11:06 UTC (permalink / raw)
To: Edgar E. Iglesias, qemu-devel
Cc: figlesia, peter.maydell, sstabellini, edgar.iglesias,
sai.pavan.boddu, frasse.iglesias, alistair, richard.henderson,
frederic.konrad, qemu-arm, philmd
On 2/27/20 4:44 PM, Edgar E. Iglesias wrote:
> From: "Edgar E. Iglesias" <edgar.iglesias@xilinx.com>
>
> Add support for the Versal LPD ADMAs.
>
> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Luc Michel <luc.michel@greensocs.com>
> ---
> hw/arm/xlnx-versal.c | 24 ++++++++++++++++++++++++
> include/hw/arm/xlnx-versal.h | 6 ++++++
> 2 files changed, 30 insertions(+)
>
> diff --git a/hw/arm/xlnx-versal.c b/hw/arm/xlnx-versal.c
> index 1cf3daaf4f..f9beba07ed 100644
> --- a/hw/arm/xlnx-versal.c
> +++ b/hw/arm/xlnx-versal.c
> @@ -193,6 +193,29 @@ static void versal_create_gems(Versal *s, qemu_irq *pic)
> }
> }
>
> +static void versal_create_admas(Versal *s, qemu_irq *pic)
> +{
> + int i;
> +
> + for (i = 0; i < ARRAY_SIZE(s->lpd.iou.adma); i++) {
> + char *name = g_strdup_printf("adma%d", i);
> + DeviceState *dev;
> + MemoryRegion *mr;
> +
> + dev = qdev_create(NULL, "xlnx.zdma");
> + s->lpd.iou.adma[i] = SYS_BUS_DEVICE(dev);
> + object_property_add_child(OBJECT(s), name, OBJECT(dev), &error_fatal);
> + qdev_init_nofail(dev);
> +
> + mr = sysbus_mmio_get_region(s->lpd.iou.adma[i], 0);
> + memory_region_add_subregion(&s->mr_ps,
> + MM_ADMA_CH0 + i * MM_ADMA_CH0_SIZE, mr);
> +
> + sysbus_connect_irq(s->lpd.iou.adma[i], 0, pic[VERSAL_ADMA_IRQ_0 + i]);
> + g_free(name);
> + }
> +}
> +
> /* This takes the board allocated linear DDR memory and creates aliases
> * for each split DDR range/aperture on the Versal address map.
> */
> @@ -274,6 +297,7 @@ static void versal_realize(DeviceState *dev, Error **errp)
> versal_create_apu_gic(s, pic);
> versal_create_uarts(s, pic);
> versal_create_gems(s, pic);
> + versal_create_admas(s, pic);
> versal_map_ddr(s);
> versal_unimp(s);
>
> diff --git a/include/hw/arm/xlnx-versal.h b/include/hw/arm/xlnx-versal.h
> index d844c4ffe4..6c0a692b2f 100644
> --- a/include/hw/arm/xlnx-versal.h
> +++ b/include/hw/arm/xlnx-versal.h
> @@ -22,6 +22,7 @@
> #define XLNX_VERSAL_NR_ACPUS 2
> #define XLNX_VERSAL_NR_UARTS 2
> #define XLNX_VERSAL_NR_GEMS 2
> +#define XLNX_VERSAL_NR_ADMAS 8
> #define XLNX_VERSAL_NR_IRQS 192
>
> typedef struct Versal {
> @@ -50,6 +51,7 @@ typedef struct Versal {
> struct {
> SysBusDevice *uart[XLNX_VERSAL_NR_UARTS];
> SysBusDevice *gem[XLNX_VERSAL_NR_GEMS];
> + SysBusDevice *adma[XLNX_VERSAL_NR_ADMAS];
> } iou;
> } lpd;
>
> @@ -74,6 +76,7 @@ typedef struct Versal {
> #define VERSAL_GEM0_WAKE_IRQ_0 57
> #define VERSAL_GEM1_IRQ_0 58
> #define VERSAL_GEM1_WAKE_IRQ_0 59
> +#define VERSAL_ADMA_IRQ_0 60
>
> /* Architecturally reserved IRQs suitable for virtualization. */
> #define VERSAL_RSVD_IRQ_FIRST 111
> @@ -96,6 +99,9 @@ typedef struct Versal {
> #define MM_GEM1 0xff0d0000U
> #define MM_GEM1_SIZE 0x10000
>
> +#define MM_ADMA_CH0 0xffa80000U
> +#define MM_ADMA_CH0_SIZE 0x10000
> +
> #define MM_OCM 0xfffc0000U
> #define MM_OCM_SIZE 0x40000
>
>
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH v1 2/2] hw/arm: versal: Generate xlnx-versal-virt zdma FDT nodes
2020-02-27 15:44 ` [PATCH v1 2/2] hw/arm: versal: Generate xlnx-versal-virt zdma FDT nodes Edgar E. Iglesias
2020-02-27 9:04 ` KONRAD Frederic
2020-02-27 9:48 ` Francisco Iglesias
@ 2020-03-02 11:07 ` Luc Michel
2 siblings, 0 replies; 10+ messages in thread
From: Luc Michel @ 2020-03-02 11:07 UTC (permalink / raw)
To: Edgar E. Iglesias, qemu-devel
Cc: figlesia, peter.maydell, sstabellini, edgar.iglesias,
sai.pavan.boddu, frasse.iglesias, alistair, richard.henderson,
frederic.konrad, qemu-arm, philmd
On 2/27/20 4:44 PM, Edgar E. Iglesias wrote:
> From: "Edgar E. Iglesias" <edgar.iglesias@xilinx.com>
>
> Generate xlnx-versal-virt zdma FDT nodes.
>
> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Luc Michel <luc.michel@greensocs.com>
> ---
> hw/arm/xlnx-versal-virt.c | 28 ++++++++++++++++++++++++++++
> 1 file changed, 28 insertions(+)
>
> diff --git a/hw/arm/xlnx-versal-virt.c b/hw/arm/xlnx-versal-virt.c
> index e7f4ca8bf9..878a275140 100644
> --- a/hw/arm/xlnx-versal-virt.c
> +++ b/hw/arm/xlnx-versal-virt.c
> @@ -229,6 +229,33 @@ static void fdt_add_gem_nodes(VersalVirt *s)
> }
> }
>
> +static void fdt_add_zdma_nodes(VersalVirt *s)
> +{
> + const char clocknames[] = "clk_main\0clk_apb";
> + const char compat[] = "xlnx,zynqmp-dma-1.0";
> + int i;
> +
> + for (i = XLNX_VERSAL_NR_ADMAS - 1; i >= 0; i--) {
> + uint64_t addr = MM_ADMA_CH0 + MM_ADMA_CH0_SIZE * i;
> + char *name = g_strdup_printf("/dma@%" PRIx64, addr);
> +
> + qemu_fdt_add_subnode(s->fdt, name);
> +
> + qemu_fdt_setprop_cell(s->fdt, name, "xlnx,bus-width", 64);
> + qemu_fdt_setprop_cells(s->fdt, name, "clocks",
> + s->phandle.clk_25Mhz, s->phandle.clk_25Mhz);
> + qemu_fdt_setprop(s->fdt, name, "clock-names",
> + clocknames, sizeof(clocknames));
> + qemu_fdt_setprop_cells(s->fdt, name, "interrupts",
> + GIC_FDT_IRQ_TYPE_SPI, VERSAL_ADMA_IRQ_0 + i,
> + GIC_FDT_IRQ_FLAGS_LEVEL_HI);
> + qemu_fdt_setprop_sized_cells(s->fdt, name, "reg",
> + 2, addr, 2, 0x1000);
> + qemu_fdt_setprop(s->fdt, name, "compatible", compat, sizeof(compat));
> + g_free(name);
> + }
> +}
> +
> static void fdt_nop_memory_nodes(void *fdt, Error **errp)
> {
> Error *err = NULL;
> @@ -427,6 +454,7 @@ static void versal_virt_init(MachineState *machine)
> fdt_add_uart_nodes(s);
> fdt_add_gic_nodes(s);
> fdt_add_timer_nodes(s);
> + fdt_add_zdma_nodes(s);
> fdt_add_cpu_nodes(s, psci_conduit);
> fdt_add_clk_node(s, "/clk125", 125000000, s->phandle.clk_125Mhz);
> fdt_add_clk_node(s, "/clk25", 25000000, s->phandle.clk_25Mhz);
>
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH v1 1/2] hw/arm: versal: Add support for the LPD ADMAs
2020-02-27 15:44 ` [PATCH v1 1/2] hw/arm: versal: Add support for the LPD ADMAs Edgar E. Iglesias
` (2 preceding siblings ...)
2020-03-02 11:06 ` Luc Michel
@ 2020-03-02 11:22 ` Peter Maydell
3 siblings, 0 replies; 10+ messages in thread
From: Peter Maydell @ 2020-03-02 11:22 UTC (permalink / raw)
To: Edgar E. Iglesias
Cc: figlesia, Edgar Iglesias, Stefano Stabellini, Sai Pavan Boddu,
Francisco Iglesias, Alistair Francis, Richard Henderson,
QEMU Developers, KONRAD Frederic, qemu-arm,
Philippe Mathieu-Daudé,
Luc Michel
On Thu, 27 Feb 2020 at 03:17, Edgar E. Iglesias
<edgar.iglesias@gmail.com> wrote:
>
> From: "Edgar E. Iglesias" <edgar.iglesias@xilinx.com>
>
> Add support for the Versal LPD ADMAs.
>
> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
> ---
> hw/arm/xlnx-versal.c | 24 ++++++++++++++++++++++++
> include/hw/arm/xlnx-versal.h | 6 ++++++
> 2 files changed, 30 insertions(+)
>
> diff --git a/hw/arm/xlnx-versal.c b/hw/arm/xlnx-versal.c
> index 1cf3daaf4f..f9beba07ed 100644
> --- a/hw/arm/xlnx-versal.c
> +++ b/hw/arm/xlnx-versal.c
> @@ -193,6 +193,29 @@ static void versal_create_gems(Versal *s, qemu_irq *pic)
> }
> }
>
> +static void versal_create_admas(Versal *s, qemu_irq *pic)
> +{
> + int i;
> +
> + for (i = 0; i < ARRAY_SIZE(s->lpd.iou.adma); i++) {
> + char *name = g_strdup_printf("adma%d", i);
> + DeviceState *dev;
> + MemoryRegion *mr;
> +
> + dev = qdev_create(NULL, "xlnx.zdma");
> + s->lpd.iou.adma[i] = SYS_BUS_DEVICE(dev);
> + object_property_add_child(OBJECT(s), name, OBJECT(dev), &error_fatal);
> + qdev_init_nofail(dev);
> +
> + mr = sysbus_mmio_get_region(s->lpd.iou.adma[i], 0);
> + memory_region_add_subregion(&s->mr_ps,
> + MM_ADMA_CH0 + i * MM_ADMA_CH0_SIZE, mr);
> +
> + sysbus_connect_irq(s->lpd.iou.adma[i], 0, pic[VERSAL_ADMA_IRQ_0 + i]);
> + g_free(name);
> + }
> +}
It would be more in the modern style to write it with the child device
struct embedded in the parent struct, object_initialize_child() in the
parent init, and object_property_set_bool(..., true, "realized", ...)
in the parent realized, but I guess this fits with the way the
rest of the existing device is written.
Series applied to target-arm.next, thanks.
thanks
-- PMM
^ permalink raw reply [flat|nested] 10+ messages in thread
end of thread, other threads:[~2020-03-02 11:24 UTC | newest]
Thread overview: 10+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2020-02-27 15:44 [PATCH v1 0/2] hw/arm: versal: Add the LPD zDMAs Edgar E. Iglesias
2020-02-27 15:44 ` [PATCH v1 1/2] hw/arm: versal: Add support for the LPD ADMAs Edgar E. Iglesias
2020-02-27 9:02 ` KONRAD Frederic
2020-02-27 9:48 ` Francisco Iglesias
2020-03-02 11:06 ` Luc Michel
2020-03-02 11:22 ` Peter Maydell
2020-02-27 15:44 ` [PATCH v1 2/2] hw/arm: versal: Generate xlnx-versal-virt zdma FDT nodes Edgar E. Iglesias
2020-02-27 9:04 ` KONRAD Frederic
2020-02-27 9:48 ` Francisco Iglesias
2020-03-02 11:07 ` Luc Michel
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