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From: Florian Fainelli <f.fainelli@gmail.com>
To: bcm-kernel-feedback-list@broadcom.com,
	Nicolas Saenz Julienne <nsaenzjulienne@suse.de>,
	Rob Herring <robh+dt@kernel.org>
Cc: phil@raspberrypi.org, devicetree@vger.kernel.org,
	linux-rpi-kernel@lists.infradead.org,
	linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org
Subject: Re: [PATCH] ARM: dts: bcm2711: Add pcie0 alias
Date: Thu, 27 Feb 2020 11:29:46 -0800	[thread overview]
Message-ID: <20200227192946.17328-1-f.fainelli@gmail.com> (raw)
In-Reply-To: <20200226164601.20150-1-nsaenzjulienne@suse.de>

On Wed, 26 Feb 2020 17:46:00 +0100, Nicolas Saenz Julienne <nsaenzjulienne@suse.de> wrote:
> Some bcm2711 revisions have different DMA constraints on the their PCIE
> bus. The lower common denominator, being able to access the lower 3GB of
> memory, is the default setting for now. Newer SoC revisions are able to
> access the whole memory space.
> 
> Raspberry Pi 4's firmware is aware of this limitation and will correct
> the PCIE's dma-ranges property if a pcie0 alias is available. So add
> it.
> 
> Fixes: d5c8dc0d4c88 ("ARM: dts: bcm2711: Enable PCIe controller")
> Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
> ---

Applied to devicetree/fixes, thanks!
--
Florian

WARNING: multiple messages have this Message-ID (diff)
From: Florian Fainelli <f.fainelli@gmail.com>
To: bcm-kernel-feedback-list@broadcom.com,
	Nicolas Saenz Julienne <nsaenzjulienne@suse.de>,
	Rob Herring <robh+dt@kernel.org>
Cc: devicetree@vger.kernel.org, phil@raspberrypi.org,
	linux-rpi-kernel@lists.infradead.org,
	linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org
Subject: Re: [PATCH] ARM: dts: bcm2711: Add pcie0 alias
Date: Thu, 27 Feb 2020 11:29:46 -0800	[thread overview]
Message-ID: <20200227192946.17328-1-f.fainelli@gmail.com> (raw)
In-Reply-To: <20200226164601.20150-1-nsaenzjulienne@suse.de>

On Wed, 26 Feb 2020 17:46:00 +0100, Nicolas Saenz Julienne <nsaenzjulienne@suse.de> wrote:
> Some bcm2711 revisions have different DMA constraints on the their PCIE
> bus. The lower common denominator, being able to access the lower 3GB of
> memory, is the default setting for now. Newer SoC revisions are able to
> access the whole memory space.
> 
> Raspberry Pi 4's firmware is aware of this limitation and will correct
> the PCIE's dma-ranges property if a pcie0 alias is available. So add
> it.
> 
> Fixes: d5c8dc0d4c88 ("ARM: dts: bcm2711: Enable PCIe controller")
> Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
> ---

Applied to devicetree/fixes, thanks!
--
Florian

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  parent reply	other threads:[~2020-02-27 19:29 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-02-26 16:46 [PATCH] ARM: dts: bcm2711: Add pcie0 alias Nicolas Saenz Julienne
2020-02-26 16:46 ` Nicolas Saenz Julienne
2020-02-26 17:17 ` Phil Elwell
2020-02-26 17:17   ` Phil Elwell
2020-02-27 19:29 ` Florian Fainelli [this message]
2020-02-27 19:29   ` Florian Fainelli

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