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* [PATCH 0/3] arm: dts: k3-j721e: Enable OSPI1/QSPI
@ 2020-03-03 10:34 Keerthy
  2020-03-03 10:34 ` [PATCH 1/3] arm: dts: k3-j721e-common-proc-board-u-boot: Enable ospi1/qspi Keerthy
                   ` (2 more replies)
  0 siblings, 3 replies; 5+ messages in thread
From: Keerthy @ 2020-03-03 10:34 UTC (permalink / raw)
  To: u-boot

The patch series enables he OSPI1 aka QSPI node.
This is a precursor for enabling QSPI boot on j721e.

Keerthy (3):
  arm: dts: k3-j721e-common-proc-board-u-boot: Enable ospi1/qspi
  arm: dts: k3-j721e-mcu-wakeup: Add assigned-clocks/rates properties
    for ospi1/qspi
  arm: dts: k3-j721e-r5-common-proc-board: Add ospi1 flash node

 .../k3-j721e-common-proc-board-u-boot.dtsi    | 23 +++++++++++++++++
 arch/arm/dts/k3-j721e-common-proc-board.dts   | 13 ----------
 arch/arm/dts/k3-j721e-mcu-wakeup.dtsi         |  2 ++
 .../arm/dts/k3-j721e-r5-common-proc-board.dts | 25 +++++++++++++++++++
 4 files changed, 50 insertions(+), 13 deletions(-)

-- 
2.17.1

^ permalink raw reply	[flat|nested] 5+ messages in thread

* [PATCH 1/3] arm: dts: k3-j721e-common-proc-board-u-boot: Enable ospi1/qspi
  2020-03-03 10:34 [PATCH 0/3] arm: dts: k3-j721e: Enable OSPI1/QSPI Keerthy
@ 2020-03-03 10:34 ` Keerthy
  2020-03-03 11:26   ` Vignesh Raghavendra
  2020-03-03 10:34 ` [PATCH 2/3] arm: dts: k3-j721e-mcu-wakeup: Add assigned-clocks/rates properties for ospi1/qspi Keerthy
  2020-03-03 10:34 ` [PATCH 3/3] arm: dts: k3-j721e-r5-common-proc-board: Add ospi1 flash node Keerthy
  2 siblings, 1 reply; 5+ messages in thread
From: Keerthy @ 2020-03-03 10:34 UTC (permalink / raw)
  To: u-boot

Enable the ospi1/qspi module while at it move the corresponding
pins to common u-boot.dtsi file.

Signed-off-by: Keerthy <j-keerthy@ti.com>
---
 .../k3-j721e-common-proc-board-u-boot.dtsi    | 23 +++++++++++++++++++
 arch/arm/dts/k3-j721e-common-proc-board.dts   | 13 -----------
 2 files changed, 23 insertions(+), 13 deletions(-)

diff --git a/arch/arm/dts/k3-j721e-common-proc-board-u-boot.dtsi b/arch/arm/dts/k3-j721e-common-proc-board-u-boot.dtsi
index d422100d42..d15b5181f4 100644
--- a/arch/arm/dts/k3-j721e-common-proc-board-u-boot.dtsi
+++ b/arch/arm/dts/k3-j721e-common-proc-board-u-boot.dtsi
@@ -260,6 +260,20 @@
 			J721E_WKUP_IOPAD(0x0088, PIN_INPUT, 0) /* (L4) MCU_MDIO0_MDIO */
 		>;
 	};
+
+	mcu_fss0_ospi1_pins_default: mcu-fss0-ospi1-pins-default {
+		pinctrl-single,pins = <
+			J721E_WKUP_IOPAD(0x34, PIN_OUTPUT, 0) /* (F22) MCU_OSPI1_CLK */
+			J721E_WKUP_IOPAD(0x50, PIN_OUTPUT, 0) /* (C22) MCU_OSPI1_CSn0 */
+			J721E_WKUP_IOPAD(0x40, PIN_INPUT, 0) /* (D22) MCU_OSPI1_D0 */
+			J721E_WKUP_IOPAD(0x44, PIN_INPUT, 0) /* (G22) MCU_OSPI1_D1 */
+			J721E_WKUP_IOPAD(0x48, PIN_INPUT, 0) /* (D23) MCU_OSPI1_D2 */
+			J721E_WKUP_IOPAD(0x4c, PIN_INPUT, 0) /* (C23) MCU_OSPI1_D3 */
+			J721E_WKUP_IOPAD(0x3c, PIN_INPUT, 0) /* (B23) MCU_OSPI1_DQS */
+			J721E_WKUP_IOPAD(0x38, PIN_INPUT, 0) /* (A23) MCU_OSPI1_LBCLKO */
+		>;
+		u-boot,dm-spl;
+	};
 };
 
 &main_pmx0 {
@@ -365,3 +379,12 @@
 		u-boot,dm-spl;
 	};
 };
+
+&ospi1 {
+	status = "okay";
+	u-boot,dm-spl;
+
+	flash at 0 {
+		u-boot,dm-spl;
+	};
+};
diff --git a/arch/arm/dts/k3-j721e-common-proc-board.dts b/arch/arm/dts/k3-j721e-common-proc-board.dts
index 496a15e1d1..d02422ed25 100644
--- a/arch/arm/dts/k3-j721e-common-proc-board.dts
+++ b/arch/arm/dts/k3-j721e-common-proc-board.dts
@@ -123,19 +123,6 @@
 			J721E_WKUP_IOPAD(0xfc, PIN_INPUT_PULLUP, 0) /* (H24) WKUP_I2C0_SDA */
 		>;
 	};
-
-	mcu_fss0_ospi1_pins_default: mcu-fss0-ospi1-pins-default {
-		pinctrl-single,pins = <
-			J721E_WKUP_IOPAD(0x34, PIN_OUTPUT, 0) /* (F22) MCU_OSPI1_CLK */
-			J721E_WKUP_IOPAD(0x50, PIN_OUTPUT, 0) /* (C22) MCU_OSPI1_CSn0 */
-			J721E_WKUP_IOPAD(0x40, PIN_INPUT, 0) /* (D22) MCU_OSPI1_D0 */
-			J721E_WKUP_IOPAD(0x44, PIN_INPUT, 0) /* (G22) MCU_OSPI1_D1 */
-			J721E_WKUP_IOPAD(0x48, PIN_INPUT, 0) /* (D23) MCU_OSPI1_D2 */
-			J721E_WKUP_IOPAD(0x4c, PIN_INPUT, 0) /* (C23) MCU_OSPI1_D3 */
-			J721E_WKUP_IOPAD(0x3c, PIN_INPUT, 0) /* (B23) MCU_OSPI1_DQS */
-			J721E_WKUP_IOPAD(0x38, PIN_INPUT, 0) /* (A23) MCU_OSPI1_LBCLKO */
-		>;
-	};
 };
 
 &usbss0 {
-- 
2.17.1

^ permalink raw reply related	[flat|nested] 5+ messages in thread

* [PATCH 2/3] arm: dts: k3-j721e-mcu-wakeup: Add assigned-clocks/rates properties for ospi1/qspi
  2020-03-03 10:34 [PATCH 0/3] arm: dts: k3-j721e: Enable OSPI1/QSPI Keerthy
  2020-03-03 10:34 ` [PATCH 1/3] arm: dts: k3-j721e-common-proc-board-u-boot: Enable ospi1/qspi Keerthy
@ 2020-03-03 10:34 ` Keerthy
  2020-03-03 10:34 ` [PATCH 3/3] arm: dts: k3-j721e-r5-common-proc-board: Add ospi1 flash node Keerthy
  2 siblings, 0 replies; 5+ messages in thread
From: Keerthy @ 2020-03-03 10:34 UTC (permalink / raw)
  To: u-boot

Add assigned-clocks/rates properties for ospi1/qspi.
This is the expected rate as per ROM configuration.

Signed-off-by: Keerthy <j-keerthy@ti.com>
---
 arch/arm/dts/k3-j721e-mcu-wakeup.dtsi | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/arm/dts/k3-j721e-mcu-wakeup.dtsi b/arch/arm/dts/k3-j721e-mcu-wakeup.dtsi
index a9e97f219b..2eed50aa5a 100644
--- a/arch/arm/dts/k3-j721e-mcu-wakeup.dtsi
+++ b/arch/arm/dts/k3-j721e-mcu-wakeup.dtsi
@@ -170,6 +170,8 @@
 			cdns,fifo-width = <4>;
 			cdns,trigger-address = <0x0>;
 			clocks = <&k3_clks 104 0>;
+			assigned-clocks = <&k3_clks 104 0>;
+			assigned-clock-rates = <133333333>;
 			power-domains = <&k3_pds 104 TI_SCI_PD_EXCLUSIVE>;
 			#address-cells = <1>;
 			#size-cells = <0>;
-- 
2.17.1

^ permalink raw reply related	[flat|nested] 5+ messages in thread

* [PATCH 3/3] arm: dts: k3-j721e-r5-common-proc-board: Add ospi1 flash node
  2020-03-03 10:34 [PATCH 0/3] arm: dts: k3-j721e: Enable OSPI1/QSPI Keerthy
  2020-03-03 10:34 ` [PATCH 1/3] arm: dts: k3-j721e-common-proc-board-u-boot: Enable ospi1/qspi Keerthy
  2020-03-03 10:34 ` [PATCH 2/3] arm: dts: k3-j721e-mcu-wakeup: Add assigned-clocks/rates properties for ospi1/qspi Keerthy
@ 2020-03-03 10:34 ` Keerthy
  2 siblings, 0 replies; 5+ messages in thread
From: Keerthy @ 2020-03-03 10:34 UTC (permalink / raw)
  To: u-boot

Add ospi1 flash node required for QSPI boot.

Signed-off-by: Keerthy <j-keerthy@ti.com>
---
 .../arm/dts/k3-j721e-r5-common-proc-board.dts | 25 +++++++++++++++++++
 1 file changed, 25 insertions(+)

diff --git a/arch/arm/dts/k3-j721e-r5-common-proc-board.dts b/arch/arm/dts/k3-j721e-r5-common-proc-board.dts
index ebea9efa58..cb98e4ba33 100644
--- a/arch/arm/dts/k3-j721e-r5-common-proc-board.dts
+++ b/arch/arm/dts/k3-j721e-r5-common-proc-board.dts
@@ -306,4 +306,29 @@
 	};
 };
 
+&ospi1 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&mcu_fss0_ospi1_pins_default>;
+	u-boot,dm-spl;
+
+	reg = <0x0 0x47050000 0x0 0x100>,
+	      <0x0 0x58000000 0x0 0x8000000>;
+
+	flash at 0{
+		compatible = "jedec,spi-nor";
+		reg = <0x0>;
+		spi-tx-bus-width = <1>;
+		spi-rx-bus-width = <4>;
+		spi-max-frequency = <40000000>;
+		cdns,tshsl-ns = <60>;
+		cdns,tsd2d-ns = <60>;
+		cdns,tchsh-ns = <60>;
+		cdns,tslch-ns = <60>;
+		cdns,read-delay = <2>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+		u-boot,dm-spl;
+	};
+};
+
 #include "k3-j721e-common-proc-board-u-boot.dtsi"
-- 
2.17.1

^ permalink raw reply related	[flat|nested] 5+ messages in thread

* [PATCH 1/3] arm: dts: k3-j721e-common-proc-board-u-boot: Enable ospi1/qspi
  2020-03-03 10:34 ` [PATCH 1/3] arm: dts: k3-j721e-common-proc-board-u-boot: Enable ospi1/qspi Keerthy
@ 2020-03-03 11:26   ` Vignesh Raghavendra
  0 siblings, 0 replies; 5+ messages in thread
From: Vignesh Raghavendra @ 2020-03-03 11:26 UTC (permalink / raw)
  To: u-boot

Hi,

On 3/3/2020 4:04 PM, Keerthy wrote:
> Enable the ospi1/qspi module while at it move the corresponding
> pins to common u-boot.dtsi file.
> 
> Signed-off-by: Keerthy <j-keerthy@ti.com>
> ---
>  .../k3-j721e-common-proc-board-u-boot.dtsi    | 23 +++++++++++++++++++
>  arch/arm/dts/k3-j721e-common-proc-board.dts   | 13 -----------
>  2 files changed, 23 insertions(+), 13 deletions(-)
> 
> diff --git a/arch/arm/dts/k3-j721e-common-proc-board-u-boot.dtsi b/arch/arm/dts/k3-j721e-common-proc-board-u-boot.dtsi
> index d422100d42..d15b5181f4 100644
> --- a/arch/arm/dts/k3-j721e-common-proc-board-u-boot.dtsi
> +++ b/arch/arm/dts/k3-j721e-common-proc-board-u-boot.dtsi
> @@ -260,6 +260,20 @@
>  			J721E_WKUP_IOPAD(0x0088, PIN_INPUT, 0) /* (L4) MCU_MDIO0_MDIO */
>  		>;
>  	};
> +
> +	mcu_fss0_ospi1_pins_default: mcu-fss0-ospi1-pins-default {
> +		pinctrl-single,pins = <
> +			J721E_WKUP_IOPAD(0x34, PIN_OUTPUT, 0) /* (F22) MCU_OSPI1_CLK */
> +			J721E_WKUP_IOPAD(0x50, PIN_OUTPUT, 0) /* (C22) MCU_OSPI1_CSn0 */
> +			J721E_WKUP_IOPAD(0x40, PIN_INPUT, 0) /* (D22) MCU_OSPI1_D0 */
> +			J721E_WKUP_IOPAD(0x44, PIN_INPUT, 0) /* (G22) MCU_OSPI1_D1 */
> +			J721E_WKUP_IOPAD(0x48, PIN_INPUT, 0) /* (D23) MCU_OSPI1_D2 */
> +			J721E_WKUP_IOPAD(0x4c, PIN_INPUT, 0) /* (C23) MCU_OSPI1_D3 */
> +			J721E_WKUP_IOPAD(0x3c, PIN_INPUT, 0) /* (B23) MCU_OSPI1_DQS */
> +			J721E_WKUP_IOPAD(0x38, PIN_INPUT, 0) /* (A23) MCU_OSPI1_LBCLKO */
> +		>;
> +		u-boot,dm-spl;

pinmux should be in k3-j721e-common-proc-board.dts like in kernel DT.
Replicate the pinmux in R5 dts file for use in R5 SPL.
Only u-boot specific property "u-boot,dm-spl" should be added in
k3-j721e-common-proc-board-u-boot.dtsi


> +	};
>  };
>  
>  &main_pmx0 {
> @@ -365,3 +379,12 @@
>  		u-boot,dm-spl;
>  	};
>  };
> +
> +&ospi1 {
> +	status = "okay";

No need to for status = "okay" as OSPI1 is enabled by default.

> +	u-boot,dm-spl;
> +
> +	flash at 0 {
> +		u-boot,dm-spl;
> +	};
> +};
> diff --git a/arch/arm/dts/k3-j721e-common-proc-board.dts b/arch/arm/dts/k3-j721e-common-proc-board.dts
> index 496a15e1d1..d02422ed25 100644
> --- a/arch/arm/dts/k3-j721e-common-proc-board.dts
> +++ b/arch/arm/dts/k3-j721e-common-proc-board.dts
> @@ -123,19 +123,6 @@
>  			J721E_WKUP_IOPAD(0xfc, PIN_INPUT_PULLUP, 0) /* (H24) WKUP_I2C0_SDA */
>  		>;
>  	};
> -
> -	mcu_fss0_ospi1_pins_default: mcu-fss0-ospi1-pins-default {
> -		pinctrl-single,pins = <
> -			J721E_WKUP_IOPAD(0x34, PIN_OUTPUT, 0) /* (F22) MCU_OSPI1_CLK */
> -			J721E_WKUP_IOPAD(0x50, PIN_OUTPUT, 0) /* (C22) MCU_OSPI1_CSn0 */
> -			J721E_WKUP_IOPAD(0x40, PIN_INPUT, 0) /* (D22) MCU_OSPI1_D0 */
> -			J721E_WKUP_IOPAD(0x44, PIN_INPUT, 0) /* (G22) MCU_OSPI1_D1 */
> -			J721E_WKUP_IOPAD(0x48, PIN_INPUT, 0) /* (D23) MCU_OSPI1_D2 */
> -			J721E_WKUP_IOPAD(0x4c, PIN_INPUT, 0) /* (C23) MCU_OSPI1_D3 */
> -			J721E_WKUP_IOPAD(0x3c, PIN_INPUT, 0) /* (B23) MCU_OSPI1_DQS */
> -			J721E_WKUP_IOPAD(0x38, PIN_INPUT, 0) /* (A23) MCU_OSPI1_LBCLKO */
> -		>;
> -	};
>  };
>  
>  &usbss0 {
> 

^ permalink raw reply	[flat|nested] 5+ messages in thread

end of thread, other threads:[~2020-03-03 11:26 UTC | newest]

Thread overview: 5+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2020-03-03 10:34 [PATCH 0/3] arm: dts: k3-j721e: Enable OSPI1/QSPI Keerthy
2020-03-03 10:34 ` [PATCH 1/3] arm: dts: k3-j721e-common-proc-board-u-boot: Enable ospi1/qspi Keerthy
2020-03-03 11:26   ` Vignesh Raghavendra
2020-03-03 10:34 ` [PATCH 2/3] arm: dts: k3-j721e-mcu-wakeup: Add assigned-clocks/rates properties for ospi1/qspi Keerthy
2020-03-03 10:34 ` [PATCH 3/3] arm: dts: k3-j721e-r5-common-proc-board: Add ospi1 flash node Keerthy

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