From: Matt Roper <matthew.d.roper@intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: [Intel-gfx] [PATCH] drm/i915/ehl: Check PHY type before reading DPLL frequency
Date: Tue, 3 Mar 2020 10:29:04 -0800 [thread overview]
Message-ID: <20200303182904.952445-1-matthew.d.roper@intel.com> (raw)
intel_ddi_clock_get() tests the DPLL ID against DPLL_ID_ICL_TBTPLL (2)
to determine whether to try to descend into a TBT-specific handler.
However this test will also be true when DPLL4 on EHL is used since that
shares the same DPLL ID (2).
Add an extra check to ensure the PHY is actually a Type-C PHY before
descending into the TBT handling. This should ensure EHL still takes
the correct code path and somewhat future-proof the code as well.
Cc: José Roberto de Souza <jose.souza@intel.com>
Closes: https://gitlab.freedesktop.org/drm/intel/issues/1369
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
---
drivers/gpu/drm/i915/display/intel_ddi.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
index 284219da7df8..aa3cc42b0eb9 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
@@ -1376,8 +1376,9 @@ static void intel_ddi_clock_get(struct intel_encoder *encoder,
struct intel_crtc_state *pipe_config)
{
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
+ enum phy phy = intel_port_to_phy(dev_priv, encoder->port);
- if (INTEL_GEN(dev_priv) >= 11 &&
+ if (INTEL_GEN(dev_priv) >= 11 && intel_phy_is_tc(dev_priv, phy) &&
intel_get_shared_dpll_id(dev_priv, pipe_config->shared_dpll) ==
DPLL_ID_ICL_TBTPLL)
pipe_config->port_clock = icl_calc_tbt_pll_link(dev_priv,
--
2.24.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
next reply other threads:[~2020-03-03 18:29 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-03-03 18:29 Matt Roper [this message]
2020-03-03 18:34 ` [Intel-gfx] [PATCH] drm/i915/ehl: Check PHY type before reading DPLL frequency Matt Roper
2020-03-03 18:50 ` Imre Deak
2020-03-03 19:06 ` Imre Deak
2020-03-03 19:50 ` [Intel-gfx] [PATCH v2] " Matt Roper
2020-03-03 20:04 ` [Intel-gfx] ✗ Fi.CI.DOCS: warning for " Patchwork
2020-03-03 20:14 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2020-03-03 20:33 ` [Intel-gfx] ✗ Fi.CI.DOCS: warning for drm/i915/ehl: Check PHY type before reading DPLL frequency (rev2) Patchwork
2020-03-03 20:52 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2020-03-04 9:55 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2020-03-04 14:03 ` Matt Roper
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20200303182904.952445-1-matthew.d.roper@intel.com \
--to=matthew.d.roper@intel.com \
--cc=intel-gfx@lists.freedesktop.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.