From: Matt Roper <matthew.d.roper@intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: [Intel-gfx] [PATCH v2] drm/i915/ehl: Check PHY type before reading DPLL frequency
Date: Tue, 3 Mar 2020 11:50:43 -0800 [thread overview]
Message-ID: <20200303195043.959913-1-matthew.d.roper@intel.com> (raw)
In-Reply-To: <20200303190648.GA20591@ideak-desk.fi.intel.com>
intel_ddi_clock_get() tests the DPLL ID against DPLL_ID_ICL_TBTPLL (2)
to determine whether to try to descend into a TBT-specific handler.
However this test will also be true when DPLL4 on EHL is used since that
shares the same DPLL ID (2).
Add an extra check to ensure the PHY is actually a Type-C PHY before
descending into the TBT handling. This should ensure EHL still takes
the correct code path and somewhat future-proof the code as well.
v2: Drop the gen+ check since only gen11+ platforms can have Type-C
outputs. (Imre)
Cc: José Roberto de Souza <jose.souza@intel.com>
Closes: https://gitlab.freedesktop.org/drm/intel/issues/1369
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Reviewed-by: Imre Deak <imre.deak@intel.com>
---
drivers/gpu/drm/i915/display/intel_ddi.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
index 284219da7df8..73c9d4fda6f8 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
@@ -1376,8 +1376,9 @@ static void intel_ddi_clock_get(struct intel_encoder *encoder,
struct intel_crtc_state *pipe_config)
{
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
+ enum phy phy = intel_port_to_phy(dev_priv, encoder->port);
- if (INTEL_GEN(dev_priv) >= 11 &&
+ if (intel_phy_is_tc(dev_priv, phy) &&
intel_get_shared_dpll_id(dev_priv, pipe_config->shared_dpll) ==
DPLL_ID_ICL_TBTPLL)
pipe_config->port_clock = icl_calc_tbt_pll_link(dev_priv,
--
2.24.1
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next prev parent reply other threads:[~2020-03-03 19:50 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-03-03 18:29 [Intel-gfx] [PATCH] drm/i915/ehl: Check PHY type before reading DPLL frequency Matt Roper
2020-03-03 18:34 ` Matt Roper
2020-03-03 18:50 ` Imre Deak
2020-03-03 19:06 ` Imre Deak
2020-03-03 19:50 ` Matt Roper [this message]
2020-03-03 20:04 ` [Intel-gfx] ✗ Fi.CI.DOCS: warning for " Patchwork
2020-03-03 20:14 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2020-03-03 20:33 ` [Intel-gfx] ✗ Fi.CI.DOCS: warning for drm/i915/ehl: Check PHY type before reading DPLL frequency (rev2) Patchwork
2020-03-03 20:52 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2020-03-04 9:55 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2020-03-04 14:03 ` Matt Roper
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