* [Intel-gfx] [PATCH 1/2] drm/i915/gen11: Moving WAs to rcs_engine_wa_init()
@ 2020-03-02 23:14 José Roberto de Souza
2020-03-02 23:14 ` [Intel-gfx] [PATCH 2/2] drm/i915/tgl: Move and restrict Wa_1408615072 José Roberto de Souza
` (4 more replies)
0 siblings, 5 replies; 10+ messages in thread
From: José Roberto de Souza @ 2020-03-02 23:14 UTC (permalink / raw)
To: intel-gfx
This are register of render engine, so after a render reset those
would return to the default value and init_clock_gating() is not
called for single engine reset.
So here moving it rcs_engine_wa_init() that will guarantee that this
WAs will not be lost.
Cc: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
---
drivers/gpu/drm/i915/gt/intel_workarounds.c | 15 +++++++++++++++
drivers/gpu/drm/i915/intel_pm.c | 15 ---------------
2 files changed, 15 insertions(+), 15 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c b/drivers/gpu/drm/i915/gt/intel_workarounds.c
index 3e375a3b7714..90e1c48dd6be 100644
--- a/drivers/gpu/drm/i915/gt/intel_workarounds.c
+++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c
@@ -1454,6 +1454,21 @@ rcs_engine_wa_init(struct intel_engine_cs *engine, struct i915_wa_list *wal)
GEN11_SCRATCH2,
GEN11_COHERENT_PARTIAL_WRITE_MERGE_ENABLE,
0);
+
+ /* WaEnable32PlaneMode:icl */
+ wa_masked_en(wal, GEN9_CSFE_CHICKEN1_RCS,
+ GEN11_ENABLE_32_PLANE_MODE);
+
+ /*
+ * Wa_1408615072:icl,ehl (vsunit)
+ * Wa_1407596294:icl,ehl (hsunit)
+ */
+ wa_masked_en(wal, UNSLICE_UNIT_LEVEL_CLKGATE,
+ VSUNIT_CLKGATE_DIS | HSUNIT_CLKGATE_DIS);
+
+ /* Wa_1407352427:icl,ehl */
+ wa_masked_en(wal, UNSLICE_UNIT_LEVEL_CLKGATE2,
+ PSDUNIT_CLKGATE_DIS);
}
if (IS_GEN_RANGE(i915, 9, 11)) {
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 831e53c137cf..d3df00445787 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -6782,21 +6782,6 @@ static void icl_init_clock_gating(struct drm_i915_private *dev_priv)
I915_WRITE(GEN10_DFR_RATIO_EN_AND_CHICKEN,
I915_READ(GEN10_DFR_RATIO_EN_AND_CHICKEN) & ~DFR_DISABLE);
- /* WaEnable32PlaneMode:icl */
- I915_WRITE(GEN9_CSFE_CHICKEN1_RCS,
- _MASKED_BIT_ENABLE(GEN11_ENABLE_32_PLANE_MODE));
-
- /*
- * Wa_1408615072:icl,ehl (vsunit)
- * Wa_1407596294:icl,ehl (hsunit)
- */
- intel_uncore_rmw(&dev_priv->uncore, UNSLICE_UNIT_LEVEL_CLKGATE,
- 0, VSUNIT_CLKGATE_DIS | HSUNIT_CLKGATE_DIS);
-
- /* Wa_1407352427:icl,ehl */
- intel_uncore_rmw(&dev_priv->uncore, UNSLICE_UNIT_LEVEL_CLKGATE2,
- 0, PSDUNIT_CLKGATE_DIS);
-
/*Wa_14010594013:icl, ehl */
intel_uncore_rmw(&dev_priv->uncore, GEN8_CHICKEN_DCPR_1,
0, CNL_DELAY_PMRSP);
--
2.25.1
_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 10+ messages in thread
* [Intel-gfx] [PATCH 2/2] drm/i915/tgl: Move and restrict Wa_1408615072
2020-03-02 23:14 [Intel-gfx] [PATCH 1/2] drm/i915/gen11: Moving WAs to rcs_engine_wa_init() José Roberto de Souza
@ 2020-03-02 23:14 ` José Roberto de Souza
2020-03-03 20:21 ` Matt Roper
2020-03-03 0:20 ` [Intel-gfx] ✗ Fi.CI.DOCS: warning for series starting with [1/2] drm/i915/gen11: Moving WAs to rcs_engine_wa_init() Patchwork
` (3 subsequent siblings)
4 siblings, 1 reply; 10+ messages in thread
From: José Roberto de Souza @ 2020-03-02 23:14 UTC (permalink / raw)
To: intel-gfx
Following the changes in the previous patch
"drm/i915/gen11: Moving WAs to rcs_engine_wa_init()" also moving TGL
Wa_1408615072 to rcs_engine_wa_init() this way after a engine
reset it will be reapplied also restricting it to B0 as it is fixed in
B0 stepping.
BSpec: 52890
Cc: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
---
drivers/gpu/drm/i915/gt/intel_workarounds.c | 4 ++++
drivers/gpu/drm/i915/intel_pm.c | 4 ----
2 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c b/drivers/gpu/drm/i915/gt/intel_workarounds.c
index 90e1c48dd6be..cb7d85c42f13 100644
--- a/drivers/gpu/drm/i915/gt/intel_workarounds.c
+++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c
@@ -1380,6 +1380,10 @@ rcs_engine_wa_init(struct intel_engine_cs *engine, struct i915_wa_list *wal)
* Wa_14010229206:tgl
*/
wa_masked_en(wal, GEN9_ROW_CHICKEN4, GEN12_DISABLE_TDL_PUSH);
+
+ /* Wa_1408615072:tgl */
+ wa_masked_en(wal, UNSLICE_UNIT_LEVEL_CLKGATE2,
+ VSUNIT_CLKGATE_DIS_TGL);
}
if (IS_TIGERLAKE(i915)) {
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index d3df00445787..e7f36ebc282d 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -6792,10 +6792,6 @@ static void tgl_init_clock_gating(struct drm_i915_private *dev_priv)
u32 vd_pg_enable = 0;
unsigned int i;
- /* Wa_1408615072:tgl */
- intel_uncore_rmw(&dev_priv->uncore, UNSLICE_UNIT_LEVEL_CLKGATE2,
- 0, VSUNIT_CLKGATE_DIS_TGL);
-
/* This is not a WA. Enable VD HCP & MFX_ENC powergate */
for (i = 0; i < I915_MAX_VCS; i++) {
if (HAS_ENGINE(dev_priv, _VCS(i)))
--
2.25.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 10+ messages in thread
* [Intel-gfx] ✗ Fi.CI.DOCS: warning for series starting with [1/2] drm/i915/gen11: Moving WAs to rcs_engine_wa_init()
2020-03-02 23:14 [Intel-gfx] [PATCH 1/2] drm/i915/gen11: Moving WAs to rcs_engine_wa_init() José Roberto de Souza
2020-03-02 23:14 ` [Intel-gfx] [PATCH 2/2] drm/i915/tgl: Move and restrict Wa_1408615072 José Roberto de Souza
@ 2020-03-03 0:20 ` Patchwork
2020-03-03 0:31 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
` (2 subsequent siblings)
4 siblings, 0 replies; 10+ messages in thread
From: Patchwork @ 2020-03-03 0:20 UTC (permalink / raw)
To: José Roberto de Souza; +Cc: intel-gfx
== Series Details ==
Series: series starting with [1/2] drm/i915/gen11: Moving WAs to rcs_engine_wa_init()
URL : https://patchwork.freedesktop.org/series/74174/
State : warning
== Summary ==
$ make htmldocs 2>&1 > /dev/null | grep i915
Error: Cannot open file ./drivers/gpu/drm/i915/intel_csr.c
Error: Cannot open file ./drivers/gpu/drm/i915/intel_csr.c
Error: Cannot open file ./drivers/gpu/drm/i915/intel_csr.c
./drivers/gpu/drm/i915/display/intel_dpll_mgr.h:285: warning: Function parameter or member 'get_freq' not described in 'intel_shared_dpll_funcs'
./drivers/gpu/drm/i915/i915_vma.h:1: warning: 'Virtual Memory Address' not found
./drivers/gpu/drm/i915/i915_gem_gtt.c:1: warning: 'Global GTT views' not found
WARNING: kernel-doc './scripts/kernel-doc -rst -enable-lineno -function csr support for dmc ./drivers/gpu/drm/i915/intel_csr.c' failed with return code 1
WARNING: kernel-doc './scripts/kernel-doc -rst -enable-lineno -internal ./drivers/gpu/drm/i915/intel_csr.c' failed with return code 2
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 10+ messages in thread
* [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915/gen11: Moving WAs to rcs_engine_wa_init()
2020-03-02 23:14 [Intel-gfx] [PATCH 1/2] drm/i915/gen11: Moving WAs to rcs_engine_wa_init() José Roberto de Souza
2020-03-02 23:14 ` [Intel-gfx] [PATCH 2/2] drm/i915/tgl: Move and restrict Wa_1408615072 José Roberto de Souza
2020-03-03 0:20 ` [Intel-gfx] ✗ Fi.CI.DOCS: warning for series starting with [1/2] drm/i915/gen11: Moving WAs to rcs_engine_wa_init() Patchwork
@ 2020-03-03 0:31 ` Patchwork
2020-03-03 13:36 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
2020-03-03 20:19 ` [Intel-gfx] [PATCH 1/2] " Matt Roper
4 siblings, 0 replies; 10+ messages in thread
From: Patchwork @ 2020-03-03 0:31 UTC (permalink / raw)
To: José Roberto de Souza; +Cc: intel-gfx
== Series Details ==
Series: series starting with [1/2] drm/i915/gen11: Moving WAs to rcs_engine_wa_init()
URL : https://patchwork.freedesktop.org/series/74174/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_8049 -> Patchwork_16788
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16788/index.html
Known issues
------------
Here are the changes found in Patchwork_16788 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@i915_getparams_basic@basic-subslice-total:
- fi-tgl-y: [PASS][1] -> [DMESG-WARN][2] ([CI#94] / [i915#402]) +1 similar issue
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8049/fi-tgl-y/igt@i915_getparams_basic@basic-subslice-total.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16788/fi-tgl-y/igt@i915_getparams_basic@basic-subslice-total.html
#### Possible fixes ####
* igt@gem_exec_suspend@basic-s3:
- fi-bxt-dsi: [INCOMPLETE][3] ([fdo#103927]) -> [PASS][4]
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8049/fi-bxt-dsi/igt@gem_exec_suspend@basic-s3.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16788/fi-bxt-dsi/igt@gem_exec_suspend@basic-s3.html
* igt@kms_addfb_basic@addfb25-yf-tiled:
- fi-tgl-y: [DMESG-WARN][5] ([CI#94] / [i915#402]) -> [PASS][6]
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8049/fi-tgl-y/igt@kms_addfb_basic@addfb25-yf-tiled.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16788/fi-tgl-y/igt@kms_addfb_basic@addfb25-yf-tiled.html
* igt@kms_chamelium@hdmi-hpd-fast:
- fi-kbl-7500u: [FAIL][7] ([fdo#111407]) -> [PASS][8]
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8049/fi-kbl-7500u/igt@kms_chamelium@hdmi-hpd-fast.html
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16788/fi-kbl-7500u/igt@kms_chamelium@hdmi-hpd-fast.html
[CI#94]: https://gitlab.freedesktop.org/gfx-ci/i915-infra/issues/94
[fdo#103927]: https://bugs.freedesktop.org/show_bug.cgi?id=103927
[fdo#111407]: https://bugs.freedesktop.org/show_bug.cgi?id=111407
[i915#402]: https://gitlab.freedesktop.org/drm/intel/issues/402
Participating hosts (51 -> 38)
------------------------------
Missing (13): fi-ilk-m540 fi-bdw-5557u fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-ilk-650 fi-ctg-p8600 fi-bsw-kefka fi-skl-lmem fi-kbl-7560u fi-byt-n2820 fi-byt-clapper fi-bdw-samus
Build changes
-------------
* CI: CI-20190529 -> None
* Linux: CI_DRM_8049 -> Patchwork_16788
CI-20190529: 20190529
CI_DRM_8049: 7d5c1a40d4e68b642cf581e92435ccbf90e7482a @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_5483: 1707153df224ffb6333c6c660a792b7f334eb3d3 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_16788: 336d5e700cf94da88c816cf626ef79b8c4040d59 @ git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
336d5e700cf9 drm/i915/tgl: Move and restrict Wa_1408615072
1542fb2fe472 drm/i915/gen11: Moving WAs to rcs_engine_wa_init()
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16788/index.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 10+ messages in thread
* [Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/2] drm/i915/gen11: Moving WAs to rcs_engine_wa_init()
2020-03-02 23:14 [Intel-gfx] [PATCH 1/2] drm/i915/gen11: Moving WAs to rcs_engine_wa_init() José Roberto de Souza
` (2 preceding siblings ...)
2020-03-03 0:31 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
@ 2020-03-03 13:36 ` Patchwork
2020-03-03 20:19 ` [Intel-gfx] [PATCH 1/2] " Matt Roper
4 siblings, 0 replies; 10+ messages in thread
From: Patchwork @ 2020-03-03 13:36 UTC (permalink / raw)
To: José Roberto de Souza; +Cc: intel-gfx
== Series Details ==
Series: series starting with [1/2] drm/i915/gen11: Moving WAs to rcs_engine_wa_init()
URL : https://patchwork.freedesktop.org/series/74174/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_8049_full -> Patchwork_16788_full
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Known issues
------------
Here are the changes found in Patchwork_16788_full that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@gem_busy@busy-vcs1:
- shard-iclb: [PASS][1] -> [SKIP][2] ([fdo#112080]) +15 similar issues
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8049/shard-iclb1/igt@gem_busy@busy-vcs1.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16788/shard-iclb5/igt@gem_busy@busy-vcs1.html
* igt@gem_ctx_persistence@close-replace-race:
- shard-tglb: [PASS][3] -> [INCOMPLETE][4] ([i915#1291])
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8049/shard-tglb6/igt@gem_ctx_persistence@close-replace-race.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16788/shard-tglb1/igt@gem_ctx_persistence@close-replace-race.html
* igt@gem_ctx_persistence@legacy-engines-mixed-process@bsd:
- shard-apl: [PASS][5] -> [INCOMPLETE][6] ([fdo#103927] / [i915#1197] / [i915#1239])
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8049/shard-apl6/igt@gem_ctx_persistence@legacy-engines-mixed-process@bsd.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16788/shard-apl6/igt@gem_ctx_persistence@legacy-engines-mixed-process@bsd.html
* igt@gem_ctx_persistence@legacy-engines-mixed-process@render:
- shard-apl: [PASS][7] -> [FAIL][8] ([i915#679])
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8049/shard-apl6/igt@gem_ctx_persistence@legacy-engines-mixed-process@render.html
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16788/shard-apl6/igt@gem_ctx_persistence@legacy-engines-mixed-process@render.html
* igt@gem_exec_balancer@hang:
- shard-tglb: [PASS][9] -> [FAIL][10] ([i915#1277])
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8049/shard-tglb7/igt@gem_exec_balancer@hang.html
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16788/shard-tglb6/igt@gem_exec_balancer@hang.html
* igt@gem_exec_schedule@implicit-read-write-bsd1:
- shard-iclb: [PASS][11] -> [SKIP][12] ([fdo#109276] / [i915#677]) +2 similar issues
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8049/shard-iclb2/igt@gem_exec_schedule@implicit-read-write-bsd1.html
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16788/shard-iclb8/igt@gem_exec_schedule@implicit-read-write-bsd1.html
* igt@gem_exec_schedule@pi-distinct-iova-bsd:
- shard-iclb: [PASS][13] -> [SKIP][14] ([i915#677]) +2 similar issues
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8049/shard-iclb5/igt@gem_exec_schedule@pi-distinct-iova-bsd.html
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16788/shard-iclb2/igt@gem_exec_schedule@pi-distinct-iova-bsd.html
* igt@gem_exec_schedule@preempt-bsd:
- shard-iclb: [PASS][15] -> [SKIP][16] ([fdo#112146]) +3 similar issues
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8049/shard-iclb8/igt@gem_exec_schedule@preempt-bsd.html
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16788/shard-iclb1/igt@gem_exec_schedule@preempt-bsd.html
* igt@gem_exec_schedule@preempt-queue-bsd1:
- shard-iclb: [PASS][17] -> [SKIP][18] ([fdo#109276]) +17 similar issues
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8049/shard-iclb4/igt@gem_exec_schedule@preempt-queue-bsd1.html
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16788/shard-iclb5/igt@gem_exec_schedule@preempt-queue-bsd1.html
* igt@gem_exec_whisper@basic-contexts-forked:
- shard-glk: [PASS][19] -> [INCOMPLETE][20] ([i915#58] / [k.org#198133])
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8049/shard-glk6/igt@gem_exec_whisper@basic-contexts-forked.html
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16788/shard-glk8/igt@gem_exec_whisper@basic-contexts-forked.html
* igt@gem_ppgtt@flink-and-close-vma-leak:
- shard-glk: [PASS][21] -> [FAIL][22] ([i915#644])
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8049/shard-glk6/igt@gem_ppgtt@flink-and-close-vma-leak.html
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16788/shard-glk3/igt@gem_ppgtt@flink-and-close-vma-leak.html
* igt@i915_pm_rps@waitboost:
- shard-iclb: [PASS][23] -> [FAIL][24] ([i915#413])
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8049/shard-iclb8/igt@i915_pm_rps@waitboost.html
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16788/shard-iclb2/igt@i915_pm_rps@waitboost.html
* igt@i915_suspend@fence-restore-untiled:
- shard-skl: [PASS][25] -> [INCOMPLETE][26] ([i915#69]) +1 similar issue
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8049/shard-skl9/igt@i915_suspend@fence-restore-untiled.html
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16788/shard-skl5/igt@i915_suspend@fence-restore-untiled.html
* igt@kms_flip@plain-flip-ts-check-interruptible:
- shard-skl: [PASS][27] -> [FAIL][28] ([i915#34])
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8049/shard-skl3/igt@kms_flip@plain-flip-ts-check-interruptible.html
[28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16788/shard-skl8/igt@kms_flip@plain-flip-ts-check-interruptible.html
* igt@kms_frontbuffer_tracking@fbcpsr-rgb101010-draw-blt:
- shard-tglb: [PASS][29] -> [SKIP][30] ([i915#668]) +1 similar issue
[29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8049/shard-tglb6/igt@kms_frontbuffer_tracking@fbcpsr-rgb101010-draw-blt.html
[30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16788/shard-tglb2/igt@kms_frontbuffer_tracking@fbcpsr-rgb101010-draw-blt.html
* igt@kms_hdr@bpc-switch-dpms:
- shard-skl: [PASS][31] -> [FAIL][32] ([i915#1188])
[31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8049/shard-skl6/igt@kms_hdr@bpc-switch-dpms.html
[32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16788/shard-skl7/igt@kms_hdr@bpc-switch-dpms.html
* igt@kms_plane@plane-panning-bottom-right-suspend-pipe-b-planes:
- shard-apl: [PASS][33] -> [DMESG-WARN][34] ([i915#180]) +3 similar issues
[33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8049/shard-apl7/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-b-planes.html
[34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16788/shard-apl1/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-b-planes.html
- shard-kbl: [PASS][35] -> [DMESG-WARN][36] ([i915#180]) +2 similar issues
[35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8049/shard-kbl3/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-b-planes.html
[36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16788/shard-kbl7/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-b-planes.html
* igt@kms_psr2_su@page_flip:
- shard-iclb: [PASS][37] -> [SKIP][38] ([fdo#109642] / [fdo#111068])
[37]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8049/shard-iclb2/igt@kms_psr2_su@page_flip.html
[38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16788/shard-iclb8/igt@kms_psr2_su@page_flip.html
* igt@kms_psr@no_drrs:
- shard-iclb: [PASS][39] -> [FAIL][40] ([i915#173])
[39]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8049/shard-iclb8/igt@kms_psr@no_drrs.html
[40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16788/shard-iclb1/igt@kms_psr@no_drrs.html
* igt@kms_psr@psr2_primary_page_flip:
- shard-iclb: [PASS][41] -> [SKIP][42] ([fdo#109441]) +2 similar issues
[41]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8049/shard-iclb2/igt@kms_psr@psr2_primary_page_flip.html
[42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16788/shard-iclb8/igt@kms_psr@psr2_primary_page_flip.html
#### Possible fixes ####
* igt@gem_ctx_persistence@engines-mixed-process@vecs0:
- shard-apl: [FAIL][43] ([i915#679]) -> [PASS][44]
[43]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8049/shard-apl7/igt@gem_ctx_persistence@engines-mixed-process@vecs0.html
[44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16788/shard-apl2/igt@gem_ctx_persistence@engines-mixed-process@vecs0.html
* igt@gem_exec_balancer@smoke:
- shard-iclb: [SKIP][45] ([fdo#110854]) -> [PASS][46]
[45]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8049/shard-iclb3/igt@gem_exec_balancer@smoke.html
[46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16788/shard-iclb4/igt@gem_exec_balancer@smoke.html
* igt@gem_exec_schedule@pi-shared-iova-bsd:
- shard-iclb: [SKIP][47] ([i915#677]) -> [PASS][48]
[47]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8049/shard-iclb2/igt@gem_exec_schedule@pi-shared-iova-bsd.html
[48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16788/shard-iclb8/igt@gem_exec_schedule@pi-shared-iova-bsd.html
* igt@gem_exec_schedule@preemptive-hang-bsd:
- shard-iclb: [SKIP][49] ([fdo#112146]) -> [PASS][50] +5 similar issues
[49]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8049/shard-iclb2/igt@gem_exec_schedule@preemptive-hang-bsd.html
[50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16788/shard-iclb8/igt@gem_exec_schedule@preemptive-hang-bsd.html
* igt@gem_exec_whisper@basic-queues-forked:
- shard-kbl: [INCOMPLETE][51] ([fdo#103665]) -> [PASS][52]
[51]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8049/shard-kbl2/igt@gem_exec_whisper@basic-queues-forked.html
[52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16788/shard-kbl2/igt@gem_exec_whisper@basic-queues-forked.html
* igt@gem_ppgtt@flink-and-close-vma-leak:
- shard-apl: [FAIL][53] ([i915#644]) -> [PASS][54]
[53]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8049/shard-apl7/igt@gem_ppgtt@flink-and-close-vma-leak.html
[54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16788/shard-apl7/igt@gem_ppgtt@flink-and-close-vma-leak.html
* igt@gen9_exec_parse@allowed-all:
- shard-glk: [DMESG-WARN][55] ([i915#716]) -> [PASS][56]
[55]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8049/shard-glk3/igt@gen9_exec_parse@allowed-all.html
[56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16788/shard-glk5/igt@gen9_exec_parse@allowed-all.html
* igt@i915_pm_rpm@system-suspend-modeset:
- shard-iclb: [INCOMPLETE][57] ([i915#1185] / [i915#189]) -> [PASS][58]
[57]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8049/shard-iclb2/igt@i915_pm_rpm@system-suspend-modeset.html
[58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16788/shard-iclb3/igt@i915_pm_rpm@system-suspend-modeset.html
* igt@i915_pm_rps@waitboost:
- shard-tglb: [FAIL][59] ([i915#413]) -> [PASS][60]
[59]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8049/shard-tglb1/igt@i915_pm_rps@waitboost.html
[60]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16788/shard-tglb3/igt@i915_pm_rps@waitboost.html
* igt@i915_selftest@live@execlists:
- shard-skl: [INCOMPLETE][61] ([i915#529]) -> [PASS][62]
[61]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8049/shard-skl8/igt@i915_selftest@live@execlists.html
[62]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16788/shard-skl6/igt@i915_selftest@live@execlists.html
* igt@kms_cursor_crc@pipe-a-cursor-suspend:
- shard-skl: [INCOMPLETE][63] ([i915#300]) -> [PASS][64]
[63]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8049/shard-skl9/igt@kms_cursor_crc@pipe-a-cursor-suspend.html
[64]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16788/shard-skl2/igt@kms_cursor_crc@pipe-a-cursor-suspend.html
* igt@kms_cursor_legacy@2x-long-flip-vs-cursor-legacy:
- shard-glk: [FAIL][65] ([i915#72]) -> [PASS][66]
[65]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8049/shard-glk6/igt@kms_cursor_legacy@2x-long-flip-vs-cursor-legacy.html
[66]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16788/shard-glk9/igt@kms_cursor_legacy@2x-long-flip-vs-cursor-legacy.html
* igt@kms_hdr@bpc-switch-suspend:
- shard-kbl: [DMESG-WARN][67] ([i915#180]) -> [PASS][68] +4 similar issues
[67]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8049/shard-kbl7/igt@kms_hdr@bpc-switch-suspend.html
[68]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16788/shard-kbl3/igt@kms_hdr@bpc-switch-suspend.html
- shard-skl: [FAIL][69] ([i915#1188]) -> [PASS][70]
[69]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8049/shard-skl2/igt@kms_hdr@bpc-switch-suspend.html
[70]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16788/shard-skl2/igt@kms_hdr@bpc-switch-suspend.html
* igt@kms_plane_alpha_blend@pipe-c-constant-alpha-min:
- shard-skl: [FAIL][71] ([fdo#108145]) -> [PASS][72]
[71]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8049/shard-skl3/igt@kms_plane_alpha_blend@pipe-c-constant-alpha-min.html
[72]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16788/shard-skl8/igt@kms_plane_alpha_blend@pipe-c-constant-alpha-min.html
* igt@kms_plane_multiple@atomic-pipe-b-tiling-none:
- shard-snb: [SKIP][73] ([fdo#109271]) -> [PASS][74] +1 similar issue
[73]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8049/shard-snb4/igt@kms_plane_multiple@atomic-pipe-b-tiling-none.html
[74]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16788/shard-snb5/igt@kms_plane_multiple@atomic-pipe-b-tiling-none.html
* igt@kms_psr@psr2_cursor_render:
- shard-iclb: [SKIP][75] ([fdo#109441]) -> [PASS][76] +2 similar issues
[75]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8049/shard-iclb8/igt@kms_psr@psr2_cursor_render.html
[76]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16788/shard-iclb2/igt@kms_psr@psr2_cursor_render.html
* igt@perf_pmu@busy-no-semaphores-vcs1:
- shard-iclb: [SKIP][77] ([fdo#112080]) -> [PASS][78] +10 similar issues
[77]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8049/shard-iclb7/igt@perf_pmu@busy-no-semaphores-vcs1.html
[78]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16788/shard-iclb1/igt@perf_pmu@busy-no-semaphores-vcs1.html
* igt@prime_busy@hang-bsd2:
- shard-iclb: [SKIP][79] ([fdo#109276]) -> [PASS][80] +13 similar issues
[79]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8049/shard-iclb8/igt@prime_busy@hang-bsd2.html
[80]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16788/shard-iclb1/igt@prime_busy@hang-bsd2.html
#### Warnings ####
* igt@kms_dp_dsc@basic-dsc-enable-edp:
- shard-iclb: [SKIP][81] ([fdo#109349]) -> [DMESG-WARN][82] ([i915#1226])
[81]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8049/shard-iclb8/igt@kms_dp_dsc@basic-dsc-enable-edp.html
[82]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16788/shard-iclb2/igt@kms_dp_dsc@basic-dsc-enable-edp.html
[fdo#103665]: https://bugs.freedesktop.org/show_bug.cgi?id=103665
[fdo#103927]: https://bugs.freedesktop.org/show_bug.cgi?id=103927
[fdo#108145]: https://bugs.freedesktop.org/show_bug.cgi?id=108145
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#109276]: https://bugs.freedesktop.org/show_bug.cgi?id=109276
[fdo#109349]: https://bugs.freedesktop.org/show_bug.cgi?id=109349
[fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441
[fdo#109642]: https://bugs.freedesktop.org/show_bug.cgi?id=109642
[fdo#110854]: https://bugs.freedesktop.org/show_bug.cgi?id=110854
[fdo#111068]: https://bugs.freedesktop.org/show_bug.cgi?id=111068
[fdo#112080]: https://bugs.freedesktop.org/show_bug.cgi?id=112080
[fdo#112146]: https://bugs.freedesktop.org/show_bug.cgi?id=112146
[i915#1185]: https://gitlab.freedesktop.org/drm/intel/issues/1185
[i915#1188]: https://gitlab.freedesktop.org/drm/intel/issues/1188
[i915#1197]: https://gitlab.freedesktop.org/drm/intel/issues/1197
[i915#1226]: https://gitlab.freedesktop.org/drm/intel/issues/1226
[i915#1239]: https://gitlab.freedesktop.org/drm/intel/issues/1239
[i915#1277]: https://gitlab.freedesktop.org/drm/intel/issues/1277
[i915#1291]: https://gitlab.freedesktop.org/drm/intel/issues/1291
[i915#173]: https://gitlab.freedesktop.org/drm/intel/issues/173
[i915#180]: https://gitlab.freedesktop.org/drm/intel/issues/180
[i915#189]: https://gitlab.freedesktop.org/drm/intel/issues/189
[i915#300]: https://gitlab.freedesktop.org/drm/intel/issues/300
[i915#34]: https://gitlab.freedesktop.org/drm/intel/issues/34
[i915#413]: https://gitlab.freedesktop.org/drm/intel/issues/413
[i915#529]: https://gitlab.freedesktop.org/drm/intel/issues/529
[i915#58]: https://gitlab.freedesktop.org/drm/intel/issues/58
[i915#644]: https://gitlab.freedesktop.org/drm/intel/issues/644
[i915#668]: https://gitlab.freedesktop.org/drm/intel/issues/668
[i915#677]: https://gitlab.freedesktop.org/drm/intel/issues/677
[i915#679]: https://gitlab.freedesktop.org/drm/intel/issues/679
[i915#69]: https://gitlab.freedesktop.org/drm/intel/issues/69
[i915#716]: https://gitlab.freedesktop.org/drm/intel/issues/716
[i915#72]: https://gitlab.freedesktop.org/drm/intel/issues/72
[k.org#198133]: https://bugzilla.kernel.org/show_bug.cgi?id=198133
Participating hosts (10 -> 10)
------------------------------
No changes in participating hosts
Build changes
-------------
* CI: CI-20190529 -> None
* Linux: CI_DRM_8049 -> Patchwork_16788
CI-20190529: 20190529
CI_DRM_8049: 7d5c1a40d4e68b642cf581e92435ccbf90e7482a @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_5483: 1707153df224ffb6333c6c660a792b7f334eb3d3 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_16788: 336d5e700cf94da88c816cf626ef79b8c4040d59 @ git://anongit.freedesktop.org/gfx-ci/linux
piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16788/index.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [Intel-gfx] [PATCH 1/2] drm/i915/gen11: Moving WAs to rcs_engine_wa_init()
2020-03-02 23:14 [Intel-gfx] [PATCH 1/2] drm/i915/gen11: Moving WAs to rcs_engine_wa_init() José Roberto de Souza
` (3 preceding siblings ...)
2020-03-03 13:36 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
@ 2020-03-03 20:19 ` Matt Roper
4 siblings, 0 replies; 10+ messages in thread
From: Matt Roper @ 2020-03-03 20:19 UTC (permalink / raw)
To: José Roberto de Souza; +Cc: intel-gfx
On Mon, Mar 02, 2020 at 03:14:20PM -0800, José Roberto de Souza wrote:
> This are register of render engine, so after a render reset those
> would return to the default value and init_clock_gating() is not
> called for single engine reset.
> So here moving it rcs_engine_wa_init() that will guarantee that this
> WAs will not be lost.
>
> Cc: Matt Roper <matthew.d.roper@intel.com>
> Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
rcs_engine_wa_init() is starting to get pretty long (and will get even
longer when new platforms show up). We may want to think about breaking
it into per-platform handlers at some point like we use for general
gt/ctx workarounds.
Matt
> ---
> drivers/gpu/drm/i915/gt/intel_workarounds.c | 15 +++++++++++++++
> drivers/gpu/drm/i915/intel_pm.c | 15 ---------------
> 2 files changed, 15 insertions(+), 15 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c b/drivers/gpu/drm/i915/gt/intel_workarounds.c
> index 3e375a3b7714..90e1c48dd6be 100644
> --- a/drivers/gpu/drm/i915/gt/intel_workarounds.c
> +++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c
> @@ -1454,6 +1454,21 @@ rcs_engine_wa_init(struct intel_engine_cs *engine, struct i915_wa_list *wal)
> GEN11_SCRATCH2,
> GEN11_COHERENT_PARTIAL_WRITE_MERGE_ENABLE,
> 0);
> +
> + /* WaEnable32PlaneMode:icl */
> + wa_masked_en(wal, GEN9_CSFE_CHICKEN1_RCS,
> + GEN11_ENABLE_32_PLANE_MODE);
> +
> + /*
> + * Wa_1408615072:icl,ehl (vsunit)
> + * Wa_1407596294:icl,ehl (hsunit)
> + */
> + wa_masked_en(wal, UNSLICE_UNIT_LEVEL_CLKGATE,
> + VSUNIT_CLKGATE_DIS | HSUNIT_CLKGATE_DIS);
> +
> + /* Wa_1407352427:icl,ehl */
> + wa_masked_en(wal, UNSLICE_UNIT_LEVEL_CLKGATE2,
> + PSDUNIT_CLKGATE_DIS);
> }
>
> if (IS_GEN_RANGE(i915, 9, 11)) {
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index 831e53c137cf..d3df00445787 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -6782,21 +6782,6 @@ static void icl_init_clock_gating(struct drm_i915_private *dev_priv)
> I915_WRITE(GEN10_DFR_RATIO_EN_AND_CHICKEN,
> I915_READ(GEN10_DFR_RATIO_EN_AND_CHICKEN) & ~DFR_DISABLE);
>
> - /* WaEnable32PlaneMode:icl */
> - I915_WRITE(GEN9_CSFE_CHICKEN1_RCS,
> - _MASKED_BIT_ENABLE(GEN11_ENABLE_32_PLANE_MODE));
> -
> - /*
> - * Wa_1408615072:icl,ehl (vsunit)
> - * Wa_1407596294:icl,ehl (hsunit)
> - */
> - intel_uncore_rmw(&dev_priv->uncore, UNSLICE_UNIT_LEVEL_CLKGATE,
> - 0, VSUNIT_CLKGATE_DIS | HSUNIT_CLKGATE_DIS);
> -
> - /* Wa_1407352427:icl,ehl */
> - intel_uncore_rmw(&dev_priv->uncore, UNSLICE_UNIT_LEVEL_CLKGATE2,
> - 0, PSDUNIT_CLKGATE_DIS);
> -
> /*Wa_14010594013:icl, ehl */
> intel_uncore_rmw(&dev_priv->uncore, GEN8_CHICKEN_DCPR_1,
> 0, CNL_DELAY_PMRSP);
> --
> 2.25.1
>
--
Matt Roper
Graphics Software Engineer
VTT-OSGC Platform Enablement
Intel Corporation
(916) 356-2795
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [Intel-gfx] [PATCH 2/2] drm/i915/tgl: Move and restrict Wa_1408615072
2020-03-02 23:14 ` [Intel-gfx] [PATCH 2/2] drm/i915/tgl: Move and restrict Wa_1408615072 José Roberto de Souza
@ 2020-03-03 20:21 ` Matt Roper
2020-03-03 21:34 ` Souza, Jose
0 siblings, 1 reply; 10+ messages in thread
From: Matt Roper @ 2020-03-03 20:21 UTC (permalink / raw)
To: José Roberto de Souza; +Cc: intel-gfx
On Mon, Mar 02, 2020 at 03:14:21PM -0800, José Roberto de Souza wrote:
> Following the changes in the previous patch
> "drm/i915/gen11: Moving WAs to rcs_engine_wa_init()" also moving TGL
> Wa_1408615072 to rcs_engine_wa_init() this way after a engine
> reset it will be reapplied also restricting it to B0 as it is fixed in
> B0 stepping.
I think you meant to say "restricting it to *A0* as it is fixed in B0?"
Aside from that,
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
>
> BSpec: 52890
> Cc: Matt Roper <matthew.d.roper@intel.com>
> Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
> ---
> drivers/gpu/drm/i915/gt/intel_workarounds.c | 4 ++++
> drivers/gpu/drm/i915/intel_pm.c | 4 ----
> 2 files changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c b/drivers/gpu/drm/i915/gt/intel_workarounds.c
> index 90e1c48dd6be..cb7d85c42f13 100644
> --- a/drivers/gpu/drm/i915/gt/intel_workarounds.c
> +++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c
> @@ -1380,6 +1380,10 @@ rcs_engine_wa_init(struct intel_engine_cs *engine, struct i915_wa_list *wal)
> * Wa_14010229206:tgl
> */
> wa_masked_en(wal, GEN9_ROW_CHICKEN4, GEN12_DISABLE_TDL_PUSH);
> +
> + /* Wa_1408615072:tgl */
> + wa_masked_en(wal, UNSLICE_UNIT_LEVEL_CLKGATE2,
> + VSUNIT_CLKGATE_DIS_TGL);
> }
>
> if (IS_TIGERLAKE(i915)) {
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index d3df00445787..e7f36ebc282d 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -6792,10 +6792,6 @@ static void tgl_init_clock_gating(struct drm_i915_private *dev_priv)
> u32 vd_pg_enable = 0;
> unsigned int i;
>
> - /* Wa_1408615072:tgl */
> - intel_uncore_rmw(&dev_priv->uncore, UNSLICE_UNIT_LEVEL_CLKGATE2,
> - 0, VSUNIT_CLKGATE_DIS_TGL);
> -
> /* This is not a WA. Enable VD HCP & MFX_ENC powergate */
> for (i = 0; i < I915_MAX_VCS; i++) {
> if (HAS_ENGINE(dev_priv, _VCS(i)))
> --
> 2.25.1
>
--
Matt Roper
Graphics Software Engineer
VTT-OSGC Platform Enablement
Intel Corporation
(916) 356-2795
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [Intel-gfx] [PATCH 2/2] drm/i915/tgl: Move and restrict Wa_1408615072
2020-03-03 20:21 ` Matt Roper
@ 2020-03-03 21:34 ` Souza, Jose
2020-03-05 19:08 ` Nick Desaulniers
0 siblings, 1 reply; 10+ messages in thread
From: Souza, Jose @ 2020-03-03 21:34 UTC (permalink / raw)
To: Roper, Matthew D; +Cc: intel-gfx
On Tue, 2020-03-03 at 12:21 -0800, Matt Roper wrote:
> On Mon, Mar 02, 2020 at 03:14:21PM -0800, José Roberto de Souza
> wrote:
> > Following the changes in the previous patch
> > "drm/i915/gen11: Moving WAs to rcs_engine_wa_init()" also moving
> > TGL
> > Wa_1408615072 to rcs_engine_wa_init() this way after a engine
> > reset it will be reapplied also restricting it to B0 as it is fixed
> > in
> > B0 stepping.
>
> I think you meant to say "restricting it to *A0* as it is fixed in
> B0?"
>
> Aside from that,
>
> Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Fixed and pushed to dinq, thanks.
>
> > BSpec: 52890
> > Cc: Matt Roper <matthew.d.roper@intel.com>
> > Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
> > ---
> > drivers/gpu/drm/i915/gt/intel_workarounds.c | 4 ++++
> > drivers/gpu/drm/i915/intel_pm.c | 4 ----
> > 2 files changed, 4 insertions(+), 4 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c
> > b/drivers/gpu/drm/i915/gt/intel_workarounds.c
> > index 90e1c48dd6be..cb7d85c42f13 100644
> > --- a/drivers/gpu/drm/i915/gt/intel_workarounds.c
> > +++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c
> > @@ -1380,6 +1380,10 @@ rcs_engine_wa_init(struct intel_engine_cs
> > *engine, struct i915_wa_list *wal)
> > * Wa_14010229206:tgl
> > */
> > wa_masked_en(wal, GEN9_ROW_CHICKEN4,
> > GEN12_DISABLE_TDL_PUSH);
> > +
> > + /* Wa_1408615072:tgl */
> > + wa_masked_en(wal, UNSLICE_UNIT_LEVEL_CLKGATE2,
> > + VSUNIT_CLKGATE_DIS_TGL);
> > }
> >
> > if (IS_TIGERLAKE(i915)) {
> > diff --git a/drivers/gpu/drm/i915/intel_pm.c
> > b/drivers/gpu/drm/i915/intel_pm.c
> > index d3df00445787..e7f36ebc282d 100644
> > --- a/drivers/gpu/drm/i915/intel_pm.c
> > +++ b/drivers/gpu/drm/i915/intel_pm.c
> > @@ -6792,10 +6792,6 @@ static void tgl_init_clock_gating(struct
> > drm_i915_private *dev_priv)
> > u32 vd_pg_enable = 0;
> > unsigned int i;
> >
> > - /* Wa_1408615072:tgl */
> > - intel_uncore_rmw(&dev_priv->uncore,
> > UNSLICE_UNIT_LEVEL_CLKGATE2,
> > - 0, VSUNIT_CLKGATE_DIS_TGL);
> > -
> > /* This is not a WA. Enable VD HCP & MFX_ENC powergate */
> > for (i = 0; i < I915_MAX_VCS; i++) {
> > if (HAS_ENGINE(dev_priv, _VCS(i)))
> > --
> > 2.25.1
> >
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^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [Intel-gfx] [PATCH 2/2] drm/i915/tgl: Move and restrict Wa_1408615072
2020-03-03 21:34 ` Souza, Jose
@ 2020-03-05 19:08 ` Nick Desaulniers
2020-03-05 19:15 ` Nick Desaulniers
0 siblings, 1 reply; 10+ messages in thread
From: Nick Desaulniers @ 2020-03-05 19:08 UTC (permalink / raw)
To: jose.souza; +Cc: clang-built-linux, intel-gfx, bot
Hello Jose,
So this is triggering a very subtle bug in 2 separate CI systems:
- KernelCI: https://storage.kernelci.org/next/master/next-20200305/x86_64/x86_64_defconfig/clang-9/build.log
- our CI: https://travis-ci.com/ClangBuiltLinux/continuous-integration/jobs/293826383
commit 50148a2 ("drm/i915/tgl: Move and restrict Wa_1408615072")
for Clang builds. It seems that Clang is inlining `wa_masked_en` into
`rcs_engine_wa_init`, which has implications for `__builtin_constant_p`
evaluation.
The relevant call chain looks like:
rcs_engine_wa_init (drivers/gpu/drm/i915/gt/intel_workarounds.c) ->
wa_masked_en (drivers/gpu/drm/i915/gt/intel_workarounds.c) ->
_MASKED_BIT_ENABLE (drivers/gpu/drm/i915/i915_reg.h) ->
_MASKED_FIELD (drivers/gpu/drm/i915/i915_reg.h)
So it looks like there's build time validation that the masks and values have
their bottom 2 bytes unset (mask & 0xffff0000, little endian). (There doesn't
seem to be equivalent runtime checks that the masks & values obey this
invariant when they're not "integer constant expressions").
This will break should GCC ever decide to inline `wa_masked_en` into
`rcs_engine_wa_init`.
VSUNIT_CLKGATE_DIS_TGL is defined as `REG_BIT(19)` which evaluates to
0x00080000, which would fail the check against
0xffff0000.
Can you please validate that VSUNIT_CLKGATE_DIS_TGL has the correct value, or
if the invariant that the bottom two bytes of values passed to
`_MASKED_BIT_ENABLE` must be set?
I would expect one of those two to be incorrect.
Link: https://github.com/ClangBuiltLinux/linux/issues/918
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^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [Intel-gfx] [PATCH 2/2] drm/i915/tgl: Move and restrict Wa_1408615072
2020-03-05 19:08 ` Nick Desaulniers
@ 2020-03-05 19:15 ` Nick Desaulniers
0 siblings, 0 replies; 10+ messages in thread
From: Nick Desaulniers @ 2020-03-05 19:15 UTC (permalink / raw)
To: jose.souza; +Cc: clang-built-linux, intel-gfx, bot
> Hello Jose,
> So this is triggering a very subtle bug in 2 separate CI systems:
> - KernelCI: https://storage.kernelci.org/next/master/next-20200305/x86_64/x86_64_defconfig/clang-9/build.log
> - our CI: https://travis-ci.com/ClangBuiltLinux/continuous-integration/jobs/293826383
>
> commit 50148a2 ("drm/i915/tgl: Move and restrict Wa_1408615072")
>
> for Clang builds. It seems that Clang is inlining `wa_masked_en` into
> `rcs_engine_wa_init`, which has implications for `__builtin_constant_p`
> evaluation.
>
> The relevant call chain looks like:
>
> rcs_engine_wa_init (drivers/gpu/drm/i915/gt/intel_workarounds.c) ->
> wa_masked_en (drivers/gpu/drm/i915/gt/intel_workarounds.c) ->
> _MASKED_BIT_ENABLE (drivers/gpu/drm/i915/i915_reg.h) ->
> _MASKED_FIELD (drivers/gpu/drm/i915/i915_reg.h)
>
> So it looks like there's build time validation that the masks and values have
> their bottom 2 bytes unset (mask & 0xffff0000, little endian). (There doesn't
> seem to be equivalent runtime checks that the masks & values obey this
> invariant when they're not "integer constant expressions").
>
> This will break should GCC ever decide to inline `wa_masked_en` into
> `rcs_engine_wa_init`.
>
> VSUNIT_CLKGATE_DIS_TGL is defined as `REG_BIT(19)` which evaluates to
> 0x00080000, which would fail the check against
> 0xffff0000.
>
> Can you please validate that VSUNIT_CLKGATE_DIS_TGL has the correct value, or
> if the invariant that the bottom two bytes of values passed to
> `_MASKED_BIT_ENABLE` must be set?
(Sorry, didn't quite finish that sentence, I meant to say):
Can you please validate that VSUNIT_CLKGATE_DIS_TGL has the correct value, or
if the invariant that the bottom two bytes of values passed to
`_MASKED_BIT_ENABLE` must not be set should still hold, otherwise please either
revert or drop your patch if you cannot resolve quickly (otherwise these two CI
systems will be red).
>
> I would expect one of those two to be incorrect.
>
> Link: https://github.com/ClangBuiltLinux/linux/issues/918
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^ permalink raw reply [flat|nested] 10+ messages in thread
end of thread, other threads:[~2020-03-05 19:15 UTC | newest]
Thread overview: 10+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2020-03-02 23:14 [Intel-gfx] [PATCH 1/2] drm/i915/gen11: Moving WAs to rcs_engine_wa_init() José Roberto de Souza
2020-03-02 23:14 ` [Intel-gfx] [PATCH 2/2] drm/i915/tgl: Move and restrict Wa_1408615072 José Roberto de Souza
2020-03-03 20:21 ` Matt Roper
2020-03-03 21:34 ` Souza, Jose
2020-03-05 19:08 ` Nick Desaulniers
2020-03-05 19:15 ` Nick Desaulniers
2020-03-03 0:20 ` [Intel-gfx] ✗ Fi.CI.DOCS: warning for series starting with [1/2] drm/i915/gen11: Moving WAs to rcs_engine_wa_init() Patchwork
2020-03-03 0:31 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2020-03-03 13:36 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
2020-03-03 20:19 ` [Intel-gfx] [PATCH 1/2] " Matt Roper
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