All of lore.kernel.org
 help / color / mirror / Atom feed
* [PATCH v2] arm: dts: imx8mq-evk: add phy-reset-gpios for fec1
@ 2020-02-14 19:18 Alifer Moraes
  2020-03-10 15:32 ` sbabic at denx.de
  0 siblings, 1 reply; 2+ messages in thread
From: Alifer Moraes @ 2020-02-14 19:18 UTC (permalink / raw)
  To: u-boot

Instead of resetting the ethernet phy through functions in imx8mq_evk.c, let the
driver reset the phy via dts description adding a reset duration of 10 ms
following atheros 8031's datasheet recommendation.

Signed-off-by: Alifer Moraes <alifer.wsdm@gmail.com>
---

Changes since v1:

Improve commit log (Michael Trimarchi)

 arch/arm/dts/imx8mq-evk.dts             |  2 ++
 board/freescale/imx8mq_evk/imx8mq_evk.c | 18 ------------------
 2 files changed, 2 insertions(+), 18 deletions(-)

diff --git a/arch/arm/dts/imx8mq-evk.dts b/arch/arm/dts/imx8mq-evk.dts
index 3693933451..55294ba9c8 100644
--- a/arch/arm/dts/imx8mq-evk.dts
+++ b/arch/arm/dts/imx8mq-evk.dts
@@ -104,6 +104,8 @@
 	pinctrl-0 = <&pinctrl_fec1>;
 	phy-mode = "rgmii-id";
 	phy-handle = <&ethphy0>;
+	phy-reset-gpios = <&gpio1 9 GPIO_ACTIVE_LOW>;
+	phy-reset-duration = <10>;
 	fsl,magic-packet;
 	status = "okay";
 
diff --git a/board/freescale/imx8mq_evk/imx8mq_evk.c b/board/freescale/imx8mq_evk/imx8mq_evk.c
index cb39d0f2d6..b2f464abb1 100644
--- a/board/freescale/imx8mq_evk/imx8mq_evk.c
+++ b/board/freescale/imx8mq_evk/imx8mq_evk.c
@@ -64,29 +64,11 @@ int dram_init(void)
 }
 
 #ifdef CONFIG_FEC_MXC
-#define FEC_RST_PAD IMX_GPIO_NR(1, 9)
-static iomux_v3_cfg_t const fec1_rst_pads[] = {
-	IMX8MQ_PAD_GPIO1_IO09__GPIO1_IO9 | MUX_PAD_CTRL(NO_PAD_CTRL),
-};
-
-static void setup_iomux_fec(void)
-{
-	imx_iomux_v3_setup_multiple_pads(fec1_rst_pads,
-					 ARRAY_SIZE(fec1_rst_pads));
-
-	gpio_request(IMX_GPIO_NR(1, 9), "fec1_rst");
-	gpio_direction_output(IMX_GPIO_NR(1, 9), 0);
-	udelay(500);
-	gpio_direction_output(IMX_GPIO_NR(1, 9), 1);
-}
-
 static int setup_fec(void)
 {
 	struct iomuxc_gpr_base_regs *gpr =
 		(struct iomuxc_gpr_base_regs *)IOMUXC_GPR_BASE_ADDR;
 
-	setup_iomux_fec();
-
 	/* Use 125M anatop REF_CLK1 for ENET1, not from external */
 	clrsetbits_le32(&gpr->gpr[1], BIT(13) | BIT(17), 0);
 	return set_clk_enet(ENET_125MHZ);
-- 
2.17.1

^ permalink raw reply related	[flat|nested] 2+ messages in thread

* [PATCH v2] arm: dts: imx8mq-evk: add phy-reset-gpios for fec1
  2020-02-14 19:18 [PATCH v2] arm: dts: imx8mq-evk: add phy-reset-gpios for fec1 Alifer Moraes
@ 2020-03-10 15:32 ` sbabic at denx.de
  0 siblings, 0 replies; 2+ messages in thread
From: sbabic at denx.de @ 2020-03-10 15:32 UTC (permalink / raw)
  To: u-boot

> Instead of resetting the ethernet phy through functions in imx8mq_evk.c, let the
> driver reset the phy via dts description adding a reset duration of 10 ms
> following atheros 8031's datasheet recommendation.
> Signed-off-by: Alifer Moraes <alifer.wsdm@gmail.com>
Applied to u-boot-imx, master, thanks !

Best regards,
Stefano Babic

-- 
=====================================================================
DENX Software Engineering GmbH,      Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de
=====================================================================

^ permalink raw reply	[flat|nested] 2+ messages in thread

end of thread, other threads:[~2020-03-10 15:32 UTC | newest]

Thread overview: 2+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2020-02-14 19:18 [PATCH v2] arm: dts: imx8mq-evk: add phy-reset-gpios for fec1 Alifer Moraes
2020-03-10 15:32 ` sbabic at denx.de

This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.