* [superna9999:amlogic/v5.7/spicc-axg 10/13] drivers//spi/spi-meson-spicc.c:550:2: error: 'else' without a previous 'if'
@ 2020-03-11 20:09 kbuild test robot
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From: kbuild test robot @ 2020-03-11 20:09 UTC (permalink / raw)
To: kbuild-all
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tree: https://github.com/superna9999/linux amlogic/v5.7/spicc-axg
head: 0e8412ba3bd918830b647ad83eafc468d1f7d2fd
commit: 099c5e8bbcb72384a548c93baa18de8fa917f07d [10/13] spi: meson-spicc: add support for Amlogic G12A
config: i386-allyesconfig (attached as .config)
compiler: gcc-7 (Debian 7.5.0-5) 7.5.0
reproduce:
git checkout 099c5e8bbcb72384a548c93baa18de8fa917f07d
# save the attached .config to linux build tree
make ARCH=i386
If you fix the issue, kindly add following tag
Reported-by: kbuild test robot <lkp@intel.com>
All errors (new ones prefixed by >>):
drivers//spi/spi-meson-spicc.c: In function 'meson_spicc_clk_init':
>> drivers//spi/spi-meson-spicc.c:550:2: error: 'else' without a previous 'if'
else
^~~~
vim +550 drivers//spi/spi-meson-spicc.c
502
503 /*
504 * The Clock Mux
505 * x-----------------x x------------x x------\
506 * |---| pow2 fixed div |---| pow2 div |----| |
507 * | x-----------------x x------------x | |
508 * src ---| | mux |-- out
509 * | x-----------------x x------------x | |
510 * |---| enh fixed div |---| enh div |0---| |
511 * x-----------------x x------------x x------/
512 *
513 * Clk path for GX series:
514 * src -> pow2 fixed div -> pow2 div -> out
515 *
516 * Clk path for AXG series:
517 * src -> pow2 fixed div -> pow2 div -> mux -> out
518 * src -> enh fixed div -> enh div -> mux -> out
519 *
520 * Clk path for G12A series:
521 * pclk -> pow2 fixed div -> pow2 div -> mux -> out
522 * pclk -> enh fixed div -> enh div -> mux -> out
523 */
524
525 static int meson_spicc_clk_init(struct meson_spicc_device *spicc)
526 {
527 struct device *dev = &spicc->pdev->dev;
528 struct clk_fixed_factor *pow2_fixed_div, *enh_fixed_div;
529 struct clk_divider *pow2_div, *enh_div;
530 struct clk_mux *mux;
531 struct clk_init_data init;
532 struct clk *clk;
533 struct clk_parent_data parent_data[2];
534 char name[64];
535
536 memset(&parent_data, 0, sizeof(parent_data));
537 init.parent_data = parent_data;
538
539 /* algorithm for pow2 div: rate = freq / 4 / (2 ^ N) */
540
541 pow2_fixed_div = devm_kzalloc(dev, sizeof(*pow2_fixed_div), GFP_KERNEL);
542 if (!pow2_fixed_div)
543 return -ENOMEM;
544
545 snprintf(name, sizeof(name), "%s#pow2_fixed_div", dev_name(dev));
546 init.name = name;
547 init.ops = &clk_fixed_factor_ops;
548 init.flags = 0;
549 parent_data[0].hw = __clk_get_hw(spicc->pclk);
> 550 else
551 parent_data[0].hw = __clk_get_hw(spicc->core);
552 init.num_parents = 1;
553
554 pow2_fixed_div->mult = 1,
555 pow2_fixed_div->div = 4,
556 pow2_fixed_div->hw.init = &init;
557
558 clk = devm_clk_register(dev, &pow2_fixed_div->hw);
559 if (WARN_ON(IS_ERR(clk)))
560 return PTR_ERR(clk);
561
562 pow2_div = devm_kzalloc(dev, sizeof(*pow2_div), GFP_KERNEL);
563 if (!pow2_div)
564 return -ENOMEM;
565
566 snprintf(name, sizeof(name), "%s#pow2_div", dev_name(dev));
567 init.name = name;
568 init.ops = &clk_divider_ops;
569 init.flags = CLK_SET_RATE_PARENT;
570 parent_data[0].hw = &pow2_fixed_div->hw;
571 init.num_parents = 1;
572
573 pow2_div->shift = 16,
574 pow2_div->width = 3,
575 pow2_div->flags = CLK_DIVIDER_POWER_OF_TWO,
576 pow2_div->reg = spicc->base + SPICC_CONREG;
577 pow2_div->hw.init = &init;
578
579 clk = devm_clk_register(dev, &pow2_div->hw);
580 if (WARN_ON(IS_ERR(clk)))
581 return PTR_ERR(clk);
582
583 if (!spicc->data->has_enhance_clk_div) {
584 spicc->clk = clk;
585 return 0;
586 }
587
588 /* algorithm for enh div: rate = freq / 2 / (N + 1) */
589
590 enh_fixed_div = devm_kzalloc(dev, sizeof(*enh_fixed_div), GFP_KERNEL);
591 if (!enh_fixed_div)
592 return -ENOMEM;
593
594 snprintf(name, sizeof(name), "%s#enh_fixed_div", dev_name(dev));
595 init.name = name;
596 init.ops = &clk_fixed_factor_ops;
597 init.flags = 0;
598 if (spicc->data->has_pclk)
599 parent_data[0].hw = __clk_get_hw(spicc->pclk);
600 else
601 parent_data[0].hw = __clk_get_hw(spicc->core);
602 init.num_parents = 1;
603
604 enh_fixed_div->mult = 1,
605 enh_fixed_div->div = 2,
606 enh_fixed_div->hw.init = &init;
607
608 clk = devm_clk_register(dev, &enh_fixed_div->hw);
609 if (WARN_ON(IS_ERR(clk)))
610 return PTR_ERR(clk);
611
612 enh_div = devm_kzalloc(dev, sizeof(*enh_div), GFP_KERNEL);
613 if (!enh_div)
614 return -ENOMEM;
615
616 snprintf(name, sizeof(name), "%s#enh_div", dev_name(dev));
617 init.name = name;
618 init.ops = &clk_divider_ops;
619 init.flags = CLK_SET_RATE_PARENT;
620 parent_data[0].hw = &enh_fixed_div->hw;
621 init.num_parents = 1;
622
623 enh_div->shift = 16,
624 enh_div->width = 8,
625 enh_div->reg = spicc->base + SPICC_ENH_CTL0;
626 enh_div->hw.init = &init;
627
628 clk = devm_clk_register(dev, &enh_div->hw);
629 if (WARN_ON(IS_ERR(clk)))
630 return PTR_ERR(clk);
631
632 mux = devm_kzalloc(dev, sizeof(*mux), GFP_KERNEL);
633 if (!mux)
634 return -ENOMEM;
635
636 snprintf(name, sizeof(name), "%s#sel", dev_name(dev));
637 init.name = name;
638 init.ops = &clk_mux_ops;
639 parent_data[0].hw = &pow2_div->hw;
640 parent_data[1].hw = &enh_div->hw;
641 init.num_parents = 2;
642 init.flags = CLK_SET_RATE_PARENT;
643
644 mux->mask = 0x1,
645 mux->shift = 24,
646 mux->reg = spicc->base + SPICC_ENH_CTL0;
647 mux->hw.init = &init;
648
649 spicc->clk = devm_clk_register(dev, &mux->hw);
650 if (WARN_ON(IS_ERR(spicc->clk)))
651 return PTR_ERR(spicc->clk);
652
653 return 0;
654 }
655
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all(a)lists.01.org
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2020-03-11 20:09 [superna9999:amlogic/v5.7/spicc-axg 10/13] drivers//spi/spi-meson-spicc.c:550:2: error: 'else' without a previous 'if' kbuild test robot
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