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* [PATCH 00/12] fsl: layerscape: Initialize the GIC redistributor
@ 2020-03-19  5:38 Zhiqiang Hou
  2020-03-19  5:38 ` [PATCH 01/12] board: lx2160a: Add header file cpu_func.h Zhiqiang Hou
                   ` (11 more replies)
  0 siblings, 12 replies; 15+ messages in thread
From: Zhiqiang Hou @ 2020-03-19  5:38 UTC (permalink / raw)
  To: u-boot

From: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>

This patch set is to initialize the GIC redistributor tables and add the
tables to kernel DT's reserved memeory node.

Hou Zhiqiang (12):
  board: lx2160a: Add header file cpu_func.h
  arm64: fsl-layerscape: Assign addr to resv_ram if enabled RESV_RAM
    config
  arm64: layerscape: Move the GIC tables reserve memory function to
    soc.c
  board: lx2160a: Don't program the GIC RD tables if failed to reserve
    memory
  board: lx2160a: Make sure the RD tables address align to 64KB
  fsl-layerscape: Kconfig: Select RESV_RAM config if GIC_V3_ITS is
    enabled
  board: fsl: ls1088a: Initialize the GIC redistributor tables
  configs: ls1088a: Enable GIC_V3_ITS config
  board: fsl: ls1028a: Initialize the GIC redistributor tables
  configs: ls1028a: Enable GIC_V3_ITS config
  board: fsl: ls2080a: Initialize the GIC redistributor tables
  configs: ls208xa: Enable GIC_V3_ITS config

Depends on:
 https://patchwork.ozlabs.org/project/uboot/list/?series=158486

 arch/arm/cpu/armv8/fsl-layerscape/Kconfig     |  4 +++
 arch/arm/cpu/armv8/fsl-layerscape/cpu.c       |  8 +++---
 arch/arm/cpu/armv8/fsl-layerscape/soc.c       | 18 +++++++++++++
 .../arm/include/asm/arch-fsl-layerscape/soc.h |  4 +++
 board/freescale/ls1028a/ls1028a.c             | 14 ++++++++++
 board/freescale/ls1088a/ls1088a.c             | 15 +++++++++++
 board/freescale/ls2080aqds/ls2080aqds.c       | 14 ++++++++++
 board/freescale/ls2080ardb/ls2080ardb.c       | 14 ++++++++++
 board/freescale/lx2160a/lx2160a.c             | 27 +++++++------------
 configs/ls1028aqds_tfa_SECURE_BOOT_defconfig  |  1 +
 configs/ls1028aqds_tfa_defconfig              |  1 +
 configs/ls1028ardb_tfa_SECURE_BOOT_defconfig  |  1 +
 configs/ls1028ardb_tfa_defconfig              |  1 +
 configs/ls1088aqds_defconfig                  |  1 +
 configs/ls1088aqds_qspi_SECURE_BOOT_defconfig |  1 +
 configs/ls1088aqds_qspi_defconfig             |  1 +
 configs/ls1088aqds_sdcard_ifc_defconfig       |  1 +
 configs/ls1088aqds_sdcard_qspi_defconfig      |  1 +
 configs/ls1088aqds_tfa_defconfig              |  1 +
 configs/ls1088ardb_qspi_SECURE_BOOT_defconfig |  1 +
 configs/ls1088ardb_qspi_defconfig             |  1 +
 ...1088ardb_sdcard_qspi_SECURE_BOOT_defconfig |  1 +
 configs/ls1088ardb_sdcard_qspi_defconfig      |  1 +
 configs/ls1088ardb_tfa_SECURE_BOOT_defconfig  |  1 +
 configs/ls1088ardb_tfa_defconfig              |  1 +
 configs/ls2080aqds_SECURE_BOOT_defconfig      |  1 +
 configs/ls2080aqds_defconfig                  |  1 +
 configs/ls2080aqds_nand_defconfig             |  1 +
 configs/ls2080aqds_qspi_defconfig             |  1 +
 configs/ls2080aqds_sdcard_defconfig           |  1 +
 configs/ls2080ardb_SECURE_BOOT_defconfig      |  1 +
 configs/ls2080ardb_defconfig                  |  1 +
 configs/ls2080ardb_nand_defconfig             |  1 +
 configs/ls2081ardb_defconfig                  |  1 +
 configs/ls2088aqds_tfa_defconfig              |  1 +
 configs/ls2088ardb_qspi_SECURE_BOOT_defconfig |  1 +
 configs/ls2088ardb_qspi_defconfig             |  1 +
 configs/ls2088ardb_tfa_SECURE_BOOT_defconfig  |  1 +
 configs/ls2088ardb_tfa_defconfig              |  1 +
 39 files changed, 126 insertions(+), 22 deletions(-)

-- 
2.17.1

^ permalink raw reply	[flat|nested] 15+ messages in thread

* [PATCH 01/12] board: lx2160a: Add header file cpu_func.h
  2020-03-19  5:38 [PATCH 00/12] fsl: layerscape: Initialize the GIC redistributor Zhiqiang Hou
@ 2020-03-19  5:38 ` Zhiqiang Hou
  2020-03-19  5:38 ` [PATCH 02/12] arm64: fsl-layerscape: Assign addr to resv_ram if enabled RESV_RAM config Zhiqiang Hou
                   ` (10 subsequent siblings)
  11 siblings, 0 replies; 15+ messages in thread
From: Zhiqiang Hou @ 2020-03-19  5:38 UTC (permalink / raw)
  To: u-boot

From: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>

The declaration of the function cpu_numcores() has been moved to
cpu_func.h, so add including of the header file to avoid build
error.

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
---
 board/freescale/lx2160a/lx2160a.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/board/freescale/lx2160a/lx2160a.c b/board/freescale/lx2160a/lx2160a.c
index 134ae22f85..595c774b42 100644
--- a/board/freescale/lx2160a/lx2160a.c
+++ b/board/freescale/lx2160a/lx2160a.c
@@ -5,6 +5,7 @@
 
 #include <common.h>
 #include <clock_legacy.h>
+#include <cpu_func.h>
 #include <dm.h>
 #include <dm/platform_data/serial_pl01x.h>
 #include <i2c.h>
-- 
2.17.1

^ permalink raw reply related	[flat|nested] 15+ messages in thread

* [PATCH 02/12] arm64: fsl-layerscape: Assign addr to resv_ram if enabled RESV_RAM config
  2020-03-19  5:38 [PATCH 00/12] fsl: layerscape: Initialize the GIC redistributor Zhiqiang Hou
  2020-03-19  5:38 ` [PATCH 01/12] board: lx2160a: Add header file cpu_func.h Zhiqiang Hou
@ 2020-03-19  5:38 ` Zhiqiang Hou
  2020-03-19  5:38 ` [PATCH 03/12] arm64: layerscape: Move the GIC tables reserve memory function to soc.c Zhiqiang Hou
                   ` (9 subsequent siblings)
  11 siblings, 0 replies; 15+ messages in thread
From: Zhiqiang Hou @ 2020-03-19  5:38 UTC (permalink / raw)
  To: u-boot

From: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>

The initialization of gd->arch.resv_ram pointer should depend on if the
RESV_RAM config is enabled.

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
---
 arch/arm/cpu/armv8/fsl-layerscape/cpu.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
index b443894453..1b7729c046 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
@@ -1379,7 +1379,7 @@ static int tfa_dram_init_banksize(void)
 	if (i > 0)
 		ret = 0;
 
-#if defined(CONFIG_FSL_MC_ENET) && !defined(CONFIG_SPL_BUILD)
+#if defined(CONFIG_RESV_RAM) && !defined(CONFIG_SPL_BUILD)
 	/* Assign memory for MC */
 #ifdef CONFIG_SYS_DDR_BLOCK3_BASE
 	if (gd->bd->bi_dram[2].size >=
@@ -1402,7 +1402,7 @@ static int tfa_dram_init_banksize(void)
 				board_reserve_ram_top(gd->bd->bi_dram[0].size);
 		}
 	}
-#endif	/* CONFIG_FSL_MC_ENET */
+#endif	/* CONFIG_RESV_RAM */
 
 	return ret;
 }
@@ -1465,7 +1465,7 @@ int dram_init_banksize(void)
 	}
 #endif	/* CONFIG_SYS_MEM_RESERVE_SECURE */
 
-#if defined(CONFIG_FSL_MC_ENET) && !defined(CONFIG_SPL_BUILD)
+#if defined(CONFIG_RESV_RAM) && !defined(CONFIG_SPL_BUILD)
 	/* Assign memory for MC */
 #ifdef CONFIG_SYS_DDR_BLOCK3_BASE
 	if (gd->bd->bi_dram[2].size >=
@@ -1488,7 +1488,7 @@ int dram_init_banksize(void)
 				board_reserve_ram_top(gd->bd->bi_dram[0].size);
 		}
 	}
-#endif	/* CONFIG_FSL_MC_ENET */
+#endif	/* CONFIG_RESV_RAM */
 
 #ifdef CONFIG_SYS_DP_DDR_BASE_PHY
 #ifdef CONFIG_SYS_DDR_BLOCK3_BASE
-- 
2.17.1

^ permalink raw reply related	[flat|nested] 15+ messages in thread

* [PATCH 03/12] arm64: layerscape: Move the GIC tables reserve memory function to soc.c
  2020-03-19  5:38 [PATCH 00/12] fsl: layerscape: Initialize the GIC redistributor Zhiqiang Hou
  2020-03-19  5:38 ` [PATCH 01/12] board: lx2160a: Add header file cpu_func.h Zhiqiang Hou
  2020-03-19  5:38 ` [PATCH 02/12] arm64: fsl-layerscape: Assign addr to resv_ram if enabled RESV_RAM config Zhiqiang Hou
@ 2020-03-19  5:38 ` Zhiqiang Hou
  2020-03-19  5:38 ` [PATCH 04/12] board: lx2160a: Don't program the GIC RD tables if failed to reserve memory Zhiqiang Hou
                   ` (8 subsequent siblings)
  11 siblings, 0 replies; 15+ messages in thread
From: Zhiqiang Hou @ 2020-03-19  5:38 UTC (permalink / raw)
  To: u-boot

From: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>

Move the function of reserving memory for GIC redistributor tables
to soc.c, such that other Layerscape platform can leverage it, and
add a argument for the memory size to reserve.
And rename the function so that it is more readable.

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
---
 arch/arm/cpu/armv8/fsl-layerscape/soc.c        | 18 ++++++++++++++++++
 arch/arm/include/asm/arch-fsl-layerscape/soc.h |  4 ++++
 board/freescale/lx2160a/lx2160a.c              | 17 +----------------
 3 files changed, 23 insertions(+), 16 deletions(-)

diff --git a/arch/arm/cpu/armv8/fsl-layerscape/soc.c b/arch/arm/cpu/armv8/fsl-layerscape/soc.c
index d0e10cb007..eef282909c 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/soc.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/soc.c
@@ -33,6 +33,24 @@
 DECLARE_GLOBAL_DATA_PTR;
 #endif
 
+#ifdef CONFIG_GIC_V3_ITS
+int fdt_add_resv_mem_gic_rd_tables(void *blob, u64 base, size_t size)
+{
+	u32 phandle;
+	int err;
+	struct fdt_memory gic_rd_tables;
+
+	gic_rd_tables.start = base;
+	gic_rd_tables.end = base + size - 1;
+	err = fdtdec_add_reserved_memory(blob, "gic-rd-tables", &gic_rd_tables,
+					 &phandle);
+	if (err < 0)
+		debug("%s: failed to add reserved memory: %d\n", __func__, err);
+
+	return err;
+}
+#endif
+
 bool soc_has_dp_ddr(void)
 {
 	struct ccsr_gur __iomem *gur = (void *)(CONFIG_SYS_FSL_GUTS_ADDR);
diff --git a/arch/arm/include/asm/arch-fsl-layerscape/soc.h b/arch/arm/include/asm/arch-fsl-layerscape/soc.h
index c62d414aac..2081b71cd7 100644
--- a/arch/arm/include/asm/arch-fsl-layerscape/soc.h
+++ b/arch/arm/include/asm/arch-fsl-layerscape/soc.h
@@ -158,6 +158,10 @@ void erratum_a010315(void);
 
 bool soc_has_dp_ddr(void);
 bool soc_has_aiop(void);
+
+#ifdef CONFIG_GIC_V3_ITS
+int fdt_add_resv_mem_gic_rd_tables(void *blob, u64 base, size_t size);
+#endif
 #endif
 
 #endif /* _ASM_ARMV8_FSL_LAYERSCAPE_SOC_H_ */
diff --git a/board/freescale/lx2160a/lx2160a.c b/board/freescale/lx2160a/lx2160a.c
index 595c774b42..290d80db90 100644
--- a/board/freescale/lx2160a/lx2160a.c
+++ b/board/freescale/lx2160a/lx2160a.c
@@ -630,21 +630,6 @@ void board_quiesce_devices(void)
 }
 #endif
 
-#ifdef CONFIG_GIC_V3_ITS
-void fdt_fixup_gic_lpi_memory(void *blob, u64 gic_lpi_base)
-{
-	u32 phandle;
-	int err;
-	struct fdt_memory gic_lpi;
-
-	gic_lpi.start = gic_lpi_base;
-	gic_lpi.end = gic_lpi_base + GIC_LPI_SIZE - 1;
-	err = fdtdec_add_reserved_memory(blob, "gic-lpi", &gic_lpi, &phandle);
-	if (err < 0)
-		debug("failed to add reserved memory: %d\n", err);
-}
-#endif
-
 #ifdef CONFIG_OF_BOARD_SETUP
 int ft_board_setup(void *blob, bd_t *bd)
 {
@@ -679,7 +664,7 @@ int ft_board_setup(void *blob, bd_t *bd)
 #ifdef CONFIG_GIC_V3_ITS
 	gic_lpi_base = gd->arch.resv_ram - GIC_LPI_SIZE;
 	gic_lpi_tables_init(gic_lpi_base, cpu_numcores());
-	fdt_fixup_gic_lpi_memory(blob, gic_lpi_base);
+	fdt_add_resv_mem_gic_rd_tables(blob, gic_lpi_base, GIC_LPI_SIZE);
 #endif
 
 #ifdef CONFIG_RESV_RAM
-- 
2.17.1

^ permalink raw reply related	[flat|nested] 15+ messages in thread

* [PATCH 04/12] board: lx2160a: Don't program the GIC RD tables if failed to reserve memory
  2020-03-19  5:38 [PATCH 00/12] fsl: layerscape: Initialize the GIC redistributor Zhiqiang Hou
                   ` (2 preceding siblings ...)
  2020-03-19  5:38 ` [PATCH 03/12] arm64: layerscape: Move the GIC tables reserve memory function to soc.c Zhiqiang Hou
@ 2020-03-19  5:38 ` Zhiqiang Hou
  2020-03-19  5:38 ` [PATCH 05/12] board: lx2160a: Make sure the RD tables address align to 64KB Zhiqiang Hou
                   ` (7 subsequent siblings)
  11 siblings, 0 replies; 15+ messages in thread
From: Zhiqiang Hou @ 2020-03-19  5:38 UTC (permalink / raw)
  To: u-boot

From: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>

Program the GIC redistributor tables only when succeeded to reserve memory
for them, otherwise kernel will lose the chance to program them using
allocated memory.

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
---
 board/freescale/lx2160a/lx2160a.c | 8 ++++++--
 1 file changed, 6 insertions(+), 2 deletions(-)

diff --git a/board/freescale/lx2160a/lx2160a.c b/board/freescale/lx2160a/lx2160a.c
index 290d80db90..30b18a75c5 100644
--- a/board/freescale/lx2160a/lx2160a.c
+++ b/board/freescale/lx2160a/lx2160a.c
@@ -642,6 +642,7 @@ int ft_board_setup(void *blob, bd_t *bd)
 	u64 mc_memory_size = 0;
 	u16 total_memory_banks;
 	u64 gic_lpi_base;
+	int ret;
 
 	ft_cpu_setup(blob, bd);
 
@@ -663,8 +664,11 @@ int ft_board_setup(void *blob, bd_t *bd)
 
 #ifdef CONFIG_GIC_V3_ITS
 	gic_lpi_base = gd->arch.resv_ram - GIC_LPI_SIZE;
-	gic_lpi_tables_init(gic_lpi_base, cpu_numcores());
-	fdt_add_resv_mem_gic_rd_tables(blob, gic_lpi_base, GIC_LPI_SIZE);
+	ret = fdt_add_resv_mem_gic_rd_tables(blob, gic_lpi_base, GIC_LPI_SIZE);
+	if (!ret) {
+		if (gic_lpi_tables_init(gic_lpi_base, cpu_numcores()))
+			debug("%s: failed to init gic-lpi-tables\n", __func__);
+	}
 #endif
 
 #ifdef CONFIG_RESV_RAM
-- 
2.17.1

^ permalink raw reply related	[flat|nested] 15+ messages in thread

* [PATCH 05/12] board: lx2160a: Make sure the RD tables address align to 64KB
  2020-03-19  5:38 [PATCH 00/12] fsl: layerscape: Initialize the GIC redistributor Zhiqiang Hou
                   ` (3 preceding siblings ...)
  2020-03-19  5:38 ` [PATCH 04/12] board: lx2160a: Don't program the GIC RD tables if failed to reserve memory Zhiqiang Hou
@ 2020-03-19  5:38 ` Zhiqiang Hou
  2020-03-19  5:38 ` [PATCH 06/12] fsl-layerscape: Kconfig: Select RESV_RAM config if GIC_V3_ITS is enabled Zhiqiang Hou
                   ` (6 subsequent siblings)
  11 siblings, 0 replies; 15+ messages in thread
From: Zhiqiang Hou @ 2020-03-19  5:38 UTC (permalink / raw)
  To: u-boot

From: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>

As the lower 16bit of the redistributor pending table is reserved
for describing the memory attributes, we must give a 64KB aligned
address to the GIC LPI initialization function.

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
---
 board/freescale/lx2160a/lx2160a.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/board/freescale/lx2160a/lx2160a.c b/board/freescale/lx2160a/lx2160a.c
index 30b18a75c5..f38c45ada5 100644
--- a/board/freescale/lx2160a/lx2160a.c
+++ b/board/freescale/lx2160a/lx2160a.c
@@ -17,6 +17,7 @@
 #include <asm/io.h>
 #include <fdt_support.h>
 #include <linux/libfdt.h>
+#include <linux/sizes.h>
 #include <fsl-mc/fsl_mc.h>
 #include <env_internal.h>
 #include <efi_loader.h>
@@ -663,7 +664,7 @@ int ft_board_setup(void *blob, bd_t *bd)
 	}
 
 #ifdef CONFIG_GIC_V3_ITS
-	gic_lpi_base = gd->arch.resv_ram - GIC_LPI_SIZE;
+	gic_lpi_base = ALIGN(gd->arch.resv_ram - GIC_LPI_SIZE, SZ_64K);
 	ret = fdt_add_resv_mem_gic_rd_tables(blob, gic_lpi_base, GIC_LPI_SIZE);
 	if (!ret) {
 		if (gic_lpi_tables_init(gic_lpi_base, cpu_numcores()))
-- 
2.17.1

^ permalink raw reply related	[flat|nested] 15+ messages in thread

* [PATCH 06/12] fsl-layerscape: Kconfig: Select RESV_RAM config if GIC_V3_ITS is enabled
  2020-03-19  5:38 [PATCH 00/12] fsl: layerscape: Initialize the GIC redistributor Zhiqiang Hou
                   ` (4 preceding siblings ...)
  2020-03-19  5:38 ` [PATCH 05/12] board: lx2160a: Make sure the RD tables address align to 64KB Zhiqiang Hou
@ 2020-03-19  5:38 ` Zhiqiang Hou
  2020-03-19  5:38 ` [PATCH 07/12] board: fsl: ls1088a: Initialize the GIC redistributor tables Zhiqiang Hou
                   ` (5 subsequent siblings)
  11 siblings, 0 replies; 15+ messages in thread
From: Zhiqiang Hou @ 2020-03-19  5:38 UTC (permalink / raw)
  To: u-boot

From: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>

The GIC redistributor tables initialization depends on RESV_RAM config,
so select RESV_RAM if GIC_V3_ITS is enabled.

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
---
 arch/arm/cpu/armv8/fsl-layerscape/Kconfig | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
index 275c66d992..af1c148c26 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
+++ b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
@@ -46,6 +46,7 @@ config ARCH_LS1028A
 	select SYS_FSL_ERRATUM_A009663 if !TFABOOT
 	select SYS_FSL_ERRATUM_A009942 if !TFABOOT
 	select SYS_FSL_ERRATUM_A050382
+	select RESV_RAM if GIC_V3_ITS
 	imply PANIC_HANG
 
 config ARCH_LS1043A
@@ -152,6 +153,7 @@ config ARCH_LS1088A
 	select SYS_I2C_MXC_I2C2 if !TFABOOT
 	select SYS_I2C_MXC_I2C3 if !TFABOOT
 	select SYS_I2C_MXC_I2C4 if !TFABOOT
+	select RESV_RAM if GIC_V3_ITS
 	imply SCSI
 	imply PANIC_HANG
 
@@ -202,6 +204,7 @@ config ARCH_LS2080A
 	select SYS_I2C_MXC_I2C2 if !TFABOOT
 	select SYS_I2C_MXC_I2C3 if !TFABOOT
 	select SYS_I2C_MXC_I2C4 if !TFABOOT
+	select RESV_RAM if GIC_V3_ITS
 	imply DISTRO_DEFAULTS
 	imply PANIC_HANG
 
@@ -229,6 +232,7 @@ config ARCH_LX2160A
 	select ARCH_EARLY_INIT_R
 	select BOARD_EARLY_INIT_F
 	select SYS_I2C_MXC
+	select RESV_RAM if GIC_V3_ITS
 	imply DISTRO_DEFAULTS
 	imply PANIC_HANG
 	imply SCSI
-- 
2.17.1

^ permalink raw reply related	[flat|nested] 15+ messages in thread

* [PATCH 07/12] board: fsl: ls1088a: Initialize the GIC redistributor tables
  2020-03-19  5:38 [PATCH 00/12] fsl: layerscape: Initialize the GIC redistributor Zhiqiang Hou
                   ` (5 preceding siblings ...)
  2020-03-19  5:38 ` [PATCH 06/12] fsl-layerscape: Kconfig: Select RESV_RAM config if GIC_V3_ITS is enabled Zhiqiang Hou
@ 2020-03-19  5:38 ` Zhiqiang Hou
  2020-03-19  5:38 ` [PATCH 08/12] configs: ls1088a: Enable GIC_V3_ITS config Zhiqiang Hou
                   ` (4 subsequent siblings)
  11 siblings, 0 replies; 15+ messages in thread
From: Zhiqiang Hou @ 2020-03-19  5:38 UTC (permalink / raw)
  To: u-boot

From: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>

Fixup kernel DT to reserve memory for GIC redistributor tables,
and initialize the redistributor configuration and pending
tables using the reserved memory.

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
---
 board/freescale/ls1088a/ls1088a.c | 15 +++++++++++++++
 1 file changed, 15 insertions(+)

diff --git a/board/freescale/ls1088a/ls1088a.c b/board/freescale/ls1088a/ls1088a.c
index 0bd397a0be..24663f5598 100644
--- a/board/freescale/ls1088a/ls1088a.c
+++ b/board/freescale/ls1088a/ls1088a.c
@@ -3,6 +3,7 @@
  * Copyright 2017-2018 NXP
  */
 #include <common.h>
+#include <cpu_func.h>
 #include <env.h>
 #include <i2c.h>
 #include <malloc.h>
@@ -14,6 +15,7 @@
 #include <asm/io.h>
 #include <fdt_support.h>
 #include <linux/libfdt.h>
+#include <linux/sizes.h>
 #include <fsl-mc/fsl_mc.h>
 #include <env_internal.h>
 #include <asm/arch-fsl-layerscape/soc.h>
@@ -22,6 +24,7 @@
 #include <asm/arch/fsl_serdes.h>
 #include <asm/arch/soc.h>
 #include <asm/arch-fsl-layerscape/fsl_icid.h>
+#include <asm/gic-v3.h>
 
 #include "../common/qixis.h"
 #include "ls1088a_qixis.h"
@@ -30,6 +33,7 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
+#define GIC_LPI_SIZE		0x200000
 #ifdef CONFIG_TARGET_LS1088AQDS
 #ifdef CONFIG_TFABOOT
 struct ifc_regs ifc_cfg_ifc_nor_boot[CONFIG_SYS_FSL_IFC_BANK_COUNT] = {
@@ -914,6 +918,8 @@ int ft_board_setup(void *blob, bd_t *bd)
 	u64 mc_memory_base = 0;
 	u64 mc_memory_size = 0;
 	u16 total_memory_banks;
+	u64 gic_lpi_base;
+	int ret;
 
 	ft_cpu_setup(blob, bd);
 
@@ -934,6 +940,15 @@ int ft_board_setup(void *blob, bd_t *bd)
 	}
 
 #ifdef CONFIG_RESV_RAM
+#ifdef CONFIG_GIC_V3_ITS
+	gic_lpi_base = ALIGN(gd->arch.resv_ram - GIC_LPI_SIZE, SZ_64K);
+	ret = fdt_add_resv_mem_gic_rd_tables(blob, gic_lpi_base, GIC_LPI_SIZE);
+	if (!ret) {
+		if (gic_lpi_tables_init(gic_lpi_base, cpu_numcores()))
+			debug("%s: failed to init gic-lpi-tables\n", __func__);
+	}
+#endif
+
 	/* reduce size if reserved memory is within this bank */
 	if (gd->arch.resv_ram >= base[0] &&
 	    gd->arch.resv_ram < base[0] + size[0])
-- 
2.17.1

^ permalink raw reply related	[flat|nested] 15+ messages in thread

* [PATCH 08/12] configs: ls1088a: Enable GIC_V3_ITS config
  2020-03-19  5:38 [PATCH 00/12] fsl: layerscape: Initialize the GIC redistributor Zhiqiang Hou
                   ` (6 preceding siblings ...)
  2020-03-19  5:38 ` [PATCH 07/12] board: fsl: ls1088a: Initialize the GIC redistributor tables Zhiqiang Hou
@ 2020-03-19  5:38 ` Zhiqiang Hou
  2020-03-19  5:38 ` [PATCH 09/12] board: fsl: ls1028a: Initialize the GIC redistributor tables Zhiqiang Hou
                   ` (3 subsequent siblings)
  11 siblings, 0 replies; 15+ messages in thread
From: Zhiqiang Hou @ 2020-03-19  5:38 UTC (permalink / raw)
  To: u-boot

From: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>

Enable GIC_V3_ITS config to initialize the GIC redistributor
tables.

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
---
 configs/ls1088aqds_defconfig                         | 1 +
 configs/ls1088aqds_qspi_SECURE_BOOT_defconfig        | 1 +
 configs/ls1088aqds_qspi_defconfig                    | 1 +
 configs/ls1088aqds_sdcard_ifc_defconfig              | 1 +
 configs/ls1088aqds_sdcard_qspi_defconfig             | 1 +
 configs/ls1088aqds_tfa_defconfig                     | 1 +
 configs/ls1088ardb_qspi_SECURE_BOOT_defconfig        | 1 +
 configs/ls1088ardb_qspi_defconfig                    | 1 +
 configs/ls1088ardb_sdcard_qspi_SECURE_BOOT_defconfig | 1 +
 configs/ls1088ardb_sdcard_qspi_defconfig             | 1 +
 configs/ls1088ardb_tfa_SECURE_BOOT_defconfig         | 1 +
 configs/ls1088ardb_tfa_defconfig                     | 1 +
 12 files changed, 12 insertions(+)

diff --git a/configs/ls1088aqds_defconfig b/configs/ls1088aqds_defconfig
index 7713e58bbe..b1b74f9af4 100644
--- a/configs/ls1088aqds_defconfig
+++ b/configs/ls1088aqds_defconfig
@@ -59,3 +59,4 @@ CONFIG_USB_XHCI_DWC3=y
 CONFIG_USB_DWC3=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_GADGET=y
+CONFIG_GIC_V3_ITS=y
diff --git a/configs/ls1088aqds_qspi_SECURE_BOOT_defconfig b/configs/ls1088aqds_qspi_SECURE_BOOT_defconfig
index 242c40b8b5..943b914e01 100644
--- a/configs/ls1088aqds_qspi_SECURE_BOOT_defconfig
+++ b/configs/ls1088aqds_qspi_SECURE_BOOT_defconfig
@@ -60,3 +60,4 @@ CONFIG_USB_GADGET=y
 CONFIG_RSA=y
 CONFIG_RSA_SOFTWARE_EXP=y
 CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
+CONFIG_GIC_V3_ITS=y
diff --git a/configs/ls1088aqds_qspi_defconfig b/configs/ls1088aqds_qspi_defconfig
index 3649b06a75..490782ebfc 100644
--- a/configs/ls1088aqds_qspi_defconfig
+++ b/configs/ls1088aqds_qspi_defconfig
@@ -61,3 +61,4 @@ CONFIG_USB_XHCI_DWC3=y
 CONFIG_USB_DWC3=y
 CONFIG_USB_GADGET=y
 CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
+CONFIG_GIC_V3_ITS=y
diff --git a/configs/ls1088aqds_sdcard_ifc_defconfig b/configs/ls1088aqds_sdcard_ifc_defconfig
index 815ea5ce4a..a4c6b27a3d 100644
--- a/configs/ls1088aqds_sdcard_ifc_defconfig
+++ b/configs/ls1088aqds_sdcard_ifc_defconfig
@@ -67,3 +67,4 @@ CONFIG_USB_XHCI_DWC3=y
 CONFIG_USB_DWC3=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_GADGET=y
+CONFIG_GIC_V3_ITS=y
diff --git a/configs/ls1088aqds_sdcard_qspi_defconfig b/configs/ls1088aqds_sdcard_qspi_defconfig
index 275dbf9e0e..435f704eb3 100644
--- a/configs/ls1088aqds_sdcard_qspi_defconfig
+++ b/configs/ls1088aqds_sdcard_qspi_defconfig
@@ -70,3 +70,4 @@ CONFIG_USB_XHCI_HCD=y
 CONFIG_USB_XHCI_DWC3=y
 CONFIG_USB_DWC3=y
 CONFIG_USB_GADGET=y
+CONFIG_GIC_V3_ITS=y
diff --git a/configs/ls1088aqds_tfa_defconfig b/configs/ls1088aqds_tfa_defconfig
index 1144cba983..5c2a699849 100644
--- a/configs/ls1088aqds_tfa_defconfig
+++ b/configs/ls1088aqds_tfa_defconfig
@@ -78,3 +78,4 @@ CONFIG_USB_XHCI_DWC3=y
 CONFIG_USB_DWC3=y
 CONFIG_USB_GADGET=y
 CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
+CONFIG_GIC_V3_ITS=y
diff --git a/configs/ls1088ardb_qspi_SECURE_BOOT_defconfig b/configs/ls1088ardb_qspi_SECURE_BOOT_defconfig
index 3f654e2e1d..89e9a46c4f 100644
--- a/configs/ls1088ardb_qspi_SECURE_BOOT_defconfig
+++ b/configs/ls1088ardb_qspi_SECURE_BOOT_defconfig
@@ -61,3 +61,4 @@ CONFIG_USB_GADGET=y
 CONFIG_RSA=y
 CONFIG_RSA_SOFTWARE_EXP=y
 CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
+CONFIG_GIC_V3_ITS=y
diff --git a/configs/ls1088ardb_qspi_defconfig b/configs/ls1088ardb_qspi_defconfig
index 935d76b4be..3c2fda4593 100644
--- a/configs/ls1088ardb_qspi_defconfig
+++ b/configs/ls1088ardb_qspi_defconfig
@@ -62,3 +62,4 @@ CONFIG_USB_XHCI_DWC3=y
 CONFIG_USB_DWC3=y
 CONFIG_USB_GADGET=y
 CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
+CONFIG_GIC_V3_ITS=y
diff --git a/configs/ls1088ardb_sdcard_qspi_SECURE_BOOT_defconfig b/configs/ls1088ardb_sdcard_qspi_SECURE_BOOT_defconfig
index 562cbdd3ab..da41ccaa29 100644
--- a/configs/ls1088ardb_sdcard_qspi_SECURE_BOOT_defconfig
+++ b/configs/ls1088ardb_sdcard_qspi_SECURE_BOOT_defconfig
@@ -70,3 +70,4 @@ CONFIG_USB_XHCI_DWC3=y
 CONFIG_USB_DWC3=y
 CONFIG_RSA=y
 CONFIG_SPL_RSA=y
+CONFIG_GIC_V3_ITS=y
diff --git a/configs/ls1088ardb_sdcard_qspi_defconfig b/configs/ls1088ardb_sdcard_qspi_defconfig
index 1e6fdceca1..0483e5d8d2 100644
--- a/configs/ls1088ardb_sdcard_qspi_defconfig
+++ b/configs/ls1088ardb_sdcard_qspi_defconfig
@@ -71,3 +71,4 @@ CONFIG_USB_XHCI_HCD=y
 CONFIG_USB_XHCI_DWC3=y
 CONFIG_USB_DWC3=y
 CONFIG_USB_GADGET=y
+CONFIG_GIC_V3_ITS=y
diff --git a/configs/ls1088ardb_tfa_SECURE_BOOT_defconfig b/configs/ls1088ardb_tfa_SECURE_BOOT_defconfig
index 0086039e52..079e6c53fb 100644
--- a/configs/ls1088ardb_tfa_SECURE_BOOT_defconfig
+++ b/configs/ls1088ardb_tfa_SECURE_BOOT_defconfig
@@ -71,3 +71,4 @@ CONFIG_RSA=y
 CONFIG_SPL_RSA=y
 CONFIG_RSA_SOFTWARE_EXP=y
 CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
+CONFIG_GIC_V3_ITS=y
diff --git a/configs/ls1088ardb_tfa_defconfig b/configs/ls1088ardb_tfa_defconfig
index a7908e95b5..e3d4b02d21 100644
--- a/configs/ls1088ardb_tfa_defconfig
+++ b/configs/ls1088ardb_tfa_defconfig
@@ -77,3 +77,4 @@ CONFIG_USB_ETHER_ASIX=y
 CONFIG_USB_ETHER_ASIX88179=y
 CONFIG_USB_ETHER_RTL8152=y
 CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
+CONFIG_GIC_V3_ITS=y
-- 
2.17.1

^ permalink raw reply related	[flat|nested] 15+ messages in thread

* [PATCH 09/12] board: fsl: ls1028a: Initialize the GIC redistributor tables
  2020-03-19  5:38 [PATCH 00/12] fsl: layerscape: Initialize the GIC redistributor Zhiqiang Hou
                   ` (7 preceding siblings ...)
  2020-03-19  5:38 ` [PATCH 08/12] configs: ls1088a: Enable GIC_V3_ITS config Zhiqiang Hou
@ 2020-03-19  5:38 ` Zhiqiang Hou
  2020-03-19  5:38 ` [PATCH 10/12] configs: ls1028a: Enable GIC_V3_ITS config Zhiqiang Hou
                   ` (2 subsequent siblings)
  11 siblings, 0 replies; 15+ messages in thread
From: Zhiqiang Hou @ 2020-03-19  5:38 UTC (permalink / raw)
  To: u-boot

From: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>

Fixup kernel DT to reserve memory for GIC redistributor tables,
and initialize the redistributor configuration and pending
tables using the reserved memory.

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
---
 board/freescale/ls1028a/ls1028a.c | 14 ++++++++++++++
 1 file changed, 14 insertions(+)

diff --git a/board/freescale/ls1028a/ls1028a.c b/board/freescale/ls1028a/ls1028a.c
index aa93534ac6..5a89d37629 100644
--- a/board/freescale/ls1028a/ls1028a.c
+++ b/board/freescale/ls1028a/ls1028a.c
@@ -4,6 +4,7 @@
  */
 
 #include <common.h>
+#include <cpu_func.h>
 #include <malloc.h>
 #include <errno.h>
 #include <fsl_ddr.h>
@@ -11,6 +12,7 @@
 #include <hwconfig.h>
 #include <fdt_support.h>
 #include <linux/libfdt.h>
+#include <linux/sizes.h>
 #include <env_internal.h>
 #include <asm/arch-fsl-layerscape/soc.h>
 #include <asm/arch-fsl-layerscape/fsl_icid.h>
@@ -19,6 +21,7 @@
 #ifdef CONFIG_FSL_LS_PPA
 #include <asm/arch/ppa.h>
 #endif
+#include <asm/gic-v3.h>
 #include <fsl_immap.h>
 #include <netdev.h>
 
@@ -29,6 +32,7 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
+#define GIC_LPI_SIZE		0x200000
 int config_board_mux(void)
 {
 #if defined(CONFIG_TARGET_LS1028AQDS) && defined(CONFIG_FSL_QIXIS)
@@ -140,6 +144,8 @@ int ft_board_setup(void *blob, bd_t *bd)
 {
 	u64 base[CONFIG_NR_DRAM_BANKS];
 	u64 size[CONFIG_NR_DRAM_BANKS];
+	u64 gic_lpi_base;
+	int ret;
 
 	ft_cpu_setup(blob, bd);
 
@@ -150,6 +156,14 @@ int ft_board_setup(void *blob, bd_t *bd)
 	size[1] = gd->bd->bi_dram[1].size;
 
 #ifdef CONFIG_RESV_RAM
+#ifdef CONFIG_GIC_V3_ITS
+	gic_lpi_base = ALIGN(gd->arch.resv_ram - GIC_LPI_SIZE, SZ_64K);
+	ret = fdt_add_resv_mem_gic_rd_tables(blob, gic_lpi_base, GIC_LPI_SIZE);
+	if (!ret) {
+		if (gic_lpi_tables_init(gic_lpi_base, cpu_numcores()))
+			debug("%s: failed to init gic-lpi-tables\n", __func__);
+	}
+#endif
 	/* reduce size if reserved memory is within this bank */
 	if (gd->arch.resv_ram >= base[0] &&
 	    gd->arch.resv_ram < base[0] + size[0])
-- 
2.17.1

^ permalink raw reply related	[flat|nested] 15+ messages in thread

* [PATCH 10/12] configs: ls1028a: Enable GIC_V3_ITS config
  2020-03-19  5:38 [PATCH 00/12] fsl: layerscape: Initialize the GIC redistributor Zhiqiang Hou
                   ` (8 preceding siblings ...)
  2020-03-19  5:38 ` [PATCH 09/12] board: fsl: ls1028a: Initialize the GIC redistributor tables Zhiqiang Hou
@ 2020-03-19  5:38 ` Zhiqiang Hou
  2020-03-19  5:38 ` [PATCH 11/12] board: fsl: ls2080a: Initialize the GIC redistributor tables Zhiqiang Hou
  2020-03-19  5:38 ` [PATCH 12/12] configs: ls208xa: Enable GIC_V3_ITS config Zhiqiang Hou
  11 siblings, 0 replies; 15+ messages in thread
From: Zhiqiang Hou @ 2020-03-19  5:38 UTC (permalink / raw)
  To: u-boot

From: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>

Enable GIC_V3_ITS config to initialize the GIC redistributor
tables.

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
---
 configs/ls1028aqds_tfa_SECURE_BOOT_defconfig | 1 +
 configs/ls1028aqds_tfa_defconfig             | 1 +
 configs/ls1028ardb_tfa_SECURE_BOOT_defconfig | 1 +
 configs/ls1028ardb_tfa_defconfig             | 1 +
 4 files changed, 4 insertions(+)

diff --git a/configs/ls1028aqds_tfa_SECURE_BOOT_defconfig b/configs/ls1028aqds_tfa_SECURE_BOOT_defconfig
index c5f0bd85da..92b944f426 100644
--- a/configs/ls1028aqds_tfa_SECURE_BOOT_defconfig
+++ b/configs/ls1028aqds_tfa_SECURE_BOOT_defconfig
@@ -79,3 +79,4 @@ CONFIG_WDT_SP805=y
 CONFIG_RSA=y
 CONFIG_OF_LIBFDT_OVERLAY=y
 CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
+CONFIG_GIC_V3_ITS=y
diff --git a/configs/ls1028aqds_tfa_defconfig b/configs/ls1028aqds_tfa_defconfig
index 7085be77fe..66d3ee1761 100644
--- a/configs/ls1028aqds_tfa_defconfig
+++ b/configs/ls1028aqds_tfa_defconfig
@@ -84,3 +84,4 @@ CONFIG_WDT=y
 CONFIG_WDT_SP805=y
 CONFIG_OF_LIBFDT_OVERLAY=y
 CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
+CONFIG_GIC_V3_ITS=y
diff --git a/configs/ls1028ardb_tfa_SECURE_BOOT_defconfig b/configs/ls1028ardb_tfa_SECURE_BOOT_defconfig
index 6fa14af6af..c999f3e6ef 100644
--- a/configs/ls1028ardb_tfa_SECURE_BOOT_defconfig
+++ b/configs/ls1028ardb_tfa_SECURE_BOOT_defconfig
@@ -76,3 +76,4 @@ CONFIG_WDT_SP805=y
 CONFIG_RSA=y
 CONFIG_OF_LIBFDT_OVERLAY=y
 CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
+CONFIG_GIC_V3_ITS=y
diff --git a/configs/ls1028ardb_tfa_defconfig b/configs/ls1028ardb_tfa_defconfig
index 3ef5520969..150123bc7b 100644
--- a/configs/ls1028ardb_tfa_defconfig
+++ b/configs/ls1028ardb_tfa_defconfig
@@ -86,3 +86,4 @@ CONFIG_WDT=y
 CONFIG_WDT_SP805=y
 CONFIG_OF_LIBFDT_OVERLAY=y
 CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
+CONFIG_GIC_V3_ITS=y
-- 
2.17.1

^ permalink raw reply related	[flat|nested] 15+ messages in thread

* [PATCH 11/12] board: fsl: ls2080a: Initialize the GIC redistributor tables
  2020-03-19  5:38 [PATCH 00/12] fsl: layerscape: Initialize the GIC redistributor Zhiqiang Hou
                   ` (9 preceding siblings ...)
  2020-03-19  5:38 ` [PATCH 10/12] configs: ls1028a: Enable GIC_V3_ITS config Zhiqiang Hou
@ 2020-03-19  5:38 ` Zhiqiang Hou
  2020-03-19 11:56   ` Bin Meng
  2020-03-19  5:38 ` [PATCH 12/12] configs: ls208xa: Enable GIC_V3_ITS config Zhiqiang Hou
  11 siblings, 1 reply; 15+ messages in thread
From: Zhiqiang Hou @ 2020-03-19  5:38 UTC (permalink / raw)
  To: u-boot

From: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>

Fixup kernel DT to reserve memory for GIC redistributor tables,
and initialize the redistributor configuration and pending
tables using the reserved memory.

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
---
 board/freescale/ls2080aqds/ls2080aqds.c | 14 ++++++++++++++
 board/freescale/ls2080ardb/ls2080ardb.c | 14 ++++++++++++++
 2 files changed, 28 insertions(+)

diff --git a/board/freescale/ls2080aqds/ls2080aqds.c b/board/freescale/ls2080aqds/ls2080aqds.c
index 4034bdee28..fd63e6bc76 100644
--- a/board/freescale/ls2080aqds/ls2080aqds.c
+++ b/board/freescale/ls2080aqds/ls2080aqds.c
@@ -3,6 +3,7 @@
  * Copyright 2015 Freescale Semiconductor
  */
 #include <common.h>
+#include <cpu_func.h>
 #include <env.h>
 #include <malloc.h>
 #include <errno.h>
@@ -12,6 +13,7 @@
 #include <asm/io.h>
 #include <fdt_support.h>
 #include <linux/libfdt.h>
+#include <linux/sizes.h>
 #include <fsl-mc/fsl_mc.h>
 #include <env_internal.h>
 #include <i2c.h>
@@ -21,12 +23,14 @@
 #include <fsl_sec.h>
 #include <asm/arch/ppa.h>
 #include <asm/arch-fsl-layerscape/fsl_icid.h>
+#include <asm/gic-v3.h>
 
 
 #include "../common/qixis.h"
 #include "ls2080aqds_qixis.h"
 #include "../common/vid.h"
 
+#define GIC_LPI_SIZE		0x200000
 #define PIN_MUX_SEL_SDHC	0x00
 #define PIN_MUX_SEL_DSPI	0x0a
 #define SCFG_QSPICLKCTRL_DIV_20	(5 << 27)
@@ -323,6 +327,8 @@ int ft_board_setup(void *blob, bd_t *bd)
 {
 	u64 base[CONFIG_NR_DRAM_BANKS];
 	u64 size[CONFIG_NR_DRAM_BANKS];
+	u64 gic_lpi_base;
+	int ret;
 
 	ft_cpu_setup(blob, bd);
 
@@ -333,6 +339,14 @@ int ft_board_setup(void *blob, bd_t *bd)
 	size[1] = gd->bd->bi_dram[1].size;
 
 #ifdef CONFIG_RESV_RAM
+#ifdef CONFIG_GIC_V3_ITS
+	gic_lpi_base = ALIGN(gd->arch.resv_ram - GIC_LPI_SIZE, SZ_64K);
+	ret = fdt_add_resv_mem_gic_rd_tables(blob, gic_lpi_base, GIC_LPI_SIZE);
+	if (!ret) {
+		if (gic_lpi_tables_init(gic_lpi_base, cpu_numcores()))
+			debug("%s: failed to init gic-lpi-tables\n", __func__);
+	}
+#endif
 	/* reduce size if reserved memory is within this bank */
 	if (gd->arch.resv_ram >= base[0] &&
 	    gd->arch.resv_ram < base[0] + size[0])
diff --git a/board/freescale/ls2080ardb/ls2080ardb.c b/board/freescale/ls2080ardb/ls2080ardb.c
index 282aaf47fb..45e645f8de 100644
--- a/board/freescale/ls2080ardb/ls2080ardb.c
+++ b/board/freescale/ls2080ardb/ls2080ardb.c
@@ -4,6 +4,7 @@
  * Copyright 2017 NXP
  */
 #include <common.h>
+#include <cpu_func.h>
 #include <env.h>
 #include <malloc.h>
 #include <errno.h>
@@ -14,6 +15,7 @@
 #include <hwconfig.h>
 #include <fdt_support.h>
 #include <linux/libfdt.h>
+#include <linux/sizes.h>
 #include <fsl-mc/fsl_mc.h>
 #include <env_internal.h>
 #include <efi_loader.h>
@@ -23,6 +25,7 @@
 #include <asm/arch/ppa.h>
 #include <fsl_sec.h>
 #include <asm/arch-fsl-layerscape/fsl_icid.h>
+#include <asm/gic-v3.h>
 
 #ifdef CONFIG_FSL_QIXIS
 #include "../common/qixis.h"
@@ -30,6 +33,7 @@
 #endif
 #include "../common/vid.h"
 
+#define GIC_LPI_SIZE		0x200000
 #define PIN_MUX_SEL_SDHC	0x00
 #define PIN_MUX_SEL_DSPI	0x0a
 
@@ -421,6 +425,8 @@ int ft_board_setup(void *blob, bd_t *bd)
 	u64 mc_memory_base = 0;
 	u64 mc_memory_size = 0;
 	u16 total_memory_banks;
+	u64 gic_lpi_base;
+	int ret;
 
 	ft_cpu_setup(blob, bd);
 
@@ -441,6 +447,14 @@ int ft_board_setup(void *blob, bd_t *bd)
 	size[1] = gd->bd->bi_dram[1].size;
 
 #ifdef CONFIG_RESV_RAM
+#ifdef CONFIG_GIC_V3_ITS
+	gic_lpi_base = ALIGN(gd->arch.resv_ram - GIC_LPI_SIZE, SZ_64K);
+	ret = fdt_add_resv_mem_gic_rd_tables(blob, gic_lpi_base, GIC_LPI_SIZE);
+	if (!ret) {
+		if (gic_lpi_tables_init(gic_lpi_base, cpu_numcores()))
+			debug("%s: failed to init gic-lpi-tables\n", __func__);
+	}
+#endif
 	/* reduce size if reserved memory is within this bank */
 	if (gd->arch.resv_ram >= base[0] &&
 	    gd->arch.resv_ram < base[0] + size[0])
-- 
2.17.1

^ permalink raw reply related	[flat|nested] 15+ messages in thread

* [PATCH 12/12] configs: ls208xa: Enable GIC_V3_ITS config
  2020-03-19  5:38 [PATCH 00/12] fsl: layerscape: Initialize the GIC redistributor Zhiqiang Hou
                   ` (10 preceding siblings ...)
  2020-03-19  5:38 ` [PATCH 11/12] board: fsl: ls2080a: Initialize the GIC redistributor tables Zhiqiang Hou
@ 2020-03-19  5:38 ` Zhiqiang Hou
  11 siblings, 0 replies; 15+ messages in thread
From: Zhiqiang Hou @ 2020-03-19  5:38 UTC (permalink / raw)
  To: u-boot

From: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>

Enable GIC_V3_ITS config to initialize the GIC redistributor
tables.

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
---
 configs/ls2080aqds_SECURE_BOOT_defconfig      | 1 +
 configs/ls2080aqds_defconfig                  | 1 +
 configs/ls2080aqds_nand_defconfig             | 1 +
 configs/ls2080aqds_qspi_defconfig             | 1 +
 configs/ls2080aqds_sdcard_defconfig           | 1 +
 configs/ls2080ardb_SECURE_BOOT_defconfig      | 1 +
 configs/ls2080ardb_defconfig                  | 1 +
 configs/ls2080ardb_nand_defconfig             | 1 +
 configs/ls2081ardb_defconfig                  | 1 +
 configs/ls2088aqds_tfa_defconfig              | 1 +
 configs/ls2088ardb_qspi_SECURE_BOOT_defconfig | 1 +
 configs/ls2088ardb_qspi_defconfig             | 1 +
 configs/ls2088ardb_tfa_SECURE_BOOT_defconfig  | 1 +
 configs/ls2088ardb_tfa_defconfig              | 1 +
 14 files changed, 14 insertions(+)

diff --git a/configs/ls2080aqds_SECURE_BOOT_defconfig b/configs/ls2080aqds_SECURE_BOOT_defconfig
index 8a792e449a..9039b252c1 100644
--- a/configs/ls2080aqds_SECURE_BOOT_defconfig
+++ b/configs/ls2080aqds_SECURE_BOOT_defconfig
@@ -62,3 +62,4 @@ CONFIG_USB_XHCI_DWC3=y
 CONFIG_RSA=y
 CONFIG_RSA_SOFTWARE_EXP=y
 CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
+CONFIG_GIC_V3_ITS=y
diff --git a/configs/ls2080aqds_defconfig b/configs/ls2080aqds_defconfig
index bc4c218c21..b14b3ca5e7 100644
--- a/configs/ls2080aqds_defconfig
+++ b/configs/ls2080aqds_defconfig
@@ -63,3 +63,4 @@ CONFIG_DM_USB=y
 CONFIG_USB_XHCI_HCD=y
 CONFIG_USB_XHCI_DWC3=y
 CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
+CONFIG_GIC_V3_ITS=y
diff --git a/configs/ls2080aqds_nand_defconfig b/configs/ls2080aqds_nand_defconfig
index e840cbf0ef..fac2b04068 100644
--- a/configs/ls2080aqds_nand_defconfig
+++ b/configs/ls2080aqds_nand_defconfig
@@ -70,3 +70,4 @@ CONFIG_DM_USB=y
 CONFIG_USB_XHCI_HCD=y
 CONFIG_USB_XHCI_DWC3=y
 CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
+CONFIG_GIC_V3_ITS=y
diff --git a/configs/ls2080aqds_qspi_defconfig b/configs/ls2080aqds_qspi_defconfig
index 861e652f7f..343c7675e0 100644
--- a/configs/ls2080aqds_qspi_defconfig
+++ b/configs/ls2080aqds_qspi_defconfig
@@ -62,3 +62,4 @@ CONFIG_DM_USB=y
 CONFIG_USB_XHCI_HCD=y
 CONFIG_USB_XHCI_DWC3=y
 CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
+CONFIG_GIC_V3_ITS=y
diff --git a/configs/ls2080aqds_sdcard_defconfig b/configs/ls2080aqds_sdcard_defconfig
index 864e70d334..dd2862ffe0 100644
--- a/configs/ls2080aqds_sdcard_defconfig
+++ b/configs/ls2080aqds_sdcard_defconfig
@@ -69,3 +69,4 @@ CONFIG_DM_USB=y
 CONFIG_USB_XHCI_HCD=y
 CONFIG_USB_XHCI_DWC3=y
 CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
+CONFIG_GIC_V3_ITS=y
diff --git a/configs/ls2080ardb_SECURE_BOOT_defconfig b/configs/ls2080ardb_SECURE_BOOT_defconfig
index 4abfc64705..743e25f7b7 100644
--- a/configs/ls2080ardb_SECURE_BOOT_defconfig
+++ b/configs/ls2080ardb_SECURE_BOOT_defconfig
@@ -64,3 +64,4 @@ CONFIG_USB_XHCI_DWC3=y
 CONFIG_RSA=y
 CONFIG_RSA_SOFTWARE_EXP=y
 CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
+CONFIG_GIC_V3_ITS=y
diff --git a/configs/ls2080ardb_defconfig b/configs/ls2080ardb_defconfig
index 0102e14ecb..e9dfc3603e 100644
--- a/configs/ls2080ardb_defconfig
+++ b/configs/ls2080ardb_defconfig
@@ -65,3 +65,4 @@ CONFIG_DM_USB=y
 CONFIG_USB_XHCI_HCD=y
 CONFIG_USB_XHCI_DWC3=y
 CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
+CONFIG_GIC_V3_ITS=y
diff --git a/configs/ls2080ardb_nand_defconfig b/configs/ls2080ardb_nand_defconfig
index 448e0fe58d..68ec26e405 100644
--- a/configs/ls2080ardb_nand_defconfig
+++ b/configs/ls2080ardb_nand_defconfig
@@ -70,3 +70,4 @@ CONFIG_DM_USB=y
 CONFIG_USB_XHCI_HCD=y
 CONFIG_USB_XHCI_DWC3=y
 CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
+CONFIG_GIC_V3_ITS=y
diff --git a/configs/ls2081ardb_defconfig b/configs/ls2081ardb_defconfig
index e446a1120b..4036ed94e5 100644
--- a/configs/ls2081ardb_defconfig
+++ b/configs/ls2081ardb_defconfig
@@ -62,3 +62,4 @@ CONFIG_DM_USB=y
 CONFIG_USB_XHCI_HCD=y
 CONFIG_USB_XHCI_DWC3=y
 CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
+CONFIG_GIC_V3_ITS=y
diff --git a/configs/ls2088aqds_tfa_defconfig b/configs/ls2088aqds_tfa_defconfig
index 9f49736b4f..d3ee37cabe 100644
--- a/configs/ls2088aqds_tfa_defconfig
+++ b/configs/ls2088aqds_tfa_defconfig
@@ -74,3 +74,4 @@ CONFIG_DM_USB=y
 CONFIG_USB_XHCI_HCD=y
 CONFIG_USB_XHCI_DWC3=y
 CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
+CONFIG_GIC_V3_ITS=y
diff --git a/configs/ls2088ardb_qspi_SECURE_BOOT_defconfig b/configs/ls2088ardb_qspi_SECURE_BOOT_defconfig
index ae4a6820ff..9b06bf4257 100644
--- a/configs/ls2088ardb_qspi_SECURE_BOOT_defconfig
+++ b/configs/ls2088ardb_qspi_SECURE_BOOT_defconfig
@@ -59,3 +59,4 @@ CONFIG_USB_XHCI_DWC3=y
 CONFIG_RSA=y
 CONFIG_RSA_SOFTWARE_EXP=y
 CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
+CONFIG_GIC_V3_ITS=y
diff --git a/configs/ls2088ardb_qspi_defconfig b/configs/ls2088ardb_qspi_defconfig
index 1ad5f3b367..3203384c5b 100644
--- a/configs/ls2088ardb_qspi_defconfig
+++ b/configs/ls2088ardb_qspi_defconfig
@@ -63,3 +63,4 @@ CONFIG_DM_USB=y
 CONFIG_USB_XHCI_HCD=y
 CONFIG_USB_XHCI_DWC3=y
 CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
+CONFIG_GIC_V3_ITS=y
diff --git a/configs/ls2088ardb_tfa_SECURE_BOOT_defconfig b/configs/ls2088ardb_tfa_SECURE_BOOT_defconfig
index c0d0a99c8a..41a2770bb9 100644
--- a/configs/ls2088ardb_tfa_SECURE_BOOT_defconfig
+++ b/configs/ls2088ardb_tfa_SECURE_BOOT_defconfig
@@ -76,3 +76,4 @@ CONFIG_RSA=y
 CONFIG_SPL_RSA=y
 CONFIG_RSA_SOFTWARE_EXP=y
 CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
+CONFIG_GIC_V3_ITS=y
diff --git a/configs/ls2088ardb_tfa_defconfig b/configs/ls2088ardb_tfa_defconfig
index ccbaaf7a5c..b27b2c59cb 100644
--- a/configs/ls2088ardb_tfa_defconfig
+++ b/configs/ls2088ardb_tfa_defconfig
@@ -81,3 +81,4 @@ CONFIG_DM_USB=y
 CONFIG_USB_XHCI_HCD=y
 CONFIG_USB_XHCI_DWC3=y
 CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
+CONFIG_GIC_V3_ITS=y
-- 
2.17.1

^ permalink raw reply related	[flat|nested] 15+ messages in thread

* [PATCH 11/12] board: fsl: ls2080a: Initialize the GIC redistributor tables
  2020-03-19  5:38 ` [PATCH 11/12] board: fsl: ls2080a: Initialize the GIC redistributor tables Zhiqiang Hou
@ 2020-03-19 11:56   ` Bin Meng
  2020-03-20  7:35     ` Z.q. Hou
  0 siblings, 1 reply; 15+ messages in thread
From: Bin Meng @ 2020-03-19 11:56 UTC (permalink / raw)
  To: u-boot

On Thu, Mar 19, 2020 at 1:44 PM Zhiqiang Hou <Zhiqiang.Hou@nxp.com> wrote:
>
> From: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
>
> Fixup kernel DT to reserve memory for GIC redistributor tables,
> and initialize the redistributor configuration and pending
> tables using the reserved memory.
>
> Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
> ---
>  board/freescale/ls2080aqds/ls2080aqds.c | 14 ++++++++++++++
>  board/freescale/ls2080ardb/ls2080ardb.c | 14 ++++++++++++++
>  2 files changed, 28 insertions(+)
>
> diff --git a/board/freescale/ls2080aqds/ls2080aqds.c b/board/freescale/ls2080aqds/ls2080aqds.c
> index 4034bdee28..fd63e6bc76 100644
> --- a/board/freescale/ls2080aqds/ls2080aqds.c
> +++ b/board/freescale/ls2080aqds/ls2080aqds.c
> @@ -3,6 +3,7 @@
>   * Copyright 2015 Freescale Semiconductor
>   */
>  #include <common.h>
> +#include <cpu_func.h>
>  #include <env.h>
>  #include <malloc.h>
>  #include <errno.h>
> @@ -12,6 +13,7 @@
>  #include <asm/io.h>
>  #include <fdt_support.h>
>  #include <linux/libfdt.h>
> +#include <linux/sizes.h>
>  #include <fsl-mc/fsl_mc.h>
>  #include <env_internal.h>
>  #include <i2c.h>
> @@ -21,12 +23,14 @@
>  #include <fsl_sec.h>
>  #include <asm/arch/ppa.h>
>  #include <asm/arch-fsl-layerscape/fsl_icid.h>
> +#include <asm/gic-v3.h>
>
>
>  #include "../common/qixis.h"
>  #include "ls2080aqds_qixis.h"
>  #include "../common/vid.h"
>
> +#define GIC_LPI_SIZE           0x200000
>  #define PIN_MUX_SEL_SDHC       0x00
>  #define PIN_MUX_SEL_DSPI       0x0a
>  #define SCFG_QSPICLKCTRL_DIV_20        (5 << 27)
> @@ -323,6 +327,8 @@ int ft_board_setup(void *blob, bd_t *bd)
>  {
>         u64 base[CONFIG_NR_DRAM_BANKS];
>         u64 size[CONFIG_NR_DRAM_BANKS];
> +       u64 gic_lpi_base;
> +       int ret;
>
>         ft_cpu_setup(blob, bd);
>
> @@ -333,6 +339,14 @@ int ft_board_setup(void *blob, bd_t *bd)
>         size[1] = gd->bd->bi_dram[1].size;
>
>  #ifdef CONFIG_RESV_RAM
> +#ifdef CONFIG_GIC_V3_ITS
> +       gic_lpi_base = ALIGN(gd->arch.resv_ram - GIC_LPI_SIZE, SZ_64K);
> +       ret = fdt_add_resv_mem_gic_rd_tables(blob, gic_lpi_base, GIC_LPI_SIZE);
> +       if (!ret) {
> +               if (gic_lpi_tables_init(gic_lpi_base, cpu_numcores()))
> +                       debug("%s: failed to init gic-lpi-tables\n", __func__);
> +       }

Is this board-specific fix-up, or LS2080 specific? If latter, we
should put it in the LS2080 SoC codes.

> +#endif
>         /* reduce size if reserved memory is within this bank */
>         if (gd->arch.resv_ram >= base[0] &&
>             gd->arch.resv_ram < base[0] + size[0])
> diff --git a/board/freescale/ls2080ardb/ls2080ardb.c b/board/freescale/ls2080ardb/ls2080ardb.c
> index 282aaf47fb..45e645f8de 100644
> --- a/board/freescale/ls2080ardb/ls2080ardb.c
> +++ b/board/freescale/ls2080ardb/ls2080ardb.c
> @@ -4,6 +4,7 @@
>   * Copyright 2017 NXP
>   */
>  #include <common.h>
> +#include <cpu_func.h>
>  #include <env.h>
>  #include <malloc.h>
>  #include <errno.h>
> @@ -14,6 +15,7 @@
>  #include <hwconfig.h>
>  #include <fdt_support.h>
>  #include <linux/libfdt.h>
> +#include <linux/sizes.h>
>  #include <fsl-mc/fsl_mc.h>
>  #include <env_internal.h>
>  #include <efi_loader.h>
> @@ -23,6 +25,7 @@
>  #include <asm/arch/ppa.h>
>  #include <fsl_sec.h>
>  #include <asm/arch-fsl-layerscape/fsl_icid.h>
> +#include <asm/gic-v3.h>
>
>  #ifdef CONFIG_FSL_QIXIS
>  #include "../common/qixis.h"
> @@ -30,6 +33,7 @@
>  #endif
>  #include "../common/vid.h"
>
> +#define GIC_LPI_SIZE           0x200000
>  #define PIN_MUX_SEL_SDHC       0x00
>  #define PIN_MUX_SEL_DSPI       0x0a
>
> @@ -421,6 +425,8 @@ int ft_board_setup(void *blob, bd_t *bd)
>         u64 mc_memory_base = 0;
>         u64 mc_memory_size = 0;
>         u16 total_memory_banks;
> +       u64 gic_lpi_base;
> +       int ret;
>
>         ft_cpu_setup(blob, bd);
>
> @@ -441,6 +447,14 @@ int ft_board_setup(void *blob, bd_t *bd)
>         size[1] = gd->bd->bi_dram[1].size;
>
>  #ifdef CONFIG_RESV_RAM
> +#ifdef CONFIG_GIC_V3_ITS
> +       gic_lpi_base = ALIGN(gd->arch.resv_ram - GIC_LPI_SIZE, SZ_64K);
> +       ret = fdt_add_resv_mem_gic_rd_tables(blob, gic_lpi_base, GIC_LPI_SIZE);
> +       if (!ret) {
> +               if (gic_lpi_tables_init(gic_lpi_base, cpu_numcores()))
> +                       debug("%s: failed to init gic-lpi-tables\n", __func__);
> +       }

ditto

> +#endif
>         /* reduce size if reserved memory is within this bank */
>         if (gd->arch.resv_ram >= base[0] &&
>             gd->arch.resv_ram < base[0] + size[0])
> --


Regards,
Bin

^ permalink raw reply	[flat|nested] 15+ messages in thread

* [PATCH 11/12] board: fsl: ls2080a: Initialize the GIC redistributor tables
  2020-03-19 11:56   ` Bin Meng
@ 2020-03-20  7:35     ` Z.q. Hou
  0 siblings, 0 replies; 15+ messages in thread
From: Z.q. Hou @ 2020-03-20  7:35 UTC (permalink / raw)
  To: u-boot

Hi Bin,

Thanks a lot for your comments!

> -----Original Message-----
> From: Bin Meng <bmeng.cn@gmail.com>
> Sent: 2020?3?19? 19:57
> To: Z.q. Hou <zhiqiang.hou@nxp.com>
> Cc: U-Boot Mailing List <u-boot@lists.denx.de>; Priyanka Jain
> <priyanka.jain@nxp.com>
> Subject: Re: [PATCH 11/12] board: fsl: ls2080a: Initialize the GIC redistributor
> tables
> 
> On Thu, Mar 19, 2020 at 1:44 PM Zhiqiang Hou <Zhiqiang.Hou@nxp.com>
> wrote:
> >
> > From: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
> >
> > Fixup kernel DT to reserve memory for GIC redistributor tables, and
> > initialize the redistributor configuration and pending tables using
> > the reserved memory.
> >
> > Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
> > ---
> >  board/freescale/ls2080aqds/ls2080aqds.c | 14 ++++++++++++++
> > board/freescale/ls2080ardb/ls2080ardb.c | 14 ++++++++++++++
> >  2 files changed, 28 insertions(+)
> >
> > diff --git a/board/freescale/ls2080aqds/ls2080aqds.c
> > b/board/freescale/ls2080aqds/ls2080aqds.c
> > index 4034bdee28..fd63e6bc76 100644
> > --- a/board/freescale/ls2080aqds/ls2080aqds.c
> > +++ b/board/freescale/ls2080aqds/ls2080aqds.c
> > @@ -3,6 +3,7 @@
> >   * Copyright 2015 Freescale Semiconductor
> >   */
> >  #include <common.h>
> > +#include <cpu_func.h>
> >  #include <env.h>
> >  #include <malloc.h>
> >  #include <errno.h>
> > @@ -12,6 +13,7 @@
> >  #include <asm/io.h>
> >  #include <fdt_support.h>
> >  #include <linux/libfdt.h>
> > +#include <linux/sizes.h>
> >  #include <fsl-mc/fsl_mc.h>
> >  #include <env_internal.h>
> >  #include <i2c.h>
> > @@ -21,12 +23,14 @@
> >  #include <fsl_sec.h>
> >  #include <asm/arch/ppa.h>
> >  #include <asm/arch-fsl-layerscape/fsl_icid.h>
> > +#include <asm/gic-v3.h>
> >
> >
> >  #include "../common/qixis.h"
> >  #include "ls2080aqds_qixis.h"
> >  #include "../common/vid.h"
> >
> > +#define GIC_LPI_SIZE           0x200000
> >  #define PIN_MUX_SEL_SDHC       0x00
> >  #define PIN_MUX_SEL_DSPI       0x0a
> >  #define SCFG_QSPICLKCTRL_DIV_20        (5 << 27)
> > @@ -323,6 +327,8 @@ int ft_board_setup(void *blob, bd_t *bd)  {
> >         u64 base[CONFIG_NR_DRAM_BANKS];
> >         u64 size[CONFIG_NR_DRAM_BANKS];
> > +       u64 gic_lpi_base;
> > +       int ret;
> >
> >         ft_cpu_setup(blob, bd);
> >
> > @@ -333,6 +339,14 @@ int ft_board_setup(void *blob, bd_t *bd)
> >         size[1] = gd->bd->bi_dram[1].size;
> >
> >  #ifdef CONFIG_RESV_RAM
> > +#ifdef CONFIG_GIC_V3_ITS
> > +       gic_lpi_base = ALIGN(gd->arch.resv_ram - GIC_LPI_SIZE,
> SZ_64K);
> > +       ret = fdt_add_resv_mem_gic_rd_tables(blob, gic_lpi_base,
> GIC_LPI_SIZE);
> > +       if (!ret) {
> > +               if (gic_lpi_tables_init(gic_lpi_base, cpu_numcores()))
> > +                       debug("%s: failed to init gic-lpi-tables\n",
> __func__);
> > +       }
> 
> Is this board-specific fix-up, or LS2080 specific? If latter, we should put it in
> the LS2080 SoC codes.

It's a SoC level fixup, I'll refine the series in v2.

Thanks,
Zhiqiang

> 
> > +#endif
> >         /* reduce size if reserved memory is within this bank */
> >         if (gd->arch.resv_ram >= base[0] &&
> >             gd->arch.resv_ram < base[0] + size[0]) diff --git
> > a/board/freescale/ls2080ardb/ls2080ardb.c
> > b/board/freescale/ls2080ardb/ls2080ardb.c
> > index 282aaf47fb..45e645f8de 100644
> > --- a/board/freescale/ls2080ardb/ls2080ardb.c
> > +++ b/board/freescale/ls2080ardb/ls2080ardb.c
> > @@ -4,6 +4,7 @@
> >   * Copyright 2017 NXP
> >   */
> >  #include <common.h>
> > +#include <cpu_func.h>
> >  #include <env.h>
> >  #include <malloc.h>
> >  #include <errno.h>
> > @@ -14,6 +15,7 @@
> >  #include <hwconfig.h>
> >  #include <fdt_support.h>
> >  #include <linux/libfdt.h>
> > +#include <linux/sizes.h>
> >  #include <fsl-mc/fsl_mc.h>
> >  #include <env_internal.h>
> >  #include <efi_loader.h>
> > @@ -23,6 +25,7 @@
> >  #include <asm/arch/ppa.h>
> >  #include <fsl_sec.h>
> >  #include <asm/arch-fsl-layerscape/fsl_icid.h>
> > +#include <asm/gic-v3.h>
> >
> >  #ifdef CONFIG_FSL_QIXIS
> >  #include "../common/qixis.h"
> > @@ -30,6 +33,7 @@
> >  #endif
> >  #include "../common/vid.h"
> >
> > +#define GIC_LPI_SIZE           0x200000
> >  #define PIN_MUX_SEL_SDHC       0x00
> >  #define PIN_MUX_SEL_DSPI       0x0a
> >
> > @@ -421,6 +425,8 @@ int ft_board_setup(void *blob, bd_t *bd)
> >         u64 mc_memory_base = 0;
> >         u64 mc_memory_size = 0;
> >         u16 total_memory_banks;
> > +       u64 gic_lpi_base;
> > +       int ret;
> >
> >         ft_cpu_setup(blob, bd);
> >
> > @@ -441,6 +447,14 @@ int ft_board_setup(void *blob, bd_t *bd)
> >         size[1] = gd->bd->bi_dram[1].size;
> >
> >  #ifdef CONFIG_RESV_RAM
> > +#ifdef CONFIG_GIC_V3_ITS
> > +       gic_lpi_base = ALIGN(gd->arch.resv_ram - GIC_LPI_SIZE,
> SZ_64K);
> > +       ret = fdt_add_resv_mem_gic_rd_tables(blob, gic_lpi_base,
> GIC_LPI_SIZE);
> > +       if (!ret) {
> > +               if (gic_lpi_tables_init(gic_lpi_base, cpu_numcores()))
> > +                       debug("%s: failed to init gic-lpi-tables\n",
> __func__);
> > +       }
> 
> ditto
> 
> > +#endif
> >         /* reduce size if reserved memory is within this bank */
> >         if (gd->arch.resv_ram >= base[0] &&
> >             gd->arch.resv_ram < base[0] + size[0])
> > --
> 
> 
> Regards,
> Bin

^ permalink raw reply	[flat|nested] 15+ messages in thread

end of thread, other threads:[~2020-03-20  7:35 UTC | newest]

Thread overview: 15+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2020-03-19  5:38 [PATCH 00/12] fsl: layerscape: Initialize the GIC redistributor Zhiqiang Hou
2020-03-19  5:38 ` [PATCH 01/12] board: lx2160a: Add header file cpu_func.h Zhiqiang Hou
2020-03-19  5:38 ` [PATCH 02/12] arm64: fsl-layerscape: Assign addr to resv_ram if enabled RESV_RAM config Zhiqiang Hou
2020-03-19  5:38 ` [PATCH 03/12] arm64: layerscape: Move the GIC tables reserve memory function to soc.c Zhiqiang Hou
2020-03-19  5:38 ` [PATCH 04/12] board: lx2160a: Don't program the GIC RD tables if failed to reserve memory Zhiqiang Hou
2020-03-19  5:38 ` [PATCH 05/12] board: lx2160a: Make sure the RD tables address align to 64KB Zhiqiang Hou
2020-03-19  5:38 ` [PATCH 06/12] fsl-layerscape: Kconfig: Select RESV_RAM config if GIC_V3_ITS is enabled Zhiqiang Hou
2020-03-19  5:38 ` [PATCH 07/12] board: fsl: ls1088a: Initialize the GIC redistributor tables Zhiqiang Hou
2020-03-19  5:38 ` [PATCH 08/12] configs: ls1088a: Enable GIC_V3_ITS config Zhiqiang Hou
2020-03-19  5:38 ` [PATCH 09/12] board: fsl: ls1028a: Initialize the GIC redistributor tables Zhiqiang Hou
2020-03-19  5:38 ` [PATCH 10/12] configs: ls1028a: Enable GIC_V3_ITS config Zhiqiang Hou
2020-03-19  5:38 ` [PATCH 11/12] board: fsl: ls2080a: Initialize the GIC redistributor tables Zhiqiang Hou
2020-03-19 11:56   ` Bin Meng
2020-03-20  7:35     ` Z.q. Hou
2020-03-19  5:38 ` [PATCH 12/12] configs: ls208xa: Enable GIC_V3_ITS config Zhiqiang Hou

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