* [igt-dev] [PATCH i-g-t 0/3] Test configurable poll delay in perf OA
@ 2020-03-19 22:52 Umesh Nerlige Ramappa
2020-03-19 22:52 ` [igt-dev] [PATCH i-g-t 1/3] include/drm-uapi: Update i915_drm.h for perf OA APIs Umesh Nerlige Ramappa
` (4 more replies)
0 siblings, 5 replies; 12+ messages in thread
From: Umesh Nerlige Ramappa @ 2020-03-19 22:52 UTC (permalink / raw)
To: igt-dev, Lionel G Landwerlin, Ashutosh Dixit
Add tests that verify the configurable poll delay in perf OA.
Lionel Landwerlin (2):
include/drm-uapi: Update i915_drm.h for perf OA APIs
tests/perf: new tests for parameterized OA buffer polling
Umesh Nerlige Ramappa (1):
tools: Allow user to set poll delay in i915 perf recorder
include/drm-uapi/i915_drm.h | 24 +++++
tests/perf.c | 144 ++++++++++++++++++++-------
tools/i915-perf/i915_perf_recorder.c | 37 ++++++-
3 files changed, 164 insertions(+), 41 deletions(-)
--
2.20.1
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^ permalink raw reply [flat|nested] 12+ messages in thread
* [igt-dev] [PATCH i-g-t 1/3] include/drm-uapi: Update i915_drm.h for perf OA APIs
2020-03-19 22:52 [igt-dev] [PATCH i-g-t 0/3] Test configurable poll delay in perf OA Umesh Nerlige Ramappa
@ 2020-03-19 22:52 ` Umesh Nerlige Ramappa
2020-03-25 19:16 ` Dixit, Ashutosh
2020-03-19 22:52 ` [igt-dev] [PATCH i-g-t 2/3] tests/perf: new tests for parameterized OA buffer polling Umesh Nerlige Ramappa
` (3 subsequent siblings)
4 siblings, 1 reply; 12+ messages in thread
From: Umesh Nerlige Ramappa @ 2020-03-19 22:52 UTC (permalink / raw)
To: igt-dev, Lionel G Landwerlin, Ashutosh Dixit
From: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Add APIs to configure poll delay in perf OA.
v2: (Umesh)
- Remove interrupt and flush APIs
- Change commit message
v3: (Umesh)
- Rebase
- Rename uapi parameter used to set poll timer interval
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
---
include/drm-uapi/i915_drm.h | 24 ++++++++++++++++++++++++
1 file changed, 24 insertions(+)
diff --git a/include/drm-uapi/i915_drm.h b/include/drm-uapi/i915_drm.h
index 3794e768..594a42d1 100644
--- a/include/drm-uapi/i915_drm.h
+++ b/include/drm-uapi/i915_drm.h
@@ -1969,6 +1969,30 @@ enum drm_i915_perf_property_id {
*/
DRM_I915_PERF_PROP_HOLD_PREEMPTION,
+ /**
+ * Specifying this pins all contexts to the specified SSEU power
+ * configuration for the duration of the recording.
+ *
+ * This parameter's value is a pointer to a struct
+ * drm_i915_gem_context_param_sseu.
+ *
+ * This property is available in perf revision 4.
+ */
+ DRM_I915_PERF_PROP_GLOBAL_SSEU,
+
+ /**
+ * This optional parameter specifies the timer interval in nanoseconds
+ * at which the i915 driver will check the OA buffer for available data.
+ * Minimum allowed value is 100 microseconds. A default value is used by
+ * the driver if this parameter is not specified. Note that a large
+ * value may reduce cpu consumption during OA perf captures, but it
+ * would also potentially result in OA buffer overwrite as the captures
+ * reach end of the OA buffer.
+ *
+ * This property is available in perf revision 5.
+ */
+ DRM_I915_PERF_PROP_POLL_OA_PERIOD,
+
DRM_I915_PERF_PROP_MAX /* non-ABI */
};
--
2.20.1
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^ permalink raw reply related [flat|nested] 12+ messages in thread
* [igt-dev] [PATCH i-g-t 2/3] tests/perf: new tests for parameterized OA buffer polling
2020-03-19 22:52 [igt-dev] [PATCH i-g-t 0/3] Test configurable poll delay in perf OA Umesh Nerlige Ramappa
2020-03-19 22:52 ` [igt-dev] [PATCH i-g-t 1/3] include/drm-uapi: Update i915_drm.h for perf OA APIs Umesh Nerlige Ramappa
@ 2020-03-19 22:52 ` Umesh Nerlige Ramappa
2020-03-25 19:37 ` Dixit, Ashutosh
2020-03-19 22:52 ` [igt-dev] [PATCH i-g-t 3/3] tools: Allow user to set poll delay in i915 perf recorder Umesh Nerlige Ramappa
` (2 subsequent siblings)
4 siblings, 1 reply; 12+ messages in thread
From: Umesh Nerlige Ramappa @ 2020-03-19 22:52 UTC (permalink / raw)
To: igt-dev, Lionel G Landwerlin, Ashutosh Dixit
From: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
2 new tests verifying that the OA buffer is properly checked at the
frequency specified by userspace.
v2: (Umesh)
- Capture start_times in test_polling
- Second parameterized test used a 500us hrtimer. Occassionally, this
timing does not fall within the duration/100 requirement for the time
spent in kernel. Change this value to 2ms to accommodate all
platforms.
v3: (Lionel)
- Use NUM_PROPERTIES
v4: (Umesh)
- Update poll parameter name
- Update perf revision check to 5 in new tests
- Fix oa sampling rate message in igt_debug prints
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
---
tests/perf.c | 144 +++++++++++++++++++++++++++++++++++++--------------
1 file changed, 106 insertions(+), 38 deletions(-)
diff --git a/tests/perf.c b/tests/perf.c
index 724f6f80..8f6537d6 100644
--- a/tests/perf.c
+++ b/tests/perf.c
@@ -234,6 +234,24 @@ get_oa_format(enum drm_i915_oa_format format)
return gen8_oa_formats[format];
}
+static char *
+pretty_print_oa_period(uint64_t oa_period_ns)
+{
+ static char result[100];
+ static const char *units[4] = { "ns", "us", "ms", "s" };
+ double val = oa_period_ns;
+ int iter = 0;
+
+ while (iter < (ARRAY_SIZE(units) - 1) &&
+ val >= 1000.0f) {
+ val /= 1000.0f;
+ iter++;
+ }
+
+ snprintf(result, sizeof(result), "%.3f%s", val, units[iter]);
+ return result;
+}
+
static void
__perf_close(int fd)
{
@@ -1921,15 +1939,9 @@ get_time(void)
* kernelspace.
*/
static void
-test_blocking(void)
+test_blocking(uint64_t requested_oa_period, bool set_kernel_hrtimer, uint64_t kernel_hrtimer)
{
- /* ~40 milliseconds
- *
- * Having a period somewhat > sysconf(_SC_CLK_TCK) helps to stop
- * scheduling (liable to kick in when we make blocking poll()s/reads)
- * from interfering with the test.
- */
- int oa_exponent = max_oa_exponent_for_period_lte(40000000);
+ int oa_exponent = max_oa_exponent_for_period_lte(requested_oa_period);
uint64_t oa_period = oa_exponent_to_ns(oa_exponent);
uint64_t properties[] = {
/* Include OA reports in samples */
@@ -1939,11 +1951,16 @@ test_blocking(void)
DRM_I915_PERF_PROP_OA_METRICS_SET, test_set->perf_oa_metrics_set,
DRM_I915_PERF_PROP_OA_FORMAT, test_set->perf_oa_format,
DRM_I915_PERF_PROP_OA_EXPONENT, oa_exponent,
+
+ /* Kernel configuration (optional) */
+ DRM_I915_PERF_PROP_POLL_OA_PERIOD, kernel_hrtimer,
};
struct drm_i915_perf_open_param param = {
.flags = I915_PERF_FLAG_FD_CLOEXEC |
I915_PERF_FLAG_DISABLED,
- .num_properties = sizeof(properties) / 16,
+ .num_properties = set_kernel_hrtimer ?
+ NUM_PROPERTIES(properties) :
+ NUM_PROPERTIES(properties) - 1,
.properties_ptr = to_user_pointer(properties),
};
uint8_t buf[1024 * 1024];
@@ -1965,7 +1982,7 @@ test_blocking(void)
* the knowledge that that the driver uses a 200Hz hrtimer (5ms period)
* to check for data and giving some time to read().
*/
- int min_iterations = (test_duration_ns / (oa_period + 6000000ull));
+ int min_iterations = (test_duration_ns / (oa_period + kernel_hrtimer + kernel_hrtimer / 5));
int64_t start, end;
int n = 0;
@@ -1975,9 +1992,10 @@ test_blocking(void)
times(&start_times);
igt_debug("tick length = %dns, test duration = %"PRIu64"ns, min iter. = %d,"
- " estimated max iter. = %d, oa_period = %"PRIu64"ns\n",
+ " estimated max iter. = %d, oa_period = %s\n",
(int)tick_ns, test_duration_ns,
- min_iterations, max_iterations, oa_period);
+ min_iterations, max_iterations,
+ pretty_print_oa_period(oa_period));
/* In the loop we perform blocking polls while the HW is sampling at
* ~25Hz, with the expectation that we spend most of our time blocked
@@ -2052,8 +2070,8 @@ test_blocking(void)
user_ns = (end_times.tms_utime - start_times.tms_utime) * tick_ns;
kernel_ns = (end_times.tms_stime - start_times.tms_stime) * tick_ns;
- igt_debug("%d blocking reads during test with ~25Hz OA sampling (expect no more than %d)\n",
- n, max_iterations);
+ igt_debug("%d blocking reads during test with %lu Hz OA sampling (expect no more than %d)\n",
+ n, NSEC_PER_SEC / oa_period, max_iterations);
igt_debug("%d extra iterations seen, not related to periodic sampling (e.g. context switches)\n",
n_extra_iterations);
igt_debug("time in userspace = %"PRIu64"ns (+-%dns) (start utime = %d, end = %d)\n",
@@ -2079,15 +2097,9 @@ test_blocking(void)
}
static void
-test_polling(void)
+test_polling(uint64_t requested_oa_period, bool set_kernel_hrtimer, uint64_t kernel_hrtimer)
{
- /* ~40 milliseconds
- *
- * Having a period somewhat > sysconf(_SC_CLK_TCK) helps to stop
- * scheduling (liable to kick in when we make blocking poll()s/reads)
- * from interfering with the test.
- */
- int oa_exponent = max_oa_exponent_for_period_lte(40000000);
+ int oa_exponent = max_oa_exponent_for_period_lte(requested_oa_period);
uint64_t oa_period = oa_exponent_to_ns(oa_exponent);
uint64_t properties[] = {
/* Include OA reports in samples */
@@ -2097,12 +2109,17 @@ test_polling(void)
DRM_I915_PERF_PROP_OA_METRICS_SET, test_set->perf_oa_metrics_set,
DRM_I915_PERF_PROP_OA_FORMAT, test_set->perf_oa_format,
DRM_I915_PERF_PROP_OA_EXPONENT, oa_exponent,
+
+ /* Kernel configuration (optional) */
+ DRM_I915_PERF_PROP_POLL_OA_PERIOD, kernel_hrtimer,
};
struct drm_i915_perf_open_param param = {
.flags = I915_PERF_FLAG_FD_CLOEXEC |
I915_PERF_FLAG_DISABLED |
I915_PERF_FLAG_FD_NONBLOCK,
- .num_properties = sizeof(properties) / 16,
+ .num_properties = set_kernel_hrtimer ?
+ NUM_PROPERTIES(properties) :
+ NUM_PROPERTIES(properties) - 1,
.properties_ptr = to_user_pointer(properties),
};
uint8_t buf[1024 * 1024];
@@ -2116,15 +2133,16 @@ test_polling(void)
int n_extra_iterations = 0;
/* It's a bit tricky to put a lower limit here, but we expect a
- * relatively low latency for seeing reports, while we don't currently
- * give any control over this in the api.
+ * relatively low latency for seeing reports.
*
- * We assume a maximum latency of 6 millisecond to deliver a POLLIN and
- * read() after a new sample is written (46ms per iteration) considering
- * the knowledge that that the driver uses a 200Hz hrtimer (5ms period)
- * to check for data and giving some time to read().
+ * We assume a maximum latency of kernel_hrtimer + some margin
+ * to deliver a POLLIN and read() after a new sample is
+ * written (40ms + hrtimer + margin per iteration) considering
+ * the knowledge that that the driver uses a 200Hz hrtimer
+ * (5ms period) to check for data and giving some time to
+ * read().
*/
- int min_iterations = (test_duration_ns / (oa_period + 6000000ull));
+ int min_iterations = (test_duration_ns / (oa_period + (kernel_hrtimer + kernel_hrtimer / 5)));
int64_t start, end;
int n = 0;
@@ -2132,8 +2150,9 @@ test_polling(void)
times(&start_times);
- igt_debug("tick length = %dns, test duration = %"PRIu64"ns, min iter. = %d, max iter. = %d\n",
- (int)tick_ns, test_duration_ns,
+ igt_debug("tick length = %dns, oa period = %s, "
+ "test duration = %"PRIu64"ns, min iter. = %d, max iter. = %d\n",
+ (int)tick_ns, pretty_print_oa_period(oa_period), test_duration_ns,
min_iterations, max_iterations);
/* In the loop we perform blocking polls while the HW is sampling at
@@ -2239,8 +2258,8 @@ test_polling(void)
user_ns = (end_times.tms_utime - start_times.tms_utime) * tick_ns;
kernel_ns = (end_times.tms_stime - start_times.tms_stime) * tick_ns;
- igt_debug("%d blocking reads during test with ~25Hz OA sampling (expect no more than %d)\n",
- n, max_iterations);
+ igt_debug("%d non-blocking reads during test with %lu Hz OA sampling (expect no more than %d)\n",
+ n, NSEC_PER_SEC / oa_period, max_iterations);
igt_debug("%d extra iterations seen, not related to periodic sampling (e.g. context switches)\n",
n_extra_iterations);
igt_debug("time in userspace = %"PRIu64"ns (+-%dns) (start utime = %d, end = %d)\n",
@@ -4588,6 +4607,23 @@ test_sysctl_defaults(void)
igt_assert_eq(max_freq, 100000);
}
+static int i915_perf_revision(int fd)
+{
+ drm_i915_getparam_t gp;
+ int value = 1, ret;
+
+ gp.param = I915_PARAM_PERF_REVISION;
+ gp.value = &value;
+ ret = igt_ioctl(drm_fd, DRM_IOCTL_I915_GETPARAM, &gp);
+ if (ret == -1) {
+ /* If the param is missing, consider version 1. */
+ igt_assert_eq(errno, EINVAL);
+ return 1;
+ }
+
+ return value;
+}
+
igt_main
{
igt_fixture {
@@ -4670,11 +4706,43 @@ igt_main
igt_subtest("enable-disable")
test_enable_disable();
- igt_subtest("blocking")
- test_blocking();
+ igt_describe("Test blocking read with default hrtimer frequency");
+ igt_subtest("blocking") {
+ test_blocking(40 * 1000 * 1000 /* 40ms oa period */,
+ false /* set_kernel_hrtimer */,
+ 5 * 1000 * 1000 /* default 5ms/200Hz hrtimer */);
+ }
+
+ igt_describe("Test blocking read with different hrtimer frequencies");
+ igt_subtest("blocking-parameterized") {
+ igt_require(i915_perf_revision(drm_fd) >= 5);
+
+ test_blocking(10 * 1000 * 1000 /* 10ms oa period */,
+ true /* set_kernel_hrtimer */,
+ 40 * 1000 * 1000 /* default 40ms hrtimer */);
+ test_blocking(500 * 1000 /* 500us oa period */,
+ true /* set_kernel_hrtimer */,
+ 2 * 1000 * 1000 /* default 2ms hrtimer */);
+ }
- igt_subtest("polling")
- test_polling();
+ igt_describe("Test polled read with default hrtimer frequency");
+ igt_subtest("polling") {
+ test_polling(40 * 1000 * 1000 /* 40ms oa period */,
+ false /* set_kernel_hrtimer */,
+ 5 * 1000 * 1000 /* default 5ms/200Hz hrtimer */);
+ }
+
+ igt_describe("Test polled read with different hrtimer frequencies");
+ igt_subtest("polling-parameterized") {
+ igt_require(i915_perf_revision(drm_fd) >= 5);
+
+ test_polling(10 * 1000 * 1000 /* 10ms oa period */,
+ true /* set_kernel_hrtimer */,
+ 40 * 1000 * 1000 /* default 40ms hrtimer */);
+ test_polling(500 * 1000 /* 500us oa period */,
+ true /* set_kernel_hrtimer */,
+ 2 * 1000 * 1000 /* default 2ms hrtimer */);
+ }
igt_subtest("short-reads")
test_short_reads();
--
2.20.1
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^ permalink raw reply related [flat|nested] 12+ messages in thread
* [igt-dev] [PATCH i-g-t 3/3] tools: Allow user to set poll delay in i915 perf recorder
2020-03-19 22:52 [igt-dev] [PATCH i-g-t 0/3] Test configurable poll delay in perf OA Umesh Nerlige Ramappa
2020-03-19 22:52 ` [igt-dev] [PATCH i-g-t 1/3] include/drm-uapi: Update i915_drm.h for perf OA APIs Umesh Nerlige Ramappa
2020-03-19 22:52 ` [igt-dev] [PATCH i-g-t 2/3] tests/perf: new tests for parameterized OA buffer polling Umesh Nerlige Ramappa
@ 2020-03-19 22:52 ` Umesh Nerlige Ramappa
2020-03-25 19:06 ` Dixit, Ashutosh
2020-03-19 23:36 ` [igt-dev] ✓ Fi.CI.BAT: success for Test configurable poll delay in perf OA (rev3) Patchwork
2020-03-20 2:35 ` [igt-dev] ✗ Fi.CI.IGT: failure " Patchwork
4 siblings, 1 reply; 12+ messages in thread
From: Umesh Nerlige Ramappa @ 2020-03-19 22:52 UTC (permalink / raw)
To: igt-dev, Lionel G Landwerlin, Ashutosh Dixit
Add poll delay parameter to the i915-perf-recorder tool so that the user
can set the frequency of the poll timer that checks for available
reports in the OA buffer.
v2:
- Change poll period parameter type to match kernel interface (Lionel)
- Update to use poll period in the code (Ashutosh)
Signed-off-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
---
tools/i915-perf/i915_perf_recorder.c | 37 +++++++++++++++++++++++++---
1 file changed, 34 insertions(+), 3 deletions(-)
diff --git a/tools/i915-perf/i915_perf_recorder.c b/tools/i915-perf/i915_perf_recorder.c
index 6bbc451e..ca4f13ea 100644
--- a/tools/i915-perf/i915_perf_recorder.c
+++ b/tools/i915-perf/i915_perf_recorder.c
@@ -353,14 +353,31 @@ struct recording_context {
const char *command_fifo;
int command_fifo_fd;
+
+ uint64_t poll_period;
};
+static int
+perf_revision(int drm_fd)
+{
+ drm_i915_getparam_t gp;
+ int value = 1;
+
+ gp.param = I915_PARAM_PERF_REVISION;
+ gp.value = &value;
+ perf_ioctl(drm_fd, DRM_IOCTL_I915_GETPARAM, &gp);
+
+ return value;
+}
+
static int
perf_open(struct recording_context *ctx)
{
uint64_t properties[DRM_I915_PERF_PROP_MAX * 2];
struct drm_i915_perf_open_param param;
- int p = 0, stream_fd;
+ int p = 0, stream_fd, revision;
+
+ revision = perf_revision(ctx->drm_fd);
properties[p++] = DRM_I915_PERF_PROP_SAMPLE_OA;
properties[p++] = true;
@@ -374,6 +391,11 @@ perf_open(struct recording_context *ctx)
properties[p++] = DRM_I915_PERF_PROP_OA_EXPONENT;
properties[p++] = ctx->oa_exponent;
+ if (revision >= 4) {
+ properties[p++] = DRM_I915_PERF_PROP_POLL_OA_PERIOD;
+ properties[p++] = ctx->poll_period;
+ }
+
memset(¶m, 0, sizeof(param));
param.flags = 0;
param.flags |= I915_PERF_FLAG_FD_CLOEXEC | I915_PERF_FLAG_FD_NONBLOCK;
@@ -720,7 +742,10 @@ usage(const char *name)
" (To use with i915-perf-control)\n"
" --output, -o <path> Output file (default = i915_perf.record)\n"
" --cpu-clock, -k <path> Cpu clock to use for correlations\n"
- " Values: boot, mono, mono_raw (default = mono)\n",
+ " Values: boot, mono, mono_raw (default = mono)\n"
+ " --poll-delay -P <value> Polling interval in microseconds used by a timer in the driver to query\n"
+ " for OA reports periodically\n"
+ " (default = 5000), Minimum = 100.\n",
name);
}
@@ -762,6 +787,7 @@ main(int argc, char *argv[])
{"size", required_argument, 0, 's'},
{"command-fifo", required_argument, 0, 'f'},
{"cpu-clock", required_argument, 0, 'k'},
+ {"poll-delay", required_argument, 0, 'P'},
{0, 0, 0, 0}
};
const struct {
@@ -788,9 +814,11 @@ main(int argc, char *argv[])
.command_fifo = I915_PERF_RECORD_FIFO_PATH,
.command_fifo_fd = -1,
+
+ .poll_period = 5 * 1000 * 1000,
};
- while ((opt = getopt_long(argc, argv, "hc:p:m:Co:s:f:k:", long_options, NULL)) != -1) {
+ while ((opt = getopt_long(argc, argv, "hc:p:m:Co:s:f:k:P:", long_options, NULL)) != -1) {
switch (opt) {
case 'h':
usage(argv[0]);
@@ -832,6 +860,9 @@ main(int argc, char *argv[])
}
break;
}
+ case 'P':
+ ctx.poll_period = MAX(100, atol(optarg)) * 1000;
+ break;
default:
fprintf(stderr, "Internal error: "
"unexpected getopt value: %d\n", opt);
--
2.20.1
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^ permalink raw reply related [flat|nested] 12+ messages in thread
* [igt-dev] ✓ Fi.CI.BAT: success for Test configurable poll delay in perf OA (rev3)
2020-03-19 22:52 [igt-dev] [PATCH i-g-t 0/3] Test configurable poll delay in perf OA Umesh Nerlige Ramappa
` (2 preceding siblings ...)
2020-03-19 22:52 ` [igt-dev] [PATCH i-g-t 3/3] tools: Allow user to set poll delay in i915 perf recorder Umesh Nerlige Ramappa
@ 2020-03-19 23:36 ` Patchwork
2020-03-20 2:35 ` [igt-dev] ✗ Fi.CI.IGT: failure " Patchwork
4 siblings, 0 replies; 12+ messages in thread
From: Patchwork @ 2020-03-19 23:36 UTC (permalink / raw)
To: Umesh Nerlige Ramappa; +Cc: igt-dev
== Series Details ==
Series: Test configurable poll delay in perf OA (rev3)
URL : https://patchwork.freedesktop.org/series/74655/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_8161 -> IGTPW_4332
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4332/index.html
Known issues
------------
Here are the changes found in IGTPW_4332 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@i915_selftest@live@ring_submission:
- fi-bwr-2160: [PASS][1] -> [INCOMPLETE][2] ([i915#489])
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8161/fi-bwr-2160/igt@i915_selftest@live@ring_submission.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4332/fi-bwr-2160/igt@i915_selftest@live@ring_submission.html
* igt@kms_chamelium@hdmi-hpd-fast:
- fi-kbl-7500u: [PASS][3] -> [FAIL][4] ([i915#323])
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8161/fi-kbl-7500u/igt@kms_chamelium@hdmi-hpd-fast.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4332/fi-kbl-7500u/igt@kms_chamelium@hdmi-hpd-fast.html
#### Possible fixes ####
* igt@i915_pm_rpm@module-reload:
- fi-icl-dsi: [INCOMPLETE][5] ([i915#189]) -> [PASS][6]
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8161/fi-icl-dsi/igt@i915_pm_rpm@module-reload.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4332/fi-icl-dsi/igt@i915_pm_rpm@module-reload.html
* igt@i915_selftest@live@execlists:
- {fi-ehl-1}: [INCOMPLETE][7] -> [PASS][8]
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8161/fi-ehl-1/igt@i915_selftest@live@execlists.html
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4332/fi-ehl-1/igt@i915_selftest@live@execlists.html
- fi-kbl-soraka: [INCOMPLETE][9] ([fdo#112259] / [i915#656]) -> [PASS][10]
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8161/fi-kbl-soraka/igt@i915_selftest@live@execlists.html
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4332/fi-kbl-soraka/igt@i915_selftest@live@execlists.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#112259]: https://bugs.freedesktop.org/show_bug.cgi?id=112259
[i915#189]: https://gitlab.freedesktop.org/drm/intel/issues/189
[i915#323]: https://gitlab.freedesktop.org/drm/intel/issues/323
[i915#489]: https://gitlab.freedesktop.org/drm/intel/issues/489
[i915#656]: https://gitlab.freedesktop.org/drm/intel/issues/656
Participating hosts (36 -> 41)
------------------------------
Additional (7): fi-bdw-5557u fi-kbl-7560u fi-bsw-n3050 fi-ivb-3770 fi-cfl-8109u fi-blb-e6850 fi-skl-6600u
Missing (2): fi-byt-clapper fi-bsw-cyan
Build changes
-------------
* CI: CI-20190529 -> None
* IGT: IGT_5523 -> IGTPW_4332
CI-20190529: 20190529
CI_DRM_8161: b2b8d8634bf653904ef3268ca7ccedf51f6405af @ git://anongit.freedesktop.org/gfx-ci/linux
IGTPW_4332: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4332/index.html
IGT_5523: cf6d524007ac51a7d5a48503ea3dd5f01fd4ebab @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
== Testlist changes ==
+igt@perf@blocking-parameterized
+igt@perf@polling-parameterized
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4332/index.html
_______________________________________________
igt-dev mailing list
igt-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/igt-dev
^ permalink raw reply [flat|nested] 12+ messages in thread
* [igt-dev] ✗ Fi.CI.IGT: failure for Test configurable poll delay in perf OA (rev3)
2020-03-19 22:52 [igt-dev] [PATCH i-g-t 0/3] Test configurable poll delay in perf OA Umesh Nerlige Ramappa
` (3 preceding siblings ...)
2020-03-19 23:36 ` [igt-dev] ✓ Fi.CI.BAT: success for Test configurable poll delay in perf OA (rev3) Patchwork
@ 2020-03-20 2:35 ` Patchwork
4 siblings, 0 replies; 12+ messages in thread
From: Patchwork @ 2020-03-20 2:35 UTC (permalink / raw)
To: Umesh Nerlige Ramappa; +Cc: igt-dev
== Series Details ==
Series: Test configurable poll delay in perf OA (rev3)
URL : https://patchwork.freedesktop.org/series/74655/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_8161_full -> IGTPW_4332_full
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with IGTPW_4332_full absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in IGTPW_4332_full, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4332/index.html
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in IGTPW_4332_full:
### IGT changes ###
#### Possible regressions ####
* igt@kms_hdr@static-toggle-dpms:
- shard-tglb: NOTRUN -> [SKIP][1] +2 similar issues
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4332/shard-tglb1/igt@kms_hdr@static-toggle-dpms.html
* {igt@perf@blocking-parameterized} (NEW):
- shard-iclb: NOTRUN -> [SKIP][2] +1 similar issue
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4332/shard-iclb1/igt@perf@blocking-parameterized.html
#### Warnings ####
* igt@gem_userptr_blits@map-fixed-invalidate-busy@gtt:
- shard-hsw: [DMESG-WARN][3] ([i915#478]) -> [DMESG-WARN][4]
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8161/shard-hsw7/igt@gem_userptr_blits@map-fixed-invalidate-busy@gtt.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4332/shard-hsw1/igt@gem_userptr_blits@map-fixed-invalidate-busy@gtt.html
New tests
---------
New tests have been introduced between CI_DRM_8161_full and IGTPW_4332_full:
### New IGT tests (2) ###
* igt@perf@blocking-parameterized:
- Statuses : 7 skip(s)
- Exec time: [0.0] s
* igt@perf@polling-parameterized:
- Statuses : 6 skip(s)
- Exec time: [0.0] s
Known issues
------------
Here are the changes found in IGTPW_4332_full that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@gem_exec_schedule@implicit-both-bsd2:
- shard-iclb: [PASS][5] -> [SKIP][6] ([fdo#109276] / [i915#677])
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8161/shard-iclb4/igt@gem_exec_schedule@implicit-both-bsd2.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4332/shard-iclb7/igt@gem_exec_schedule@implicit-both-bsd2.html
* igt@gem_exec_schedule@in-order-bsd:
- shard-iclb: [PASS][7] -> [SKIP][8] ([fdo#112146]) +2 similar issues
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8161/shard-iclb3/igt@gem_exec_schedule@in-order-bsd.html
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4332/shard-iclb1/igt@gem_exec_schedule@in-order-bsd.html
* igt@gem_exec_schedule@pi-common-bsd:
- shard-iclb: [PASS][9] -> [SKIP][10] ([i915#677]) +1 similar issue
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8161/shard-iclb8/igt@gem_exec_schedule@pi-common-bsd.html
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4332/shard-iclb1/igt@gem_exec_schedule@pi-common-bsd.html
* igt@gem_exec_suspend@basic-s3:
- shard-kbl: [PASS][11] -> [DMESG-WARN][12] ([i915#180]) +1 similar issue
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8161/shard-kbl2/igt@gem_exec_suspend@basic-s3.html
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4332/shard-kbl2/igt@gem_exec_suspend@basic-s3.html
* igt@gem_ppgtt@flink-and-close-vma-leak:
- shard-apl: [PASS][13] -> [FAIL][14] ([i915#644])
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8161/shard-apl6/igt@gem_ppgtt@flink-and-close-vma-leak.html
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4332/shard-apl4/igt@gem_ppgtt@flink-and-close-vma-leak.html
* igt@kms_cursor_crc@pipe-a-cursor-128x128-sliding:
- shard-apl: [PASS][15] -> [FAIL][16] ([i915#54])
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8161/shard-apl2/igt@kms_cursor_crc@pipe-a-cursor-128x128-sliding.html
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4332/shard-apl1/igt@kms_cursor_crc@pipe-a-cursor-128x128-sliding.html
- shard-kbl: [PASS][17] -> [FAIL][18] ([i915#54])
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8161/shard-kbl2/igt@kms_cursor_crc@pipe-a-cursor-128x128-sliding.html
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4332/shard-kbl7/igt@kms_cursor_crc@pipe-a-cursor-128x128-sliding.html
* igt@kms_cursor_legacy@2x-long-flip-vs-cursor-atomic:
- shard-glk: [PASS][19] -> [FAIL][20] ([i915#72])
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8161/shard-glk9/igt@kms_cursor_legacy@2x-long-flip-vs-cursor-atomic.html
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4332/shard-glk6/igt@kms_cursor_legacy@2x-long-flip-vs-cursor-atomic.html
* igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-mmap-cpu:
- shard-kbl: [PASS][21] -> [FAIL][22] ([i915#49])
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8161/shard-kbl4/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-mmap-cpu.html
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4332/shard-kbl7/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-mmap-cpu.html
- shard-apl: [PASS][23] -> [FAIL][24] ([i915#49])
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8161/shard-apl7/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-mmap-cpu.html
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4332/shard-apl1/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-mmap-cpu.html
* igt@kms_pipe_crc_basic@nonblocking-crc-pipe-b:
- shard-snb: [PASS][25] -> [SKIP][26] ([fdo#109271]) +2 similar issues
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8161/shard-snb6/igt@kms_pipe_crc_basic@nonblocking-crc-pipe-b.html
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4332/shard-snb4/igt@kms_pipe_crc_basic@nonblocking-crc-pipe-b.html
* igt@kms_plane@plane-panning-bottom-right-suspend-pipe-a-planes:
- shard-apl: [PASS][27] -> [DMESG-WARN][28] ([i915#180])
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8161/shard-apl4/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-a-planes.html
[28]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4332/shard-apl1/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-a-planes.html
* igt@kms_psr@psr2_primary_render:
- shard-iclb: [PASS][29] -> [SKIP][30] ([fdo#109441]) +1 similar issue
[29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8161/shard-iclb2/igt@kms_psr@psr2_primary_render.html
[30]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4332/shard-iclb8/igt@kms_psr@psr2_primary_render.html
* igt@kms_setmode@basic:
- shard-apl: [PASS][31] -> [FAIL][32] ([i915#31])
[31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8161/shard-apl4/igt@kms_setmode@basic.html
[32]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4332/shard-apl1/igt@kms_setmode@basic.html
* igt@kms_vblank@pipe-c-ts-continuation-dpms-suspend:
- shard-kbl: [PASS][33] -> [INCOMPLETE][34] ([i915#155])
[33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8161/shard-kbl2/igt@kms_vblank@pipe-c-ts-continuation-dpms-suspend.html
[34]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4332/shard-kbl6/igt@kms_vblank@pipe-c-ts-continuation-dpms-suspend.html
* igt@perf_pmu@busy-vcs1:
- shard-iclb: [PASS][35] -> [SKIP][36] ([fdo#112080]) +10 similar issues
[35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8161/shard-iclb4/igt@perf_pmu@busy-vcs1.html
[36]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4332/shard-iclb5/igt@perf_pmu@busy-vcs1.html
* igt@prime_vgem@fence-wait-bsd2:
- shard-iclb: [PASS][37] -> [SKIP][38] ([fdo#109276]) +20 similar issues
[37]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8161/shard-iclb1/igt@prime_vgem@fence-wait-bsd2.html
[38]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4332/shard-iclb3/igt@prime_vgem@fence-wait-bsd2.html
#### Possible fixes ####
* igt@gem_busy@busy-vcs1:
- shard-iclb: [SKIP][39] ([fdo#112080]) -> [PASS][40] +14 similar issues
[39]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8161/shard-iclb6/igt@gem_busy@busy-vcs1.html
[40]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4332/shard-iclb1/igt@gem_busy@busy-vcs1.html
* igt@gem_exec_balancer@smoke:
- shard-iclb: [SKIP][41] ([fdo#110854]) -> [PASS][42]
[41]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8161/shard-iclb5/igt@gem_exec_balancer@smoke.html
[42]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4332/shard-iclb2/igt@gem_exec_balancer@smoke.html
* igt@gem_exec_schedule@implicit-read-write-bsd2:
- shard-iclb: [SKIP][43] ([fdo#109276] / [i915#677]) -> [PASS][44] +1 similar issue
[43]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8161/shard-iclb8/igt@gem_exec_schedule@implicit-read-write-bsd2.html
[44]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4332/shard-iclb4/igt@gem_exec_schedule@implicit-read-write-bsd2.html
* igt@gem_exec_schedule@pi-distinct-iova-bsd:
- shard-iclb: [SKIP][45] ([i915#677]) -> [PASS][46] +2 similar issues
[45]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8161/shard-iclb4/igt@gem_exec_schedule@pi-distinct-iova-bsd.html
[46]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4332/shard-iclb7/igt@gem_exec_schedule@pi-distinct-iova-bsd.html
* igt@gem_exec_schedule@reorder-wide-bsd:
- shard-iclb: [SKIP][47] ([fdo#112146]) -> [PASS][48] +6 similar issues
[47]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8161/shard-iclb1/igt@gem_exec_schedule@reorder-wide-bsd.html
[48]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4332/shard-iclb3/igt@gem_exec_schedule@reorder-wide-bsd.html
* igt@gem_exec_whisper@basic-fds-forked:
- shard-tglb: [INCOMPLETE][49] ([i915#1318] / [i915#1401]) -> [PASS][50]
[49]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8161/shard-tglb7/igt@gem_exec_whisper@basic-fds-forked.html
[50]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4332/shard-tglb7/igt@gem_exec_whisper@basic-fds-forked.html
* igt@gem_ppgtt@flink-and-close-vma-leak:
- shard-tglb: [FAIL][51] ([i915#644]) -> [PASS][52]
[51]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8161/shard-tglb2/igt@gem_ppgtt@flink-and-close-vma-leak.html
[52]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4332/shard-tglb1/igt@gem_ppgtt@flink-and-close-vma-leak.html
* igt@gem_userptr_blits@sync-unmap:
- shard-snb: [DMESG-WARN][53] ([fdo#111870] / [i915#478]) -> [PASS][54]
[53]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8161/shard-snb2/igt@gem_userptr_blits@sync-unmap.html
[54]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4332/shard-snb4/igt@gem_userptr_blits@sync-unmap.html
* igt@i915_pm_rpm@gem-execbuf:
- shard-iclb: [SKIP][55] ([i915#1316]) -> [PASS][56]
[55]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8161/shard-iclb8/igt@i915_pm_rpm@gem-execbuf.html
[56]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4332/shard-iclb7/igt@i915_pm_rpm@gem-execbuf.html
- shard-glk: [SKIP][57] ([fdo#109271]) -> [PASS][58]
[57]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8161/shard-glk6/igt@i915_pm_rpm@gem-execbuf.html
[58]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4332/shard-glk7/igt@i915_pm_rpm@gem-execbuf.html
- shard-tglb: [SKIP][59] ([i915#1316]) -> [PASS][60]
[59]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8161/shard-tglb2/igt@i915_pm_rpm@gem-execbuf.html
[60]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4332/shard-tglb1/igt@i915_pm_rpm@gem-execbuf.html
* igt@kms_frontbuffer_tracking@fbc-2p-indfb-fliptrack:
- shard-glk: [FAIL][61] ([i915#49]) -> [PASS][62]
[61]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8161/shard-glk1/igt@kms_frontbuffer_tracking@fbc-2p-indfb-fliptrack.html
[62]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4332/shard-glk6/igt@kms_frontbuffer_tracking@fbc-2p-indfb-fliptrack.html
* igt@kms_plane@plane-panning-bottom-right-suspend-pipe-b-planes:
- shard-apl: [DMESG-WARN][63] ([i915#180]) -> [PASS][64] +1 similar issue
[63]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8161/shard-apl1/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-b-planes.html
[64]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4332/shard-apl8/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-b-planes.html
* igt@kms_psr@no_drrs:
- shard-iclb: [FAIL][65] ([i915#173]) -> [PASS][66]
[65]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8161/shard-iclb1/igt@kms_psr@no_drrs.html
[66]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4332/shard-iclb2/igt@kms_psr@no_drrs.html
* igt@kms_psr@psr2_sprite_plane_move:
- shard-iclb: [SKIP][67] ([fdo#109441]) -> [PASS][68] +3 similar issues
[67]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8161/shard-iclb5/igt@kms_psr@psr2_sprite_plane_move.html
[68]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4332/shard-iclb2/igt@kms_psr@psr2_sprite_plane_move.html
* igt@kms_vblank@pipe-a-ts-continuation-suspend:
- shard-kbl: [DMESG-WARN][69] ([i915#180]) -> [PASS][70] +2 similar issues
[69]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8161/shard-kbl1/igt@kms_vblank@pipe-a-ts-continuation-suspend.html
[70]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4332/shard-kbl1/igt@kms_vblank@pipe-a-ts-continuation-suspend.html
* igt@prime_busy@hang-bsd2:
- shard-iclb: [SKIP][71] ([fdo#109276]) -> [PASS][72] +11 similar issues
[71]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8161/shard-iclb6/igt@prime_busy@hang-bsd2.html
[72]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4332/shard-iclb4/igt@prime_busy@hang-bsd2.html
#### Warnings ####
* igt@gem_ctx_persistence@close-replace-race:
- shard-kbl: [INCOMPLETE][73] -> [INCOMPLETE][74] ([i915#1402])
[73]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8161/shard-kbl7/igt@gem_ctx_persistence@close-replace-race.html
[74]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4332/shard-kbl2/igt@gem_ctx_persistence@close-replace-race.html
* igt@gem_exec_whisper@basic-fds-all:
- shard-tglb: [INCOMPLETE][75] ([i915#1401]) -> [TIMEOUT][76] ([i915#1408])
[75]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8161/shard-tglb8/igt@gem_exec_whisper@basic-fds-all.html
[76]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4332/shard-tglb5/igt@gem_exec_whisper@basic-fds-all.html
* igt@runner@aborted:
- shard-kbl: ([FAIL][77], [FAIL][78]) ([i915#1389] / [i915#1402] / [i915#1485] / [i915#92]) -> ([FAIL][79], [FAIL][80]) ([i915#1389] / [i915#1402] / [i915#92])
[77]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8161/shard-kbl2/igt@runner@aborted.html
[78]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8161/shard-kbl7/igt@runner@aborted.html
[79]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4332/shard-kbl3/igt@runner@aborted.html
[80]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4332/shard-kbl2/igt@runner@aborted.html
- shard-tglb: ([FAIL][81], [FAIL][82], [FAIL][83]) ([i915#1318] / [i915#1389] / [i915#1401]) -> [FAIL][84] ([i915#1389])
[81]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8161/shard-tglb8/igt@runner@aborted.html
[82]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8161/shard-tglb7/igt@runner@aborted.html
[83]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8161/shard-tglb1/igt@runner@aborted.html
[84]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4332/shard-tglb6/igt@runner@aborted.html
- shard-snb: ([FAIL][85], [FAIL][86], [FAIL][87], [FAIL][88], [FAIL][89], [FAIL][90]) ([fdo#111870] / [i915#1077] / [i915#1485]) -> ([FAIL][91], [FAIL][92], [FAIL][93], [FAIL][94], [FAIL][95], [FAIL][96]) ([fdo#111870] / [i915#1077] / [i915#1485] / [i915#698])
[85]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8161/shard-snb6/igt@runner@aborted.html
[86]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8161/shard-snb2/igt@runner@aborted.html
[87]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8161/shard-snb4/igt@runner@aborted.html
[88]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8161/shard-snb2/igt@runner@aborted.html
[89]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8161/shard-snb5/igt@runner@aborted.html
[90]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8161/shard-snb2/igt@runner@aborted.html
[91]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4332/shard-snb4/igt@runner@aborted.html
[92]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4332/shard-snb2/igt@runner@aborted.html
[93]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4332/shard-snb5/igt@runner@aborted.html
[94]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4332/shard-snb6/igt@runner@aborted.html
[95]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4332/shard-snb4/igt@runner@aborted.html
[96]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4332/shard-snb4/igt@runner@aborted.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#109276]: https://bugs.freedesktop.org/show_bug.cgi?id=109276
[fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441
[fdo#110854]: https://bugs.freedesktop.org/show_bug.cgi?id=110854
[fdo#111870]: https://bugs.freedesktop.org/show_bug.cgi?id=111870
[fdo#112080]: https://bugs.freedesktop.org/show_bug.cgi?id=112080
[fdo#112146]: https://bugs.freedesktop.org/show_bug.cgi?id=112146
[i915#1077]: https://gitlab.freedesktop.org/drm/intel/issues/1077
[i915#1316]: https://gitlab.freedesktop.org/drm/intel/issues/1316
[i915#1318]: https://gitlab.freedesktop.org/drm/intel/issues/1318
[i915#1389]: https://gitlab.freedesktop.org/drm/intel/issues/1389
[i915#1401]: https://gitlab.freedesktop.org/drm/intel/issues/1401
[i915#1402]: https://gitlab.freedesktop.org/drm/intel/issues/1402
[i915#1408]: https://gitlab.freedesktop.org/drm/intel/issues/1408
[i915#1485]: https://gitlab.freedesktop.org/drm/intel/issues/1485
[i915#155]: https://gitlab.freedesktop.org/drm/intel/issues/155
[i915#173]: https://gitlab.freedesktop.org/drm/intel/issues/173
[i915#180]: https://gitlab.freedesktop.org/drm/intel/issues/180
[i915#31]: https://gitlab.freedesktop.org/drm/intel/issues/31
[i915#478]: https://gitlab.freedesktop.org/drm/intel/issues/478
[i915#49]: https://gitlab.freedesktop.org/drm/intel/issues/49
[i915#54]: https://gitlab.freedesktop.org/drm/intel/issues/54
[i915#644]: https://gitlab.freedesktop.org/drm/intel/issues/644
[i915#677]: https://gitlab.freedesktop.org/drm/intel/issues/677
[i915#698]: https://gitlab.freedesktop.org/drm/intel/issues/698
[i915#72]: https://gitlab.freedesktop.org/drm/intel/issues/72
[i915#92]: https://gitlab.freedesktop.org/drm/intel/issues/92
Participating hosts (10 -> 8)
------------------------------
Missing (2): pig-skl-6260u pig-glk-j5005
Build changes
-------------
* CI: CI-20190529 -> None
* IGT: IGT_5523 -> IGTPW_4332
* Piglit: piglit_4509 -> None
CI-20190529: 20190529
CI_DRM_8161: b2b8d8634bf653904ef3268ca7ccedf51f6405af @ git://anongit.freedesktop.org/gfx-ci/linux
IGTPW_4332: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4332/index.html
IGT_5523: cf6d524007ac51a7d5a48503ea3dd5f01fd4ebab @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4332/index.html
_______________________________________________
igt-dev mailing list
igt-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/igt-dev
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [igt-dev] [PATCH i-g-t 3/3] tools: Allow user to set poll delay in i915 perf recorder
2020-03-19 22:52 ` [igt-dev] [PATCH i-g-t 3/3] tools: Allow user to set poll delay in i915 perf recorder Umesh Nerlige Ramappa
@ 2020-03-25 19:06 ` Dixit, Ashutosh
2020-03-25 19:20 ` Lionel Landwerlin
0 siblings, 1 reply; 12+ messages in thread
From: Dixit, Ashutosh @ 2020-03-25 19:06 UTC (permalink / raw)
To: Umesh Nerlige Ramappa; +Cc: igt-dev
On Thu, 19 Mar 2020 15:52:54 -0700, Umesh Nerlige Ramappa wrote:
>
> Add poll delay parameter to the i915-perf-recorder tool so that the user
> can set the frequency of the poll timer that checks for available
> reports in the OA buffer.
>
> v2:
> - Change poll period parameter type to match kernel interface (Lionel)
> - Update to use poll period in the code (Ashutosh)
>
> Signed-off-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
> Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
> ---
> tools/i915-perf/i915_perf_recorder.c | 37 +++++++++++++++++++++++++---
> 1 file changed, 34 insertions(+), 3 deletions(-)
>
> diff --git a/tools/i915-perf/i915_perf_recorder.c b/tools/i915-perf/i915_perf_recorder.c
> index 6bbc451e..ca4f13ea 100644
> --- a/tools/i915-perf/i915_perf_recorder.c
> +++ b/tools/i915-perf/i915_perf_recorder.c
> @@ -374,6 +391,11 @@ perf_open(struct recording_context *ctx)
> properties[p++] = DRM_I915_PERF_PROP_OA_EXPONENT;
> properties[p++] = ctx->oa_exponent;
>
> + if (revision >= 4) {
Isn't this revision >= 5?
> @@ -720,7 +742,10 @@ usage(const char *name)
> " (To use with i915-perf-control)\n"
> " --output, -o <path> Output file (default = i915_perf.record)\n"
> " --cpu-clock, -k <path> Cpu clock to use for correlations\n"
> - " Values: boot, mono, mono_raw (default = mono)\n",
> + " Values: boot, mono, mono_raw (default = mono)\n"
> + " --poll-delay -P <value> Polling interval in microseconds used by a timer in the driver to query\n"
Call this poll-period too?
> @@ -788,9 +814,11 @@ main(int argc, char *argv[])
>
> .command_fifo = I915_PERF_RECORD_FIFO_PATH,
> .command_fifo_fd = -1,
> +
> + .poll_period = 5 * 1000 * 1000,
Put a comment above that this is 5 ms?
Otherwise, one thing missing in the patch is that if timer poll period is
long we may need a larger buffer than the 4K buffer being used in
write_i915_perf_data(). To address this I have just posted the following
i915 patch:
https://patchwork.freedesktop.org/series/75085/
So I think we should not increase the size of the buffer here but use the
kernel patch above to handle the small user read buffer
situation. Thoughts?
--
Ashutosh
_______________________________________________
igt-dev mailing list
igt-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/igt-dev
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [igt-dev] [PATCH i-g-t 1/3] include/drm-uapi: Update i915_drm.h for perf OA APIs
2020-03-19 22:52 ` [igt-dev] [PATCH i-g-t 1/3] include/drm-uapi: Update i915_drm.h for perf OA APIs Umesh Nerlige Ramappa
@ 2020-03-25 19:16 ` Dixit, Ashutosh
0 siblings, 0 replies; 12+ messages in thread
From: Dixit, Ashutosh @ 2020-03-25 19:16 UTC (permalink / raw)
To: Umesh Nerlige Ramappa; +Cc: igt-dev
On Thu, 19 Mar 2020 15:52:52 -0700, Umesh Nerlige Ramappa wrote:
>
> From: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
>
> Add APIs to configure poll delay in perf OA.
>
> v2: (Umesh)
> - Remove interrupt and flush APIs
> - Change commit message
>
> v3: (Umesh)
> - Rebase
> - Rename uapi parameter used to set poll timer interval
>
> Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
> Signed-off-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
> ---
> include/drm-uapi/i915_drm.h | 24 ++++++++++++++++++++++++
> 1 file changed, 24 insertions(+)
>
> diff --git a/include/drm-uapi/i915_drm.h b/include/drm-uapi/i915_drm.h
> index 3794e768..594a42d1 100644
> --- a/include/drm-uapi/i915_drm.h
> +++ b/include/drm-uapi/i915_drm.h
> @@ -1969,6 +1969,30 @@ enum drm_i915_perf_property_id {
> */
> DRM_I915_PERF_PROP_HOLD_PREEMPTION,
>
> + /**
> + * Specifying this pins all contexts to the specified SSEU power
> + * configuration for the duration of the recording.
> + *
> + * This parameter's value is a pointer to a struct
> + * drm_i915_gem_context_param_sseu.
> + *
> + * This property is available in perf revision 4.
> + */
> + DRM_I915_PERF_PROP_GLOBAL_SSEU,
> +
> + /**
> + * This optional parameter specifies the timer interval in nanoseconds
> + * at which the i915 driver will check the OA buffer for available data.
> + * Minimum allowed value is 100 microseconds. A default value is used by
> + * the driver if this parameter is not specified. Note that a large
> + * value may reduce cpu consumption during OA perf captures, but it
> + * would also potentially result in OA buffer overwrite as the captures
> + * reach end of the OA buffer.
The wording here was changed during the i915 patch review, please update it.
> + *
> + * This property is available in perf revision 5.
> + */
> + DRM_I915_PERF_PROP_POLL_OA_PERIOD,
> +
> DRM_I915_PERF_PROP_MAX /* non-ABI */
> };
>
> --
> 2.20.1
>
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^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [igt-dev] [PATCH i-g-t 3/3] tools: Allow user to set poll delay in i915 perf recorder
2020-03-25 19:06 ` Dixit, Ashutosh
@ 2020-03-25 19:20 ` Lionel Landwerlin
2020-03-25 19:54 ` Dixit, Ashutosh
0 siblings, 1 reply; 12+ messages in thread
From: Lionel Landwerlin @ 2020-03-25 19:20 UTC (permalink / raw)
To: Dixit, Ashutosh, Umesh Nerlige Ramappa; +Cc: igt-dev
On 25/03/2020 21:06, Dixit, Ashutosh wrote:
> On Thu, 19 Mar 2020 15:52:54 -0700, Umesh Nerlige Ramappa wrote:
>> Add poll delay parameter to the i915-perf-recorder tool so that the user
>> can set the frequency of the poll timer that checks for available
>> reports in the OA buffer.
>>
>> v2:
>> - Change poll period parameter type to match kernel interface (Lionel)
>> - Update to use poll period in the code (Ashutosh)
>>
>> Signed-off-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
>> Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
>> ---
>> tools/i915-perf/i915_perf_recorder.c | 37 +++++++++++++++++++++++++---
>> 1 file changed, 34 insertions(+), 3 deletions(-)
>>
>> diff --git a/tools/i915-perf/i915_perf_recorder.c b/tools/i915-perf/i915_perf_recorder.c
>> index 6bbc451e..ca4f13ea 100644
>> --- a/tools/i915-perf/i915_perf_recorder.c
>> +++ b/tools/i915-perf/i915_perf_recorder.c
>> @@ -374,6 +391,11 @@ perf_open(struct recording_context *ctx)
>> properties[p++] = DRM_I915_PERF_PROP_OA_EXPONENT;
>> properties[p++] = ctx->oa_exponent;
>>
>> + if (revision >= 4) {
> Isn't this revision >= 5?
Well spotted :)
>
>> @@ -720,7 +742,10 @@ usage(const char *name)
>> " (To use with i915-perf-control)\n"
>> " --output, -o <path> Output file (default = i915_perf.record)\n"
>> " --cpu-clock, -k <path> Cpu clock to use for correlations\n"
>> - " Values: boot, mono, mono_raw (default = mono)\n",
>> + " Values: boot, mono, mono_raw (default = mono)\n"
>> + " --poll-delay -P <value> Polling interval in microseconds used by a timer in the driver to query\n"
> Call this poll-period too?
>
>> @@ -788,9 +814,11 @@ main(int argc, char *argv[])
>>
>> .command_fifo = I915_PERF_RECORD_FIFO_PATH,
>> .command_fifo_fd = -1,
>> +
>> + .poll_period = 5 * 1000 * 1000,
> Put a comment above that this is 5 ms?
>
> Otherwise, one thing missing in the patch is that if timer poll period is
> long we may need a larger buffer than the 4K buffer being used in
> write_i915_perf_data(). To address this I have just posted the following
> i915 patch:
>
> https://patchwork.freedesktop.org/series/75085/
write_i915_perf_data() just pulls the data and writes it back into the output.
It doesn't matter that it's 4k, it just needs to be bigger enough to hold at least one report.
-Lionel
>
> So I think we should not increase the size of the buffer here but use the
> kernel patch above to handle the small user read buffer
> situation. Thoughts?
> --
> Ashutosh
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^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [igt-dev] [PATCH i-g-t 2/3] tests/perf: new tests for parameterized OA buffer polling
2020-03-19 22:52 ` [igt-dev] [PATCH i-g-t 2/3] tests/perf: new tests for parameterized OA buffer polling Umesh Nerlige Ramappa
@ 2020-03-25 19:37 ` Dixit, Ashutosh
0 siblings, 0 replies; 12+ messages in thread
From: Dixit, Ashutosh @ 2020-03-25 19:37 UTC (permalink / raw)
To: Umesh Nerlige Ramappa; +Cc: igt-dev
On Thu, 19 Mar 2020 15:52:53 -0700, Umesh Nerlige Ramappa wrote:
>
> From: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
>
> 2 new tests verifying that the OA buffer is properly checked at the
> frequency specified by userspace.
>
> v2: (Umesh)
> - Capture start_times in test_polling
> - Second parameterized test used a 500us hrtimer. Occassionally, this
> timing does not fall within the duration/100 requirement for the time
> spent in kernel. Change this value to 2ms to accommodate all
> platforms.
>
> v3: (Lionel)
> - Use NUM_PROPERTIES
>
> v4: (Umesh)
> - Update poll parameter name
> - Update perf revision check to 5 in new tests
> - Fix oa sampling rate message in igt_debug prints
Reviewed-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
> Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
> Signed-off-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
> ---
> tests/perf.c | 144 +++++++++++++++++++++++++++++++++++++--------------
> 1 file changed, 106 insertions(+), 38 deletions(-)
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^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [igt-dev] [PATCH i-g-t 3/3] tools: Allow user to set poll delay in i915 perf recorder
2020-03-25 19:20 ` Lionel Landwerlin
@ 2020-03-25 19:54 ` Dixit, Ashutosh
0 siblings, 0 replies; 12+ messages in thread
From: Dixit, Ashutosh @ 2020-03-25 19:54 UTC (permalink / raw)
To: Lionel Landwerlin; +Cc: igt-dev
On Wed, 25 Mar 2020 12:20:37 -0700, Lionel Landwerlin wrote:
>
> On 25/03/2020 21:06, Dixit, Ashutosh wrote:
> > On Thu, 19 Mar 2020 15:52:54 -0700, Umesh Nerlige Ramappa wrote:
> > Otherwise, one thing missing in the patch is that if timer poll period is
> > long we may need a larger buffer than the 4K buffer being used in
> > write_i915_perf_data(). To address this I have just posted the following
> > i915 patch:
> >
> > https://patchwork.freedesktop.org/series/75085/
>
> write_i915_perf_data() just pulls the data and writes it back into the
> output. It doesn't matter that it's 4k, it just needs to be bigger
> enough to hold at least one report.
Let us say the hrtimer poll period is set to 500 ms in which 20 K OA data
is ready to be read. Without the kernel patch, the code gets blocked in the
poll and is unblocked every 500 ms after which it is able to read only 4 K
data. So instead of reading 20 K data every 500 ms it is only able to read
4 K every 500 ms.
The kernel patch solves this issue, the poll will not block till all
pending data is read. So with the example above, the code will issue 5 read
calls every 500 ms (with the 4 K buffer) to read 20 K data every 500 ms.
>
> -Lionel
>
> >
> > So I think we should not increase the size of the buffer here but use the
> > kernel patch above to handle the small user read buffer
> > situation. Thoughts?
> > --
> > Ashutosh
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^ permalink raw reply [flat|nested] 12+ messages in thread
* [igt-dev] [PATCH i-g-t 2/3] tests/perf: new tests for parameterized OA buffer polling
2020-03-13 19:53 [igt-dev] [PATCH i-g-t 0/3] Test configurable poll delay in perf OA Umesh Nerlige Ramappa
@ 2020-03-13 19:53 ` Umesh Nerlige Ramappa
0 siblings, 0 replies; 12+ messages in thread
From: Umesh Nerlige Ramappa @ 2020-03-13 19:53 UTC (permalink / raw)
To: igt-dev, Lionel G Landwerlin, Ashutosh Dixit
From: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
2 new tests verifying that the OA buffer is properly checked at the
frequency specified by userspace.
v2: (Umesh)
- Capture start_times in test_polling
- Second parameterized test used a 500us hrtimer. Occassionally, this
timing does not fall within the duration/100 requirement for the time
spent in kernel. Change this value to 2ms to accommodate all
platforms.
v3: (Lionel)
- Use NUM_PROPERTIES
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
---
tests/perf.c | 136 ++++++++++++++++++++++++++++++++++++++-------------
1 file changed, 102 insertions(+), 34 deletions(-)
diff --git a/tests/perf.c b/tests/perf.c
index 5e818030..9dfa6ec5 100644
--- a/tests/perf.c
+++ b/tests/perf.c
@@ -234,6 +234,24 @@ get_oa_format(enum drm_i915_oa_format format)
return gen8_oa_formats[format];
}
+static char *
+pretty_print_oa_period(uint64_t oa_period_ns)
+{
+ static char result[100];
+ static const char *units[4] = { "ns", "us", "ms", "s" };
+ double val = oa_period_ns;
+ int iter = 0;
+
+ while (iter < (ARRAY_SIZE(units) - 1) &&
+ val >= 1000.0f) {
+ val /= 1000.0f;
+ iter++;
+ }
+
+ snprintf(result, sizeof(result), "%.3f%s", val, units[iter]);
+ return result;
+}
+
static void
__perf_close(int fd)
{
@@ -1921,15 +1939,9 @@ get_time(void)
* kernelspace.
*/
static void
-test_blocking(void)
+test_blocking(uint64_t requested_oa_period, bool set_kernel_hrtimer, uint64_t kernel_hrtimer)
{
- /* ~40 milliseconds
- *
- * Having a period somewhat > sysconf(_SC_CLK_TCK) helps to stop
- * scheduling (liable to kick in when we make blocking poll()s/reads)
- * from interfering with the test.
- */
- int oa_exponent = max_oa_exponent_for_period_lte(40000000);
+ int oa_exponent = max_oa_exponent_for_period_lte(requested_oa_period);
uint64_t oa_period = oa_exponent_to_ns(oa_exponent);
uint64_t properties[] = {
/* Include OA reports in samples */
@@ -1939,11 +1951,16 @@ test_blocking(void)
DRM_I915_PERF_PROP_OA_METRICS_SET, test_set->perf_oa_metrics_set,
DRM_I915_PERF_PROP_OA_FORMAT, test_set->perf_oa_format,
DRM_I915_PERF_PROP_OA_EXPONENT, oa_exponent,
+
+ /* Kernel configuration (optional) */
+ DRM_I915_PERF_PROP_POLL_OA_DELAY, kernel_hrtimer,
};
struct drm_i915_perf_open_param param = {
.flags = I915_PERF_FLAG_FD_CLOEXEC |
I915_PERF_FLAG_DISABLED,
- .num_properties = sizeof(properties) / 16,
+ .num_properties = set_kernel_hrtimer ?
+ NUM_PROPERTIES(properties) :
+ NUM_PROPERTIES(properties) - 1,
.properties_ptr = to_user_pointer(properties),
};
uint8_t buf[1024 * 1024];
@@ -1965,7 +1982,7 @@ test_blocking(void)
* the knowledge that that the driver uses a 200Hz hrtimer (5ms period)
* to check for data and giving some time to read().
*/
- int min_iterations = (test_duration_ns / (oa_period + 6000000ull));
+ int min_iterations = (test_duration_ns / (oa_period + kernel_hrtimer + kernel_hrtimer / 5));
int64_t start, end;
int n = 0;
@@ -1975,9 +1992,10 @@ test_blocking(void)
times(&start_times);
igt_debug("tick length = %dns, test duration = %"PRIu64"ns, min iter. = %d,"
- " estimated max iter. = %d, oa_period = %"PRIu64"ns\n",
+ " estimated max iter. = %d, oa_period = %s\n",
(int)tick_ns, test_duration_ns,
- min_iterations, max_iterations, oa_period);
+ min_iterations, max_iterations,
+ pretty_print_oa_period(oa_period));
/* In the loop we perform blocking polls while the HW is sampling at
* ~25Hz, with the expectation that we spend most of our time blocked
@@ -2079,15 +2097,9 @@ test_blocking(void)
}
static void
-test_polling(void)
+test_polling(uint64_t requested_oa_period, bool set_kernel_hrtimer, uint64_t kernel_hrtimer)
{
- /* ~40 milliseconds
- *
- * Having a period somewhat > sysconf(_SC_CLK_TCK) helps to stop
- * scheduling (liable to kick in when we make blocking poll()s/reads)
- * from interfering with the test.
- */
- int oa_exponent = max_oa_exponent_for_period_lte(40000000);
+ int oa_exponent = max_oa_exponent_for_period_lte(requested_oa_period);
uint64_t oa_period = oa_exponent_to_ns(oa_exponent);
uint64_t properties[] = {
/* Include OA reports in samples */
@@ -2097,12 +2109,17 @@ test_polling(void)
DRM_I915_PERF_PROP_OA_METRICS_SET, test_set->perf_oa_metrics_set,
DRM_I915_PERF_PROP_OA_FORMAT, test_set->perf_oa_format,
DRM_I915_PERF_PROP_OA_EXPONENT, oa_exponent,
+
+ /* Kernel configuration (optional) */
+ DRM_I915_PERF_PROP_POLL_OA_DELAY, kernel_hrtimer,
};
struct drm_i915_perf_open_param param = {
.flags = I915_PERF_FLAG_FD_CLOEXEC |
I915_PERF_FLAG_DISABLED |
I915_PERF_FLAG_FD_NONBLOCK,
- .num_properties = sizeof(properties) / 16,
+ .num_properties = set_kernel_hrtimer ?
+ NUM_PROPERTIES(properties) :
+ NUM_PROPERTIES(properties) - 1,
.properties_ptr = to_user_pointer(properties),
};
uint8_t buf[1024 * 1024];
@@ -2116,15 +2133,16 @@ test_polling(void)
int n_extra_iterations = 0;
/* It's a bit tricky to put a lower limit here, but we expect a
- * relatively low latency for seeing reports, while we don't currently
- * give any control over this in the api.
+ * relatively low latency for seeing reports.
*
- * We assume a maximum latency of 6 millisecond to deliver a POLLIN and
- * read() after a new sample is written (46ms per iteration) considering
- * the knowledge that that the driver uses a 200Hz hrtimer (5ms period)
- * to check for data and giving some time to read().
+ * We assume a maximum latency of kernel_hrtimer + some margin
+ * to deliver a POLLIN and read() after a new sample is
+ * written (40ms + hrtimer + margin per iteration) considering
+ * the knowledge that that the driver uses a 200Hz hrtimer
+ * (5ms period) to check for data and giving some time to
+ * read().
*/
- int min_iterations = (test_duration_ns / (oa_period + 6000000ull));
+ int min_iterations = (test_duration_ns / (oa_period + (kernel_hrtimer + kernel_hrtimer / 5)));
int64_t start, end;
int n = 0;
@@ -2132,8 +2150,9 @@ test_polling(void)
times(&start_times);
- igt_debug("tick length = %dns, test duration = %"PRIu64"ns, min iter. = %d, max iter. = %d\n",
- (int)tick_ns, test_duration_ns,
+ igt_debug("tick length = %dns, oa period = %s, "
+ "test duration = %"PRIu64"ns, min iter. = %d, max iter. = %d\n",
+ (int)tick_ns, pretty_print_oa_period(oa_period), test_duration_ns,
min_iterations, max_iterations);
/* In the loop we perform blocking polls while the HW is sampling at
@@ -4502,6 +4521,23 @@ test_sysctl_defaults(void)
igt_assert_eq(max_freq, 100000);
}
+static int i915_perf_revision(int fd)
+{
+ drm_i915_getparam_t gp;
+ int value = 1, ret;
+
+ gp.param = I915_PARAM_PERF_REVISION;
+ gp.value = &value;
+ ret = igt_ioctl(drm_fd, DRM_IOCTL_I915_GETPARAM, &gp);
+ if (ret == -1) {
+ /* If the param is missing, consider version 1. */
+ igt_assert_eq(errno, EINVAL);
+ return 1;
+ }
+
+ return value;
+}
+
igt_main
{
igt_fixture {
@@ -4584,11 +4620,43 @@ igt_main
igt_subtest("enable-disable")
test_enable_disable();
- igt_subtest("blocking")
- test_blocking();
+ igt_describe("Test blocking read with default hrtimer frequency");
+ igt_subtest("blocking") {
+ test_blocking(40 * 1000 * 1000 /* 40ms oa period */,
+ false /* set_kernel_hrtimer */,
+ 5 * 1000 * 1000 /* default 5ms/200Hz hrtimer */);
+ }
+
+ igt_describe("Test blocking read with different hrtimer frequencies");
+ igt_subtest("blocking-parameterized") {
+ igt_require(i915_perf_revision(drm_fd) >= 4);
+
+ test_blocking(10 * 1000 * 1000 /* 10ms oa period */,
+ true /* set_kernel_hrtimer */,
+ 40 * 1000 * 1000 /* default 40ms hrtimer */);
+ test_blocking(500 * 1000 /* 500us oa period */,
+ true /* set_kernel_hrtimer */,
+ 2 * 1000 * 1000 /* default 2ms hrtimer */);
+ }
- igt_subtest("polling")
- test_polling();
+ igt_describe("Test polled read with default hrtimer frequency");
+ igt_subtest("polling") {
+ test_polling(40 * 1000 * 1000 /* 40ms oa period */,
+ false /* set_kernel_hrtimer */,
+ 5 * 1000 * 1000 /* default 5ms/200Hz hrtimer */);
+ }
+
+ igt_describe("Test polled read with different hrtimer frequencies");
+ igt_subtest("polling-parameterized") {
+ igt_require(i915_perf_revision(drm_fd) >= 4);
+
+ test_polling(10 * 1000 * 1000 /* 10ms oa period */,
+ true /* set_kernel_hrtimer */,
+ 40 * 1000 * 1000 /* default 40ms hrtimer */);
+ test_polling(500 * 1000 /* 500us oa period */,
+ true /* set_kernel_hrtimer */,
+ 2 * 1000 * 1000 /* default 2ms hrtimer */);
+ }
igt_subtest("short-reads")
test_short_reads();
--
2.20.1
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^ permalink raw reply related [flat|nested] 12+ messages in thread
end of thread, other threads:[~2020-03-25 19:54 UTC | newest]
Thread overview: 12+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2020-03-19 22:52 [igt-dev] [PATCH i-g-t 0/3] Test configurable poll delay in perf OA Umesh Nerlige Ramappa
2020-03-19 22:52 ` [igt-dev] [PATCH i-g-t 1/3] include/drm-uapi: Update i915_drm.h for perf OA APIs Umesh Nerlige Ramappa
2020-03-25 19:16 ` Dixit, Ashutosh
2020-03-19 22:52 ` [igt-dev] [PATCH i-g-t 2/3] tests/perf: new tests for parameterized OA buffer polling Umesh Nerlige Ramappa
2020-03-25 19:37 ` Dixit, Ashutosh
2020-03-19 22:52 ` [igt-dev] [PATCH i-g-t 3/3] tools: Allow user to set poll delay in i915 perf recorder Umesh Nerlige Ramappa
2020-03-25 19:06 ` Dixit, Ashutosh
2020-03-25 19:20 ` Lionel Landwerlin
2020-03-25 19:54 ` Dixit, Ashutosh
2020-03-19 23:36 ` [igt-dev] ✓ Fi.CI.BAT: success for Test configurable poll delay in perf OA (rev3) Patchwork
2020-03-20 2:35 ` [igt-dev] ✗ Fi.CI.IGT: failure " Patchwork
-- strict thread matches above, loose matches on Subject: below --
2020-03-13 19:53 [igt-dev] [PATCH i-g-t 0/3] Test configurable poll delay in perf OA Umesh Nerlige Ramappa
2020-03-13 19:53 ` [igt-dev] [PATCH i-g-t 2/3] tests/perf: new tests for parameterized OA buffer polling Umesh Nerlige Ramappa
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