* [Intel-gfx] [PATCH 1/6] drm/i915/tc/tgl: Implement TCCOLD sequences
@ 2020-03-18 23:59 José Roberto de Souza
2020-03-18 23:59 ` [Intel-gfx] [PATCH 2/6] drm/i915/display: Add intel_display_power_get_without_ack() José Roberto de Souza
` (8 more replies)
0 siblings, 9 replies; 16+ messages in thread
From: José Roberto de Souza @ 2020-03-18 23:59 UTC (permalink / raw)
To: intel-gfx; +Cc: Cooper Chiou, Kai-Heng Feng
TC ports can enter in TCCOLD to save power and is required to request
to PCODE to exit this state before use or read to TC registers.
For TGL there is a new MBOX command to do that with a parameter to ask
PCODE to exit and block TCCOLD entry or unblock TCCOLD entry.
For GEN11 the sequence is more complex and will be handled in a
separated patch.
BSpec: 49294
Cc: Imre Deak <imre.deak@intel.com>
Cc: Cooper Chiou <cooper.chiou@intel.com>
Cc: Kai-Heng Feng <kai.heng.feng@canonical.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
---
drivers/gpu/drm/i915/display/intel_tc.c | 61 ++++++++++++++++++++++++-
drivers/gpu/drm/i915/i915_reg.h | 3 ++
drivers/gpu/drm/i915/intel_sideband.c | 22 +++++++++
drivers/gpu/drm/i915/intel_sideband.h | 4 ++
4 files changed, 88 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_tc.c b/drivers/gpu/drm/i915/display/intel_tc.c
index 9b850c11aa78..e4c5de5ce874 100644
--- a/drivers/gpu/drm/i915/display/intel_tc.c
+++ b/drivers/gpu/drm/i915/display/intel_tc.c
@@ -7,6 +7,7 @@
#include "intel_display.h"
#include "intel_display_types.h"
#include "intel_dp_mst.h"
+#include "intel_sideband.h"
#include "intel_tc.h"
static const char *tc_port_mode_name(enum tc_port_mode mode)
@@ -496,6 +497,55 @@ bool intel_tc_port_connected(struct intel_digital_port *dig_port)
return is_connected;
}
+static inline int tgl_tc_cold_request(struct intel_digital_port *dig_port,
+ bool block)
+{
+ struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
+ u32 low_val, high_val;
+ u8 tries = 0;
+ int ret;
+
+ do {
+ low_val = 0;
+ high_val = block ? 0 : TGL_PCODE_EXIT_TCCOLD_DATA_H_UNBLOCK_REQ;
+
+ ret = sandybridge_pcode_write_read_timeout(i915,
+ TGL_PCODE_TCCOLD,
+ &low_val, &high_val,
+ 150, 1);
+ if (ret == 0) {
+ if (block &&
+ low_val & TGL_PCODE_EXIT_TCCOLD_DATA_L_EXIT_FAILED)
+ ret = -EIO;
+ else
+ break;
+ }
+
+ if (ret != -EAGAIN)
+ tries++;
+ } while (tries < 3);
+
+ return ret;
+}
+
+static int tc_cold_request(struct intel_digital_port *dig_port, bool block)
+{
+ struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
+ int ret;
+
+ if (INTEL_GEN(i915) >= 12)
+ ret = tgl_tc_cold_request(dig_port, block);
+ else
+ /* TODO: implement GEN11 TCCOLD sequences */
+ ret = 0;
+
+ drm_dbg_kms(&i915->drm, "Port %s: TCCOLD %sblock %s\n",
+ dig_port->tc_port_name, (block ? "" : "un"),
+ (ret == 0 ? "succeeded" : "failed"));
+
+ return ret;
+}
+
static void __intel_tc_port_lock(struct intel_digital_port *dig_port,
int required_lanes)
{
@@ -506,9 +556,11 @@ static void __intel_tc_port_lock(struct intel_digital_port *dig_port,
mutex_lock(&dig_port->tc_lock);
- if (!dig_port->tc_link_refcount &&
- intel_tc_port_needs_reset(dig_port))
+ if (dig_port->tc_link_refcount == 0) {
+ tc_cold_request(dig_port, true);
+ intel_tc_port_needs_reset(dig_port);
intel_tc_port_reset_mode(dig_port, required_lanes);
+ }
drm_WARN_ON(&i915->drm, dig_port->tc_lock_wakeref);
dig_port->tc_lock_wakeref = wakeref;
@@ -524,6 +576,9 @@ void intel_tc_port_unlock(struct intel_digital_port *dig_port)
struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
intel_wakeref_t wakeref = fetch_and_zero(&dig_port->tc_lock_wakeref);
+ if (dig_port->tc_link_refcount == 0)
+ tc_cold_request(dig_port, false);
+
mutex_unlock(&dig_port->tc_lock);
intel_display_power_put_async(i915, POWER_DOMAIN_DISPLAY_CORE,
@@ -548,6 +603,8 @@ void intel_tc_port_put_link(struct intel_digital_port *dig_port)
{
mutex_lock(&dig_port->tc_lock);
dig_port->tc_link_refcount--;
+ if (dig_port->tc_link_refcount == 0)
+ tc_cold_request(dig_port, false);
mutex_unlock(&dig_port->tc_lock);
}
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 9c53fe918be6..7e341d9945b3 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -9019,6 +9019,9 @@ enum {
#define GEN6_PCODE_WRITE_D_COMP 0x11
#define HSW_PCODE_DE_WRITE_FREQ_REQ 0x17
#define DISPLAY_IPS_CONTROL 0x19
+#define TGL_PCODE_TCCOLD 0x26
+#define TGL_PCODE_EXIT_TCCOLD_DATA_L_EXIT_FAILED REG_BIT(0)
+#define TGL_PCODE_EXIT_TCCOLD_DATA_H_UNBLOCK_REQ REG_BIT(0)
/* See also IPS_CTL */
#define IPS_PCODE_CONTROL (1 << 30)
#define HSW_PCODE_DYNAMIC_DUTY_CYCLE_CONTROL 0x1A
diff --git a/drivers/gpu/drm/i915/intel_sideband.c b/drivers/gpu/drm/i915/intel_sideband.c
index 1447e7516cb7..20a9d3970930 100644
--- a/drivers/gpu/drm/i915/intel_sideband.c
+++ b/drivers/gpu/drm/i915/intel_sideband.c
@@ -463,6 +463,28 @@ int sandybridge_pcode_write_timeout(struct drm_i915_private *i915,
return err;
}
+int sandybridge_pcode_write_read_timeout(struct drm_i915_private *i915,
+ u32 mbox, u32 *val, u32 *val1,
+ int fast_timeout_us,
+ int slow_timeout_ms)
+{
+ int err;
+
+ mutex_lock(&i915->sb_lock);
+ err = __sandybridge_pcode_rw(i915, mbox, val, val1,
+ fast_timeout_us, slow_timeout_ms,
+ true);
+ mutex_unlock(&i915->sb_lock);
+
+ if (err) {
+ drm_dbg(&i915->drm,
+ "warning: pcode (write of 0x%08x to mbox %x) mailbox access failed for %ps: %d\n",
+ *val, mbox, __builtin_return_address(0), err);
+ }
+
+ return err;
+}
+
static bool skl_pcode_try_request(struct drm_i915_private *i915, u32 mbox,
u32 request, u32 reply_mask, u32 reply,
u32 *status)
diff --git a/drivers/gpu/drm/i915/intel_sideband.h b/drivers/gpu/drm/i915/intel_sideband.h
index 7fb95745a444..1939bebb4e67 100644
--- a/drivers/gpu/drm/i915/intel_sideband.h
+++ b/drivers/gpu/drm/i915/intel_sideband.h
@@ -132,6 +132,10 @@ int sandybridge_pcode_read(struct drm_i915_private *i915, u32 mbox,
int sandybridge_pcode_write_timeout(struct drm_i915_private *i915, u32 mbox,
u32 val, int fast_timeout_us,
int slow_timeout_ms);
+int sandybridge_pcode_write_read_timeout(struct drm_i915_private *i915,
+ u32 mbox, u32 *val, u32 *val1,
+ int fast_timeout_us,
+ int slow_timeout_ms);
#define sandybridge_pcode_write(i915, mbox, val) \
sandybridge_pcode_write_timeout(i915, mbox, val, 500, 0)
--
2.25.2
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 16+ messages in thread
* [Intel-gfx] [PATCH 2/6] drm/i915/display: Add intel_display_power_get_without_ack()
2020-03-18 23:59 [Intel-gfx] [PATCH 1/6] drm/i915/tc/tgl: Implement TCCOLD sequences José Roberto de Souza
@ 2020-03-18 23:59 ` José Roberto de Souza
2020-03-18 23:59 ` [Intel-gfx] [PATCH 3/6] drm/i915/display: Implement intel_display_power_wait_enable_ack() José Roberto de Souza
` (7 subsequent siblings)
8 siblings, 0 replies; 16+ messages in thread
From: José Roberto de Souza @ 2020-03-18 23:59 UTC (permalink / raw)
To: intel-gfx; +Cc: Cooper Chiou, Kai-Heng Feng
To implement ICL TC static sequences is required to get the port aux
powerwell without wait for hardware ack.
Cc: Imre Deak <imre.deak@intel.com>
Cc: Cooper Chiou <cooper.chiou@intel.com>
Cc: Kai-Heng Feng <kai.heng.feng@canonical.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
---
.../drm/i915/display/intel_display_power.c | 71 +++++++++++++++----
.../drm/i915/display/intel_display_power.h | 12 ++++
2 files changed, 71 insertions(+), 12 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c b/drivers/gpu/drm/i915/display/intel_display_power.c
index 246e406bb385..9035b220dfa0 100644
--- a/drivers/gpu/drm/i915/display/intel_display_power.c
+++ b/drivers/gpu/drm/i915/display/intel_display_power.c
@@ -157,14 +157,24 @@ intel_display_power_domain_str(enum intel_display_power_domain domain)
}
}
-static void intel_power_well_enable(struct drm_i915_private *dev_priv,
- struct i915_power_well *power_well)
+static void _intel_power_well_enable(struct drm_i915_private *dev_priv,
+ struct i915_power_well *power_well,
+ bool wait_ack)
{
drm_dbg_kms(&dev_priv->drm, "enabling %s\n", power_well->desc->name);
- power_well->desc->ops->enable(dev_priv, power_well);
+ if (wait_ack || !power_well->desc->ops->enable_without_ack)
+ power_well->desc->ops->enable(dev_priv, power_well);
+ else
+ power_well->desc->ops->enable_without_ack(dev_priv, power_well);
power_well->hw_enabled = true;
}
+static void intel_power_well_enable(struct drm_i915_private *dev_priv,
+ struct i915_power_well *power_well)
+{
+ _intel_power_well_enable(dev_priv, power_well, true);
+}
+
static void intel_power_well_disable(struct drm_i915_private *dev_priv,
struct i915_power_well *power_well)
{
@@ -174,10 +184,11 @@ static void intel_power_well_disable(struct drm_i915_private *dev_priv,
}
static void intel_power_well_get(struct drm_i915_private *dev_priv,
- struct i915_power_well *power_well)
+ struct i915_power_well *power_well,
+ bool wait_ack)
{
if (!power_well->count++)
- intel_power_well_enable(dev_priv, power_well);
+ _intel_power_well_enable(dev_priv, power_well, wait_ack);
}
static void intel_power_well_put(struct drm_i915_private *dev_priv,
@@ -353,8 +364,9 @@ static void gen9_wait_for_power_well_fuses(struct drm_i915_private *dev_priv,
SKL_FUSE_PG_DIST_STATUS(pg), 1));
}
-static void hsw_power_well_enable(struct drm_i915_private *dev_priv,
- struct i915_power_well *power_well)
+static void _hsw_power_well_enable(struct drm_i915_private *dev_priv,
+ struct i915_power_well *power_well,
+ bool wait_ack)
{
const struct i915_power_well_regs *regs = power_well->desc->hsw.regs;
int pw_idx = power_well->desc->hsw.idx;
@@ -379,7 +391,8 @@ static void hsw_power_well_enable(struct drm_i915_private *dev_priv,
val = intel_de_read(dev_priv, regs->driver);
intel_de_write(dev_priv, regs->driver,
val | HSW_PWR_WELL_CTL_REQ(pw_idx));
- hsw_wait_for_power_well_enable(dev_priv, power_well);
+ if (wait_ack)
+ hsw_wait_for_power_well_enable(dev_priv, power_well);
/* Display WA #1178: cnl */
if (IS_CANNONLAKE(dev_priv) &&
@@ -398,6 +411,12 @@ static void hsw_power_well_enable(struct drm_i915_private *dev_priv,
power_well->desc->hsw.has_vga);
}
+static void hsw_power_well_enable(struct drm_i915_private *dev_priv,
+ struct i915_power_well *power_well)
+{
+ _hsw_power_well_enable(dev_priv, power_well, true);
+}
+
static void hsw_power_well_disable(struct drm_i915_private *dev_priv,
struct i915_power_well *power_well)
{
@@ -1960,7 +1979,8 @@ intel_display_power_grab_async_put_ref(struct drm_i915_private *dev_priv,
static void
__intel_display_power_get_domain(struct drm_i915_private *dev_priv,
- enum intel_display_power_domain domain)
+ enum intel_display_power_domain domain,
+ bool wait_ack)
{
struct i915_power_domains *power_domains = &dev_priv->power_domains;
struct i915_power_well *power_well;
@@ -1969,7 +1989,7 @@ __intel_display_power_get_domain(struct drm_i915_private *dev_priv,
return;
for_each_power_domain_well(dev_priv, power_well, BIT_ULL(domain))
- intel_power_well_get(dev_priv, power_well);
+ intel_power_well_get(dev_priv, power_well, wait_ack);
power_domains->domain_use_count[domain]++;
}
@@ -1993,7 +2013,34 @@ intel_wakeref_t intel_display_power_get(struct drm_i915_private *dev_priv,
intel_wakeref_t wakeref = intel_runtime_pm_get(&dev_priv->runtime_pm);
mutex_lock(&power_domains->lock);
- __intel_display_power_get_domain(dev_priv, domain);
+ __intel_display_power_get_domain(dev_priv, domain, true);
+ mutex_unlock(&power_domains->lock);
+
+ return wakeref;
+}
+
+/**
+ * intel_display_power_get_without_ack - grab a power domain reference without
+ * wait for HW ack
+ * @dev_priv: i915 device instance
+ * @domain: power domain to reference
+ *
+ * This function grabs a power domain reference for @domain and ensures that the
+ * power domain and all its parents are powered up but it don't wait for
+ * hardware ack if supported by each powerwell. Users should only grab a
+ * reference to the innermost power domain they need.
+ *
+ * Any power domain reference obtained by this function must have a symmetric
+ * call to intel_display_power_put() to release the reference again.
+ */
+intel_wakeref_t intel_display_power_get_without_ack(struct drm_i915_private *dev_priv,
+ enum intel_display_power_domain domain)
+{
+ struct i915_power_domains *power_domains = &dev_priv->power_domains;
+ intel_wakeref_t wakeref = intel_runtime_pm_get(&dev_priv->runtime_pm);
+
+ mutex_lock(&power_domains->lock);
+ __intel_display_power_get_domain(dev_priv, domain, false);
mutex_unlock(&power_domains->lock);
return wakeref;
@@ -2026,7 +2073,7 @@ intel_display_power_get_if_enabled(struct drm_i915_private *dev_priv,
mutex_lock(&power_domains->lock);
if (__intel_display_power_is_enabled(dev_priv, domain)) {
- __intel_display_power_get_domain(dev_priv, domain);
+ __intel_display_power_get_domain(dev_priv, domain, true);
is_enabled = true;
} else {
is_enabled = false;
diff --git a/drivers/gpu/drm/i915/display/intel_display_power.h b/drivers/gpu/drm/i915/display/intel_display_power.h
index da64a5edae7a..5db86cc862c3 100644
--- a/drivers/gpu/drm/i915/display/intel_display_power.h
+++ b/drivers/gpu/drm/i915/display/intel_display_power.h
@@ -129,6 +129,16 @@ struct i915_power_well_ops {
*/
void (*enable)(struct drm_i915_private *dev_priv,
struct i915_power_well *power_well);
+
+ /*
+ * Enable the well and resources that depend on it (for example
+ * interrupts located on the well) without reading HW ack. Called after
+ * the 0->1 refcount transition.
+ * This will be used by TC subsystem and it is a optional hook.
+ */
+ void (*enable_without_ack)(struct drm_i915_private *dev_priv,
+ struct i915_power_well *power_well);
+
/*
* Disable the well and resources that depend on it. Called after
* the 1->0 refcount transition.
@@ -270,6 +280,8 @@ bool __intel_display_power_is_enabled(struct drm_i915_private *dev_priv,
enum intel_display_power_domain domain);
intel_wakeref_t intel_display_power_get(struct drm_i915_private *dev_priv,
enum intel_display_power_domain domain);
+intel_wakeref_t intel_display_power_get_without_ack(struct drm_i915_private *dev_priv,
+ enum intel_display_power_domain domain);
intel_wakeref_t
intel_display_power_get_if_enabled(struct drm_i915_private *dev_priv,
enum intel_display_power_domain domain);
--
2.25.2
_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 16+ messages in thread
* [Intel-gfx] [PATCH 3/6] drm/i915/display: Implement intel_display_power_wait_enable_ack()
2020-03-18 23:59 [Intel-gfx] [PATCH 1/6] drm/i915/tc/tgl: Implement TCCOLD sequences José Roberto de Souza
2020-03-18 23:59 ` [Intel-gfx] [PATCH 2/6] drm/i915/display: Add intel_display_power_get_without_ack() José Roberto de Souza
@ 2020-03-18 23:59 ` José Roberto de Souza
2020-03-18 23:59 ` [Intel-gfx] [PATCH 4/6] drm/i915/display: Add intel_aux_ch_to_power_domain() José Roberto de Souza
` (6 subsequent siblings)
8 siblings, 0 replies; 16+ messages in thread
From: José Roberto de Souza @ 2020-03-18 23:59 UTC (permalink / raw)
To: intel-gfx; +Cc: Cooper Chiou, Kai-Heng Feng
This function is meant to be used after
intel_display_power_get_without_ack() this way we can be sure that the
HW tied to the powerdomain will be powered and ready.
Cc: Imre Deak <imre.deak@intel.com>
Cc: Cooper Chiou <cooper.chiou@intel.com>
Cc: Kai-Heng Feng <kai.heng.feng@canonical.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
---
.../drm/i915/display/intel_display_power.c | 29 +++++++++++++++++++
.../drm/i915/display/intel_display_power.h | 9 ++++++
2 files changed, 38 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c b/drivers/gpu/drm/i915/display/intel_display_power.c
index 9035b220dfa0..a7e531b64e16 100644
--- a/drivers/gpu/drm/i915/display/intel_display_power.c
+++ b/drivers/gpu/drm/i915/display/intel_display_power.c
@@ -2328,6 +2328,35 @@ intel_display_power_flush_work_sync(struct drm_i915_private *i915)
drm_WARN_ON(&i915->drm, power_domains->async_put_wakeref);
}
+/**
+ * intel_display_power_wait_enable_ack - wait for enabled hardware ack
+ * @dev_priv: i915 device instance
+ * @domain: power domain to reference
+ *
+ * This function must be called after intel_display_power_get_without_ack() and
+ * only in power domains that implements it.
+ */
+void intel_display_power_wait_enable_ack(struct drm_i915_private *dev_priv,
+ enum intel_display_power_domain domain)
+{
+ struct i915_power_domains *power_domains = &dev_priv->power_domains;
+ struct i915_power_well *power_well;
+
+ mutex_lock(&power_domains->lock);
+
+ for_each_power_domain_well_reverse(dev_priv, power_well,
+ BIT_ULL(domain)) {
+ if (drm_WARN_ON(&dev_priv->drm,
+ !power_well->desc->ops->wait_enable_ack))
+ break;
+
+ power_well->desc->ops->wait_enable_ack(dev_priv, power_well);
+ break;
+ }
+
+ mutex_unlock(&power_domains->lock);
+}
+
#if IS_ENABLED(CONFIG_DRM_I915_DEBUG_RUNTIME_PM)
/**
* intel_display_power_put - release a power domain reference
diff --git a/drivers/gpu/drm/i915/display/intel_display_power.h b/drivers/gpu/drm/i915/display/intel_display_power.h
index 5db86cc862c3..108096177deb 100644
--- a/drivers/gpu/drm/i915/display/intel_display_power.h
+++ b/drivers/gpu/drm/i915/display/intel_display_power.h
@@ -148,6 +148,13 @@ struct i915_power_well_ops {
/* Returns the hw enabled state. */
bool (*is_enabled)(struct drm_i915_private *dev_priv,
struct i915_power_well *power_well);
+
+ /*
+ * Waits for hardware enabling ack, this is meant to be used together
+ * with enable_without_ack() and also optional.
+ */
+ void (*wait_enable_ack)(struct drm_i915_private *dev_priv,
+ struct i915_power_well *power_well);
};
struct i915_power_well_regs {
@@ -291,6 +298,8 @@ void __intel_display_power_put_async(struct drm_i915_private *i915,
enum intel_display_power_domain domain,
intel_wakeref_t wakeref);
void intel_display_power_flush_work(struct drm_i915_private *i915);
+void intel_display_power_wait_enable_ack(struct drm_i915_private *dev_priv,
+ enum intel_display_power_domain domain);
#if IS_ENABLED(CONFIG_DRM_I915_DEBUG_RUNTIME_PM)
void intel_display_power_put(struct drm_i915_private *dev_priv,
enum intel_display_power_domain domain,
--
2.25.2
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 16+ messages in thread
* [Intel-gfx] [PATCH 4/6] drm/i915/display: Add intel_aux_ch_to_power_domain()
2020-03-18 23:59 [Intel-gfx] [PATCH 1/6] drm/i915/tc/tgl: Implement TCCOLD sequences José Roberto de Souza
2020-03-18 23:59 ` [Intel-gfx] [PATCH 2/6] drm/i915/display: Add intel_display_power_get_without_ack() José Roberto de Souza
2020-03-18 23:59 ` [Intel-gfx] [PATCH 3/6] drm/i915/display: Implement intel_display_power_wait_enable_ack() José Roberto de Souza
@ 2020-03-18 23:59 ` José Roberto de Souza
2020-03-18 23:59 ` [Intel-gfx] [PATCH 5/6] drm/i915/tc/icl: Implement the TC cold exit sequence José Roberto de Souza
` (5 subsequent siblings)
8 siblings, 0 replies; 16+ messages in thread
From: José Roberto de Souza @ 2020-03-18 23:59 UTC (permalink / raw)
To: intel-gfx; +Cc: Cooper Chiou, Kai-Heng Feng
This is a similar function to intel_aux_power_domain() but it do not
care about TBT ports, this will be needed by GEN11 TC sequences.
Cc: Imre Deak <imre.deak@intel.com>
Cc: Cooper Chiou <cooper.chiou@intel.com>
Cc: Kai-Heng Feng <kai.heng.feng@canonical.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
---
drivers/gpu/drm/i915/display/intel_display.c | 14 ++++++++++++--
drivers/gpu/drm/i915/display/intel_display.h | 2 ++
2 files changed, 14 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 8f23c4d51c33..151e49ee6161 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -7312,7 +7312,17 @@ intel_aux_power_domain(struct intel_digital_port *dig_port)
}
}
- switch (dig_port->aux_ch) {
+ return intel_aux_ch_to_power_domain(dig_port->aux_ch);
+}
+
+/*
+ * Converts aux_ch to power_domain without caring about TBT ports for that use
+ * intel_aux_power_domain()
+ */
+enum intel_display_power_domain
+intel_aux_ch_to_power_domain(enum aux_ch aux_ch)
+{
+ switch (aux_ch) {
case AUX_CH_A:
return POWER_DOMAIN_AUX_A;
case AUX_CH_B:
@@ -7328,7 +7338,7 @@ intel_aux_power_domain(struct intel_digital_port *dig_port)
case AUX_CH_G:
return POWER_DOMAIN_AUX_G;
default:
- MISSING_CASE(dig_port->aux_ch);
+ MISSING_CASE(aux_ch);
return POWER_DOMAIN_AUX_A;
}
}
diff --git a/drivers/gpu/drm/i915/display/intel_display.h b/drivers/gpu/drm/i915/display/intel_display.h
index adb1225a3480..ad50119c0453 100644
--- a/drivers/gpu/drm/i915/display/intel_display.h
+++ b/drivers/gpu/drm/i915/display/intel_display.h
@@ -579,6 +579,8 @@ void hsw_disable_ips(const struct intel_crtc_state *crtc_state);
enum intel_display_power_domain intel_port_to_power_domain(enum port port);
enum intel_display_power_domain
intel_aux_power_domain(struct intel_digital_port *dig_port);
+enum intel_display_power_domain
+intel_aux_ch_to_power_domain(enum aux_ch aux_ch);
void intel_mode_from_pipe_config(struct drm_display_mode *mode,
struct intel_crtc_state *pipe_config);
void intel_crtc_arm_fifo_underrun(struct intel_crtc *crtc,
--
2.25.2
_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 16+ messages in thread
* [Intel-gfx] [PATCH 5/6] drm/i915/tc/icl: Implement the TC cold exit sequence
2020-03-18 23:59 [Intel-gfx] [PATCH 1/6] drm/i915/tc/tgl: Implement TCCOLD sequences José Roberto de Souza
` (2 preceding siblings ...)
2020-03-18 23:59 ` [Intel-gfx] [PATCH 4/6] drm/i915/display: Add intel_aux_ch_to_power_domain() José Roberto de Souza
@ 2020-03-18 23:59 ` José Roberto de Souza
2020-03-19 17:45 ` [Intel-gfx] [PATCH v2 " José Roberto de Souza
2020-03-20 13:11 ` Dan Carpenter
2020-03-18 23:59 ` [Intel-gfx] [PATCH 6/6] drm/i915/dp: Get TC link reference during DP detection José Roberto de Souza
` (4 subsequent siblings)
8 siblings, 2 replies; 16+ messages in thread
From: José Roberto de Souza @ 2020-03-18 23:59 UTC (permalink / raw)
To: intel-gfx; +Cc: Cooper Chiou, Kai-Heng Feng
This is required for legacy/static TC ports as IOM is not aware of
the connection and will not trigger the TC cold exit.
Just request PCODE to exit TCCOLD is not enough as it could enter
again be driver makes use of the port, to prevent it BSpec states that
aux powerwell should be held.
So before detecting the mode, aux power is requested without wait for
hardware ack, PCODE is requested to exit TCCOLD and the TC detection
sequences follows as normal.
After detection if mode is not static aux can be powered off otherwise
we need to wait for HW ack as future calls to intel_display_power_get()
over aux will not check for HW ack.
BSpec: 21750
Cc: Imre Deak <imre.deak@intel.com>
Cc: Cooper Chiou <cooper.chiou@intel.com>
Cc: Kai-Heng Feng <kai.heng.feng@canonical.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
---
.../drm/i915/display/intel_display_power.c | 30 +++++++++-
.../drm/i915/display/intel_display_types.h | 1 +
drivers/gpu/drm/i915/display/intel_tc.c | 56 +++++++++++++++++--
drivers/gpu/drm/i915/i915_reg.h | 1 +
4 files changed, 80 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c b/drivers/gpu/drm/i915/display/intel_display_power.c
index a7e531b64e16..71a4c5d790ea 100644
--- a/drivers/gpu/drm/i915/display/intel_display_power.c
+++ b/drivers/gpu/drm/i915/display/intel_display_power.c
@@ -573,8 +573,9 @@ static void icl_tc_port_assert_ref_held(struct drm_i915_private *dev_priv,
#define TGL_AUX_PW_TO_TC_PORT(pw_idx) ((pw_idx) - TGL_PW_CTL_IDX_AUX_TC1)
static void
-icl_tc_phy_aux_power_well_enable(struct drm_i915_private *dev_priv,
- struct i915_power_well *power_well)
+_icl_tc_phy_aux_power_well_enable(struct drm_i915_private *dev_priv,
+ struct i915_power_well *power_well,
+ bool wait_ack)
{
enum aux_ch aux_ch = icl_tc_phy_aux_ch(dev_priv, power_well);
u32 val;
@@ -587,7 +588,7 @@ icl_tc_phy_aux_power_well_enable(struct drm_i915_private *dev_priv,
val |= DP_AUX_CH_CTL_TBT_IO;
intel_de_write(dev_priv, DP_AUX_CH_CTL(aux_ch), val);
- hsw_power_well_enable(dev_priv, power_well);
+ _hsw_power_well_enable(dev_priv, power_well, wait_ack);
if (INTEL_GEN(dev_priv) >= 12 && !power_well->desc->hsw.is_tc_tbt) {
enum tc_port tc_port;
@@ -603,6 +604,20 @@ icl_tc_phy_aux_power_well_enable(struct drm_i915_private *dev_priv,
}
}
+static void
+icl_tc_phy_aux_power_well_enable(struct drm_i915_private *dev_priv,
+ struct i915_power_well *power_well)
+{
+ _icl_tc_phy_aux_power_well_enable(dev_priv, power_well, true);
+}
+
+static void
+icl_tc_phy_aux_power_well_enable_without_ack(struct drm_i915_private *dev_priv,
+ struct i915_power_well *power_well)
+{
+ _icl_tc_phy_aux_power_well_enable(dev_priv, power_well, false);
+}
+
static void
icl_tc_phy_aux_power_well_disable(struct drm_i915_private *dev_priv,
struct i915_power_well *power_well)
@@ -642,6 +657,13 @@ static bool hsw_power_well_enabled(struct drm_i915_private *dev_priv,
return (val & mask) == mask;
}
+static void
+hsw_power_well_wait_ack(struct drm_i915_private *dev_priv,
+ struct i915_power_well *power_well)
+{
+ hsw_wait_for_power_well_enable(dev_priv, power_well);
+}
+
static void assert_can_enable_dc9(struct drm_i915_private *dev_priv)
{
drm_WARN_ONCE(&dev_priv->drm,
@@ -3582,8 +3604,10 @@ static const struct i915_power_well_ops icl_combo_phy_aux_power_well_ops = {
static const struct i915_power_well_ops icl_tc_phy_aux_power_well_ops = {
.sync_hw = hsw_power_well_sync_hw,
.enable = icl_tc_phy_aux_power_well_enable,
+ .enable_without_ack = icl_tc_phy_aux_power_well_enable_without_ack,
.disable = icl_tc_phy_aux_power_well_disable,
.is_enabled = hsw_power_well_enabled,
+ .wait_enable_ack = hsw_power_well_wait_ack,
};
static const struct i915_power_well_regs icl_aux_power_well_regs = {
diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
index 5e00e611f077..9b90be43d67d 100644
--- a/drivers/gpu/drm/i915/display/intel_display_types.h
+++ b/drivers/gpu/drm/i915/display/intel_display_types.h
@@ -1386,6 +1386,7 @@ struct intel_digital_port {
enum tc_port_mode tc_mode;
enum phy_fia tc_phy_fia;
u8 tc_phy_fia_idx;
+ intel_wakeref_t tc_cold_wakeref;
void (*write_infoframe)(struct intel_encoder *encoder,
const struct intel_crtc_state *crtc_state,
diff --git a/drivers/gpu/drm/i915/display/intel_tc.c b/drivers/gpu/drm/i915/display/intel_tc.c
index e4c5de5ce874..e33dad9646a5 100644
--- a/drivers/gpu/drm/i915/display/intel_tc.c
+++ b/drivers/gpu/drm/i915/display/intel_tc.c
@@ -416,9 +416,6 @@ static void intel_tc_port_reset_mode(struct intel_digital_port *dig_port,
enum tc_port_mode old_tc_mode = dig_port->tc_mode;
intel_display_power_flush_work(i915);
- drm_WARN_ON(&i915->drm,
- intel_display_power_is_enabled(i915,
- intel_aux_power_domain(dig_port)));
icl_tc_phy_disconnect(dig_port);
icl_tc_phy_connect(dig_port, required_lanes);
@@ -528,6 +525,35 @@ static inline int tgl_tc_cold_request(struct intel_digital_port *dig_port,
return ret;
}
+static inline int icl_tc_cold_request(struct intel_digital_port *dig_port,
+ bool block)
+{
+ struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
+ enum intel_display_power_domain aux_domain;
+ int ret;
+
+ aux_domain = intel_aux_ch_to_power_domain(dig_port->aux_ch);
+
+ if (block) {
+ dig_port->tc_cold_wakeref =
+ intel_display_power_get_without_ack(i915, aux_domain);
+
+ do {
+ ret = sandybridge_pcode_write_timeout(i915,
+ ICL_PCODE_EXIT_TCCOLD,
+ 0, 250, 1);
+
+ } while (ret == -EAGAIN);
+ } else if (dig_port->tc_mode == TC_PORT_LEGACY) {
+ drm_WARN_ON(&i915->drm, !dig_port->tc_lock_wakeref);
+ intel_display_power_put(i915, aux_domain,
+ dig_port->tc_cold_wakeref);
+ dig_port->tc_cold_wakeref = 0;
+ }
+
+ return ret;
+}
+
static int tc_cold_request(struct intel_digital_port *dig_port, bool block)
{
struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
@@ -536,8 +562,7 @@ static int tc_cold_request(struct intel_digital_port *dig_port, bool block)
if (INTEL_GEN(i915) >= 12)
ret = tgl_tc_cold_request(dig_port, block);
else
- /* TODO: implement GEN11 TCCOLD sequences */
- ret = 0;
+ ret = icl_tc_cold_request(dig_port, block);
drm_dbg_kms(&i915->drm, "Port %s: TCCOLD %sblock %s\n",
dig_port->tc_port_name, (block ? "" : "un"),
@@ -546,6 +571,26 @@ static int tc_cold_request(struct intel_digital_port *dig_port, bool block)
return ret;
}
+static void tc_cold_after_reset_mode(struct intel_digital_port *dig_port)
+{
+ struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
+ enum intel_display_power_domain aux_domain;
+
+ if (INTEL_GEN(i915) >= 12)
+ return;
+
+ aux_domain = intel_aux_ch_to_power_domain(dig_port->aux_ch);
+
+ if (dig_port->tc_mode == TC_PORT_LEGACY) {
+ intel_display_power_wait_enable_ack(i915, aux_domain);
+ } else {
+ drm_WARN_ON(&i915->drm, !dig_port->tc_cold_wakeref);
+ intel_display_power_put(i915, aux_domain,
+ dig_port->tc_cold_wakeref);
+ dig_port->tc_cold_wakeref = 0;
+ }
+}
+
static void __intel_tc_port_lock(struct intel_digital_port *dig_port,
int required_lanes)
{
@@ -560,6 +605,7 @@ static void __intel_tc_port_lock(struct intel_digital_port *dig_port,
tc_cold_request(dig_port, true);
intel_tc_port_needs_reset(dig_port);
intel_tc_port_reset_mode(dig_port, required_lanes);
+ tc_cold_after_reset_mode(dig_port);
}
drm_WARN_ON(&i915->drm, dig_port->tc_lock_wakeref);
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 7e341d9945b3..8d4f40a70a4d 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -9017,6 +9017,7 @@ enum {
#define ICL_PCODE_MEM_SS_READ_QGV_POINT_INFO(point) (((point) << 16) | (0x1 << 8))
#define GEN6_PCODE_READ_D_COMP 0x10
#define GEN6_PCODE_WRITE_D_COMP 0x11
+#define ICL_PCODE_EXIT_TCCOLD 0x12
#define HSW_PCODE_DE_WRITE_FREQ_REQ 0x17
#define DISPLAY_IPS_CONTROL 0x19
#define TGL_PCODE_TCCOLD 0x26
--
2.25.2
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 16+ messages in thread
* [Intel-gfx] [PATCH 6/6] drm/i915/dp: Get TC link reference during DP detection
2020-03-18 23:59 [Intel-gfx] [PATCH 1/6] drm/i915/tc/tgl: Implement TCCOLD sequences José Roberto de Souza
` (3 preceding siblings ...)
2020-03-18 23:59 ` [Intel-gfx] [PATCH 5/6] drm/i915/tc/icl: Implement the TC cold exit sequence José Roberto de Souza
@ 2020-03-18 23:59 ` José Roberto de Souza
2020-03-19 0:37 ` [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/6] drm/i915/tc/tgl: Implement TCCOLD sequences Patchwork
` (3 subsequent siblings)
8 siblings, 0 replies; 16+ messages in thread
From: José Roberto de Souza @ 2020-03-18 23:59 UTC (permalink / raw)
To: intel-gfx; +Cc: Cooper Chiou, Kai-Heng Feng
As now the cost to lock and use a TC port is higher due the
implementation of the TCCOLD sequences it is worty to hold a reference
of the TC port to avoid all this locking at every aux transaction
part of the DisplayPort detection.
Cc: Imre Deak <imre.deak@intel.com>
Cc: Cooper Chiou <cooper.chiou@intel.com>
Cc: Kai-Heng Feng <kai.heng.feng@canonical.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
---
drivers/gpu/drm/i915/display/intel_dp.c | 19 ++++++++++++++-----
1 file changed, 14 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index ef2e06e292d5..89b52211928b 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -5718,6 +5718,7 @@ intel_dp_detect(struct drm_connector *connector,
struct intel_dp *intel_dp = intel_attached_dp(to_intel_connector(connector));
struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
struct intel_encoder *encoder = &dig_port->base;
+ enum phy phy = intel_port_to_phy(dev_priv, encoder->port);
enum drm_connector_status status;
drm_dbg_kms(&dev_priv->drm, "[CONNECTOR:%d:%s]\n",
@@ -5726,12 +5727,17 @@ intel_dp_detect(struct drm_connector *connector,
!drm_modeset_is_locked(&dev_priv->drm.mode_config.connection_mutex));
/* Can't disconnect eDP */
- if (intel_dp_is_edp(intel_dp))
+ if (intel_dp_is_edp(intel_dp)) {
status = edp_detect(intel_dp);
- else if (intel_digital_port_connected(encoder))
- status = intel_dp_detect_dpcd(intel_dp);
- else
- status = connector_status_disconnected;
+ } else {
+ if (intel_phy_is_tc(dev_priv, phy))
+ intel_tc_port_get_link(dig_port, 1);
+
+ if (intel_digital_port_connected(encoder))
+ status = intel_dp_detect_dpcd(intel_dp);
+ else
+ status = connector_status_disconnected;
+ }
if (status == connector_status_disconnected) {
memset(&intel_dp->compliance, 0, sizeof(intel_dp->compliance));
@@ -5809,6 +5815,9 @@ intel_dp_detect(struct drm_connector *connector,
if (status != connector_status_connected && !intel_dp->is_mst)
intel_dp_unset_edid(intel_dp);
+ if (intel_phy_is_tc(dev_priv, phy))
+ intel_tc_port_put_link(dig_port);
+
/*
* Make sure the refs for power wells enabled during detect are
* dropped to avoid a new detect cycle triggered by HPD polling.
--
2.25.2
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 16+ messages in thread
* [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/6] drm/i915/tc/tgl: Implement TCCOLD sequences
2020-03-18 23:59 [Intel-gfx] [PATCH 1/6] drm/i915/tc/tgl: Implement TCCOLD sequences José Roberto de Souza
` (4 preceding siblings ...)
2020-03-18 23:59 ` [Intel-gfx] [PATCH 6/6] drm/i915/dp: Get TC link reference during DP detection José Roberto de Souza
@ 2020-03-19 0:37 ` Patchwork
2020-03-19 2:34 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
` (2 subsequent siblings)
8 siblings, 0 replies; 16+ messages in thread
From: Patchwork @ 2020-03-19 0:37 UTC (permalink / raw)
To: José Roberto de Souza; +Cc: intel-gfx
== Series Details ==
Series: series starting with [1/6] drm/i915/tc/tgl: Implement TCCOLD sequences
URL : https://patchwork.freedesktop.org/series/74851/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_8154 -> Patchwork_17018
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17018/index.html
Known issues
------------
Here are the changes found in Patchwork_17018 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@i915_pm_rpm@module-reload:
- fi-kbl-guc: [PASS][1] -> [FAIL][2] ([i915#579])
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8154/fi-kbl-guc/igt@i915_pm_rpm@module-reload.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17018/fi-kbl-guc/igt@i915_pm_rpm@module-reload.html
* igt@i915_selftest@live@execlists:
- fi-bxt-dsi: [PASS][3] -> [INCOMPLETE][4] ([fdo#103927] / [i915#656])
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8154/fi-bxt-dsi/igt@i915_selftest@live@execlists.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17018/fi-bxt-dsi/igt@i915_selftest@live@execlists.html
* igt@i915_selftest@live@gem_contexts:
- fi-cml-s: [PASS][5] -> [DMESG-FAIL][6] ([i915#877])
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8154/fi-cml-s/igt@i915_selftest@live@gem_contexts.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17018/fi-cml-s/igt@i915_selftest@live@gem_contexts.html
#### Possible fixes ####
* igt@i915_selftest@live@active:
- {fi-tgl-dsi}: [DMESG-FAIL][7] -> [PASS][8]
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8154/fi-tgl-dsi/igt@i915_selftest@live@active.html
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17018/fi-tgl-dsi/igt@i915_selftest@live@active.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#103927]: https://bugs.freedesktop.org/show_bug.cgi?id=103927
[i915#579]: https://gitlab.freedesktop.org/drm/intel/issues/579
[i915#656]: https://gitlab.freedesktop.org/drm/intel/issues/656
[i915#877]: https://gitlab.freedesktop.org/drm/intel/issues/877
Participating hosts (47 -> 34)
------------------------------
Additional (1): fi-skl-guc
Missing (14): fi-kbl-soraka fi-ilk-m540 fi-bdw-samus fi-kbl-7560u fi-bsw-n3050 fi-hsw-peppy fi-byt-squawks fi-bsw-cyan fi-ctg-p8600 fi-elk-e7500 fi-blb-e6850 fi-byt-clapper fi-skl-6600u fi-snb-2600
Build changes
-------------
* CI: CI-20190529 -> None
* Linux: CI_DRM_8154 -> Patchwork_17018
CI-20190529: 20190529
CI_DRM_8154: 937a904e393752c47b8dfdeed993f04fd75af74d @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_5522: bd2b01af69c9720d54e68a8702a23e4ff3637746 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_17018: b56d3d92d0d79433bc14c62573d2e57132835e72 @ git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
b56d3d92d0d7 drm/i915/dp: Get TC link reference during DP detection
9ac457dd1e6a drm/i915/tc/icl: Implement the TC cold exit sequence
c6cad1aa0dcc drm/i915/display: Add intel_aux_ch_to_power_domain()
d52f8a2c3474 drm/i915/display: Implement intel_display_power_wait_enable_ack()
c582abc2c612 drm/i915/display: Add intel_display_power_get_without_ack()
ad57d1f87abe drm/i915/tc/tgl: Implement TCCOLD sequences
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17018/index.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 16+ messages in thread
* [Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/6] drm/i915/tc/tgl: Implement TCCOLD sequences
2020-03-18 23:59 [Intel-gfx] [PATCH 1/6] drm/i915/tc/tgl: Implement TCCOLD sequences José Roberto de Souza
` (5 preceding siblings ...)
2020-03-19 0:37 ` [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/6] drm/i915/tc/tgl: Implement TCCOLD sequences Patchwork
@ 2020-03-19 2:34 ` Patchwork
2020-03-19 20:50 ` [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/6] drm/i915/tc/tgl: Implement TCCOLD sequences (rev2) Patchwork
2020-03-19 22:50 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
8 siblings, 0 replies; 16+ messages in thread
From: Patchwork @ 2020-03-19 2:34 UTC (permalink / raw)
To: José Roberto de Souza; +Cc: intel-gfx
== Series Details ==
Series: series starting with [1/6] drm/i915/tc/tgl: Implement TCCOLD sequences
URL : https://patchwork.freedesktop.org/series/74851/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_8154_full -> Patchwork_17018_full
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Known issues
------------
Here are the changes found in Patchwork_17018_full that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@gem_ctx_persistence@engines-mixed-process@bcs0:
- shard-skl: [PASS][1] -> [FAIL][2] ([i915#679])
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8154/shard-skl6/igt@gem_ctx_persistence@engines-mixed-process@bcs0.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17018/shard-skl9/igt@gem_ctx_persistence@engines-mixed-process@bcs0.html
* igt@gem_ctx_persistence@engines-mixed-process@vcs0:
- shard-skl: [PASS][3] -> [INCOMPLETE][4] ([i915#1239])
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8154/shard-skl6/igt@gem_ctx_persistence@engines-mixed-process@vcs0.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17018/shard-skl9/igt@gem_ctx_persistence@engines-mixed-process@vcs0.html
* igt@gem_exec_schedule@preemptive-hang-bsd:
- shard-iclb: [PASS][5] -> [SKIP][6] ([fdo#112146])
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8154/shard-iclb5/igt@gem_exec_schedule@preemptive-hang-bsd.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17018/shard-iclb1/igt@gem_exec_schedule@preemptive-hang-bsd.html
* igt@gem_exec_whisper@basic-fds-priority:
- shard-tglb: [PASS][7] -> [INCOMPLETE][8] ([i915#1401])
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8154/shard-tglb1/igt@gem_exec_whisper@basic-fds-priority.html
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17018/shard-tglb5/igt@gem_exec_whisper@basic-fds-priority.html
* igt@gem_ppgtt@flink-and-close-vma-leak:
- shard-kbl: [PASS][9] -> [FAIL][10] ([i915#644])
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8154/shard-kbl7/igt@gem_ppgtt@flink-and-close-vma-leak.html
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17018/shard-kbl6/igt@gem_ppgtt@flink-and-close-vma-leak.html
* igt@i915_pm_rpm@cursor-dpms:
- shard-skl: [PASS][11] -> [INCOMPLETE][12] ([i915#151])
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8154/shard-skl7/igt@i915_pm_rpm@cursor-dpms.html
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17018/shard-skl3/igt@i915_pm_rpm@cursor-dpms.html
* igt@kms_cursor_legacy@2x-long-flip-vs-cursor-atomic:
- shard-glk: [PASS][13] -> [FAIL][14] ([i915#72])
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8154/shard-glk2/igt@kms_cursor_legacy@2x-long-flip-vs-cursor-atomic.html
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17018/shard-glk4/igt@kms_cursor_legacy@2x-long-flip-vs-cursor-atomic.html
* igt@kms_flip@flip-vs-suspend-interruptible:
- shard-apl: [PASS][15] -> [DMESG-WARN][16] ([i915#180]) +1 similar issue
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8154/shard-apl3/igt@kms_flip@flip-vs-suspend-interruptible.html
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17018/shard-apl1/igt@kms_flip@flip-vs-suspend-interruptible.html
- shard-kbl: [PASS][17] -> [DMESG-WARN][18] ([i915#180]) +5 similar issues
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8154/shard-kbl6/igt@kms_flip@flip-vs-suspend-interruptible.html
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17018/shard-kbl2/igt@kms_flip@flip-vs-suspend-interruptible.html
* igt@kms_hdr@bpc-switch:
- shard-skl: [PASS][19] -> [FAIL][20] ([i915#1188])
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8154/shard-skl5/igt@kms_hdr@bpc-switch.html
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17018/shard-skl3/igt@kms_hdr@bpc-switch.html
* igt@kms_plane@plane-panning-bottom-right-suspend-pipe-b-planes:
- shard-skl: [PASS][21] -> [INCOMPLETE][22] ([i915#69])
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8154/shard-skl10/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-b-planes.html
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17018/shard-skl6/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-b-planes.html
* igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min:
- shard-skl: [PASS][23] -> [FAIL][24] ([fdo#108145])
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8154/shard-skl6/igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min.html
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17018/shard-skl9/igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min.html
#### Possible fixes ####
* igt@gem_ctx_isolation@rcs0-s3:
- shard-skl: [INCOMPLETE][25] ([i915#69]) -> [PASS][26]
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8154/shard-skl8/igt@gem_ctx_isolation@rcs0-s3.html
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17018/shard-skl1/igt@gem_ctx_isolation@rcs0-s3.html
* igt@gem_ctx_persistence@close-replace-race:
- shard-skl: [INCOMPLETE][27] ([i915#1402]) -> [PASS][28]
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8154/shard-skl8/igt@gem_ctx_persistence@close-replace-race.html
[28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17018/shard-skl5/igt@gem_ctx_persistence@close-replace-race.html
* igt@gem_ctx_shared@exec-single-timeline-bsd1:
- shard-iclb: [SKIP][29] ([fdo#109276]) -> [PASS][30] +2 similar issues
[29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8154/shard-iclb5/igt@gem_ctx_shared@exec-single-timeline-bsd1.html
[30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17018/shard-iclb1/igt@gem_ctx_shared@exec-single-timeline-bsd1.html
* igt@gem_wait@await-vcs1:
- shard-iclb: [SKIP][31] ([fdo#112080]) -> [PASS][32] +1 similar issue
[31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8154/shard-iclb5/igt@gem_wait@await-vcs1.html
[32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17018/shard-iclb1/igt@gem_wait@await-vcs1.html
* igt@i915_pm_rpm@system-suspend-modeset:
- shard-kbl: [INCOMPLETE][33] ([i915#151] / [i915#155]) -> [PASS][34]
[33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8154/shard-kbl2/igt@i915_pm_rpm@system-suspend-modeset.html
[34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17018/shard-kbl1/igt@i915_pm_rpm@system-suspend-modeset.html
* igt@i915_suspend@forcewake:
- shard-apl: [DMESG-WARN][35] ([i915#180]) -> [PASS][36] +1 similar issue
[35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8154/shard-apl4/igt@i915_suspend@forcewake.html
[36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17018/shard-apl6/igt@i915_suspend@forcewake.html
* igt@kms_atomic@plane_overlay_legacy:
- shard-snb: [SKIP][37] ([fdo#109271]) -> [PASS][38] +2 similar issues
[37]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8154/shard-snb6/igt@kms_atomic@plane_overlay_legacy.html
[38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17018/shard-snb5/igt@kms_atomic@plane_overlay_legacy.html
* igt@kms_cursor_crc@pipe-a-cursor-suspend:
- shard-kbl: [DMESG-WARN][39] ([i915#180]) -> [PASS][40] +4 similar issues
[39]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8154/shard-kbl7/igt@kms_cursor_crc@pipe-a-cursor-suspend.html
[40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17018/shard-kbl6/igt@kms_cursor_crc@pipe-a-cursor-suspend.html
* igt@kms_cursor_legacy@cursor-vs-flip-toggle:
- shard-hsw: [FAIL][41] ([i915#57]) -> [PASS][42]
[41]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8154/shard-hsw1/igt@kms_cursor_legacy@cursor-vs-flip-toggle.html
[42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17018/shard-hsw4/igt@kms_cursor_legacy@cursor-vs-flip-toggle.html
* igt@kms_flip@2x-flip-vs-expired-vblank:
- shard-glk: [FAIL][43] ([i915#79]) -> [PASS][44]
[43]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8154/shard-glk5/igt@kms_flip@2x-flip-vs-expired-vblank.html
[44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17018/shard-glk2/igt@kms_flip@2x-flip-vs-expired-vblank.html
* igt@kms_plane_alpha_blend@pipe-a-coverage-7efc:
- shard-skl: [FAIL][45] ([fdo#108145]) -> [PASS][46]
[45]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8154/shard-skl5/igt@kms_plane_alpha_blend@pipe-a-coverage-7efc.html
[46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17018/shard-skl3/igt@kms_plane_alpha_blend@pipe-a-coverage-7efc.html
* igt@kms_setmode@basic:
- shard-apl: [FAIL][47] ([i915#31]) -> [PASS][48]
[47]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8154/shard-apl6/igt@kms_setmode@basic.html
[48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17018/shard-apl7/igt@kms_setmode@basic.html
#### Warnings ####
* igt@i915_pm_dc@dc6-dpms:
- shard-tglb: [SKIP][49] ([i915#468]) -> [FAIL][50] ([i915#454])
[49]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8154/shard-tglb2/igt@i915_pm_dc@dc6-dpms.html
[50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17018/shard-tglb1/igt@i915_pm_dc@dc6-dpms.html
* igt@i915_pm_rpm@modeset-lpsp-stress:
- shard-snb: [INCOMPLETE][51] ([i915#82]) -> [SKIP][52] ([fdo#109271])
[51]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8154/shard-snb6/igt@i915_pm_rpm@modeset-lpsp-stress.html
[52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17018/shard-snb6/igt@i915_pm_rpm@modeset-lpsp-stress.html
[fdo#108145]: https://bugs.freedesktop.org/show_bug.cgi?id=108145
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#109276]: https://bugs.freedesktop.org/show_bug.cgi?id=109276
[fdo#112080]: https://bugs.freedesktop.org/show_bug.cgi?id=112080
[fdo#112146]: https://bugs.freedesktop.org/show_bug.cgi?id=112146
[i915#1188]: https://gitlab.freedesktop.org/drm/intel/issues/1188
[i915#1239]: https://gitlab.freedesktop.org/drm/intel/issues/1239
[i915#1401]: https://gitlab.freedesktop.org/drm/intel/issues/1401
[i915#1402]: https://gitlab.freedesktop.org/drm/intel/issues/1402
[i915#151]: https://gitlab.freedesktop.org/drm/intel/issues/151
[i915#155]: https://gitlab.freedesktop.org/drm/intel/issues/155
[i915#180]: https://gitlab.freedesktop.org/drm/intel/issues/180
[i915#31]: https://gitlab.freedesktop.org/drm/intel/issues/31
[i915#454]: https://gitlab.freedesktop.org/drm/intel/issues/454
[i915#468]: https://gitlab.freedesktop.org/drm/intel/issues/468
[i915#57]: https://gitlab.freedesktop.org/drm/intel/issues/57
[i915#644]: https://gitlab.freedesktop.org/drm/intel/issues/644
[i915#679]: https://gitlab.freedesktop.org/drm/intel/issues/679
[i915#69]: https://gitlab.freedesktop.org/drm/intel/issues/69
[i915#72]: https://gitlab.freedesktop.org/drm/intel/issues/72
[i915#79]: https://gitlab.freedesktop.org/drm/intel/issues/79
[i915#82]: https://gitlab.freedesktop.org/drm/intel/issues/82
Participating hosts (10 -> 10)
------------------------------
No changes in participating hosts
Build changes
-------------
* CI: CI-20190529 -> None
* Linux: CI_DRM_8154 -> Patchwork_17018
CI-20190529: 20190529
CI_DRM_8154: 937a904e393752c47b8dfdeed993f04fd75af74d @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_5522: bd2b01af69c9720d54e68a8702a23e4ff3637746 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_17018: b56d3d92d0d79433bc14c62573d2e57132835e72 @ git://anongit.freedesktop.org/gfx-ci/linux
piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17018/index.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 16+ messages in thread
* [Intel-gfx] [PATCH v2 5/6] drm/i915/tc/icl: Implement the TC cold exit sequence
2020-03-18 23:59 ` [Intel-gfx] [PATCH 5/6] drm/i915/tc/icl: Implement the TC cold exit sequence José Roberto de Souza
@ 2020-03-19 17:45 ` José Roberto de Souza
2020-03-20 13:11 ` Dan Carpenter
1 sibling, 0 replies; 16+ messages in thread
From: José Roberto de Souza @ 2020-03-19 17:45 UTC (permalink / raw)
To: intel-gfx; +Cc: Cooper Chiou, Kai-Heng Feng
This is required for legacy/static TC ports as IOM is not aware of
the connection and will not trigger the TC cold exit.
Just request PCODE to exit TCCOLD is not enough as it could enter
again be driver makes use of the port, to prevent it BSpec states that
aux powerwell should be held.
So before detecting the mode, aux power is requested without wait for
hardware ack, PCODE is requested to exit TCCOLD and the TC detection
sequences follows as normal.
After detection if mode is not static aux can be powered off otherwise
we need to wait for HW ack as future calls to intel_display_power_get()
over aux will not check for HW ack.
v2:
- fixed typo tc_lock_wakeref to tc_cold_wakeref in icl_tc_cold_request()
BSpec: 21750
Cc: Imre Deak <imre.deak@intel.com>
Cc: Cooper Chiou <cooper.chiou@intel.com>
Cc: Kai-Heng Feng <kai.heng.feng@canonical.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
squash
---
.../drm/i915/display/intel_display_power.c | 30 +++++++++-
.../drm/i915/display/intel_display_types.h | 1 +
drivers/gpu/drm/i915/display/intel_tc.c | 56 +++++++++++++++++--
drivers/gpu/drm/i915/i915_reg.h | 1 +
4 files changed, 80 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c b/drivers/gpu/drm/i915/display/intel_display_power.c
index a7e531b64e16..71a4c5d790ea 100644
--- a/drivers/gpu/drm/i915/display/intel_display_power.c
+++ b/drivers/gpu/drm/i915/display/intel_display_power.c
@@ -573,8 +573,9 @@ static void icl_tc_port_assert_ref_held(struct drm_i915_private *dev_priv,
#define TGL_AUX_PW_TO_TC_PORT(pw_idx) ((pw_idx) - TGL_PW_CTL_IDX_AUX_TC1)
static void
-icl_tc_phy_aux_power_well_enable(struct drm_i915_private *dev_priv,
- struct i915_power_well *power_well)
+_icl_tc_phy_aux_power_well_enable(struct drm_i915_private *dev_priv,
+ struct i915_power_well *power_well,
+ bool wait_ack)
{
enum aux_ch aux_ch = icl_tc_phy_aux_ch(dev_priv, power_well);
u32 val;
@@ -587,7 +588,7 @@ icl_tc_phy_aux_power_well_enable(struct drm_i915_private *dev_priv,
val |= DP_AUX_CH_CTL_TBT_IO;
intel_de_write(dev_priv, DP_AUX_CH_CTL(aux_ch), val);
- hsw_power_well_enable(dev_priv, power_well);
+ _hsw_power_well_enable(dev_priv, power_well, wait_ack);
if (INTEL_GEN(dev_priv) >= 12 && !power_well->desc->hsw.is_tc_tbt) {
enum tc_port tc_port;
@@ -603,6 +604,20 @@ icl_tc_phy_aux_power_well_enable(struct drm_i915_private *dev_priv,
}
}
+static void
+icl_tc_phy_aux_power_well_enable(struct drm_i915_private *dev_priv,
+ struct i915_power_well *power_well)
+{
+ _icl_tc_phy_aux_power_well_enable(dev_priv, power_well, true);
+}
+
+static void
+icl_tc_phy_aux_power_well_enable_without_ack(struct drm_i915_private *dev_priv,
+ struct i915_power_well *power_well)
+{
+ _icl_tc_phy_aux_power_well_enable(dev_priv, power_well, false);
+}
+
static void
icl_tc_phy_aux_power_well_disable(struct drm_i915_private *dev_priv,
struct i915_power_well *power_well)
@@ -642,6 +657,13 @@ static bool hsw_power_well_enabled(struct drm_i915_private *dev_priv,
return (val & mask) == mask;
}
+static void
+hsw_power_well_wait_ack(struct drm_i915_private *dev_priv,
+ struct i915_power_well *power_well)
+{
+ hsw_wait_for_power_well_enable(dev_priv, power_well);
+}
+
static void assert_can_enable_dc9(struct drm_i915_private *dev_priv)
{
drm_WARN_ONCE(&dev_priv->drm,
@@ -3582,8 +3604,10 @@ static const struct i915_power_well_ops icl_combo_phy_aux_power_well_ops = {
static const struct i915_power_well_ops icl_tc_phy_aux_power_well_ops = {
.sync_hw = hsw_power_well_sync_hw,
.enable = icl_tc_phy_aux_power_well_enable,
+ .enable_without_ack = icl_tc_phy_aux_power_well_enable_without_ack,
.disable = icl_tc_phy_aux_power_well_disable,
.is_enabled = hsw_power_well_enabled,
+ .wait_enable_ack = hsw_power_well_wait_ack,
};
static const struct i915_power_well_regs icl_aux_power_well_regs = {
diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
index 5e00e611f077..9b90be43d67d 100644
--- a/drivers/gpu/drm/i915/display/intel_display_types.h
+++ b/drivers/gpu/drm/i915/display/intel_display_types.h
@@ -1386,6 +1386,7 @@ struct intel_digital_port {
enum tc_port_mode tc_mode;
enum phy_fia tc_phy_fia;
u8 tc_phy_fia_idx;
+ intel_wakeref_t tc_cold_wakeref;
void (*write_infoframe)(struct intel_encoder *encoder,
const struct intel_crtc_state *crtc_state,
diff --git a/drivers/gpu/drm/i915/display/intel_tc.c b/drivers/gpu/drm/i915/display/intel_tc.c
index e4c5de5ce874..ccb5ae370973 100644
--- a/drivers/gpu/drm/i915/display/intel_tc.c
+++ b/drivers/gpu/drm/i915/display/intel_tc.c
@@ -416,9 +416,6 @@ static void intel_tc_port_reset_mode(struct intel_digital_port *dig_port,
enum tc_port_mode old_tc_mode = dig_port->tc_mode;
intel_display_power_flush_work(i915);
- drm_WARN_ON(&i915->drm,
- intel_display_power_is_enabled(i915,
- intel_aux_power_domain(dig_port)));
icl_tc_phy_disconnect(dig_port);
icl_tc_phy_connect(dig_port, required_lanes);
@@ -528,6 +525,35 @@ static inline int tgl_tc_cold_request(struct intel_digital_port *dig_port,
return ret;
}
+static inline int icl_tc_cold_request(struct intel_digital_port *dig_port,
+ bool block)
+{
+ struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
+ enum intel_display_power_domain aux_domain;
+ int ret;
+
+ aux_domain = intel_aux_ch_to_power_domain(dig_port->aux_ch);
+
+ if (block) {
+ dig_port->tc_cold_wakeref =
+ intel_display_power_get_without_ack(i915, aux_domain);
+
+ do {
+ ret = sandybridge_pcode_write_timeout(i915,
+ ICL_PCODE_EXIT_TCCOLD,
+ 0, 250, 1);
+
+ } while (ret == -EAGAIN);
+ } else if (dig_port->tc_mode == TC_PORT_LEGACY) {
+ drm_WARN_ON(&i915->drm, !dig_port->tc_cold_wakeref);
+ intel_display_power_put(i915, aux_domain,
+ dig_port->tc_cold_wakeref);
+ dig_port->tc_cold_wakeref = 0;
+ }
+
+ return ret;
+}
+
static int tc_cold_request(struct intel_digital_port *dig_port, bool block)
{
struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
@@ -536,8 +562,7 @@ static int tc_cold_request(struct intel_digital_port *dig_port, bool block)
if (INTEL_GEN(i915) >= 12)
ret = tgl_tc_cold_request(dig_port, block);
else
- /* TODO: implement GEN11 TCCOLD sequences */
- ret = 0;
+ ret = icl_tc_cold_request(dig_port, block);
drm_dbg_kms(&i915->drm, "Port %s: TCCOLD %sblock %s\n",
dig_port->tc_port_name, (block ? "" : "un"),
@@ -546,6 +571,26 @@ static int tc_cold_request(struct intel_digital_port *dig_port, bool block)
return ret;
}
+static void tc_cold_after_reset_mode(struct intel_digital_port *dig_port)
+{
+ struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
+ enum intel_display_power_domain aux_domain;
+
+ if (INTEL_GEN(i915) >= 12)
+ return;
+
+ aux_domain = intel_aux_ch_to_power_domain(dig_port->aux_ch);
+
+ if (dig_port->tc_mode == TC_PORT_LEGACY) {
+ intel_display_power_wait_enable_ack(i915, aux_domain);
+ } else {
+ drm_WARN_ON(&i915->drm, !dig_port->tc_cold_wakeref);
+ intel_display_power_put(i915, aux_domain,
+ dig_port->tc_cold_wakeref);
+ dig_port->tc_cold_wakeref = 0;
+ }
+}
+
static void __intel_tc_port_lock(struct intel_digital_port *dig_port,
int required_lanes)
{
@@ -560,6 +605,7 @@ static void __intel_tc_port_lock(struct intel_digital_port *dig_port,
tc_cold_request(dig_port, true);
intel_tc_port_needs_reset(dig_port);
intel_tc_port_reset_mode(dig_port, required_lanes);
+ tc_cold_after_reset_mode(dig_port);
}
drm_WARN_ON(&i915->drm, dig_port->tc_lock_wakeref);
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 7e341d9945b3..8d4f40a70a4d 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -9017,6 +9017,7 @@ enum {
#define ICL_PCODE_MEM_SS_READ_QGV_POINT_INFO(point) (((point) << 16) | (0x1 << 8))
#define GEN6_PCODE_READ_D_COMP 0x10
#define GEN6_PCODE_WRITE_D_COMP 0x11
+#define ICL_PCODE_EXIT_TCCOLD 0x12
#define HSW_PCODE_DE_WRITE_FREQ_REQ 0x17
#define DISPLAY_IPS_CONTROL 0x19
#define TGL_PCODE_TCCOLD 0x26
--
2.25.2
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 16+ messages in thread
* [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/6] drm/i915/tc/tgl: Implement TCCOLD sequences (rev2)
2020-03-18 23:59 [Intel-gfx] [PATCH 1/6] drm/i915/tc/tgl: Implement TCCOLD sequences José Roberto de Souza
` (6 preceding siblings ...)
2020-03-19 2:34 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
@ 2020-03-19 20:50 ` Patchwork
2020-03-19 22:50 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
8 siblings, 0 replies; 16+ messages in thread
From: Patchwork @ 2020-03-19 20:50 UTC (permalink / raw)
To: Souza, Jose; +Cc: intel-gfx
== Series Details ==
Series: series starting with [1/6] drm/i915/tc/tgl: Implement TCCOLD sequences (rev2)
URL : https://patchwork.freedesktop.org/series/74851/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_8160 -> Patchwork_17027
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17027/index.html
Known issues
------------
Here are the changes found in Patchwork_17027 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@kms_chamelium@hdmi-hpd-fast:
- fi-kbl-7500u: [PASS][1] -> [FAIL][2] ([i915#323])
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8160/fi-kbl-7500u/igt@kms_chamelium@hdmi-hpd-fast.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17027/fi-kbl-7500u/igt@kms_chamelium@hdmi-hpd-fast.html
[i915#323]: https://gitlab.freedesktop.org/drm/intel/issues/323
Participating hosts (37 -> 35)
------------------------------
Additional (6): fi-bsw-n3050 fi-byt-j1900 fi-cfl-8109u fi-skl-6600u fi-bsw-nick fi-skl-6700k2
Missing (8): fi-byt-squawks fi-bsw-cyan fi-snb-2520m fi-gdg-551 fi-elk-e7500 fi-bsw-kefka fi-skl-lmem fi-byt-clapper
Build changes
-------------
* CI: CI-20190529 -> None
* Linux: CI_DRM_8160 -> Patchwork_17027
CI-20190529: 20190529
CI_DRM_8160: 6ba1729e5025761ab74914f6b8aa3288f493e9c7 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_5523: cf6d524007ac51a7d5a48503ea3dd5f01fd4ebab @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_17027: 4f6235744a939c05913c4cb014945655ea1d82f3 @ git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
4f6235744a93 drm/i915/dp: Get TC link reference during DP detection
9ac70989f9f6 drm/i915/tc/icl: Implement the TC cold exit sequence
1781e726775b drm/i915/display: Add intel_aux_ch_to_power_domain()
a940e1299b38 drm/i915/display: Implement intel_display_power_wait_enable_ack()
80fc6f70f951 drm/i915/display: Add intel_display_power_get_without_ack()
61f30e252243 drm/i915/tc/tgl: Implement TCCOLD sequences
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17027/index.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 16+ messages in thread
* [Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [1/6] drm/i915/tc/tgl: Implement TCCOLD sequences (rev2)
2020-03-18 23:59 [Intel-gfx] [PATCH 1/6] drm/i915/tc/tgl: Implement TCCOLD sequences José Roberto de Souza
` (7 preceding siblings ...)
2020-03-19 20:50 ` [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/6] drm/i915/tc/tgl: Implement TCCOLD sequences (rev2) Patchwork
@ 2020-03-19 22:50 ` Patchwork
8 siblings, 0 replies; 16+ messages in thread
From: Patchwork @ 2020-03-19 22:50 UTC (permalink / raw)
To: José Roberto de Souza; +Cc: intel-gfx
== Series Details ==
Series: series starting with [1/6] drm/i915/tc/tgl: Implement TCCOLD sequences (rev2)
URL : https://patchwork.freedesktop.org/series/74851/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_8160_full -> Patchwork_17027_full
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with Patchwork_17027_full absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_17027_full, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in Patchwork_17027_full:
### IGT changes ###
#### Possible regressions ####
* igt@kms_hdr@static-toggle-dpms:
- shard-tglb: NOTRUN -> [SKIP][1]
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17027/shard-tglb6/igt@kms_hdr@static-toggle-dpms.html
Known issues
------------
Here are the changes found in Patchwork_17027_full that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@gem_ctx_persistence@close-replace-race:
- shard-tglb: [PASS][2] -> [INCOMPLETE][3] ([i915#1402])
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8160/shard-tglb5/igt@gem_ctx_persistence@close-replace-race.html
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17027/shard-tglb3/igt@gem_ctx_persistence@close-replace-race.html
- shard-kbl: [PASS][4] -> [INCOMPLETE][5] ([i915#1402])
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8160/shard-kbl7/igt@gem_ctx_persistence@close-replace-race.html
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17027/shard-kbl4/igt@gem_ctx_persistence@close-replace-race.html
* igt@gem_ctx_shared@exec-single-timeline-bsd:
- shard-iclb: [PASS][6] -> [SKIP][7] ([fdo#110841])
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8160/shard-iclb3/igt@gem_ctx_shared@exec-single-timeline-bsd.html
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17027/shard-iclb4/igt@gem_ctx_shared@exec-single-timeline-bsd.html
* igt@gem_exec_parallel@vcs1-fds:
- shard-iclb: [PASS][8] -> [SKIP][9] ([fdo#112080]) +8 similar issues
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8160/shard-iclb1/igt@gem_exec_parallel@vcs1-fds.html
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17027/shard-iclb3/igt@gem_exec_parallel@vcs1-fds.html
* igt@gem_exec_schedule@implicit-read-write-bsd2:
- shard-iclb: [PASS][10] -> [SKIP][11] ([fdo#109276] / [i915#677]) +1 similar issue
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8160/shard-iclb1/igt@gem_exec_schedule@implicit-read-write-bsd2.html
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17027/shard-iclb3/igt@gem_exec_schedule@implicit-read-write-bsd2.html
* igt@gem_exec_schedule@out-order-bsd2:
- shard-iclb: [PASS][12] -> [SKIP][13] ([fdo#109276]) +5 similar issues
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8160/shard-iclb1/igt@gem_exec_schedule@out-order-bsd2.html
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17027/shard-iclb3/igt@gem_exec_schedule@out-order-bsd2.html
* igt@gem_exec_schedule@pi-shared-iova-bsd:
- shard-iclb: [PASS][14] -> [SKIP][15] ([i915#677]) +1 similar issue
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8160/shard-iclb3/igt@gem_exec_schedule@pi-shared-iova-bsd.html
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17027/shard-iclb4/igt@gem_exec_schedule@pi-shared-iova-bsd.html
* igt@gem_exec_schedule@wide-bsd:
- shard-iclb: [PASS][16] -> [SKIP][17] ([fdo#112146]) +5 similar issues
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8160/shard-iclb3/igt@gem_exec_schedule@wide-bsd.html
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17027/shard-iclb1/igt@gem_exec_schedule@wide-bsd.html
* igt@kms_cursor_legacy@2x-long-cursor-vs-flip-legacy:
- shard-hsw: [PASS][18] -> [FAIL][19] ([i915#96])
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8160/shard-hsw6/igt@kms_cursor_legacy@2x-long-cursor-vs-flip-legacy.html
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17027/shard-hsw6/igt@kms_cursor_legacy@2x-long-cursor-vs-flip-legacy.html
* igt@kms_cursor_legacy@basic-flip-after-cursor-legacy:
- shard-glk: [PASS][20] -> [FAIL][21] ([IGT#5] / [i915#697])
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8160/shard-glk1/igt@kms_cursor_legacy@basic-flip-after-cursor-legacy.html
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17027/shard-glk3/igt@kms_cursor_legacy@basic-flip-after-cursor-legacy.html
* igt@kms_flip@flip-vs-expired-vblank:
- shard-skl: [PASS][22] -> [FAIL][23] ([i915#79])
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8160/shard-skl1/igt@kms_flip@flip-vs-expired-vblank.html
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17027/shard-skl6/igt@kms_flip@flip-vs-expired-vblank.html
* igt@kms_frontbuffer_tracking@fbc-suspend:
- shard-apl: [PASS][24] -> [DMESG-WARN][25] ([i915#180]) +2 similar issues
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8160/shard-apl3/igt@kms_frontbuffer_tracking@fbc-suspend.html
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17027/shard-apl1/igt@kms_frontbuffer_tracking@fbc-suspend.html
* igt@kms_frontbuffer_tracking@psr-1p-primscrn-cur-indfb-draw-render:
- shard-skl: [PASS][26] -> [FAIL][27] ([i915#49])
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8160/shard-skl1/igt@kms_frontbuffer_tracking@psr-1p-primscrn-cur-indfb-draw-render.html
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17027/shard-skl6/igt@kms_frontbuffer_tracking@psr-1p-primscrn-cur-indfb-draw-render.html
* igt@kms_hdr@bpc-switch:
- shard-skl: [PASS][28] -> [FAIL][29] ([i915#1188])
[28]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8160/shard-skl6/igt@kms_hdr@bpc-switch.html
[29]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17027/shard-skl2/igt@kms_hdr@bpc-switch.html
* igt@kms_plane@plane-panning-bottom-right-suspend-pipe-a-planes:
- shard-kbl: [PASS][30] -> [DMESG-WARN][31] ([i915#180]) +2 similar issues
[30]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8160/shard-kbl3/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-a-planes.html
[31]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17027/shard-kbl3/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-a-planes.html
* igt@kms_plane_alpha_blend@pipe-c-coverage-7efc:
- shard-skl: [PASS][32] -> [FAIL][33] ([fdo#108145] / [i915#265])
[32]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8160/shard-skl5/igt@kms_plane_alpha_blend@pipe-c-coverage-7efc.html
[33]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17027/shard-skl3/igt@kms_plane_alpha_blend@pipe-c-coverage-7efc.html
* igt@kms_psr@psr2_primary_page_flip:
- shard-iclb: [PASS][34] -> [SKIP][35] ([fdo#109441]) +2 similar issues
[34]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8160/shard-iclb2/igt@kms_psr@psr2_primary_page_flip.html
[35]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17027/shard-iclb5/igt@kms_psr@psr2_primary_page_flip.html
#### Possible fixes ####
* igt@gem_busy@extended-parallel-vcs1:
- shard-iclb: [SKIP][36] ([fdo#112080]) -> [PASS][37] +5 similar issues
[36]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8160/shard-iclb3/igt@gem_busy@extended-parallel-vcs1.html
[37]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17027/shard-iclb4/igt@gem_busy@extended-parallel-vcs1.html
* igt@gem_ctx_persistence@close-replace-race:
- shard-iclb: [INCOMPLETE][38] ([i915#1402]) -> [PASS][39]
[38]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8160/shard-iclb1/igt@gem_ctx_persistence@close-replace-race.html
[39]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17027/shard-iclb3/igt@gem_ctx_persistence@close-replace-race.html
- shard-apl: [INCOMPLETE][40] ([fdo#103927] / [i915#1402]) -> [PASS][41]
[40]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8160/shard-apl4/igt@gem_ctx_persistence@close-replace-race.html
[41]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17027/shard-apl7/igt@gem_ctx_persistence@close-replace-race.html
* igt@gem_ctx_persistence@engines-mixed-process@bcs0:
- shard-iclb: [FAIL][42] ([i915#679]) -> [PASS][43]
[42]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8160/shard-iclb4/igt@gem_ctx_persistence@engines-mixed-process@bcs0.html
[43]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17027/shard-iclb2/igt@gem_ctx_persistence@engines-mixed-process@bcs0.html
* igt@gem_ctx_persistence@engines-mixed-process@vcs0:
- shard-iclb: [INCOMPLETE][44] ([i915#1239]) -> [PASS][45]
[44]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8160/shard-iclb4/igt@gem_ctx_persistence@engines-mixed-process@vcs0.html
[45]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17027/shard-iclb2/igt@gem_ctx_persistence@engines-mixed-process@vcs0.html
* igt@gem_ctx_persistence@legacy-engines-mixed-process@blt:
- shard-tglb: [FAIL][46] ([i915#679]) -> [PASS][47]
[46]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8160/shard-tglb2/igt@gem_ctx_persistence@legacy-engines-mixed-process@blt.html
[47]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17027/shard-tglb6/igt@gem_ctx_persistence@legacy-engines-mixed-process@blt.html
* igt@gem_ctx_persistence@legacy-engines-mixed-process@vebox:
- shard-tglb: [INCOMPLETE][48] ([i915#1239]) -> [PASS][49]
[48]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8160/shard-tglb2/igt@gem_ctx_persistence@legacy-engines-mixed-process@vebox.html
[49]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17027/shard-tglb6/igt@gem_ctx_persistence@legacy-engines-mixed-process@vebox.html
* igt@gem_exec_schedule@implicit-write-read-bsd1:
- shard-iclb: [SKIP][50] ([fdo#109276] / [i915#677]) -> [PASS][51]
[50]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8160/shard-iclb3/igt@gem_exec_schedule@implicit-write-read-bsd1.html
[51]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17027/shard-iclb4/igt@gem_exec_schedule@implicit-write-read-bsd1.html
* igt@gem_exec_schedule@preempt-queue-chain-bsd2:
- shard-iclb: [SKIP][52] ([fdo#109276]) -> [PASS][53] +10 similar issues
[52]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8160/shard-iclb5/igt@gem_exec_schedule@preempt-queue-chain-bsd2.html
[53]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17027/shard-iclb2/igt@gem_exec_schedule@preempt-queue-chain-bsd2.html
* igt@gem_exec_schedule@preemptive-hang-bsd:
- shard-iclb: [SKIP][54] ([fdo#112146]) -> [PASS][55] +5 similar issues
[54]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8160/shard-iclb2/igt@gem_exec_schedule@preemptive-hang-bsd.html
[55]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17027/shard-iclb5/igt@gem_exec_schedule@preemptive-hang-bsd.html
* igt@gem_exec_suspend@basic-s3:
- shard-kbl: [DMESG-WARN][56] ([i915#180]) -> [PASS][57] +5 similar issues
[56]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8160/shard-kbl4/igt@gem_exec_suspend@basic-s3.html
[57]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17027/shard-kbl6/igt@gem_exec_suspend@basic-s3.html
* igt@gem_exec_whisper@basic-fds-forked:
- shard-tglb: [INCOMPLETE][58] ([i915#1318] / [i915#1401]) -> [PASS][59]
[58]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8160/shard-tglb1/igt@gem_exec_whisper@basic-fds-forked.html
[59]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17027/shard-tglb6/igt@gem_exec_whisper@basic-fds-forked.html
* igt@gem_ppgtt@flink-and-close-vma-leak:
- shard-glk: [FAIL][60] ([i915#644]) -> [PASS][61]
[60]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8160/shard-glk8/igt@gem_ppgtt@flink-and-close-vma-leak.html
[61]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17027/shard-glk4/igt@gem_ppgtt@flink-and-close-vma-leak.html
* igt@i915_pm_dc@dc5-dpms:
- shard-iclb: [FAIL][62] ([i915#447]) -> [PASS][63]
[62]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8160/shard-iclb3/igt@i915_pm_dc@dc5-dpms.html
[63]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17027/shard-iclb4/igt@i915_pm_dc@dc5-dpms.html
* igt@kms_flip@flip-vs-expired-vblank-interruptible:
- shard-skl: [FAIL][64] ([i915#46]) -> [PASS][65]
[64]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8160/shard-skl6/igt@kms_flip@flip-vs-expired-vblank-interruptible.html
[65]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17027/shard-skl4/igt@kms_flip@flip-vs-expired-vblank-interruptible.html
* igt@kms_flip@plain-flip-fb-recreate-interruptible:
- shard-glk: [FAIL][66] ([i915#34]) -> [PASS][67] +1 similar issue
[66]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8160/shard-glk4/igt@kms_flip@plain-flip-fb-recreate-interruptible.html
[67]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17027/shard-glk4/igt@kms_flip@plain-flip-fb-recreate-interruptible.html
* igt@kms_hdr@bpc-switch-dpms:
- shard-skl: [FAIL][68] ([i915#1188]) -> [PASS][69] +1 similar issue
[68]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8160/shard-skl4/igt@kms_hdr@bpc-switch-dpms.html
[69]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17027/shard-skl2/igt@kms_hdr@bpc-switch-dpms.html
* igt@kms_plane@plane-panning-bottom-right-suspend-pipe-a-planes:
- shard-apl: [DMESG-WARN][70] ([i915#180]) -> [PASS][71] +1 similar issue
[70]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8160/shard-apl1/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-a-planes.html
[71]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17027/shard-apl3/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-a-planes.html
* igt@kms_plane_alpha_blend@pipe-b-constant-alpha-min:
- shard-skl: [FAIL][72] ([fdo#108145]) -> [PASS][73]
[72]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8160/shard-skl1/igt@kms_plane_alpha_blend@pipe-b-constant-alpha-min.html
[73]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17027/shard-skl6/igt@kms_plane_alpha_blend@pipe-b-constant-alpha-min.html
* igt@kms_plane_alpha_blend@pipe-b-coverage-7efc:
- shard-skl: [FAIL][74] ([fdo#108145] / [i915#265]) -> [PASS][75]
[74]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8160/shard-skl2/igt@kms_plane_alpha_blend@pipe-b-coverage-7efc.html
[75]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17027/shard-skl1/igt@kms_plane_alpha_blend@pipe-b-coverage-7efc.html
* igt@kms_psr2_su@frontbuffer:
- shard-iclb: [SKIP][76] ([fdo#109642] / [fdo#111068]) -> [PASS][77]
[76]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8160/shard-iclb5/igt@kms_psr2_su@frontbuffer.html
[77]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17027/shard-iclb2/igt@kms_psr2_su@frontbuffer.html
* igt@kms_psr@psr2_sprite_plane_move:
- shard-iclb: [SKIP][78] ([fdo#109441]) -> [PASS][79] +1 similar issue
[78]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8160/shard-iclb4/igt@kms_psr@psr2_sprite_plane_move.html
[79]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17027/shard-iclb2/igt@kms_psr@psr2_sprite_plane_move.html
* igt@kms_setmode@basic:
- shard-apl: [FAIL][80] ([i915#31]) -> [PASS][81]
[80]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8160/shard-apl1/igt@kms_setmode@basic.html
[81]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17027/shard-apl3/igt@kms_setmode@basic.html
- shard-skl: [FAIL][82] ([i915#31]) -> [PASS][83]
[82]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8160/shard-skl10/igt@kms_setmode@basic.html
[83]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17027/shard-skl9/igt@kms_setmode@basic.html
* igt@kms_vblank@pipe-c-ts-continuation-dpms-suspend:
- shard-skl: [INCOMPLETE][84] ([i915#69]) -> [PASS][85]
[84]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8160/shard-skl9/igt@kms_vblank@pipe-c-ts-continuation-dpms-suspend.html
[85]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17027/shard-skl6/igt@kms_vblank@pipe-c-ts-continuation-dpms-suspend.html
#### Warnings ####
* igt@runner@aborted:
- shard-kbl: [FAIL][86] ([i915#92]) -> ([FAIL][87], [FAIL][88]) ([i915#1389] / [i915#1402] / [i915#92])
[86]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8160/shard-kbl6/igt@runner@aborted.html
[87]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17027/shard-kbl4/igt@runner@aborted.html
[88]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17027/shard-kbl2/igt@runner@aborted.html
- shard-apl: ([FAIL][89], [FAIL][90]) ([fdo#103927] / [i915#1402]) -> [FAIL][91] ([fdo#103927])
[89]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8160/shard-apl4/igt@runner@aborted.html
[90]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8160/shard-apl1/igt@runner@aborted.html
[91]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17027/shard-apl8/igt@runner@aborted.html
- shard-tglb: [FAIL][92] ([i915#1318]) -> [FAIL][93] ([i915#1389])
[92]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8160/shard-tglb1/igt@runner@aborted.html
[93]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17027/shard-tglb3/igt@runner@aborted.html
[IGT#5]: https://gitlab.freedesktop.org/drm/igt-gpu-tools/issues/5
[fdo#103927]: https://bugs.freedesktop.org/show_bug.cgi?id=103927
[fdo#108145]: https://bugs.freedesktop.org/show_bug.cgi?id=108145
[fdo#109276]: https://bugs.freedesktop.org/show_bug.cgi?id=109276
[fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441
[fdo#109642]: https://bugs.freedesktop.org/show_bug.cgi?id=109642
[fdo#110841]: https://bugs.freedesktop.org/show_bug.cgi?id=110841
[fdo#111068]: https://bugs.freedesktop.org/show_bug.cgi?id=111068
[fdo#112080]: https://bugs.freedesktop.org/show_bug.cgi?id=112080
[fdo#112146]: https://bugs.freedesktop.org/show_bug.cgi?id=112146
[i915#1188]: https://gitlab.freedesktop.org/drm/intel/issues/1188
[i915#1239]: https://gitlab.freedesktop.org/drm/intel/issues/1239
[i915#1318]: https://gitlab.freedesktop.org/drm/intel/issues/1318
[i915#1389]: https://gitlab.freedesktop.org/drm/intel/issues/1389
[i915#1401]: https://gitlab.freedesktop.org/drm/intel/issues/1401
[i915#1402]: https://gitlab.freedesktop.org/drm/intel/issues/1402
[i915#180]: https://gitlab.freedesktop.org/drm/intel/issues/180
[i915#265]: https://gitlab.freedesktop.org/drm/intel/issues/265
[i915#31]: https://gitlab.freedesktop.org/drm/intel/issues/31
[i915#34]: https://gitlab.freedesktop.org/drm/intel/issues/34
[i915#447]: https://gitlab.freedesktop.org/drm/intel/issues/447
[i915#46]: https://gitlab.freedesktop.org/drm/intel/issues/46
[i915#49]: https://gitlab.freedesktop.org/drm/intel/issues/49
[i915#644]: https://gitlab.freedesktop.org/drm/intel/issues/644
[i915#677]: https://gitlab.freedesktop.org/drm/intel/issues/677
[i915#679]: https://gitlab.freedesktop.org/drm/intel/issues/679
[i915#69]: https://gitlab.freedesktop.org/drm/intel/issues/69
[i915#697]: https://gitlab.freedesktop.org/drm/intel/issues/697
[i915#79]: https://gitlab.freedesktop.org/drm/intel/issues/79
[i915#92]: https://gitlab.freedesktop.org/drm/intel/issues/92
[i915#96]: https://gitlab.freedesktop.org/drm/intel/issues/96
Participating hosts (10 -> 10)
------------------------------
No changes in participating hosts
Build changes
-------------
* CI: CI-20190529 -> None
* Linux: CI_DRM_8160 -> Patchwork_17027
CI-20190529: 20190529
CI_DRM_8160: 6ba1729e5025761ab74914f6b8aa3288f493e9c7 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_5523: cf6d524007ac51a7d5a48503ea3dd5f01fd4ebab @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_17027: 4f6235744a939c05913c4cb014945655ea1d82f3 @ git://anongit.freedesktop.org/gfx-ci/linux
piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17027/index.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [Intel-gfx] [PATCH 5/6] drm/i915/tc/icl: Implement the TC cold exit sequence
2020-03-18 23:59 ` [Intel-gfx] [PATCH 5/6] drm/i915/tc/icl: Implement the TC cold exit sequence José Roberto de Souza
2020-03-19 17:45 ` [Intel-gfx] [PATCH v2 " José Roberto de Souza
@ 2020-03-20 13:11 ` Dan Carpenter
1 sibling, 0 replies; 16+ messages in thread
From: Dan Carpenter @ 2020-03-20 13:11 UTC (permalink / raw)
To: kbuild, José Roberto de Souza
Cc: Cooper Chiou, intel-gfx, Kai-Heng Feng, kbuild-all
Hi "José,
Thank you for the patch! Perhaps something to improve:
url: https://github.com/0day-ci/linux/commits/Jos-Roberto-de-Souza/drm-i915-tc-tgl-Implement-TCCOLD-sequences/20200319-080253
base: git://anongit.freedesktop.org/drm-intel for-linux-next
If you fix the issue, kindly add following tag
Reported-by: kbuild test robot <lkp@intel.com>
Reported-by: Dan Carpenter <dan.carpenter@oracle.com>
smatch warnings:
drivers/gpu/drm/i915/display/intel_tc.c:554 icl_tc_cold_request() error: uninitialized symbol 'ret'.
# https://github.com/0day-ci/linux/commit/29f27e6df6ad82b09a3c9ddaf5f51b2fc1647178
git remote add linux-review https://github.com/0day-ci/linux
git remote update linux-review
git checkout 29f27e6df6ad82b09a3c9ddaf5f51b2fc1647178
vim +/ret +554 drivers/gpu/drm/i915/display/intel_tc.c
29f27e6df6ad82 José Roberto de Souza 2020-03-18 528 static inline int icl_tc_cold_request(struct intel_digital_port *dig_port,
29f27e6df6ad82 José Roberto de Souza 2020-03-18 529 bool block)
29f27e6df6ad82 José Roberto de Souza 2020-03-18 530 {
29f27e6df6ad82 José Roberto de Souza 2020-03-18 531 struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
29f27e6df6ad82 José Roberto de Souza 2020-03-18 532 enum intel_display_power_domain aux_domain;
29f27e6df6ad82 José Roberto de Souza 2020-03-18 533 int ret;
29f27e6df6ad82 José Roberto de Souza 2020-03-18 534
29f27e6df6ad82 José Roberto de Souza 2020-03-18 535 aux_domain = intel_aux_ch_to_power_domain(dig_port->aux_ch);
29f27e6df6ad82 José Roberto de Souza 2020-03-18 536
29f27e6df6ad82 José Roberto de Souza 2020-03-18 537 if (block) {
29f27e6df6ad82 José Roberto de Souza 2020-03-18 538 dig_port->tc_cold_wakeref =
29f27e6df6ad82 José Roberto de Souza 2020-03-18 539 intel_display_power_get_without_ack(i915, aux_domain);
29f27e6df6ad82 José Roberto de Souza 2020-03-18 540
29f27e6df6ad82 José Roberto de Souza 2020-03-18 541 do {
29f27e6df6ad82 José Roberto de Souza 2020-03-18 542 ret = sandybridge_pcode_write_timeout(i915,
29f27e6df6ad82 José Roberto de Souza 2020-03-18 543 ICL_PCODE_EXIT_TCCOLD,
29f27e6df6ad82 José Roberto de Souza 2020-03-18 544 0, 250, 1);
29f27e6df6ad82 José Roberto de Souza 2020-03-18 545
29f27e6df6ad82 José Roberto de Souza 2020-03-18 546 } while (ret == -EAGAIN);
ret is only initialized on this path
29f27e6df6ad82 José Roberto de Souza 2020-03-18 547 } else if (dig_port->tc_mode == TC_PORT_LEGACY) {
29f27e6df6ad82 José Roberto de Souza 2020-03-18 548 drm_WARN_ON(&i915->drm, !dig_port->tc_lock_wakeref);
29f27e6df6ad82 José Roberto de Souza 2020-03-18 549 intel_display_power_put(i915, aux_domain,
29f27e6df6ad82 José Roberto de Souza 2020-03-18 550 dig_port->tc_cold_wakeref);
29f27e6df6ad82 José Roberto de Souza 2020-03-18 551 dig_port->tc_cold_wakeref = 0;
29f27e6df6ad82 José Roberto de Souza 2020-03-18 552 }
29f27e6df6ad82 José Roberto de Souza 2020-03-18 553
29f27e6df6ad82 José Roberto de Souza 2020-03-18 @554 return ret;
29f27e6df6ad82 José Roberto de Souza 2020-03-18 555 }
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [Intel-gfx] [PATCH 5/6] drm/i915/tc/icl: Implement the TC cold exit sequence
@ 2020-03-20 13:11 ` Dan Carpenter
0 siblings, 0 replies; 16+ messages in thread
From: Dan Carpenter @ 2020-03-20 13:11 UTC (permalink / raw)
To: kbuild
[-- Attachment #1: Type: text/plain, Size: 3329 bytes --]
Hi "José,
Thank you for the patch! Perhaps something to improve:
url: https://github.com/0day-ci/linux/commits/Jos-Roberto-de-Souza/drm-i915-tc-tgl-Implement-TCCOLD-sequences/20200319-080253
base: git://anongit.freedesktop.org/drm-intel for-linux-next
If you fix the issue, kindly add following tag
Reported-by: kbuild test robot <lkp@intel.com>
Reported-by: Dan Carpenter <dan.carpenter@oracle.com>
smatch warnings:
drivers/gpu/drm/i915/display/intel_tc.c:554 icl_tc_cold_request() error: uninitialized symbol 'ret'.
# https://github.com/0day-ci/linux/commit/29f27e6df6ad82b09a3c9ddaf5f51b2fc1647178
git remote add linux-review https://github.com/0day-ci/linux
git remote update linux-review
git checkout 29f27e6df6ad82b09a3c9ddaf5f51b2fc1647178
vim +/ret +554 drivers/gpu/drm/i915/display/intel_tc.c
29f27e6df6ad82 José Roberto de Souza 2020-03-18 528 static inline int icl_tc_cold_request(struct intel_digital_port *dig_port,
29f27e6df6ad82 José Roberto de Souza 2020-03-18 529 bool block)
29f27e6df6ad82 José Roberto de Souza 2020-03-18 530 {
29f27e6df6ad82 José Roberto de Souza 2020-03-18 531 struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
29f27e6df6ad82 José Roberto de Souza 2020-03-18 532 enum intel_display_power_domain aux_domain;
29f27e6df6ad82 José Roberto de Souza 2020-03-18 533 int ret;
29f27e6df6ad82 José Roberto de Souza 2020-03-18 534
29f27e6df6ad82 José Roberto de Souza 2020-03-18 535 aux_domain = intel_aux_ch_to_power_domain(dig_port->aux_ch);
29f27e6df6ad82 José Roberto de Souza 2020-03-18 536
29f27e6df6ad82 José Roberto de Souza 2020-03-18 537 if (block) {
29f27e6df6ad82 José Roberto de Souza 2020-03-18 538 dig_port->tc_cold_wakeref =
29f27e6df6ad82 José Roberto de Souza 2020-03-18 539 intel_display_power_get_without_ack(i915, aux_domain);
29f27e6df6ad82 José Roberto de Souza 2020-03-18 540
29f27e6df6ad82 José Roberto de Souza 2020-03-18 541 do {
29f27e6df6ad82 José Roberto de Souza 2020-03-18 542 ret = sandybridge_pcode_write_timeout(i915,
29f27e6df6ad82 José Roberto de Souza 2020-03-18 543 ICL_PCODE_EXIT_TCCOLD,
29f27e6df6ad82 José Roberto de Souza 2020-03-18 544 0, 250, 1);
29f27e6df6ad82 José Roberto de Souza 2020-03-18 545
29f27e6df6ad82 José Roberto de Souza 2020-03-18 546 } while (ret == -EAGAIN);
ret is only initialized on this path
29f27e6df6ad82 José Roberto de Souza 2020-03-18 547 } else if (dig_port->tc_mode == TC_PORT_LEGACY) {
29f27e6df6ad82 José Roberto de Souza 2020-03-18 548 drm_WARN_ON(&i915->drm, !dig_port->tc_lock_wakeref);
29f27e6df6ad82 José Roberto de Souza 2020-03-18 549 intel_display_power_put(i915, aux_domain,
29f27e6df6ad82 José Roberto de Souza 2020-03-18 550 dig_port->tc_cold_wakeref);
29f27e6df6ad82 José Roberto de Souza 2020-03-18 551 dig_port->tc_cold_wakeref = 0;
29f27e6df6ad82 José Roberto de Souza 2020-03-18 552 }
29f27e6df6ad82 José Roberto de Souza 2020-03-18 553
29f27e6df6ad82 José Roberto de Souza 2020-03-18 @554 return ret;
29f27e6df6ad82 José Roberto de Souza 2020-03-18 555 }
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all(a)lists.01.org
^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [Intel-gfx] [PATCH 5/6] drm/i915/tc/icl: Implement the TC cold exit sequence
@ 2020-03-20 13:11 ` Dan Carpenter
0 siblings, 0 replies; 16+ messages in thread
From: Dan Carpenter @ 2020-03-20 13:11 UTC (permalink / raw)
To: kbuild-all
[-- Attachment #1: Type: text/plain, Size: 3329 bytes --]
Hi "José,
Thank you for the patch! Perhaps something to improve:
url: https://github.com/0day-ci/linux/commits/Jos-Roberto-de-Souza/drm-i915-tc-tgl-Implement-TCCOLD-sequences/20200319-080253
base: git://anongit.freedesktop.org/drm-intel for-linux-next
If you fix the issue, kindly add following tag
Reported-by: kbuild test robot <lkp@intel.com>
Reported-by: Dan Carpenter <dan.carpenter@oracle.com>
smatch warnings:
drivers/gpu/drm/i915/display/intel_tc.c:554 icl_tc_cold_request() error: uninitialized symbol 'ret'.
# https://github.com/0day-ci/linux/commit/29f27e6df6ad82b09a3c9ddaf5f51b2fc1647178
git remote add linux-review https://github.com/0day-ci/linux
git remote update linux-review
git checkout 29f27e6df6ad82b09a3c9ddaf5f51b2fc1647178
vim +/ret +554 drivers/gpu/drm/i915/display/intel_tc.c
29f27e6df6ad82 José Roberto de Souza 2020-03-18 528 static inline int icl_tc_cold_request(struct intel_digital_port *dig_port,
29f27e6df6ad82 José Roberto de Souza 2020-03-18 529 bool block)
29f27e6df6ad82 José Roberto de Souza 2020-03-18 530 {
29f27e6df6ad82 José Roberto de Souza 2020-03-18 531 struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
29f27e6df6ad82 José Roberto de Souza 2020-03-18 532 enum intel_display_power_domain aux_domain;
29f27e6df6ad82 José Roberto de Souza 2020-03-18 533 int ret;
29f27e6df6ad82 José Roberto de Souza 2020-03-18 534
29f27e6df6ad82 José Roberto de Souza 2020-03-18 535 aux_domain = intel_aux_ch_to_power_domain(dig_port->aux_ch);
29f27e6df6ad82 José Roberto de Souza 2020-03-18 536
29f27e6df6ad82 José Roberto de Souza 2020-03-18 537 if (block) {
29f27e6df6ad82 José Roberto de Souza 2020-03-18 538 dig_port->tc_cold_wakeref =
29f27e6df6ad82 José Roberto de Souza 2020-03-18 539 intel_display_power_get_without_ack(i915, aux_domain);
29f27e6df6ad82 José Roberto de Souza 2020-03-18 540
29f27e6df6ad82 José Roberto de Souza 2020-03-18 541 do {
29f27e6df6ad82 José Roberto de Souza 2020-03-18 542 ret = sandybridge_pcode_write_timeout(i915,
29f27e6df6ad82 José Roberto de Souza 2020-03-18 543 ICL_PCODE_EXIT_TCCOLD,
29f27e6df6ad82 José Roberto de Souza 2020-03-18 544 0, 250, 1);
29f27e6df6ad82 José Roberto de Souza 2020-03-18 545
29f27e6df6ad82 José Roberto de Souza 2020-03-18 546 } while (ret == -EAGAIN);
ret is only initialized on this path
29f27e6df6ad82 José Roberto de Souza 2020-03-18 547 } else if (dig_port->tc_mode == TC_PORT_LEGACY) {
29f27e6df6ad82 José Roberto de Souza 2020-03-18 548 drm_WARN_ON(&i915->drm, !dig_port->tc_lock_wakeref);
29f27e6df6ad82 José Roberto de Souza 2020-03-18 549 intel_display_power_put(i915, aux_domain,
29f27e6df6ad82 José Roberto de Souza 2020-03-18 550 dig_port->tc_cold_wakeref);
29f27e6df6ad82 José Roberto de Souza 2020-03-18 551 dig_port->tc_cold_wakeref = 0;
29f27e6df6ad82 José Roberto de Souza 2020-03-18 552 }
29f27e6df6ad82 José Roberto de Souza 2020-03-18 553
29f27e6df6ad82 José Roberto de Souza 2020-03-18 @554 return ret;
29f27e6df6ad82 José Roberto de Souza 2020-03-18 555 }
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all(a)lists.01.org
^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [Intel-gfx] [PATCH 5/6] drm/i915/tc/icl: Implement the TC cold exit sequence
2020-03-20 13:11 ` Dan Carpenter
@ 2020-03-20 19:52 ` Souza, Jose
-1 siblings, 0 replies; 16+ messages in thread
From: Souza, Jose @ 2020-03-20 19:52 UTC (permalink / raw)
To: dan.carpenter, kbuild; +Cc: Chiou, Cooper, intel-gfx, kai.heng.feng, kbuild-all
On Fri, 2020-03-20 at 16:11 +0300, Dan Carpenter wrote:
> Hi "José,
>
> Thank you for the patch! Perhaps something to improve:
>
> url:
> https://github.com/0day-ci/linux/commits/Jos-Roberto-de-Souza/drm-i915-tc-tgl-Implement-TCCOLD-sequences/20200319-080253
> base: git://anongit.freedesktop.org/drm-intel for-linux-next
>
> If you fix the issue, kindly add following tag
> Reported-by: kbuild test robot <lkp@intel.com>
> Reported-by: Dan Carpenter <dan.carpenter@oracle.com>
>
> smatch warnings:
> drivers/gpu/drm/i915/display/intel_tc.c:554 icl_tc_cold_request()
> error: uninitialized symbol 'ret'.
>
> #
> https://github.com/0day-ci/linux/commit/29f27e6df6ad82b09a3c9ddaf5f51b2fc1647178
> git remote add linux-review https://github.com/0day-ci/linux
> git remote update linux-review
> git checkout 29f27e6df6ad82b09a3c9ddaf5f51b2fc1647178
> vim +/ret +554 drivers/gpu/drm/i915/display/intel_tc.c
>
> 29f27e6df6ad82 José Roberto de Souza 2020-03-18 528 static inline
> int icl_tc_cold_request(struct intel_digital_port *dig_port,
> 29f27e6df6ad82 José Roberto de Souza 2020-03-18 529
> bool block)
> 29f27e6df6ad82 José Roberto de Souza 2020-03-18 530 {
> 29f27e6df6ad82 José Roberto de Souza 2020-03-18 531 struct
> drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
> 29f27e6df6ad82 José Roberto de Souza 2020-03-18 532 enum
> intel_display_power_domain aux_domain;
> 29f27e6df6ad82 José Roberto de Souza 2020-03-18 533 int
> ret;
> 29f27e6df6ad82 José Roberto de Souza 2020-03-18 534
> 29f27e6df6ad82 José Roberto de Souza 2020-03-18 535 aux_dom
> ain = intel_aux_ch_to_power_domain(dig_port->aux_ch);
> 29f27e6df6ad82 José Roberto de Souza 2020-03-18 536
> 29f27e6df6ad82 José Roberto de Souza 2020-03-18 537 if
> (block) {
> 29f27e6df6ad82 José Roberto de Souza 2020-03-18 538
> dig_port->tc_cold_wakeref =
> 29f27e6df6ad82 José Roberto de Souza 2020-03-18 539
> intel_display_power_get_without_ack(i915, aux_domain);
> 29f27e6df6ad82 José Roberto de Souza 2020-03-18 540
> 29f27e6df6ad82 José Roberto de Souza 2020-03-18 541
> do {
> 29f27e6df6ad82 José Roberto de Souza 2020-03-18 542
> ret = sandybridge_pcode_write_timeout(i915,
> 29f27e6df6ad82 José Roberto de Souza 2020-03-18 543
> ICL_PCODE_EXIT_TCCOLD,
> 29f27e6df6ad82 José Roberto de Souza 2020-03-18 544
> 0, 250, 1);
> 29f27e6df6ad82 José Roberto de Souza 2020-03-18 545
> 29f27e6df6ad82 José Roberto de Souza 2020-03-18 546
> } while (ret == -EAGAIN);
>
> ret is only initialized on this path
Thanks
>
> 29f27e6df6ad82 José Roberto de Souza 2020-03-18 547 } else
> if (dig_port->tc_mode == TC_PORT_LEGACY) {
> 29f27e6df6ad82 José Roberto de Souza 2020-03-18 548
> drm_WARN_ON(&i915->drm, !dig_port->tc_lock_wakeref);
> 29f27e6df6ad82 José Roberto de Souza 2020-03-18 549
> intel_display_power_put(i915, aux_domain,
> 29f27e6df6ad82 José Roberto de Souza 2020-03-18 550
> dig_port->tc_cold_wakeref);
> 29f27e6df6ad82 José Roberto de Souza 2020-03-18 551
> dig_port->tc_cold_wakeref = 0;
> 29f27e6df6ad82 José Roberto de Souza 2020-03-18 552 }
> 29f27e6df6ad82 José Roberto de Souza 2020-03-18 553
> 29f27e6df6ad82 José Roberto de Souza 2020-03-18 @554 return
> ret;
> 29f27e6df6ad82 José Roberto de Souza 2020-03-18 555 }
>
> ---
> 0-DAY CI Kernel Test Service, Intel Corporation
> https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
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^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [Intel-gfx] [PATCH 5/6] drm/i915/tc/icl: Implement the TC cold exit sequence
@ 2020-03-20 19:52 ` Souza, Jose
0 siblings, 0 replies; 16+ messages in thread
From: Souza, Jose @ 2020-03-20 19:52 UTC (permalink / raw)
To: kbuild-all
[-- Attachment #1: Type: text/plain, Size: 3594 bytes --]
On Fri, 2020-03-20 at 16:11 +0300, Dan Carpenter wrote:
> Hi "José,
>
> Thank you for the patch! Perhaps something to improve:
>
> url:
> https://github.com/0day-ci/linux/commits/Jos-Roberto-de-Souza/drm-i915-tc-tgl-Implement-TCCOLD-sequences/20200319-080253
> base: git://anongit.freedesktop.org/drm-intel for-linux-next
>
> If you fix the issue, kindly add following tag
> Reported-by: kbuild test robot <lkp@intel.com>
> Reported-by: Dan Carpenter <dan.carpenter@oracle.com>
>
> smatch warnings:
> drivers/gpu/drm/i915/display/intel_tc.c:554 icl_tc_cold_request()
> error: uninitialized symbol 'ret'.
>
> #
> https://github.com/0day-ci/linux/commit/29f27e6df6ad82b09a3c9ddaf5f51b2fc1647178
> git remote add linux-review https://github.com/0day-ci/linux
> git remote update linux-review
> git checkout 29f27e6df6ad82b09a3c9ddaf5f51b2fc1647178
> vim +/ret +554 drivers/gpu/drm/i915/display/intel_tc.c
>
> 29f27e6df6ad82 José Roberto de Souza 2020-03-18 528 static inline
> int icl_tc_cold_request(struct intel_digital_port *dig_port,
> 29f27e6df6ad82 José Roberto de Souza 2020-03-18 529
> bool block)
> 29f27e6df6ad82 José Roberto de Souza 2020-03-18 530 {
> 29f27e6df6ad82 José Roberto de Souza 2020-03-18 531 struct
> drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
> 29f27e6df6ad82 José Roberto de Souza 2020-03-18 532 enum
> intel_display_power_domain aux_domain;
> 29f27e6df6ad82 José Roberto de Souza 2020-03-18 533 int
> ret;
> 29f27e6df6ad82 José Roberto de Souza 2020-03-18 534
> 29f27e6df6ad82 José Roberto de Souza 2020-03-18 535 aux_dom
> ain = intel_aux_ch_to_power_domain(dig_port->aux_ch);
> 29f27e6df6ad82 José Roberto de Souza 2020-03-18 536
> 29f27e6df6ad82 José Roberto de Souza 2020-03-18 537 if
> (block) {
> 29f27e6df6ad82 José Roberto de Souza 2020-03-18 538
> dig_port->tc_cold_wakeref =
> 29f27e6df6ad82 José Roberto de Souza 2020-03-18 539
> intel_display_power_get_without_ack(i915, aux_domain);
> 29f27e6df6ad82 José Roberto de Souza 2020-03-18 540
> 29f27e6df6ad82 José Roberto de Souza 2020-03-18 541
> do {
> 29f27e6df6ad82 José Roberto de Souza 2020-03-18 542
> ret = sandybridge_pcode_write_timeout(i915,
> 29f27e6df6ad82 José Roberto de Souza 2020-03-18 543
> ICL_PCODE_EXIT_TCCOLD,
> 29f27e6df6ad82 José Roberto de Souza 2020-03-18 544
> 0, 250, 1);
> 29f27e6df6ad82 José Roberto de Souza 2020-03-18 545
> 29f27e6df6ad82 José Roberto de Souza 2020-03-18 546
> } while (ret == -EAGAIN);
>
> ret is only initialized on this path
Thanks
>
> 29f27e6df6ad82 José Roberto de Souza 2020-03-18 547 } else
> if (dig_port->tc_mode == TC_PORT_LEGACY) {
> 29f27e6df6ad82 José Roberto de Souza 2020-03-18 548
> drm_WARN_ON(&i915->drm, !dig_port->tc_lock_wakeref);
> 29f27e6df6ad82 José Roberto de Souza 2020-03-18 549
> intel_display_power_put(i915, aux_domain,
> 29f27e6df6ad82 José Roberto de Souza 2020-03-18 550
> dig_port->tc_cold_wakeref);
> 29f27e6df6ad82 José Roberto de Souza 2020-03-18 551
> dig_port->tc_cold_wakeref = 0;
> 29f27e6df6ad82 José Roberto de Souza 2020-03-18 552 }
> 29f27e6df6ad82 José Roberto de Souza 2020-03-18 553
> 29f27e6df6ad82 José Roberto de Souza 2020-03-18 @554 return
> ret;
> 29f27e6df6ad82 José Roberto de Souza 2020-03-18 555 }
>
> ---
> 0-DAY CI Kernel Test Service, Intel Corporation
> https://lists.01.org/hyperkitty/list/kbuild-all(a)lists.01.org
^ permalink raw reply [flat|nested] 16+ messages in thread
end of thread, other threads:[~2020-03-20 19:52 UTC | newest]
Thread overview: 16+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2020-03-18 23:59 [Intel-gfx] [PATCH 1/6] drm/i915/tc/tgl: Implement TCCOLD sequences José Roberto de Souza
2020-03-18 23:59 ` [Intel-gfx] [PATCH 2/6] drm/i915/display: Add intel_display_power_get_without_ack() José Roberto de Souza
2020-03-18 23:59 ` [Intel-gfx] [PATCH 3/6] drm/i915/display: Implement intel_display_power_wait_enable_ack() José Roberto de Souza
2020-03-18 23:59 ` [Intel-gfx] [PATCH 4/6] drm/i915/display: Add intel_aux_ch_to_power_domain() José Roberto de Souza
2020-03-18 23:59 ` [Intel-gfx] [PATCH 5/6] drm/i915/tc/icl: Implement the TC cold exit sequence José Roberto de Souza
2020-03-19 17:45 ` [Intel-gfx] [PATCH v2 " José Roberto de Souza
2020-03-20 13:11 ` [Intel-gfx] [PATCH " Dan Carpenter
2020-03-20 13:11 ` Dan Carpenter
2020-03-20 13:11 ` Dan Carpenter
2020-03-20 19:52 ` Souza, Jose
2020-03-20 19:52 ` Souza, Jose
2020-03-18 23:59 ` [Intel-gfx] [PATCH 6/6] drm/i915/dp: Get TC link reference during DP detection José Roberto de Souza
2020-03-19 0:37 ` [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/6] drm/i915/tc/tgl: Implement TCCOLD sequences Patchwork
2020-03-19 2:34 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
2020-03-19 20:50 ` [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/6] drm/i915/tc/tgl: Implement TCCOLD sequences (rev2) Patchwork
2020-03-19 22:50 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
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