* [PATCH v3 1/7] fpga: dfl: parse interrupt info for feature devices on enumeration
2020-03-24 8:32 [PATCH v3 0/7] Add interrupt support to FPGA DFL drivers Xu Yilun
@ 2020-03-24 8:32 ` Xu Yilun
2020-03-31 4:18 ` Wu Hao
2020-03-24 8:32 ` [PATCH v3 2/7] fpga: dfl: pci: add irq info for feature devices enumeration Xu Yilun
` (5 subsequent siblings)
6 siblings, 1 reply; 21+ messages in thread
From: Xu Yilun @ 2020-03-24 8:32 UTC (permalink / raw)
To: mdf, linux-fpga, linux-kernel; +Cc: trix, bhu, Xu Yilun, Luwei Kang, Wu Hao
DFL based FPGA devices could support interrupts for different purposes,
but current DFL framework only supports feature device enumeration with
given MMIO resources information via common DFL headers. This patch
introduces one new API dfl_fpga_enum_info_add_irq for low level bus
drivers (e.g. PCIe device driver) to pass its interrupt resources
information to DFL framework for enumeration, and also adds interrupt
enumeration code in framework to parse and assign interrupt resources
for enumerated feature devices and their own sub features.
With this patch, DFL framework enumerates interrupt resources for core
features, including PORT Error Reporting, FME (FPGA Management Engine)
Error Reporting and also AFU User Interrupts.
Signed-off-by: Luwei Kang <luwei.kang@intel.com>
Signed-off-by: Wu Hao <hao.wu@intel.com>
Signed-off-by: Xu Yilun <yilun.xu@intel.com>
----
v2: early validating irq table for each feature in parse_feature_irq().
Some code improvement and minor fix for Hao's comments.
v3: put parse_feature_irqs() inside create_feature_instance()
some minor fixes and more comments
---
drivers/fpga/dfl.c | 148 +++++++++++++++++++++++++++++++++++++++++++++++++++++
drivers/fpga/dfl.h | 40 +++++++++++++++
2 files changed, 188 insertions(+)
diff --git a/drivers/fpga/dfl.c b/drivers/fpga/dfl.c
index 9909948..bc8d966 100644
--- a/drivers/fpga/dfl.c
+++ b/drivers/fpga/dfl.c
@@ -11,6 +11,7 @@
* Xiao Guangrong <guangrong.xiao@linux.intel.com>
*/
#include <linux/module.h>
+#include <asm/irq.h>
#include "dfl.h"
@@ -421,6 +422,9 @@ EXPORT_SYMBOL_GPL(dfl_fpga_dev_ops_unregister);
*
* @dev: device to enumerate.
* @cdev: the container device for all feature devices.
+ * @nr_irqs: number of irqs for all feature devices.
+ * @irq_table: Linux IRQ numbers for all irqs, indexed by local irq index of
+ * this device.
* @feature_dev: current feature device.
* @ioaddr: header register region address of feature device in enumeration.
* @sub_features: a sub features linked list for feature device in enumeration.
@@ -429,6 +433,9 @@ EXPORT_SYMBOL_GPL(dfl_fpga_dev_ops_unregister);
struct build_feature_devs_info {
struct device *dev;
struct dfl_fpga_cdev *cdev;
+ unsigned int nr_irqs;
+ int *irq_table;
+
struct platform_device *feature_dev;
void __iomem *ioaddr;
struct list_head sub_features;
@@ -442,12 +449,16 @@ struct build_feature_devs_info {
* @mmio_res: mmio resource of this sub feature.
* @ioaddr: mapped base address of mmio resource.
* @node: node in sub_features linked list.
+ * @irq_base: start of irq index in this sub feature.
+ * @nr_irqs: number of irqs of this sub feature.
*/
struct dfl_feature_info {
u64 fid;
struct resource mmio_res;
void __iomem *ioaddr;
struct list_head node;
+ unsigned int irq_base;
+ unsigned int nr_irqs;
};
static void dfl_fpga_cdev_add_port_dev(struct dfl_fpga_cdev *cdev,
@@ -520,6 +531,8 @@ static int build_info_commit_dev(struct build_feature_devs_info *binfo)
/* fill features and resource information for feature dev */
list_for_each_entry_safe(finfo, p, &binfo->sub_features, node) {
struct dfl_feature *feature = &pdata->features[index];
+ struct dfl_feature_irq_ctx *ctx;
+ unsigned int i;
/* save resource information for each feature */
feature->id = finfo->fid;
@@ -527,6 +540,20 @@ static int build_info_commit_dev(struct build_feature_devs_info *binfo)
feature->ioaddr = finfo->ioaddr;
fdev->resource[index++] = finfo->mmio_res;
+ if (finfo->nr_irqs) {
+ ctx = devm_kcalloc(binfo->dev, finfo->nr_irqs,
+ sizeof(*ctx), GFP_KERNEL);
+ if (!ctx)
+ return -ENOMEM;
+
+ for (i = 0; i < finfo->nr_irqs; i++)
+ ctx[i].irq =
+ binfo->irq_table[finfo->irq_base + i];
+
+ feature->irq_ctx = ctx;
+ feature->nr_irqs = finfo->nr_irqs;
+ }
+
list_del(&finfo->node);
kfree(finfo);
}
@@ -639,6 +666,75 @@ static u64 feature_id(void __iomem *start)
}
/*
+ * This function will not return any error. If irq parsing is failed, we still
+ * try to support the feature without irq capability.
+ */
+static void parse_feature_irqs(struct build_feature_devs_info *binfo,
+ resource_size_t ofst, u64 fid,
+ unsigned int *irq_base, unsigned int *nr_irqs)
+{
+ void __iomem *base = binfo->ioaddr + ofst;
+ unsigned int i;
+ int virq;
+ u64 v;
+
+ /*
+ * Ideally DFL framework should only read info from DFL header, but
+ * current version DFL only provides mmio resources information for
+ * each feature in DFL Header, no field for interrupt resources.
+ * Some interrupt resources information are provided by specific
+ * mmio registers of each components(e.g. different private features)
+ * which supports interrupt. So in order to parse and assign irq
+ * resources to different components, DFL framework has to look into
+ * specific capability registers of these core private features.
+ *
+ * Once future DFL version supports generic interrupt resources
+ * information in common DFL headers, some generic interrupt parsing
+ * code could be added. But in order to be compatible to old version
+ * DFL, driver may still fall back to these quirks.
+ */
+ switch (fid) {
+ case PORT_FEATURE_ID_UINT:
+ v = readq(base + PORT_UINT_CAP);
+ *irq_base = FIELD_GET(PORT_UINT_CAP_FST_VECT, v);
+ *nr_irqs = FIELD_GET(PORT_UINT_CAP_INT_NUM, v);
+ break;
+ case PORT_FEATURE_ID_ERROR:
+ v = readq(base + PORT_ERROR_CAP);
+ *irq_base = FIELD_GET(PORT_ERROR_CAP_INT_VECT, v);
+ *nr_irqs = FIELD_GET(PORT_ERROR_CAP_SUPP_INT, v);
+ break;
+ case FME_FEATURE_ID_GLOBAL_ERR:
+ v = readq(base + FME_ERROR_CAP);
+ *irq_base = FIELD_GET(FME_ERROR_CAP_INT_VECT, v);
+ *nr_irqs = FIELD_GET(FME_ERROR_CAP_SUPP_INT, v);
+ break;
+ default:
+ return;
+ }
+
+ dev_dbg(binfo->dev, "feature: 0x%llx, nr_irqs: %u, irq_base: %u\n",
+ (unsigned long long)fid, *nr_irqs, *irq_base);
+
+ if (*irq_base + *nr_irqs > binfo->nr_irqs)
+ goto parse_irq_fail;
+
+ for (i = 0; i < *nr_irqs; i++) {
+ virq = binfo->irq_table[*irq_base + i];
+ if (virq < 0 || virq > NR_IRQS)
+ goto parse_irq_fail;
+ }
+
+ return;
+
+parse_irq_fail:
+ *irq_base = 0;
+ *nr_irqs = 0;
+ dev_warn(binfo->dev, "Invalid interrupt number in feature 0x%llx\n",
+ (unsigned long long)fid);
+}
+
+/*
* when create sub feature instances, for private features, it doesn't need
* to provide resource size and feature id as they could be read from DFH
* register. For afu sub feature, its register region only contains user
@@ -650,6 +746,7 @@ create_feature_instance(struct build_feature_devs_info *binfo,
struct dfl_fpga_enum_dfl *dfl, resource_size_t ofst,
resource_size_t size, u64 fid)
{
+ unsigned int irq_base = 0, nr_irqs = 0;
struct dfl_feature_info *finfo;
/* read feature size and id if inputs are invalid */
@@ -659,6 +756,8 @@ create_feature_instance(struct build_feature_devs_info *binfo,
if (dfl->len - ofst < size)
return -EINVAL;
+ parse_feature_irqs(binfo, ofst, fid, &irq_base, &nr_irqs);
+
finfo = kzalloc(sizeof(*finfo), GFP_KERNEL);
if (!finfo)
return -ENOMEM;
@@ -667,6 +766,8 @@ create_feature_instance(struct build_feature_devs_info *binfo,
finfo->mmio_res.start = dfl->start + ofst;
finfo->mmio_res.end = finfo->mmio_res.start + size - 1;
finfo->mmio_res.flags = IORESOURCE_MEM;
+ finfo->irq_base = irq_base;
+ finfo->nr_irqs = nr_irqs;
finfo->ioaddr = dfl->ioaddr + ofst;
list_add_tail(&finfo->node, &binfo->sub_features);
@@ -853,6 +954,10 @@ void dfl_fpga_enum_info_free(struct dfl_fpga_enum_info *info)
devm_kfree(dev, dfl);
}
+ /* remove irq table */
+ if (info->irq_table)
+ devm_kfree(dev, info->irq_table);
+
devm_kfree(dev, info);
put_device(dev);
}
@@ -892,6 +997,45 @@ int dfl_fpga_enum_info_add_dfl(struct dfl_fpga_enum_info *info,
}
EXPORT_SYMBOL_GPL(dfl_fpga_enum_info_add_dfl);
+/**
+ * dfl_fpga_enum_info_add_irq - add irq table to enum info
+ *
+ * @info: ptr to dfl_fpga_enum_info
+ * @nr_irqs: number of irqs of the DFL fpga device to be enumerated.
+ * @irq_table: Linux IRQ numbers for all irqs, indexed by local irq index of
+ * this device.
+ *
+ * One FPGA device may have several interrupts. This function adds irq
+ * information of the DFL fpga device to enum info for next step enumeration.
+ * This function should be called before dfl_fpga_feature_devs_enumerate().
+ * As we only support one irq domain for all DFLs in the same enum info, adding
+ * irq table a second time for the same enum info will return error.
+ *
+ * If we need to enumerate DFLs which belong to different irq domains, we
+ * should fill more enum info and enumerate them one by one.
+ *
+ * Return: 0 on success, negative error code otherwise.
+ */
+int dfl_fpga_enum_info_add_irq(struct dfl_fpga_enum_info *info,
+ unsigned int nr_irqs, int *irq_table)
+{
+ if (!nr_irqs)
+ return -EINVAL;
+
+ if (info->irq_table)
+ return -EEXIST;
+
+ info->irq_table = devm_kmemdup(info->dev, irq_table,
+ sizeof(int) * nr_irqs, GFP_KERNEL);
+ if (!info->irq_table)
+ return -ENOMEM;
+
+ info->nr_irqs = nr_irqs;
+
+ return 0;
+}
+EXPORT_SYMBOL_GPL(dfl_fpga_enum_info_add_irq);
+
static int remove_feature_dev(struct device *dev, void *data)
{
struct platform_device *pdev = to_platform_device(dev);
@@ -959,6 +1103,10 @@ dfl_fpga_feature_devs_enumerate(struct dfl_fpga_enum_info *info)
binfo->dev = info->dev;
binfo->cdev = cdev;
+ binfo->nr_irqs = info->nr_irqs;
+ if (info->nr_irqs)
+ binfo->irq_table = info->irq_table;
+
/*
* start enumeration for all feature devices based on Device Feature
* Lists.
diff --git a/drivers/fpga/dfl.h b/drivers/fpga/dfl.h
index 74784d3..4bc165f 100644
--- a/drivers/fpga/dfl.h
+++ b/drivers/fpga/dfl.h
@@ -112,6 +112,13 @@
#define FME_PORT_OFST_ACC_VF 1
#define FME_PORT_OFST_IMP BIT_ULL(60)
+/* FME Error Capability Register */
+#define FME_ERROR_CAP 0x70
+
+/* FME Error Capability Register Bitfield */
+#define FME_ERROR_CAP_SUPP_INT BIT_ULL(0) /* Interrupt Support */
+#define FME_ERROR_CAP_INT_VECT GENMASK_ULL(12, 1) /* Interrupt vector */
+
/* PORT Header Register Set */
#define PORT_HDR_DFH DFH
#define PORT_HDR_GUID_L GUID_L
@@ -145,6 +152,20 @@
#define PORT_STS_PWR_STATE_AP2 2 /* 90% throttling */
#define PORT_STS_PWR_STATE_AP6 6 /* 100% throttling */
+/* Port Error Capability Register */
+#define PORT_ERROR_CAP 0x38
+
+/* Port Error Capability Register Bitfield */
+#define PORT_ERROR_CAP_SUPP_INT BIT_ULL(0) /* Interrupt Support */
+#define PORT_ERROR_CAP_INT_VECT GENMASK_ULL(12, 1) /* Interrupt vector */
+
+/* Port Uint Capability Register */
+#define PORT_UINT_CAP 0x8
+
+/* Port Uint Capability Register Bitfield */
+#define PORT_UINT_CAP_INT_NUM GENMASK_ULL(11, 0) /* Interrupts num */
+#define PORT_UINT_CAP_FST_VECT GENMASK_ULL(23, 12) /* First Vector */
+
/**
* struct dfl_fpga_port_ops - port ops
*
@@ -189,6 +210,15 @@ struct dfl_feature_driver {
};
/**
+ * struct dfl_feature_irq_ctx - dfl private feature interrupt context
+ *
+ * @irq: Linux IRQ number of this interrupt.
+ */
+struct dfl_feature_irq_ctx {
+ int irq;
+};
+
+/**
* struct dfl_feature - sub feature of the feature devices
*
* @id: sub feature id.
@@ -196,12 +226,16 @@ struct dfl_feature_driver {
* this index is used to find its mmio resource from the
* feature dev (platform device)'s reources.
* @ioaddr: mapped mmio resource address.
+ * @irq_ctx: interrupt context list.
+ * @nr_irqs: number of interrupt contexts.
* @ops: ops of this sub feature.
*/
struct dfl_feature {
u64 id;
int resource_index;
void __iomem *ioaddr;
+ struct dfl_feature_irq_ctx *irq_ctx;
+ unsigned int nr_irqs;
const struct dfl_feature_ops *ops;
};
@@ -388,10 +422,14 @@ static inline u8 dfl_feature_revision(void __iomem *base)
*
* @dev: parent device.
* @dfls: list of device feature lists.
+ * @nr_irqs: number of irqs for all feature devices.
+ * @irq_table: Linux IRQ numbers for all irqs, indexed by hw irq numbers.
*/
struct dfl_fpga_enum_info {
struct device *dev;
struct list_head dfls;
+ unsigned int nr_irqs;
+ int *irq_table;
};
/**
@@ -415,6 +453,8 @@ struct dfl_fpga_enum_info *dfl_fpga_enum_info_alloc(struct device *dev);
int dfl_fpga_enum_info_add_dfl(struct dfl_fpga_enum_info *info,
resource_size_t start, resource_size_t len,
void __iomem *ioaddr);
+int dfl_fpga_enum_info_add_irq(struct dfl_fpga_enum_info *info,
+ unsigned int nr_irqs, int *irq_table);
void dfl_fpga_enum_info_free(struct dfl_fpga_enum_info *info);
/**
--
2.7.4
^ permalink raw reply related [flat|nested] 21+ messages in thread* Re: [PATCH v3 1/7] fpga: dfl: parse interrupt info for feature devices on enumeration
2020-03-24 8:32 ` [PATCH v3 1/7] fpga: dfl: parse interrupt info for feature devices on enumeration Xu Yilun
@ 2020-03-31 4:18 ` Wu Hao
2020-04-01 2:39 ` Xu Yilun
0 siblings, 1 reply; 21+ messages in thread
From: Wu Hao @ 2020-03-31 4:18 UTC (permalink / raw)
To: Xu Yilun; +Cc: mdf, linux-fpga, linux-kernel, trix, bhu, Luwei Kang
On Tue, Mar 24, 2020 at 04:32:37PM +0800, Xu Yilun wrote:
> DFL based FPGA devices could support interrupts for different purposes,
> but current DFL framework only supports feature device enumeration with
> given MMIO resources information via common DFL headers. This patch
> introduces one new API dfl_fpga_enum_info_add_irq for low level bus
> drivers (e.g. PCIe device driver) to pass its interrupt resources
> information to DFL framework for enumeration, and also adds interrupt
> enumeration code in framework to parse and assign interrupt resources
> for enumerated feature devices and their own sub features.
>
> With this patch, DFL framework enumerates interrupt resources for core
> features, including PORT Error Reporting, FME (FPGA Management Engine)
> Error Reporting and also AFU User Interrupts.
>
> Signed-off-by: Luwei Kang <luwei.kang@intel.com>
> Signed-off-by: Wu Hao <hao.wu@intel.com>
> Signed-off-by: Xu Yilun <yilun.xu@intel.com>
> ----
> v2: early validating irq table for each feature in parse_feature_irq().
> Some code improvement and minor fix for Hao's comments.
> v3: put parse_feature_irqs() inside create_feature_instance()
> some minor fixes and more comments
> ---
> drivers/fpga/dfl.c | 148 +++++++++++++++++++++++++++++++++++++++++++++++++++++
> drivers/fpga/dfl.h | 40 +++++++++++++++
> 2 files changed, 188 insertions(+)
>
> diff --git a/drivers/fpga/dfl.c b/drivers/fpga/dfl.c
> index 9909948..bc8d966 100644
> --- a/drivers/fpga/dfl.c
> +++ b/drivers/fpga/dfl.c
> @@ -11,6 +11,7 @@
> * Xiao Guangrong <guangrong.xiao@linux.intel.com>
> */
> #include <linux/module.h>
> +#include <asm/irq.h>
use linux/interrupt.h instead here?
>
> #include "dfl.h"
>
> @@ -421,6 +422,9 @@ EXPORT_SYMBOL_GPL(dfl_fpga_dev_ops_unregister);
> *
> * @dev: device to enumerate.
> * @cdev: the container device for all feature devices.
> + * @nr_irqs: number of irqs for all feature devices.
> + * @irq_table: Linux IRQ numbers for all irqs, indexed by local irq index of
> + * this device.
> * @feature_dev: current feature device.
> * @ioaddr: header register region address of feature device in enumeration.
> * @sub_features: a sub features linked list for feature device in enumeration.
> @@ -429,6 +433,9 @@ EXPORT_SYMBOL_GPL(dfl_fpga_dev_ops_unregister);
> struct build_feature_devs_info {
> struct device *dev;
> struct dfl_fpga_cdev *cdev;
> + unsigned int nr_irqs;
> + int *irq_table;
> +
> struct platform_device *feature_dev;
> void __iomem *ioaddr;
> struct list_head sub_features;
> @@ -442,12 +449,16 @@ struct build_feature_devs_info {
> * @mmio_res: mmio resource of this sub feature.
> * @ioaddr: mapped base address of mmio resource.
> * @node: node in sub_features linked list.
> + * @irq_base: start of irq index in this sub feature.
> + * @nr_irqs: number of irqs of this sub feature.
> */
> struct dfl_feature_info {
> u64 fid;
> struct resource mmio_res;
> void __iomem *ioaddr;
> struct list_head node;
> + unsigned int irq_base;
> + unsigned int nr_irqs;
> };
>
> static void dfl_fpga_cdev_add_port_dev(struct dfl_fpga_cdev *cdev,
> @@ -520,6 +531,8 @@ static int build_info_commit_dev(struct build_feature_devs_info *binfo)
> /* fill features and resource information for feature dev */
> list_for_each_entry_safe(finfo, p, &binfo->sub_features, node) {
> struct dfl_feature *feature = &pdata->features[index];
> + struct dfl_feature_irq_ctx *ctx;
> + unsigned int i;
>
> /* save resource information for each feature */
> feature->id = finfo->fid;
> @@ -527,6 +540,20 @@ static int build_info_commit_dev(struct build_feature_devs_info *binfo)
> feature->ioaddr = finfo->ioaddr;
> fdev->resource[index++] = finfo->mmio_res;
>
> + if (finfo->nr_irqs) {
> + ctx = devm_kcalloc(binfo->dev, finfo->nr_irqs,
> + sizeof(*ctx), GFP_KERNEL);
> + if (!ctx)
> + return -ENOMEM;
> +
> + for (i = 0; i < finfo->nr_irqs; i++)
> + ctx[i].irq =
> + binfo->irq_table[finfo->irq_base + i];
> +
> + feature->irq_ctx = ctx;
> + feature->nr_irqs = finfo->nr_irqs;
> + }
> +
> list_del(&finfo->node);
> kfree(finfo);
> }
> @@ -639,6 +666,75 @@ static u64 feature_id(void __iomem *start)
> }
>
> /*
> + * This function will not return any error. If irq parsing is failed, we still
> + * try to support the feature without irq capability.
I am thinking if we have a better choice here, e.g. return error for parsing
interrupt failure. This looks alright, just because current feature could
work without interrupt support, but if any feature can't work with interrupt,
then should we notice user the errors as early as possible. How do you think?
> + */
> +static void parse_feature_irqs(struct build_feature_devs_info *binfo,
> + resource_size_t ofst, u64 fid,
> + unsigned int *irq_base, unsigned int *nr_irqs)
> +{
> + void __iomem *base = binfo->ioaddr + ofst;
> + unsigned int i;
> + int virq;
> + u64 v;
> +
> + /*
> + * Ideally DFL framework should only read info from DFL header, but
> + * current version DFL only provides mmio resources information for
> + * each feature in DFL Header, no field for interrupt resources.
> + * Some interrupt resources information are provided by specific
> + * mmio registers of each components(e.g. different private features)
> + * which supports interrupt. So in order to parse and assign irq
> + * resources to different components, DFL framework has to look into
> + * specific capability registers of these core private features.
> + *
> + * Once future DFL version supports generic interrupt resources
> + * information in common DFL headers, some generic interrupt parsing
> + * code could be added. But in order to be compatible to old version
> + * DFL, driver may still fall back to these quirks.
> + */
> + switch (fid) {
> + case PORT_FEATURE_ID_UINT:
> + v = readq(base + PORT_UINT_CAP);
> + *irq_base = FIELD_GET(PORT_UINT_CAP_FST_VECT, v);
> + *nr_irqs = FIELD_GET(PORT_UINT_CAP_INT_NUM, v);
> + break;
> + case PORT_FEATURE_ID_ERROR:
> + v = readq(base + PORT_ERROR_CAP);
> + *irq_base = FIELD_GET(PORT_ERROR_CAP_INT_VECT, v);
> + *nr_irqs = FIELD_GET(PORT_ERROR_CAP_SUPP_INT, v);
> + break;
> + case FME_FEATURE_ID_GLOBAL_ERR:
> + v = readq(base + FME_ERROR_CAP);
> + *irq_base = FIELD_GET(FME_ERROR_CAP_INT_VECT, v);
> + *nr_irqs = FIELD_GET(FME_ERROR_CAP_SUPP_INT, v);
> + break;
> + default:
> + return;
> + }
> +
> + dev_dbg(binfo->dev, "feature: 0x%llx, nr_irqs: %u, irq_base: %u\n",
> + (unsigned long long)fid, *nr_irqs, *irq_base);
> +
> + if (*irq_base + *nr_irqs > binfo->nr_irqs)
> + goto parse_irq_fail;
> +
> + for (i = 0; i < *nr_irqs; i++) {
> + virq = binfo->irq_table[*irq_base + i];
> + if (virq < 0 || virq > NR_IRQS)
> + goto parse_irq_fail;
looks like you may need different error message here and above.
> + }
> +
> + return;
> +
> +parse_irq_fail:
> + *irq_base = 0;
> + *nr_irqs = 0;
> + dev_warn(binfo->dev, "Invalid interrupt number in feature 0x%llx\n",
> + (unsigned long long)fid);
What about:
u64 ibase, inr;
switch () {
case ...
ibase = ..;
inr = ..;
break;
default:
return;
}
if () {
error message 1
return;
}
for {
error message 2
return;
}
*irq_base = ibase;
*nr_irqs = inr;
return;
Other place looks good to me.
Hao
> +}
> +
> +/*
> * when create sub feature instances, for private features, it doesn't need
> * to provide resource size and feature id as they could be read from DFH
> * register. For afu sub feature, its register region only contains user
> @@ -650,6 +746,7 @@ create_feature_instance(struct build_feature_devs_info *binfo,
> struct dfl_fpga_enum_dfl *dfl, resource_size_t ofst,
> resource_size_t size, u64 fid)
> {
> + unsigned int irq_base = 0, nr_irqs = 0;
> struct dfl_feature_info *finfo;
>
> /* read feature size and id if inputs are invalid */
> @@ -659,6 +756,8 @@ create_feature_instance(struct build_feature_devs_info *binfo,
> if (dfl->len - ofst < size)
> return -EINVAL;
>
> + parse_feature_irqs(binfo, ofst, fid, &irq_base, &nr_irqs);
> +
> finfo = kzalloc(sizeof(*finfo), GFP_KERNEL);
> if (!finfo)
> return -ENOMEM;
> @@ -667,6 +766,8 @@ create_feature_instance(struct build_feature_devs_info *binfo,
> finfo->mmio_res.start = dfl->start + ofst;
> finfo->mmio_res.end = finfo->mmio_res.start + size - 1;
> finfo->mmio_res.flags = IORESOURCE_MEM;
> + finfo->irq_base = irq_base;
> + finfo->nr_irqs = nr_irqs;
> finfo->ioaddr = dfl->ioaddr + ofst;
>
> list_add_tail(&finfo->node, &binfo->sub_features);
> @@ -853,6 +954,10 @@ void dfl_fpga_enum_info_free(struct dfl_fpga_enum_info *info)
> devm_kfree(dev, dfl);
> }
>
> + /* remove irq table */
> + if (info->irq_table)
> + devm_kfree(dev, info->irq_table);
> +
> devm_kfree(dev, info);
> put_device(dev);
> }
> @@ -892,6 +997,45 @@ int dfl_fpga_enum_info_add_dfl(struct dfl_fpga_enum_info *info,
> }
> EXPORT_SYMBOL_GPL(dfl_fpga_enum_info_add_dfl);
>
> +/**
> + * dfl_fpga_enum_info_add_irq - add irq table to enum info
> + *
> + * @info: ptr to dfl_fpga_enum_info
> + * @nr_irqs: number of irqs of the DFL fpga device to be enumerated.
> + * @irq_table: Linux IRQ numbers for all irqs, indexed by local irq index of
> + * this device.
> + *
> + * One FPGA device may have several interrupts. This function adds irq
> + * information of the DFL fpga device to enum info for next step enumeration.
> + * This function should be called before dfl_fpga_feature_devs_enumerate().
> + * As we only support one irq domain for all DFLs in the same enum info, adding
> + * irq table a second time for the same enum info will return error.
> + *
> + * If we need to enumerate DFLs which belong to different irq domains, we
> + * should fill more enum info and enumerate them one by one.
> + *
> + * Return: 0 on success, negative error code otherwise.
> + */
> +int dfl_fpga_enum_info_add_irq(struct dfl_fpga_enum_info *info,
> + unsigned int nr_irqs, int *irq_table)
> +{
> + if (!nr_irqs)
> + return -EINVAL;
> +
> + if (info->irq_table)
> + return -EEXIST;
> +
> + info->irq_table = devm_kmemdup(info->dev, irq_table,
> + sizeof(int) * nr_irqs, GFP_KERNEL);
> + if (!info->irq_table)
> + return -ENOMEM;
> +
> + info->nr_irqs = nr_irqs;
> +
> + return 0;
> +}
> +EXPORT_SYMBOL_GPL(dfl_fpga_enum_info_add_irq);
> +
> static int remove_feature_dev(struct device *dev, void *data)
> {
> struct platform_device *pdev = to_platform_device(dev);
> @@ -959,6 +1103,10 @@ dfl_fpga_feature_devs_enumerate(struct dfl_fpga_enum_info *info)
> binfo->dev = info->dev;
> binfo->cdev = cdev;
>
> + binfo->nr_irqs = info->nr_irqs;
> + if (info->nr_irqs)
> + binfo->irq_table = info->irq_table;
> +
> /*
> * start enumeration for all feature devices based on Device Feature
> * Lists.
> diff --git a/drivers/fpga/dfl.h b/drivers/fpga/dfl.h
> index 74784d3..4bc165f 100644
> --- a/drivers/fpga/dfl.h
> +++ b/drivers/fpga/dfl.h
> @@ -112,6 +112,13 @@
> #define FME_PORT_OFST_ACC_VF 1
> #define FME_PORT_OFST_IMP BIT_ULL(60)
>
> +/* FME Error Capability Register */
> +#define FME_ERROR_CAP 0x70
> +
> +/* FME Error Capability Register Bitfield */
> +#define FME_ERROR_CAP_SUPP_INT BIT_ULL(0) /* Interrupt Support */
> +#define FME_ERROR_CAP_INT_VECT GENMASK_ULL(12, 1) /* Interrupt vector */
> +
> /* PORT Header Register Set */
> #define PORT_HDR_DFH DFH
> #define PORT_HDR_GUID_L GUID_L
> @@ -145,6 +152,20 @@
> #define PORT_STS_PWR_STATE_AP2 2 /* 90% throttling */
> #define PORT_STS_PWR_STATE_AP6 6 /* 100% throttling */
>
> +/* Port Error Capability Register */
> +#define PORT_ERROR_CAP 0x38
> +
> +/* Port Error Capability Register Bitfield */
> +#define PORT_ERROR_CAP_SUPP_INT BIT_ULL(0) /* Interrupt Support */
> +#define PORT_ERROR_CAP_INT_VECT GENMASK_ULL(12, 1) /* Interrupt vector */
> +
> +/* Port Uint Capability Register */
> +#define PORT_UINT_CAP 0x8
> +
> +/* Port Uint Capability Register Bitfield */
> +#define PORT_UINT_CAP_INT_NUM GENMASK_ULL(11, 0) /* Interrupts num */
> +#define PORT_UINT_CAP_FST_VECT GENMASK_ULL(23, 12) /* First Vector */
> +
> /**
> * struct dfl_fpga_port_ops - port ops
> *
> @@ -189,6 +210,15 @@ struct dfl_feature_driver {
> };
>
> /**
> + * struct dfl_feature_irq_ctx - dfl private feature interrupt context
> + *
> + * @irq: Linux IRQ number of this interrupt.
> + */
> +struct dfl_feature_irq_ctx {
> + int irq;
> +};
> +
> +/**
> * struct dfl_feature - sub feature of the feature devices
> *
> * @id: sub feature id.
> @@ -196,12 +226,16 @@ struct dfl_feature_driver {
> * this index is used to find its mmio resource from the
> * feature dev (platform device)'s reources.
> * @ioaddr: mapped mmio resource address.
> + * @irq_ctx: interrupt context list.
> + * @nr_irqs: number of interrupt contexts.
> * @ops: ops of this sub feature.
> */
> struct dfl_feature {
> u64 id;
> int resource_index;
> void __iomem *ioaddr;
> + struct dfl_feature_irq_ctx *irq_ctx;
> + unsigned int nr_irqs;
> const struct dfl_feature_ops *ops;
> };
>
> @@ -388,10 +422,14 @@ static inline u8 dfl_feature_revision(void __iomem *base)
> *
> * @dev: parent device.
> * @dfls: list of device feature lists.
> + * @nr_irqs: number of irqs for all feature devices.
> + * @irq_table: Linux IRQ numbers for all irqs, indexed by hw irq numbers.
> */
> struct dfl_fpga_enum_info {
> struct device *dev;
> struct list_head dfls;
> + unsigned int nr_irqs;
> + int *irq_table;
> };
>
> /**
> @@ -415,6 +453,8 @@ struct dfl_fpga_enum_info *dfl_fpga_enum_info_alloc(struct device *dev);
> int dfl_fpga_enum_info_add_dfl(struct dfl_fpga_enum_info *info,
> resource_size_t start, resource_size_t len,
> void __iomem *ioaddr);
> +int dfl_fpga_enum_info_add_irq(struct dfl_fpga_enum_info *info,
> + unsigned int nr_irqs, int *irq_table);
> void dfl_fpga_enum_info_free(struct dfl_fpga_enum_info *info);
>
> /**
> --
> 2.7.4
^ permalink raw reply [flat|nested] 21+ messages in thread* Re: [PATCH v3 1/7] fpga: dfl: parse interrupt info for feature devices on enumeration
2020-03-31 4:18 ` Wu Hao
@ 2020-04-01 2:39 ` Xu Yilun
2020-04-01 3:41 ` Wu Hao
0 siblings, 1 reply; 21+ messages in thread
From: Xu Yilun @ 2020-04-01 2:39 UTC (permalink / raw)
To: Wu Hao; +Cc: mdf, linux-fpga, linux-kernel, trix, bhu, Luwei Kang
On Tue, Mar 31, 2020 at 12:18:34PM +0800, Wu Hao wrote:
> On Tue, Mar 24, 2020 at 04:32:37PM +0800, Xu Yilun wrote:
> > DFL based FPGA devices could support interrupts for different purposes,
> > but current DFL framework only supports feature device enumeration with
> > given MMIO resources information via common DFL headers. This patch
> > introduces one new API dfl_fpga_enum_info_add_irq for low level bus
> > drivers (e.g. PCIe device driver) to pass its interrupt resources
> > information to DFL framework for enumeration, and also adds interrupt
> > enumeration code in framework to parse and assign interrupt resources
> > for enumerated feature devices and their own sub features.
> >
> > With this patch, DFL framework enumerates interrupt resources for core
> > features, including PORT Error Reporting, FME (FPGA Management Engine)
> > Error Reporting and also AFU User Interrupts.
> >
> > Signed-off-by: Luwei Kang <luwei.kang@intel.com>
> > Signed-off-by: Wu Hao <hao.wu@intel.com>
> > Signed-off-by: Xu Yilun <yilun.xu@intel.com>
> > ----
> > v2: early validating irq table for each feature in parse_feature_irq().
> > Some code improvement and minor fix for Hao's comments.
> > v3: put parse_feature_irqs() inside create_feature_instance()
> > some minor fixes and more comments
> > ---
> > drivers/fpga/dfl.c | 148 +++++++++++++++++++++++++++++++++++++++++++++++++++++
> > drivers/fpga/dfl.h | 40 +++++++++++++++
> > 2 files changed, 188 insertions(+)
> >
> > diff --git a/drivers/fpga/dfl.c b/drivers/fpga/dfl.c
> > index 9909948..bc8d966 100644
> > --- a/drivers/fpga/dfl.c
> > +++ b/drivers/fpga/dfl.c
> > @@ -11,6 +11,7 @@
> > * Xiao Guangrong <guangrong.xiao@linux.intel.com>
> > */
> > #include <linux/module.h>
> > +#include <asm/irq.h>
>
> use linux/interrupt.h instead here?
Yes. But linux/interrupt.h is already in dfl.h. So we could just remove
this line.
>
> >
> > #include "dfl.h"
> >
> > @@ -421,6 +422,9 @@ EXPORT_SYMBOL_GPL(dfl_fpga_dev_ops_unregister);
> > *
> > * @dev: device to enumerate.
> > * @cdev: the container device for all feature devices.
> > + * @nr_irqs: number of irqs for all feature devices.
> > + * @irq_table: Linux IRQ numbers for all irqs, indexed by local irq index of
> > + * this device.
> > * @feature_dev: current feature device.
> > * @ioaddr: header register region address of feature device in enumeration.
> > * @sub_features: a sub features linked list for feature device in enumeration.
> > @@ -429,6 +433,9 @@ EXPORT_SYMBOL_GPL(dfl_fpga_dev_ops_unregister);
> > struct build_feature_devs_info {
> > struct device *dev;
> > struct dfl_fpga_cdev *cdev;
> > + unsigned int nr_irqs;
> > + int *irq_table;
> > +
> > struct platform_device *feature_dev;
> > void __iomem *ioaddr;
> > struct list_head sub_features;
> > @@ -442,12 +449,16 @@ struct build_feature_devs_info {
> > * @mmio_res: mmio resource of this sub feature.
> > * @ioaddr: mapped base address of mmio resource.
> > * @node: node in sub_features linked list.
> > + * @irq_base: start of irq index in this sub feature.
> > + * @nr_irqs: number of irqs of this sub feature.
> > */
> > struct dfl_feature_info {
> > u64 fid;
> > struct resource mmio_res;
> > void __iomem *ioaddr;
> > struct list_head node;
> > + unsigned int irq_base;
> > + unsigned int nr_irqs;
> > };
> >
> > static void dfl_fpga_cdev_add_port_dev(struct dfl_fpga_cdev *cdev,
> > @@ -520,6 +531,8 @@ static int build_info_commit_dev(struct build_feature_devs_info *binfo)
> > /* fill features and resource information for feature dev */
> > list_for_each_entry_safe(finfo, p, &binfo->sub_features, node) {
> > struct dfl_feature *feature = &pdata->features[index];
> > + struct dfl_feature_irq_ctx *ctx;
> > + unsigned int i;
> >
> > /* save resource information for each feature */
> > feature->id = finfo->fid;
> > @@ -527,6 +540,20 @@ static int build_info_commit_dev(struct build_feature_devs_info *binfo)
> > feature->ioaddr = finfo->ioaddr;
> > fdev->resource[index++] = finfo->mmio_res;
> >
> > + if (finfo->nr_irqs) {
> > + ctx = devm_kcalloc(binfo->dev, finfo->nr_irqs,
> > + sizeof(*ctx), GFP_KERNEL);
> > + if (!ctx)
> > + return -ENOMEM;
> > +
> > + for (i = 0; i < finfo->nr_irqs; i++)
> > + ctx[i].irq =
> > + binfo->irq_table[finfo->irq_base + i];
> > +
> > + feature->irq_ctx = ctx;
> > + feature->nr_irqs = finfo->nr_irqs;
> > + }
> > +
> > list_del(&finfo->node);
> > kfree(finfo);
> > }
> > @@ -639,6 +666,75 @@ static u64 feature_id(void __iomem *start)
> > }
> >
> > /*
> > + * This function will not return any error. If irq parsing is failed, we still
> > + * try to support the feature without irq capability.
>
> I am thinking if we have a better choice here, e.g. return error for parsing
> interrupt failure. This looks alright, just because current feature could
> work without interrupt support, but if any feature can't work with interrupt,
> then should we notice user the errors as early as possible. How do you think?
I think different features could have different concerns. If an feature
can't work without interrupt, it can error out in its own driver. This
will not affect other features functionality.
The DFL may list some important private features like Flash controller
which reprograms the static region (DFL is placed here) through pcie.
If we error out the whole enumeration, then a moderate mistake makes
card unrecoverable.
>
> > + */
> > +static void parse_feature_irqs(struct build_feature_devs_info *binfo,
> > + resource_size_t ofst, u64 fid,
> > + unsigned int *irq_base, unsigned int *nr_irqs)
> > +{
> > + void __iomem *base = binfo->ioaddr + ofst;
> > + unsigned int i;
> > + int virq;
> > + u64 v;
> > +
> > + /*
> > + * Ideally DFL framework should only read info from DFL header, but
> > + * current version DFL only provides mmio resources information for
> > + * each feature in DFL Header, no field for interrupt resources.
> > + * Some interrupt resources information are provided by specific
> > + * mmio registers of each components(e.g. different private features)
> > + * which supports interrupt. So in order to parse and assign irq
> > + * resources to different components, DFL framework has to look into
> > + * specific capability registers of these core private features.
> > + *
> > + * Once future DFL version supports generic interrupt resources
> > + * information in common DFL headers, some generic interrupt parsing
> > + * code could be added. But in order to be compatible to old version
> > + * DFL, driver may still fall back to these quirks.
> > + */
> > + switch (fid) {
> > + case PORT_FEATURE_ID_UINT:
> > + v = readq(base + PORT_UINT_CAP);
> > + *irq_base = FIELD_GET(PORT_UINT_CAP_FST_VECT, v);
> > + *nr_irqs = FIELD_GET(PORT_UINT_CAP_INT_NUM, v);
> > + break;
> > + case PORT_FEATURE_ID_ERROR:
> > + v = readq(base + PORT_ERROR_CAP);
> > + *irq_base = FIELD_GET(PORT_ERROR_CAP_INT_VECT, v);
> > + *nr_irqs = FIELD_GET(PORT_ERROR_CAP_SUPP_INT, v);
> > + break;
> > + case FME_FEATURE_ID_GLOBAL_ERR:
> > + v = readq(base + FME_ERROR_CAP);
> > + *irq_base = FIELD_GET(FME_ERROR_CAP_INT_VECT, v);
> > + *nr_irqs = FIELD_GET(FME_ERROR_CAP_SUPP_INT, v);
> > + break;
> > + default:
> > + return;
> > + }
> > +
> > + dev_dbg(binfo->dev, "feature: 0x%llx, nr_irqs: %u, irq_base: %u\n",
> > + (unsigned long long)fid, *nr_irqs, *irq_base);
> > +
> > + if (*irq_base + *nr_irqs > binfo->nr_irqs)
> > + goto parse_irq_fail;
> > +
> > + for (i = 0; i < *nr_irqs; i++) {
> > + virq = binfo->irq_table[*irq_base + i];
> > + if (virq < 0 || virq > NR_IRQS)
> > + goto parse_irq_fail;
>
> looks like you may need different error message here and above.
>
> > + }
> > +
> > + return;
> > +
> > +parse_irq_fail:
> > + *irq_base = 0;
> > + *nr_irqs = 0;
> > + dev_warn(binfo->dev, "Invalid interrupt number in feature 0x%llx\n",
> > + (unsigned long long)fid);
>
> What about:
>
> u64 ibase, inr;
>
> switch () {
> case ...
> ibase = ..;
> inr = ..;
> break;
> default:
> return;
>
> }
>
> if () {
> error message 1
> return;
> }
>
> for {
> error message 2
> return;
> }
>
> *irq_base = ibase;
> *nr_irqs = inr;
> return;
It's good optimization. I'll follow it.
>
> Other place looks good to me.
>
> Hao
>
> > +}
> > +
> > +/*
> > * when create sub feature instances, for private features, it doesn't need
> > * to provide resource size and feature id as they could be read from DFH
> > * register. For afu sub feature, its register region only contains user
> > @@ -650,6 +746,7 @@ create_feature_instance(struct build_feature_devs_info *binfo,
> > struct dfl_fpga_enum_dfl *dfl, resource_size_t ofst,
> > resource_size_t size, u64 fid)
> > {
> > + unsigned int irq_base = 0, nr_irqs = 0;
> > struct dfl_feature_info *finfo;
> >
> > /* read feature size and id if inputs are invalid */
> > @@ -659,6 +756,8 @@ create_feature_instance(struct build_feature_devs_info *binfo,
> > if (dfl->len - ofst < size)
> > return -EINVAL;
> >
> > + parse_feature_irqs(binfo, ofst, fid, &irq_base, &nr_irqs);
> > +
> > finfo = kzalloc(sizeof(*finfo), GFP_KERNEL);
> > if (!finfo)
> > return -ENOMEM;
> > @@ -667,6 +766,8 @@ create_feature_instance(struct build_feature_devs_info *binfo,
> > finfo->mmio_res.start = dfl->start + ofst;
> > finfo->mmio_res.end = finfo->mmio_res.start + size - 1;
> > finfo->mmio_res.flags = IORESOURCE_MEM;
> > + finfo->irq_base = irq_base;
> > + finfo->nr_irqs = nr_irqs;
> > finfo->ioaddr = dfl->ioaddr + ofst;
> >
> > list_add_tail(&finfo->node, &binfo->sub_features);
> > @@ -853,6 +954,10 @@ void dfl_fpga_enum_info_free(struct dfl_fpga_enum_info *info)
> > devm_kfree(dev, dfl);
> > }
> >
> > + /* remove irq table */
> > + if (info->irq_table)
> > + devm_kfree(dev, info->irq_table);
> > +
> > devm_kfree(dev, info);
> > put_device(dev);
> > }
> > @@ -892,6 +997,45 @@ int dfl_fpga_enum_info_add_dfl(struct dfl_fpga_enum_info *info,
> > }
> > EXPORT_SYMBOL_GPL(dfl_fpga_enum_info_add_dfl);
> >
> > +/**
> > + * dfl_fpga_enum_info_add_irq - add irq table to enum info
> > + *
> > + * @info: ptr to dfl_fpga_enum_info
> > + * @nr_irqs: number of irqs of the DFL fpga device to be enumerated.
> > + * @irq_table: Linux IRQ numbers for all irqs, indexed by local irq index of
> > + * this device.
> > + *
> > + * One FPGA device may have several interrupts. This function adds irq
> > + * information of the DFL fpga device to enum info for next step enumeration.
> > + * This function should be called before dfl_fpga_feature_devs_enumerate().
> > + * As we only support one irq domain for all DFLs in the same enum info, adding
> > + * irq table a second time for the same enum info will return error.
> > + *
> > + * If we need to enumerate DFLs which belong to different irq domains, we
> > + * should fill more enum info and enumerate them one by one.
> > + *
> > + * Return: 0 on success, negative error code otherwise.
> > + */
> > +int dfl_fpga_enum_info_add_irq(struct dfl_fpga_enum_info *info,
> > + unsigned int nr_irqs, int *irq_table)
> > +{
> > + if (!nr_irqs)
> > + return -EINVAL;
> > +
> > + if (info->irq_table)
> > + return -EEXIST;
> > +
> > + info->irq_table = devm_kmemdup(info->dev, irq_table,
> > + sizeof(int) * nr_irqs, GFP_KERNEL);
> > + if (!info->irq_table)
> > + return -ENOMEM;
> > +
> > + info->nr_irqs = nr_irqs;
> > +
> > + return 0;
> > +}
> > +EXPORT_SYMBOL_GPL(dfl_fpga_enum_info_add_irq);
> > +
> > static int remove_feature_dev(struct device *dev, void *data)
> > {
> > struct platform_device *pdev = to_platform_device(dev);
> > @@ -959,6 +1103,10 @@ dfl_fpga_feature_devs_enumerate(struct dfl_fpga_enum_info *info)
> > binfo->dev = info->dev;
> > binfo->cdev = cdev;
> >
> > + binfo->nr_irqs = info->nr_irqs;
> > + if (info->nr_irqs)
> > + binfo->irq_table = info->irq_table;
> > +
> > /*
> > * start enumeration for all feature devices based on Device Feature
> > * Lists.
> > diff --git a/drivers/fpga/dfl.h b/drivers/fpga/dfl.h
> > index 74784d3..4bc165f 100644
> > --- a/drivers/fpga/dfl.h
> > +++ b/drivers/fpga/dfl.h
> > @@ -112,6 +112,13 @@
> > #define FME_PORT_OFST_ACC_VF 1
> > #define FME_PORT_OFST_IMP BIT_ULL(60)
> >
> > +/* FME Error Capability Register */
> > +#define FME_ERROR_CAP 0x70
> > +
> > +/* FME Error Capability Register Bitfield */
> > +#define FME_ERROR_CAP_SUPP_INT BIT_ULL(0) /* Interrupt Support */
> > +#define FME_ERROR_CAP_INT_VECT GENMASK_ULL(12, 1) /* Interrupt vector */
> > +
> > /* PORT Header Register Set */
> > #define PORT_HDR_DFH DFH
> > #define PORT_HDR_GUID_L GUID_L
> > @@ -145,6 +152,20 @@
> > #define PORT_STS_PWR_STATE_AP2 2 /* 90% throttling */
> > #define PORT_STS_PWR_STATE_AP6 6 /* 100% throttling */
> >
> > +/* Port Error Capability Register */
> > +#define PORT_ERROR_CAP 0x38
> > +
> > +/* Port Error Capability Register Bitfield */
> > +#define PORT_ERROR_CAP_SUPP_INT BIT_ULL(0) /* Interrupt Support */
> > +#define PORT_ERROR_CAP_INT_VECT GENMASK_ULL(12, 1) /* Interrupt vector */
> > +
> > +/* Port Uint Capability Register */
> > +#define PORT_UINT_CAP 0x8
> > +
> > +/* Port Uint Capability Register Bitfield */
> > +#define PORT_UINT_CAP_INT_NUM GENMASK_ULL(11, 0) /* Interrupts num */
> > +#define PORT_UINT_CAP_FST_VECT GENMASK_ULL(23, 12) /* First Vector */
> > +
> > /**
> > * struct dfl_fpga_port_ops - port ops
> > *
> > @@ -189,6 +210,15 @@ struct dfl_feature_driver {
> > };
> >
> > /**
> > + * struct dfl_feature_irq_ctx - dfl private feature interrupt context
> > + *
> > + * @irq: Linux IRQ number of this interrupt.
> > + */
> > +struct dfl_feature_irq_ctx {
> > + int irq;
> > +};
> > +
> > +/**
> > * struct dfl_feature - sub feature of the feature devices
> > *
> > * @id: sub feature id.
> > @@ -196,12 +226,16 @@ struct dfl_feature_driver {
> > * this index is used to find its mmio resource from the
> > * feature dev (platform device)'s reources.
> > * @ioaddr: mapped mmio resource address.
> > + * @irq_ctx: interrupt context list.
> > + * @nr_irqs: number of interrupt contexts.
> > * @ops: ops of this sub feature.
> > */
> > struct dfl_feature {
> > u64 id;
> > int resource_index;
> > void __iomem *ioaddr;
> > + struct dfl_feature_irq_ctx *irq_ctx;
> > + unsigned int nr_irqs;
> > const struct dfl_feature_ops *ops;
> > };
> >
> > @@ -388,10 +422,14 @@ static inline u8 dfl_feature_revision(void __iomem *base)
> > *
> > * @dev: parent device.
> > * @dfls: list of device feature lists.
> > + * @nr_irqs: number of irqs for all feature devices.
> > + * @irq_table: Linux IRQ numbers for all irqs, indexed by hw irq numbers.
> > */
> > struct dfl_fpga_enum_info {
> > struct device *dev;
> > struct list_head dfls;
> > + unsigned int nr_irqs;
> > + int *irq_table;
> > };
> >
> > /**
> > @@ -415,6 +453,8 @@ struct dfl_fpga_enum_info *dfl_fpga_enum_info_alloc(struct device *dev);
> > int dfl_fpga_enum_info_add_dfl(struct dfl_fpga_enum_info *info,
> > resource_size_t start, resource_size_t len,
> > void __iomem *ioaddr);
> > +int dfl_fpga_enum_info_add_irq(struct dfl_fpga_enum_info *info,
> > + unsigned int nr_irqs, int *irq_table);
> > void dfl_fpga_enum_info_free(struct dfl_fpga_enum_info *info);
> >
> > /**
> > --
> > 2.7.4
^ permalink raw reply [flat|nested] 21+ messages in thread* Re: [PATCH v3 1/7] fpga: dfl: parse interrupt info for feature devices on enumeration
2020-04-01 2:39 ` Xu Yilun
@ 2020-04-01 3:41 ` Wu Hao
2020-04-01 5:37 ` Xu Yilun
0 siblings, 1 reply; 21+ messages in thread
From: Wu Hao @ 2020-04-01 3:41 UTC (permalink / raw)
To: Xu Yilun; +Cc: mdf, linux-fpga, linux-kernel, trix, bhu, Luwei Kang
On Wed, Apr 01, 2020 at 10:39:47AM +0800, Xu Yilun wrote:
> On Tue, Mar 31, 2020 at 12:18:34PM +0800, Wu Hao wrote:
> > On Tue, Mar 24, 2020 at 04:32:37PM +0800, Xu Yilun wrote:
> > > DFL based FPGA devices could support interrupts for different purposes,
> > > but current DFL framework only supports feature device enumeration with
> > > given MMIO resources information via common DFL headers. This patch
> > > introduces one new API dfl_fpga_enum_info_add_irq for low level bus
> > > drivers (e.g. PCIe device driver) to pass its interrupt resources
> > > information to DFL framework for enumeration, and also adds interrupt
> > > enumeration code in framework to parse and assign interrupt resources
> > > for enumerated feature devices and their own sub features.
> > >
> > > With this patch, DFL framework enumerates interrupt resources for core
> > > features, including PORT Error Reporting, FME (FPGA Management Engine)
> > > Error Reporting and also AFU User Interrupts.
> > >
> > > Signed-off-by: Luwei Kang <luwei.kang@intel.com>
> > > Signed-off-by: Wu Hao <hao.wu@intel.com>
> > > Signed-off-by: Xu Yilun <yilun.xu@intel.com>
> > > ----
> > > v2: early validating irq table for each feature in parse_feature_irq().
> > > Some code improvement and minor fix for Hao's comments.
> > > v3: put parse_feature_irqs() inside create_feature_instance()
> > > some minor fixes and more comments
> > > ---
> > > drivers/fpga/dfl.c | 148 +++++++++++++++++++++++++++++++++++++++++++++++++++++
> > > drivers/fpga/dfl.h | 40 +++++++++++++++
> > > 2 files changed, 188 insertions(+)
> > >
> > > diff --git a/drivers/fpga/dfl.c b/drivers/fpga/dfl.c
> > > index 9909948..bc8d966 100644
> > > --- a/drivers/fpga/dfl.c
> > > +++ b/drivers/fpga/dfl.c
> > > @@ -11,6 +11,7 @@
> > > * Xiao Guangrong <guangrong.xiao@linux.intel.com>
> > > */
> > > #include <linux/module.h>
> > > +#include <asm/irq.h>
> >
> > use linux/interrupt.h instead here?
>
> Yes. But linux/interrupt.h is already in dfl.h. So we could just remove
> this line.
>
> >
> > >
> > > #include "dfl.h"
> > >
> > > @@ -421,6 +422,9 @@ EXPORT_SYMBOL_GPL(dfl_fpga_dev_ops_unregister);
> > > *
> > > * @dev: device to enumerate.
> > > * @cdev: the container device for all feature devices.
> > > + * @nr_irqs: number of irqs for all feature devices.
> > > + * @irq_table: Linux IRQ numbers for all irqs, indexed by local irq index of
> > > + * this device.
> > > * @feature_dev: current feature device.
> > > * @ioaddr: header register region address of feature device in enumeration.
> > > * @sub_features: a sub features linked list for feature device in enumeration.
> > > @@ -429,6 +433,9 @@ EXPORT_SYMBOL_GPL(dfl_fpga_dev_ops_unregister);
> > > struct build_feature_devs_info {
> > > struct device *dev;
> > > struct dfl_fpga_cdev *cdev;
> > > + unsigned int nr_irqs;
> > > + int *irq_table;
> > > +
> > > struct platform_device *feature_dev;
> > > void __iomem *ioaddr;
> > > struct list_head sub_features;
> > > @@ -442,12 +449,16 @@ struct build_feature_devs_info {
> > > * @mmio_res: mmio resource of this sub feature.
> > > * @ioaddr: mapped base address of mmio resource.
> > > * @node: node in sub_features linked list.
> > > + * @irq_base: start of irq index in this sub feature.
> > > + * @nr_irqs: number of irqs of this sub feature.
> > > */
> > > struct dfl_feature_info {
> > > u64 fid;
> > > struct resource mmio_res;
> > > void __iomem *ioaddr;
> > > struct list_head node;
> > > + unsigned int irq_base;
> > > + unsigned int nr_irqs;
> > > };
> > >
> > > static void dfl_fpga_cdev_add_port_dev(struct dfl_fpga_cdev *cdev,
> > > @@ -520,6 +531,8 @@ static int build_info_commit_dev(struct build_feature_devs_info *binfo)
> > > /* fill features and resource information for feature dev */
> > > list_for_each_entry_safe(finfo, p, &binfo->sub_features, node) {
> > > struct dfl_feature *feature = &pdata->features[index];
> > > + struct dfl_feature_irq_ctx *ctx;
> > > + unsigned int i;
> > >
> > > /* save resource information for each feature */
> > > feature->id = finfo->fid;
> > > @@ -527,6 +540,20 @@ static int build_info_commit_dev(struct build_feature_devs_info *binfo)
> > > feature->ioaddr = finfo->ioaddr;
> > > fdev->resource[index++] = finfo->mmio_res;
> > >
> > > + if (finfo->nr_irqs) {
> > > + ctx = devm_kcalloc(binfo->dev, finfo->nr_irqs,
> > > + sizeof(*ctx), GFP_KERNEL);
> > > + if (!ctx)
> > > + return -ENOMEM;
> > > +
> > > + for (i = 0; i < finfo->nr_irqs; i++)
> > > + ctx[i].irq =
> > > + binfo->irq_table[finfo->irq_base + i];
> > > +
> > > + feature->irq_ctx = ctx;
> > > + feature->nr_irqs = finfo->nr_irqs;
> > > + }
> > > +
> > > list_del(&finfo->node);
> > > kfree(finfo);
> > > }
> > > @@ -639,6 +666,75 @@ static u64 feature_id(void __iomem *start)
> > > }
> > >
> > > /*
> > > + * This function will not return any error. If irq parsing is failed, we still
> > > + * try to support the feature without irq capability.
> >
> > I am thinking if we have a better choice here, e.g. return error for parsing
> > interrupt failure. This looks alright, just because current feature could
> > work without interrupt support, but if any feature can't work with interrupt,
> > then should we notice user the errors as early as possible. How do you think?
>
> I think different features could have different concerns. If an feature
> can't work without interrupt, it can error out in its own driver. This
> will not affect other features functionality.
>
> The DFL may list some important private features like Flash controller
> which reprograms the static region (DFL is placed here) through pcie.
> If we error out the whole enumeration, then a moderate mistake makes
> card unrecoverable.
Do you mean we should not error out the whole enumeration if any other
issues detected on private feature parsing as well? If so, then we need
another patch?
Thanks
Hao
>
> >
> > > + */
> > > +static void parse_feature_irqs(struct build_feature_devs_info *binfo,
> > > + resource_size_t ofst, u64 fid,
> > > + unsigned int *irq_base, unsigned int *nr_irqs)
> > > +{
> > > + void __iomem *base = binfo->ioaddr + ofst;
> > > + unsigned int i;
> > > + int virq;
> > > + u64 v;
> > > +
> > > + /*
> > > + * Ideally DFL framework should only read info from DFL header, but
> > > + * current version DFL only provides mmio resources information for
> > > + * each feature in DFL Header, no field for interrupt resources.
> > > + * Some interrupt resources information are provided by specific
> > > + * mmio registers of each components(e.g. different private features)
> > > + * which supports interrupt. So in order to parse and assign irq
> > > + * resources to different components, DFL framework has to look into
> > > + * specific capability registers of these core private features.
> > > + *
> > > + * Once future DFL version supports generic interrupt resources
> > > + * information in common DFL headers, some generic interrupt parsing
> > > + * code could be added. But in order to be compatible to old version
> > > + * DFL, driver may still fall back to these quirks.
> > > + */
> > > + switch (fid) {
> > > + case PORT_FEATURE_ID_UINT:
> > > + v = readq(base + PORT_UINT_CAP);
> > > + *irq_base = FIELD_GET(PORT_UINT_CAP_FST_VECT, v);
> > > + *nr_irqs = FIELD_GET(PORT_UINT_CAP_INT_NUM, v);
> > > + break;
> > > + case PORT_FEATURE_ID_ERROR:
> > > + v = readq(base + PORT_ERROR_CAP);
> > > + *irq_base = FIELD_GET(PORT_ERROR_CAP_INT_VECT, v);
> > > + *nr_irqs = FIELD_GET(PORT_ERROR_CAP_SUPP_INT, v);
> > > + break;
> > > + case FME_FEATURE_ID_GLOBAL_ERR:
> > > + v = readq(base + FME_ERROR_CAP);
> > > + *irq_base = FIELD_GET(FME_ERROR_CAP_INT_VECT, v);
> > > + *nr_irqs = FIELD_GET(FME_ERROR_CAP_SUPP_INT, v);
> > > + break;
> > > + default:
> > > + return;
> > > + }
> > > +
> > > + dev_dbg(binfo->dev, "feature: 0x%llx, nr_irqs: %u, irq_base: %u\n",
> > > + (unsigned long long)fid, *nr_irqs, *irq_base);
> > > +
> > > + if (*irq_base + *nr_irqs > binfo->nr_irqs)
> > > + goto parse_irq_fail;
> > > +
> > > + for (i = 0; i < *nr_irqs; i++) {
> > > + virq = binfo->irq_table[*irq_base + i];
> > > + if (virq < 0 || virq > NR_IRQS)
> > > + goto parse_irq_fail;
> >
> > looks like you may need different error message here and above.
> >
> > > + }
> > > +
> > > + return;
> > > +
> > > +parse_irq_fail:
> > > + *irq_base = 0;
> > > + *nr_irqs = 0;
> > > + dev_warn(binfo->dev, "Invalid interrupt number in feature 0x%llx\n",
> > > + (unsigned long long)fid);
> >
> > What about:
> >
> > u64 ibase, inr;
> >
> > switch () {
> > case ...
> > ibase = ..;
> > inr = ..;
> > break;
> > default:
> > return;
> >
> > }
> >
> > if () {
> > error message 1
> > return;
> > }
> >
> > for {
> > error message 2
> > return;
> > }
> >
> > *irq_base = ibase;
> > *nr_irqs = inr;
> > return;
>
> It's good optimization. I'll follow it.
>
> >
> > Other place looks good to me.
> >
> > Hao
> >
> > > +}
> > > +
> > > +/*
> > > * when create sub feature instances, for private features, it doesn't need
> > > * to provide resource size and feature id as they could be read from DFH
> > > * register. For afu sub feature, its register region only contains user
> > > @@ -650,6 +746,7 @@ create_feature_instance(struct build_feature_devs_info *binfo,
> > > struct dfl_fpga_enum_dfl *dfl, resource_size_t ofst,
> > > resource_size_t size, u64 fid)
> > > {
> > > + unsigned int irq_base = 0, nr_irqs = 0;
> > > struct dfl_feature_info *finfo;
> > >
> > > /* read feature size and id if inputs are invalid */
> > > @@ -659,6 +756,8 @@ create_feature_instance(struct build_feature_devs_info *binfo,
> > > if (dfl->len - ofst < size)
> > > return -EINVAL;
> > >
> > > + parse_feature_irqs(binfo, ofst, fid, &irq_base, &nr_irqs);
> > > +
> > > finfo = kzalloc(sizeof(*finfo), GFP_KERNEL);
> > > if (!finfo)
> > > return -ENOMEM;
> > > @@ -667,6 +766,8 @@ create_feature_instance(struct build_feature_devs_info *binfo,
> > > finfo->mmio_res.start = dfl->start + ofst;
> > > finfo->mmio_res.end = finfo->mmio_res.start + size - 1;
> > > finfo->mmio_res.flags = IORESOURCE_MEM;
> > > + finfo->irq_base = irq_base;
> > > + finfo->nr_irqs = nr_irqs;
> > > finfo->ioaddr = dfl->ioaddr + ofst;
> > >
> > > list_add_tail(&finfo->node, &binfo->sub_features);
> > > @@ -853,6 +954,10 @@ void dfl_fpga_enum_info_free(struct dfl_fpga_enum_info *info)
> > > devm_kfree(dev, dfl);
> > > }
> > >
> > > + /* remove irq table */
> > > + if (info->irq_table)
> > > + devm_kfree(dev, info->irq_table);
> > > +
> > > devm_kfree(dev, info);
> > > put_device(dev);
> > > }
> > > @@ -892,6 +997,45 @@ int dfl_fpga_enum_info_add_dfl(struct dfl_fpga_enum_info *info,
> > > }
> > > EXPORT_SYMBOL_GPL(dfl_fpga_enum_info_add_dfl);
> > >
> > > +/**
> > > + * dfl_fpga_enum_info_add_irq - add irq table to enum info
> > > + *
> > > + * @info: ptr to dfl_fpga_enum_info
> > > + * @nr_irqs: number of irqs of the DFL fpga device to be enumerated.
> > > + * @irq_table: Linux IRQ numbers for all irqs, indexed by local irq index of
> > > + * this device.
> > > + *
> > > + * One FPGA device may have several interrupts. This function adds irq
> > > + * information of the DFL fpga device to enum info for next step enumeration.
> > > + * This function should be called before dfl_fpga_feature_devs_enumerate().
> > > + * As we only support one irq domain for all DFLs in the same enum info, adding
> > > + * irq table a second time for the same enum info will return error.
> > > + *
> > > + * If we need to enumerate DFLs which belong to different irq domains, we
> > > + * should fill more enum info and enumerate them one by one.
> > > + *
> > > + * Return: 0 on success, negative error code otherwise.
> > > + */
> > > +int dfl_fpga_enum_info_add_irq(struct dfl_fpga_enum_info *info,
> > > + unsigned int nr_irqs, int *irq_table)
> > > +{
> > > + if (!nr_irqs)
> > > + return -EINVAL;
> > > +
> > > + if (info->irq_table)
> > > + return -EEXIST;
> > > +
> > > + info->irq_table = devm_kmemdup(info->dev, irq_table,
> > > + sizeof(int) * nr_irqs, GFP_KERNEL);
> > > + if (!info->irq_table)
> > > + return -ENOMEM;
> > > +
> > > + info->nr_irqs = nr_irqs;
> > > +
> > > + return 0;
> > > +}
> > > +EXPORT_SYMBOL_GPL(dfl_fpga_enum_info_add_irq);
> > > +
> > > static int remove_feature_dev(struct device *dev, void *data)
> > > {
> > > struct platform_device *pdev = to_platform_device(dev);
> > > @@ -959,6 +1103,10 @@ dfl_fpga_feature_devs_enumerate(struct dfl_fpga_enum_info *info)
> > > binfo->dev = info->dev;
> > > binfo->cdev = cdev;
> > >
> > > + binfo->nr_irqs = info->nr_irqs;
> > > + if (info->nr_irqs)
> > > + binfo->irq_table = info->irq_table;
> > > +
> > > /*
> > > * start enumeration for all feature devices based on Device Feature
> > > * Lists.
> > > diff --git a/drivers/fpga/dfl.h b/drivers/fpga/dfl.h
> > > index 74784d3..4bc165f 100644
> > > --- a/drivers/fpga/dfl.h
> > > +++ b/drivers/fpga/dfl.h
> > > @@ -112,6 +112,13 @@
> > > #define FME_PORT_OFST_ACC_VF 1
> > > #define FME_PORT_OFST_IMP BIT_ULL(60)
> > >
> > > +/* FME Error Capability Register */
> > > +#define FME_ERROR_CAP 0x70
> > > +
> > > +/* FME Error Capability Register Bitfield */
> > > +#define FME_ERROR_CAP_SUPP_INT BIT_ULL(0) /* Interrupt Support */
> > > +#define FME_ERROR_CAP_INT_VECT GENMASK_ULL(12, 1) /* Interrupt vector */
> > > +
> > > /* PORT Header Register Set */
> > > #define PORT_HDR_DFH DFH
> > > #define PORT_HDR_GUID_L GUID_L
> > > @@ -145,6 +152,20 @@
> > > #define PORT_STS_PWR_STATE_AP2 2 /* 90% throttling */
> > > #define PORT_STS_PWR_STATE_AP6 6 /* 100% throttling */
> > >
> > > +/* Port Error Capability Register */
> > > +#define PORT_ERROR_CAP 0x38
> > > +
> > > +/* Port Error Capability Register Bitfield */
> > > +#define PORT_ERROR_CAP_SUPP_INT BIT_ULL(0) /* Interrupt Support */
> > > +#define PORT_ERROR_CAP_INT_VECT GENMASK_ULL(12, 1) /* Interrupt vector */
> > > +
> > > +/* Port Uint Capability Register */
> > > +#define PORT_UINT_CAP 0x8
> > > +
> > > +/* Port Uint Capability Register Bitfield */
> > > +#define PORT_UINT_CAP_INT_NUM GENMASK_ULL(11, 0) /* Interrupts num */
> > > +#define PORT_UINT_CAP_FST_VECT GENMASK_ULL(23, 12) /* First Vector */
> > > +
> > > /**
> > > * struct dfl_fpga_port_ops - port ops
> > > *
> > > @@ -189,6 +210,15 @@ struct dfl_feature_driver {
> > > };
> > >
> > > /**
> > > + * struct dfl_feature_irq_ctx - dfl private feature interrupt context
> > > + *
> > > + * @irq: Linux IRQ number of this interrupt.
> > > + */
> > > +struct dfl_feature_irq_ctx {
> > > + int irq;
> > > +};
> > > +
> > > +/**
> > > * struct dfl_feature - sub feature of the feature devices
> > > *
> > > * @id: sub feature id.
> > > @@ -196,12 +226,16 @@ struct dfl_feature_driver {
> > > * this index is used to find its mmio resource from the
> > > * feature dev (platform device)'s reources.
> > > * @ioaddr: mapped mmio resource address.
> > > + * @irq_ctx: interrupt context list.
> > > + * @nr_irqs: number of interrupt contexts.
> > > * @ops: ops of this sub feature.
> > > */
> > > struct dfl_feature {
> > > u64 id;
> > > int resource_index;
> > > void __iomem *ioaddr;
> > > + struct dfl_feature_irq_ctx *irq_ctx;
> > > + unsigned int nr_irqs;
> > > const struct dfl_feature_ops *ops;
> > > };
> > >
> > > @@ -388,10 +422,14 @@ static inline u8 dfl_feature_revision(void __iomem *base)
> > > *
> > > * @dev: parent device.
> > > * @dfls: list of device feature lists.
> > > + * @nr_irqs: number of irqs for all feature devices.
> > > + * @irq_table: Linux IRQ numbers for all irqs, indexed by hw irq numbers.
> > > */
> > > struct dfl_fpga_enum_info {
> > > struct device *dev;
> > > struct list_head dfls;
> > > + unsigned int nr_irqs;
> > > + int *irq_table;
> > > };
> > >
> > > /**
> > > @@ -415,6 +453,8 @@ struct dfl_fpga_enum_info *dfl_fpga_enum_info_alloc(struct device *dev);
> > > int dfl_fpga_enum_info_add_dfl(struct dfl_fpga_enum_info *info,
> > > resource_size_t start, resource_size_t len,
> > > void __iomem *ioaddr);
> > > +int dfl_fpga_enum_info_add_irq(struct dfl_fpga_enum_info *info,
> > > + unsigned int nr_irqs, int *irq_table);
> > > void dfl_fpga_enum_info_free(struct dfl_fpga_enum_info *info);
> > >
> > > /**
> > > --
> > > 2.7.4
^ permalink raw reply [flat|nested] 21+ messages in thread* Re: [PATCH v3 1/7] fpga: dfl: parse interrupt info for feature devices on enumeration
2020-04-01 3:41 ` Wu Hao
@ 2020-04-01 5:37 ` Xu Yilun
0 siblings, 0 replies; 21+ messages in thread
From: Xu Yilun @ 2020-04-01 5:37 UTC (permalink / raw)
To: Wu Hao; +Cc: mdf, linux-fpga, linux-kernel, trix, bhu, Luwei Kang
On Wed, Apr 01, 2020 at 11:41:03AM +0800, Wu Hao wrote:
> On Wed, Apr 01, 2020 at 10:39:47AM +0800, Xu Yilun wrote:
> > On Tue, Mar 31, 2020 at 12:18:34PM +0800, Wu Hao wrote:
> > > On Tue, Mar 24, 2020 at 04:32:37PM +0800, Xu Yilun wrote:
> > > > DFL based FPGA devices could support interrupts for different purposes,
> > > > but current DFL framework only supports feature device enumeration with
> > > > given MMIO resources information via common DFL headers. This patch
> > > > introduces one new API dfl_fpga_enum_info_add_irq for low level bus
> > > > drivers (e.g. PCIe device driver) to pass its interrupt resources
> > > > information to DFL framework for enumeration, and also adds interrupt
> > > > enumeration code in framework to parse and assign interrupt resources
> > > > for enumerated feature devices and their own sub features.
> > > >
> > > > With this patch, DFL framework enumerates interrupt resources for core
> > > > features, including PORT Error Reporting, FME (FPGA Management Engine)
> > > > Error Reporting and also AFU User Interrupts.
> > > >
> > > > Signed-off-by: Luwei Kang <luwei.kang@intel.com>
> > > > Signed-off-by: Wu Hao <hao.wu@intel.com>
> > > > Signed-off-by: Xu Yilun <yilun.xu@intel.com>
> > > > ----
> > > > v2: early validating irq table for each feature in parse_feature_irq().
> > > > Some code improvement and minor fix for Hao's comments.
> > > > v3: put parse_feature_irqs() inside create_feature_instance()
> > > > some minor fixes and more comments
> > > > ---
> > > > drivers/fpga/dfl.c | 148 +++++++++++++++++++++++++++++++++++++++++++++++++++++
> > > > drivers/fpga/dfl.h | 40 +++++++++++++++
> > > > 2 files changed, 188 insertions(+)
> > > >
> > > > diff --git a/drivers/fpga/dfl.c b/drivers/fpga/dfl.c
> > > > index 9909948..bc8d966 100644
> > > > --- a/drivers/fpga/dfl.c
> > > > +++ b/drivers/fpga/dfl.c
> > > > @@ -11,6 +11,7 @@
> > > > * Xiao Guangrong <guangrong.xiao@linux.intel.com>
> > > > */
> > > > #include <linux/module.h>
> > > > +#include <asm/irq.h>
> > >
> > > use linux/interrupt.h instead here?
> >
> > Yes. But linux/interrupt.h is already in dfl.h. So we could just remove
> > this line.
> >
> > >
> > > >
> > > > #include "dfl.h"
> > > >
> > > > @@ -421,6 +422,9 @@ EXPORT_SYMBOL_GPL(dfl_fpga_dev_ops_unregister);
> > > > *
> > > > * @dev: device to enumerate.
> > > > * @cdev: the container device for all feature devices.
> > > > + * @nr_irqs: number of irqs for all feature devices.
> > > > + * @irq_table: Linux IRQ numbers for all irqs, indexed by local irq index of
> > > > + * this device.
> > > > * @feature_dev: current feature device.
> > > > * @ioaddr: header register region address of feature device in enumeration.
> > > > * @sub_features: a sub features linked list for feature device in enumeration.
> > > > @@ -429,6 +433,9 @@ EXPORT_SYMBOL_GPL(dfl_fpga_dev_ops_unregister);
> > > > struct build_feature_devs_info {
> > > > struct device *dev;
> > > > struct dfl_fpga_cdev *cdev;
> > > > + unsigned int nr_irqs;
> > > > + int *irq_table;
> > > > +
> > > > struct platform_device *feature_dev;
> > > > void __iomem *ioaddr;
> > > > struct list_head sub_features;
> > > > @@ -442,12 +449,16 @@ struct build_feature_devs_info {
> > > > * @mmio_res: mmio resource of this sub feature.
> > > > * @ioaddr: mapped base address of mmio resource.
> > > > * @node: node in sub_features linked list.
> > > > + * @irq_base: start of irq index in this sub feature.
> > > > + * @nr_irqs: number of irqs of this sub feature.
> > > > */
> > > > struct dfl_feature_info {
> > > > u64 fid;
> > > > struct resource mmio_res;
> > > > void __iomem *ioaddr;
> > > > struct list_head node;
> > > > + unsigned int irq_base;
> > > > + unsigned int nr_irqs;
> > > > };
> > > >
> > > > static void dfl_fpga_cdev_add_port_dev(struct dfl_fpga_cdev *cdev,
> > > > @@ -520,6 +531,8 @@ static int build_info_commit_dev(struct build_feature_devs_info *binfo)
> > > > /* fill features and resource information for feature dev */
> > > > list_for_each_entry_safe(finfo, p, &binfo->sub_features, node) {
> > > > struct dfl_feature *feature = &pdata->features[index];
> > > > + struct dfl_feature_irq_ctx *ctx;
> > > > + unsigned int i;
> > > >
> > > > /* save resource information for each feature */
> > > > feature->id = finfo->fid;
> > > > @@ -527,6 +540,20 @@ static int build_info_commit_dev(struct build_feature_devs_info *binfo)
> > > > feature->ioaddr = finfo->ioaddr;
> > > > fdev->resource[index++] = finfo->mmio_res;
> > > >
> > > > + if (finfo->nr_irqs) {
> > > > + ctx = devm_kcalloc(binfo->dev, finfo->nr_irqs,
> > > > + sizeof(*ctx), GFP_KERNEL);
> > > > + if (!ctx)
> > > > + return -ENOMEM;
> > > > +
> > > > + for (i = 0; i < finfo->nr_irqs; i++)
> > > > + ctx[i].irq =
> > > > + binfo->irq_table[finfo->irq_base + i];
> > > > +
> > > > + feature->irq_ctx = ctx;
> > > > + feature->nr_irqs = finfo->nr_irqs;
> > > > + }
> > > > +
> > > > list_del(&finfo->node);
> > > > kfree(finfo);
> > > > }
> > > > @@ -639,6 +666,75 @@ static u64 feature_id(void __iomem *start)
> > > > }
> > > >
> > > > /*
> > > > + * This function will not return any error. If irq parsing is failed, we still
> > > > + * try to support the feature without irq capability.
> > >
> > > I am thinking if we have a better choice here, e.g. return error for parsing
> > > interrupt failure. This looks alright, just because current feature could
> > > work without interrupt support, but if any feature can't work with interrupt,
> > > then should we notice user the errors as early as possible. How do you think?
> >
> > I think different features could have different concerns. If an feature
> > can't work without interrupt, it can error out in its own driver. This
> > will not affect other features functionality.
> >
> > The DFL may list some important private features like Flash controller
> > which reprograms the static region (DFL is placed here) through pcie.
> > If we error out the whole enumeration, then a moderate mistake makes
> > card unrecoverable.
>
> Do you mean we should not error out the whole enumeration if any other
> issues detected on private feature parsing as well? If so, then we need
> another patch?
I think it depends on how severe the issue is. The DFL is for FPGA
platform, people makes experiments on FPGA. It is perfect if we could
still support reprograming when some minor error happens. But I'm
afraid we need to discuss case by case, hard to have a unified criteria.
And for interrupt, I think it's OK we don't error out here.
If needed, I think more patches could be made for this purpose.
>
> Thanks
> Hao
>
> >
> > >
> > > > + */
> > > > +static void parse_feature_irqs(struct build_feature_devs_info *binfo,
> > > > + resource_size_t ofst, u64 fid,
> > > > + unsigned int *irq_base, unsigned int *nr_irqs)
> > > > +{
> > > > + void __iomem *base = binfo->ioaddr + ofst;
> > > > + unsigned int i;
> > > > + int virq;
> > > > + u64 v;
> > > > +
> > > > + /*
> > > > + * Ideally DFL framework should only read info from DFL header, but
> > > > + * current version DFL only provides mmio resources information for
> > > > + * each feature in DFL Header, no field for interrupt resources.
> > > > + * Some interrupt resources information are provided by specific
> > > > + * mmio registers of each components(e.g. different private features)
> > > > + * which supports interrupt. So in order to parse and assign irq
> > > > + * resources to different components, DFL framework has to look into
> > > > + * specific capability registers of these core private features.
> > > > + *
> > > > + * Once future DFL version supports generic interrupt resources
> > > > + * information in common DFL headers, some generic interrupt parsing
> > > > + * code could be added. But in order to be compatible to old version
> > > > + * DFL, driver may still fall back to these quirks.
> > > > + */
> > > > + switch (fid) {
> > > > + case PORT_FEATURE_ID_UINT:
> > > > + v = readq(base + PORT_UINT_CAP);
> > > > + *irq_base = FIELD_GET(PORT_UINT_CAP_FST_VECT, v);
> > > > + *nr_irqs = FIELD_GET(PORT_UINT_CAP_INT_NUM, v);
> > > > + break;
> > > > + case PORT_FEATURE_ID_ERROR:
> > > > + v = readq(base + PORT_ERROR_CAP);
> > > > + *irq_base = FIELD_GET(PORT_ERROR_CAP_INT_VECT, v);
> > > > + *nr_irqs = FIELD_GET(PORT_ERROR_CAP_SUPP_INT, v);
> > > > + break;
> > > > + case FME_FEATURE_ID_GLOBAL_ERR:
> > > > + v = readq(base + FME_ERROR_CAP);
> > > > + *irq_base = FIELD_GET(FME_ERROR_CAP_INT_VECT, v);
> > > > + *nr_irqs = FIELD_GET(FME_ERROR_CAP_SUPP_INT, v);
> > > > + break;
> > > > + default:
> > > > + return;
> > > > + }
> > > > +
> > > > + dev_dbg(binfo->dev, "feature: 0x%llx, nr_irqs: %u, irq_base: %u\n",
> > > > + (unsigned long long)fid, *nr_irqs, *irq_base);
> > > > +
> > > > + if (*irq_base + *nr_irqs > binfo->nr_irqs)
> > > > + goto parse_irq_fail;
> > > > +
> > > > + for (i = 0; i < *nr_irqs; i++) {
> > > > + virq = binfo->irq_table[*irq_base + i];
> > > > + if (virq < 0 || virq > NR_IRQS)
> > > > + goto parse_irq_fail;
> > >
> > > looks like you may need different error message here and above.
> > >
> > > > + }
> > > > +
> > > > + return;
> > > > +
> > > > +parse_irq_fail:
> > > > + *irq_base = 0;
> > > > + *nr_irqs = 0;
> > > > + dev_warn(binfo->dev, "Invalid interrupt number in feature 0x%llx\n",
> > > > + (unsigned long long)fid);
> > >
> > > What about:
> > >
> > > u64 ibase, inr;
> > >
> > > switch () {
> > > case ...
> > > ibase = ..;
> > > inr = ..;
> > > break;
> > > default:
> > > return;
> > >
> > > }
> > >
> > > if () {
> > > error message 1
> > > return;
> > > }
> > >
> > > for {
> > > error message 2
> > > return;
> > > }
> > >
> > > *irq_base = ibase;
> > > *nr_irqs = inr;
> > > return;
> >
> > It's good optimization. I'll follow it.
> >
> > >
> > > Other place looks good to me.
> > >
> > > Hao
> > >
> > > > +}
> > > > +
> > > > +/*
> > > > * when create sub feature instances, for private features, it doesn't need
> > > > * to provide resource size and feature id as they could be read from DFH
> > > > * register. For afu sub feature, its register region only contains user
> > > > @@ -650,6 +746,7 @@ create_feature_instance(struct build_feature_devs_info *binfo,
> > > > struct dfl_fpga_enum_dfl *dfl, resource_size_t ofst,
> > > > resource_size_t size, u64 fid)
> > > > {
> > > > + unsigned int irq_base = 0, nr_irqs = 0;
> > > > struct dfl_feature_info *finfo;
> > > >
> > > > /* read feature size and id if inputs are invalid */
> > > > @@ -659,6 +756,8 @@ create_feature_instance(struct build_feature_devs_info *binfo,
> > > > if (dfl->len - ofst < size)
> > > > return -EINVAL;
> > > >
> > > > + parse_feature_irqs(binfo, ofst, fid, &irq_base, &nr_irqs);
> > > > +
> > > > finfo = kzalloc(sizeof(*finfo), GFP_KERNEL);
> > > > if (!finfo)
> > > > return -ENOMEM;
> > > > @@ -667,6 +766,8 @@ create_feature_instance(struct build_feature_devs_info *binfo,
> > > > finfo->mmio_res.start = dfl->start + ofst;
> > > > finfo->mmio_res.end = finfo->mmio_res.start + size - 1;
> > > > finfo->mmio_res.flags = IORESOURCE_MEM;
> > > > + finfo->irq_base = irq_base;
> > > > + finfo->nr_irqs = nr_irqs;
> > > > finfo->ioaddr = dfl->ioaddr + ofst;
> > > >
> > > > list_add_tail(&finfo->node, &binfo->sub_features);
> > > > @@ -853,6 +954,10 @@ void dfl_fpga_enum_info_free(struct dfl_fpga_enum_info *info)
> > > > devm_kfree(dev, dfl);
> > > > }
> > > >
> > > > + /* remove irq table */
> > > > + if (info->irq_table)
> > > > + devm_kfree(dev, info->irq_table);
> > > > +
> > > > devm_kfree(dev, info);
> > > > put_device(dev);
> > > > }
> > > > @@ -892,6 +997,45 @@ int dfl_fpga_enum_info_add_dfl(struct dfl_fpga_enum_info *info,
> > > > }
> > > > EXPORT_SYMBOL_GPL(dfl_fpga_enum_info_add_dfl);
> > > >
> > > > +/**
> > > > + * dfl_fpga_enum_info_add_irq - add irq table to enum info
> > > > + *
> > > > + * @info: ptr to dfl_fpga_enum_info
> > > > + * @nr_irqs: number of irqs of the DFL fpga device to be enumerated.
> > > > + * @irq_table: Linux IRQ numbers for all irqs, indexed by local irq index of
> > > > + * this device.
> > > > + *
> > > > + * One FPGA device may have several interrupts. This function adds irq
> > > > + * information of the DFL fpga device to enum info for next step enumeration.
> > > > + * This function should be called before dfl_fpga_feature_devs_enumerate().
> > > > + * As we only support one irq domain for all DFLs in the same enum info, adding
> > > > + * irq table a second time for the same enum info will return error.
> > > > + *
> > > > + * If we need to enumerate DFLs which belong to different irq domains, we
> > > > + * should fill more enum info and enumerate them one by one.
> > > > + *
> > > > + * Return: 0 on success, negative error code otherwise.
> > > > + */
> > > > +int dfl_fpga_enum_info_add_irq(struct dfl_fpga_enum_info *info,
> > > > + unsigned int nr_irqs, int *irq_table)
> > > > +{
> > > > + if (!nr_irqs)
> > > > + return -EINVAL;
> > > > +
> > > > + if (info->irq_table)
> > > > + return -EEXIST;
> > > > +
> > > > + info->irq_table = devm_kmemdup(info->dev, irq_table,
> > > > + sizeof(int) * nr_irqs, GFP_KERNEL);
> > > > + if (!info->irq_table)
> > > > + return -ENOMEM;
> > > > +
> > > > + info->nr_irqs = nr_irqs;
> > > > +
> > > > + return 0;
> > > > +}
> > > > +EXPORT_SYMBOL_GPL(dfl_fpga_enum_info_add_irq);
> > > > +
> > > > static int remove_feature_dev(struct device *dev, void *data)
> > > > {
> > > > struct platform_device *pdev = to_platform_device(dev);
> > > > @@ -959,6 +1103,10 @@ dfl_fpga_feature_devs_enumerate(struct dfl_fpga_enum_info *info)
> > > > binfo->dev = info->dev;
> > > > binfo->cdev = cdev;
> > > >
> > > > + binfo->nr_irqs = info->nr_irqs;
> > > > + if (info->nr_irqs)
> > > > + binfo->irq_table = info->irq_table;
> > > > +
> > > > /*
> > > > * start enumeration for all feature devices based on Device Feature
> > > > * Lists.
> > > > diff --git a/drivers/fpga/dfl.h b/drivers/fpga/dfl.h
> > > > index 74784d3..4bc165f 100644
> > > > --- a/drivers/fpga/dfl.h
> > > > +++ b/drivers/fpga/dfl.h
> > > > @@ -112,6 +112,13 @@
> > > > #define FME_PORT_OFST_ACC_VF 1
> > > > #define FME_PORT_OFST_IMP BIT_ULL(60)
> > > >
> > > > +/* FME Error Capability Register */
> > > > +#define FME_ERROR_CAP 0x70
> > > > +
> > > > +/* FME Error Capability Register Bitfield */
> > > > +#define FME_ERROR_CAP_SUPP_INT BIT_ULL(0) /* Interrupt Support */
> > > > +#define FME_ERROR_CAP_INT_VECT GENMASK_ULL(12, 1) /* Interrupt vector */
> > > > +
> > > > /* PORT Header Register Set */
> > > > #define PORT_HDR_DFH DFH
> > > > #define PORT_HDR_GUID_L GUID_L
> > > > @@ -145,6 +152,20 @@
> > > > #define PORT_STS_PWR_STATE_AP2 2 /* 90% throttling */
> > > > #define PORT_STS_PWR_STATE_AP6 6 /* 100% throttling */
> > > >
> > > > +/* Port Error Capability Register */
> > > > +#define PORT_ERROR_CAP 0x38
> > > > +
> > > > +/* Port Error Capability Register Bitfield */
> > > > +#define PORT_ERROR_CAP_SUPP_INT BIT_ULL(0) /* Interrupt Support */
> > > > +#define PORT_ERROR_CAP_INT_VECT GENMASK_ULL(12, 1) /* Interrupt vector */
> > > > +
> > > > +/* Port Uint Capability Register */
> > > > +#define PORT_UINT_CAP 0x8
> > > > +
> > > > +/* Port Uint Capability Register Bitfield */
> > > > +#define PORT_UINT_CAP_INT_NUM GENMASK_ULL(11, 0) /* Interrupts num */
> > > > +#define PORT_UINT_CAP_FST_VECT GENMASK_ULL(23, 12) /* First Vector */
> > > > +
> > > > /**
> > > > * struct dfl_fpga_port_ops - port ops
> > > > *
> > > > @@ -189,6 +210,15 @@ struct dfl_feature_driver {
> > > > };
> > > >
> > > > /**
> > > > + * struct dfl_feature_irq_ctx - dfl private feature interrupt context
> > > > + *
> > > > + * @irq: Linux IRQ number of this interrupt.
> > > > + */
> > > > +struct dfl_feature_irq_ctx {
> > > > + int irq;
> > > > +};
> > > > +
> > > > +/**
> > > > * struct dfl_feature - sub feature of the feature devices
> > > > *
> > > > * @id: sub feature id.
> > > > @@ -196,12 +226,16 @@ struct dfl_feature_driver {
> > > > * this index is used to find its mmio resource from the
> > > > * feature dev (platform device)'s reources.
> > > > * @ioaddr: mapped mmio resource address.
> > > > + * @irq_ctx: interrupt context list.
> > > > + * @nr_irqs: number of interrupt contexts.
> > > > * @ops: ops of this sub feature.
> > > > */
> > > > struct dfl_feature {
> > > > u64 id;
> > > > int resource_index;
> > > > void __iomem *ioaddr;
> > > > + struct dfl_feature_irq_ctx *irq_ctx;
> > > > + unsigned int nr_irqs;
> > > > const struct dfl_feature_ops *ops;
> > > > };
> > > >
> > > > @@ -388,10 +422,14 @@ static inline u8 dfl_feature_revision(void __iomem *base)
> > > > *
> > > > * @dev: parent device.
> > > > * @dfls: list of device feature lists.
> > > > + * @nr_irqs: number of irqs for all feature devices.
> > > > + * @irq_table: Linux IRQ numbers for all irqs, indexed by hw irq numbers.
> > > > */
> > > > struct dfl_fpga_enum_info {
> > > > struct device *dev;
> > > > struct list_head dfls;
> > > > + unsigned int nr_irqs;
> > > > + int *irq_table;
> > > > };
> > > >
> > > > /**
> > > > @@ -415,6 +453,8 @@ struct dfl_fpga_enum_info *dfl_fpga_enum_info_alloc(struct device *dev);
> > > > int dfl_fpga_enum_info_add_dfl(struct dfl_fpga_enum_info *info,
> > > > resource_size_t start, resource_size_t len,
> > > > void __iomem *ioaddr);
> > > > +int dfl_fpga_enum_info_add_irq(struct dfl_fpga_enum_info *info,
> > > > + unsigned int nr_irqs, int *irq_table);
> > > > void dfl_fpga_enum_info_free(struct dfl_fpga_enum_info *info);
> > > >
> > > > /**
> > > > --
> > > > 2.7.4
^ permalink raw reply [flat|nested] 21+ messages in thread
* [PATCH v3 2/7] fpga: dfl: pci: add irq info for feature devices enumeration
2020-03-24 8:32 [PATCH v3 0/7] Add interrupt support to FPGA DFL drivers Xu Yilun
2020-03-24 8:32 ` [PATCH v3 1/7] fpga: dfl: parse interrupt info for feature devices on enumeration Xu Yilun
@ 2020-03-24 8:32 ` Xu Yilun
2020-03-31 4:41 ` Wu Hao
2020-03-24 8:32 ` [PATCH v3 3/7] fpga: dfl: introduce interrupt trigger setting API Xu Yilun
` (4 subsequent siblings)
6 siblings, 1 reply; 21+ messages in thread
From: Xu Yilun @ 2020-03-24 8:32 UTC (permalink / raw)
To: mdf, linux-fpga, linux-kernel; +Cc: trix, bhu, Xu Yilun, Luwei Kang, Wu Hao
Some DFL FPGA PCIe cards (e.g. Intel FPGA Programmable Acceleration
Card) support MSI-X based interrupts. This patch allows PCIe driver
to prepare and pass interrupt resources to DFL via enumeration API.
These interrupt resources could then be assigned to actual features
which use them.
Signed-off-by: Luwei Kang <luwei.kang@intel.com>
Signed-off-by: Wu Hao <hao.wu@intel.com>
Signed-off-by: Xu Yilun <yilun.xu@intel.com>
----
v2: put irq resources init code inside cce_enumerate_feature_dev()
Some minor changes for Hao's comments.
v3: Some minor fix for Hao's comments for v2.
---
drivers/fpga/dfl-pci.c | 76 ++++++++++++++++++++++++++++++++++++++++++++------
1 file changed, 67 insertions(+), 9 deletions(-)
diff --git a/drivers/fpga/dfl-pci.c b/drivers/fpga/dfl-pci.c
index 5387550..66027aa 100644
--- a/drivers/fpga/dfl-pci.c
+++ b/drivers/fpga/dfl-pci.c
@@ -39,6 +39,28 @@ static void __iomem *cci_pci_ioremap_bar(struct pci_dev *pcidev, int bar)
return pcim_iomap_table(pcidev)[bar];
}
+static int cci_pci_alloc_irq(struct pci_dev *pcidev)
+{
+ int nvec = pci_msix_vec_count(pcidev);
+ int ret;
+
+ if (nvec <= 0) {
+ dev_dbg(&pcidev->dev, "fpga interrupt not supported\n");
+ return 0;
+ }
+
+ ret = pci_alloc_irq_vectors(pcidev, nvec, nvec, PCI_IRQ_MSIX);
+ if (ret < 0)
+ return ret;
+
+ return nvec;
+}
+
+static void cci_pci_free_irq(struct pci_dev *pcidev)
+{
+ pci_free_irq_vectors(pcidev);
+}
+
/* PCI Device ID */
#define PCIE_DEVICE_ID_PF_INT_5_X 0xBCBD
#define PCIE_DEVICE_ID_PF_INT_6_X 0xBCC0
@@ -78,17 +100,33 @@ static void cci_remove_feature_devs(struct pci_dev *pcidev)
/* remove all children feature devices */
dfl_fpga_feature_devs_remove(drvdata->cdev);
+ cci_pci_free_irq(pcidev);
+}
+
+static int *cci_pci_create_irq_table(struct pci_dev *pcidev, unsigned int nvec)
+{
+ unsigned int i;
+ int *table;
+
+ table = kcalloc(nvec, sizeof(int), GFP_KERNEL);
+ if (table) {
+ for (i = 0; i < nvec; i++)
+ table[i] = pci_irq_vector(pcidev, i);
+ }
+
+ return table;
}
/* enumerate feature devices under pci device */
static int cci_enumerate_feature_devs(struct pci_dev *pcidev)
{
struct cci_drvdata *drvdata = pci_get_drvdata(pcidev);
+ int port_num, bar, i, nvec, ret = 0;
struct dfl_fpga_enum_info *info;
struct dfl_fpga_cdev *cdev;
resource_size_t start, len;
- int port_num, bar, i, ret = 0;
void __iomem *base;
+ int *irq_table;
u32 offset;
u64 v;
@@ -97,11 +135,30 @@ static int cci_enumerate_feature_devs(struct pci_dev *pcidev)
if (!info)
return -ENOMEM;
+ /* add irq info for enumeration if the device support irq */
+ nvec = cci_pci_alloc_irq(pcidev);
+ if (nvec < 0) {
+ dev_err(&pcidev->dev, "Fail to alloc irq %d.\n", nvec);
+ ret = nvec;
+ goto enum_info_free_exit;
+ } else if (nvec) {
+ irq_table = cci_pci_create_irq_table(pcidev, nvec);
+ if (!irq_table) {
+ ret = -ENOMEM;
+ goto irq_free_exit;
+ }
+
+ ret = dfl_fpga_enum_info_add_irq(info, nvec, irq_table);
+ kfree(irq_table);
+ if (ret)
+ goto irq_free_exit;
+ }
+
/* start to find Device Feature List from Bar 0 */
base = cci_pci_ioremap_bar(pcidev, 0);
if (!base) {
ret = -ENOMEM;
- goto enum_info_free_exit;
+ goto irq_free_exit;
}
/*
@@ -154,7 +211,7 @@ static int cci_enumerate_feature_devs(struct pci_dev *pcidev)
dfl_fpga_enum_info_add_dfl(info, start, len, base);
} else {
ret = -ENODEV;
- goto enum_info_free_exit;
+ goto irq_free_exit;
}
/* start enumeration with prepared enumeration information */
@@ -162,11 +219,14 @@ static int cci_enumerate_feature_devs(struct pci_dev *pcidev)
if (IS_ERR(cdev)) {
dev_err(&pcidev->dev, "Enumeration failure\n");
ret = PTR_ERR(cdev);
- goto enum_info_free_exit;
+ goto irq_free_exit;
}
drvdata->cdev = cdev;
+irq_free_exit:
+ if (ret)
+ cci_pci_free_irq(pcidev);
enum_info_free_exit:
dfl_fpga_enum_info_free(info);
@@ -211,12 +271,10 @@ int cci_pci_probe(struct pci_dev *pcidev, const struct pci_device_id *pcidevid)
}
ret = cci_enumerate_feature_devs(pcidev);
- if (ret) {
- dev_err(&pcidev->dev, "enumeration failure %d.\n", ret);
- goto disable_error_report_exit;
- }
+ if (!ret)
+ return ret;
- return ret;
+ dev_err(&pcidev->dev, "enumeration failure %d.\n", ret);
disable_error_report_exit:
pci_disable_pcie_error_reporting(pcidev);
--
2.7.4
^ permalink raw reply related [flat|nested] 21+ messages in thread* Re: [PATCH v3 2/7] fpga: dfl: pci: add irq info for feature devices enumeration
2020-03-24 8:32 ` [PATCH v3 2/7] fpga: dfl: pci: add irq info for feature devices enumeration Xu Yilun
@ 2020-03-31 4:41 ` Wu Hao
2020-04-01 2:59 ` Xu Yilun
0 siblings, 1 reply; 21+ messages in thread
From: Wu Hao @ 2020-03-31 4:41 UTC (permalink / raw)
To: Xu Yilun; +Cc: mdf, linux-fpga, linux-kernel, trix, bhu, Luwei Kang
On Tue, Mar 24, 2020 at 04:32:38PM +0800, Xu Yilun wrote:
> Some DFL FPGA PCIe cards (e.g. Intel FPGA Programmable Acceleration
> Card) support MSI-X based interrupts. This patch allows PCIe driver
> to prepare and pass interrupt resources to DFL via enumeration API.
> These interrupt resources could then be assigned to actual features
> which use them.
>
> Signed-off-by: Luwei Kang <luwei.kang@intel.com>
> Signed-off-by: Wu Hao <hao.wu@intel.com>
> Signed-off-by: Xu Yilun <yilun.xu@intel.com>
> ----
> v2: put irq resources init code inside cce_enumerate_feature_dev()
> Some minor changes for Hao's comments.
> v3: Some minor fix for Hao's comments for v2.
> ---
> drivers/fpga/dfl-pci.c | 76 ++++++++++++++++++++++++++++++++++++++++++++------
> 1 file changed, 67 insertions(+), 9 deletions(-)
>
> diff --git a/drivers/fpga/dfl-pci.c b/drivers/fpga/dfl-pci.c
> index 5387550..66027aa 100644
> --- a/drivers/fpga/dfl-pci.c
> +++ b/drivers/fpga/dfl-pci.c
> @@ -39,6 +39,28 @@ static void __iomem *cci_pci_ioremap_bar(struct pci_dev *pcidev, int bar)
> return pcim_iomap_table(pcidev)[bar];
> }
>
> +static int cci_pci_alloc_irq(struct pci_dev *pcidev)
> +{
> + int nvec = pci_msix_vec_count(pcidev);
> + int ret;
maybe int ret, nvec = pci_msix..
> +
> + if (nvec <= 0) {
> + dev_dbg(&pcidev->dev, "fpga interrupt not supported\n");
> + return 0;
> + }
> +
> + ret = pci_alloc_irq_vectors(pcidev, nvec, nvec, PCI_IRQ_MSIX);
> + if (ret < 0)
> + return ret;
> +
> + return nvec;
> +}
> +
> +static void cci_pci_free_irq(struct pci_dev *pcidev)
> +{
> + pci_free_irq_vectors(pcidev);
> +}
> +
> /* PCI Device ID */
> #define PCIE_DEVICE_ID_PF_INT_5_X 0xBCBD
> #define PCIE_DEVICE_ID_PF_INT_6_X 0xBCC0
> @@ -78,17 +100,33 @@ static void cci_remove_feature_devs(struct pci_dev *pcidev)
>
> /* remove all children feature devices */
> dfl_fpga_feature_devs_remove(drvdata->cdev);
> + cci_pci_free_irq(pcidev);
> +}
> +
> +static int *cci_pci_create_irq_table(struct pci_dev *pcidev, unsigned int nvec)
> +{
> + unsigned int i;
> + int *table;
> +
> + table = kcalloc(nvec, sizeof(int), GFP_KERNEL);
> + if (table) {
> + for (i = 0; i < nvec; i++)
> + table[i] = pci_irq_vector(pcidev, i);
> + }
> +
> + return table;
> }
>
> /* enumerate feature devices under pci device */
> static int cci_enumerate_feature_devs(struct pci_dev *pcidev)
> {
> struct cci_drvdata *drvdata = pci_get_drvdata(pcidev);
> + int port_num, bar, i, nvec, ret = 0;
> struct dfl_fpga_enum_info *info;
> struct dfl_fpga_cdev *cdev;
> resource_size_t start, len;
> - int port_num, bar, i, ret = 0;
> void __iomem *base;
> + int *irq_table;
> u32 offset;
> u64 v;
>
> @@ -97,11 +135,30 @@ static int cci_enumerate_feature_devs(struct pci_dev *pcidev)
> if (!info)
> return -ENOMEM;
>
> + /* add irq info for enumeration if the device support irq */
> + nvec = cci_pci_alloc_irq(pcidev);
> + if (nvec < 0) {
> + dev_err(&pcidev->dev, "Fail to alloc irq %d.\n", nvec);
> + ret = nvec;
> + goto enum_info_free_exit;
> + } else if (nvec) {
> + irq_table = cci_pci_create_irq_table(pcidev, nvec);
> + if (!irq_table) {
> + ret = -ENOMEM;
> + goto irq_free_exit;
> + }
> +
> + ret = dfl_fpga_enum_info_add_irq(info, nvec, irq_table);
> + kfree(irq_table);
i see you create a function for cci_pci_free_irq instead of using kernel api
directly, to make it more readable, so why not have a remove irq table function
here too.
Actually patch looks good to me, with above minor fixes.
Acked-by: Wu Hao <hao.wu@intel.com>
Hao
> + if (ret)
> + goto irq_free_exit;
> + }
> +
> /* start to find Device Feature List from Bar 0 */
> base = cci_pci_ioremap_bar(pcidev, 0);
> if (!base) {
> ret = -ENOMEM;
> - goto enum_info_free_exit;
> + goto irq_free_exit;
> }
>
> /*
> @@ -154,7 +211,7 @@ static int cci_enumerate_feature_devs(struct pci_dev *pcidev)
> dfl_fpga_enum_info_add_dfl(info, start, len, base);
> } else {
> ret = -ENODEV;
> - goto enum_info_free_exit;
> + goto irq_free_exit;
> }
>
> /* start enumeration with prepared enumeration information */
> @@ -162,11 +219,14 @@ static int cci_enumerate_feature_devs(struct pci_dev *pcidev)
> if (IS_ERR(cdev)) {
> dev_err(&pcidev->dev, "Enumeration failure\n");
> ret = PTR_ERR(cdev);
> - goto enum_info_free_exit;
> + goto irq_free_exit;
> }
>
> drvdata->cdev = cdev;
>
> +irq_free_exit:
> + if (ret)
> + cci_pci_free_irq(pcidev);
> enum_info_free_exit:
> dfl_fpga_enum_info_free(info);
>
> @@ -211,12 +271,10 @@ int cci_pci_probe(struct pci_dev *pcidev, const struct pci_device_id *pcidevid)
> }
>
> ret = cci_enumerate_feature_devs(pcidev);
> - if (ret) {
> - dev_err(&pcidev->dev, "enumeration failure %d.\n", ret);
> - goto disable_error_report_exit;
> - }
> + if (!ret)
> + return ret;
>
> - return ret;
> + dev_err(&pcidev->dev, "enumeration failure %d.\n", ret);
>
> disable_error_report_exit:
> pci_disable_pcie_error_reporting(pcidev);
> --
> 2.7.4
^ permalink raw reply [flat|nested] 21+ messages in thread* Re: [PATCH v3 2/7] fpga: dfl: pci: add irq info for feature devices enumeration
2020-03-31 4:41 ` Wu Hao
@ 2020-04-01 2:59 ` Xu Yilun
2020-04-01 3:44 ` Wu Hao
0 siblings, 1 reply; 21+ messages in thread
From: Xu Yilun @ 2020-04-01 2:59 UTC (permalink / raw)
To: Wu Hao; +Cc: mdf, linux-fpga, linux-kernel, trix, bhu, Luwei Kang
On Tue, Mar 31, 2020 at 12:41:20PM +0800, Wu Hao wrote:
> On Tue, Mar 24, 2020 at 04:32:38PM +0800, Xu Yilun wrote:
> > Some DFL FPGA PCIe cards (e.g. Intel FPGA Programmable Acceleration
> > Card) support MSI-X based interrupts. This patch allows PCIe driver
> > to prepare and pass interrupt resources to DFL via enumeration API.
> > These interrupt resources could then be assigned to actual features
> > which use them.
> >
> > Signed-off-by: Luwei Kang <luwei.kang@intel.com>
> > Signed-off-by: Wu Hao <hao.wu@intel.com>
> > Signed-off-by: Xu Yilun <yilun.xu@intel.com>
> > ----
> > v2: put irq resources init code inside cce_enumerate_feature_dev()
> > Some minor changes for Hao's comments.
> > v3: Some minor fix for Hao's comments for v2.
> > ---
> > drivers/fpga/dfl-pci.c | 76 ++++++++++++++++++++++++++++++++++++++++++++------
> > 1 file changed, 67 insertions(+), 9 deletions(-)
> >
> > diff --git a/drivers/fpga/dfl-pci.c b/drivers/fpga/dfl-pci.c
> > index 5387550..66027aa 100644
> > --- a/drivers/fpga/dfl-pci.c
> > +++ b/drivers/fpga/dfl-pci.c
> > @@ -39,6 +39,28 @@ static void __iomem *cci_pci_ioremap_bar(struct pci_dev *pcidev, int bar)
> > return pcim_iomap_table(pcidev)[bar];
> > }
> >
> > +static int cci_pci_alloc_irq(struct pci_dev *pcidev)
> > +{
> > + int nvec = pci_msix_vec_count(pcidev);
> > + int ret;
>
> maybe int ret, nvec = pci_msix..
>
> > +
> > + if (nvec <= 0) {
> > + dev_dbg(&pcidev->dev, "fpga interrupt not supported\n");
> > + return 0;
> > + }
> > +
> > + ret = pci_alloc_irq_vectors(pcidev, nvec, nvec, PCI_IRQ_MSIX);
> > + if (ret < 0)
> > + return ret;
> > +
> > + return nvec;
> > +}
> > +
> > +static void cci_pci_free_irq(struct pci_dev *pcidev)
> > +{
> > + pci_free_irq_vectors(pcidev);
> > +}
> > +
> > /* PCI Device ID */
> > #define PCIE_DEVICE_ID_PF_INT_5_X 0xBCBD
> > #define PCIE_DEVICE_ID_PF_INT_6_X 0xBCC0
> > @@ -78,17 +100,33 @@ static void cci_remove_feature_devs(struct pci_dev *pcidev)
> >
> > /* remove all children feature devices */
> > dfl_fpga_feature_devs_remove(drvdata->cdev);
> > + cci_pci_free_irq(pcidev);
> > +}
> > +
> > +static int *cci_pci_create_irq_table(struct pci_dev *pcidev, unsigned int nvec)
> > +{
> > + unsigned int i;
> > + int *table;
> > +
> > + table = kcalloc(nvec, sizeof(int), GFP_KERNEL);
> > + if (table) {
> > + for (i = 0; i < nvec; i++)
> > + table[i] = pci_irq_vector(pcidev, i);
> > + }
> > +
> > + return table;
> > }
> >
> > /* enumerate feature devices under pci device */
> > static int cci_enumerate_feature_devs(struct pci_dev *pcidev)
> > {
> > struct cci_drvdata *drvdata = pci_get_drvdata(pcidev);
> > + int port_num, bar, i, nvec, ret = 0;
> > struct dfl_fpga_enum_info *info;
> > struct dfl_fpga_cdev *cdev;
> > resource_size_t start, len;
> > - int port_num, bar, i, ret = 0;
> > void __iomem *base;
> > + int *irq_table;
> > u32 offset;
> > u64 v;
> >
> > @@ -97,11 +135,30 @@ static int cci_enumerate_feature_devs(struct pci_dev *pcidev)
> > if (!info)
> > return -ENOMEM;
> >
> > + /* add irq info for enumeration if the device support irq */
> > + nvec = cci_pci_alloc_irq(pcidev);
> > + if (nvec < 0) {
> > + dev_err(&pcidev->dev, "Fail to alloc irq %d.\n", nvec);
> > + ret = nvec;
> > + goto enum_info_free_exit;
> > + } else if (nvec) {
> > + irq_table = cci_pci_create_irq_table(pcidev, nvec);
> > + if (!irq_table) {
> > + ret = -ENOMEM;
> > + goto irq_free_exit;
> > + }
> > +
> > + ret = dfl_fpga_enum_info_add_irq(info, nvec, irq_table);
> > + kfree(irq_table);
>
> i see you create a function for cci_pci_free_irq instead of using kernel api
> directly, to make it more readable, so why not have a remove irq table function
> here too.
The irq_table is not alloced in cci_pci_alloc_irq,
cci_pci_create_irq_table does. Actually cci_pci_alloc/free_irq are not
related to irq_table for DFL.
So maybe we don't have to change this?
>
> Actually patch looks good to me, with above minor fixes.
>
> Acked-by: Wu Hao <hao.wu@intel.com>
>
> Hao
>
> > + if (ret)
> > + goto irq_free_exit;
> > + }
> > +
> > /* start to find Device Feature List from Bar 0 */
> > base = cci_pci_ioremap_bar(pcidev, 0);
> > if (!base) {
> > ret = -ENOMEM;
> > - goto enum_info_free_exit;
> > + goto irq_free_exit;
> > }
> >
> > /*
> > @@ -154,7 +211,7 @@ static int cci_enumerate_feature_devs(struct pci_dev *pcidev)
> > dfl_fpga_enum_info_add_dfl(info, start, len, base);
> > } else {
> > ret = -ENODEV;
> > - goto enum_info_free_exit;
> > + goto irq_free_exit;
> > }
> >
> > /* start enumeration with prepared enumeration information */
> > @@ -162,11 +219,14 @@ static int cci_enumerate_feature_devs(struct pci_dev *pcidev)
> > if (IS_ERR(cdev)) {
> > dev_err(&pcidev->dev, "Enumeration failure\n");
> > ret = PTR_ERR(cdev);
> > - goto enum_info_free_exit;
> > + goto irq_free_exit;
> > }
> >
> > drvdata->cdev = cdev;
> >
> > +irq_free_exit:
> > + if (ret)
> > + cci_pci_free_irq(pcidev);
> > enum_info_free_exit:
> > dfl_fpga_enum_info_free(info);
> >
> > @@ -211,12 +271,10 @@ int cci_pci_probe(struct pci_dev *pcidev, const struct pci_device_id *pcidevid)
> > }
> >
> > ret = cci_enumerate_feature_devs(pcidev);
> > - if (ret) {
> > - dev_err(&pcidev->dev, "enumeration failure %d.\n", ret);
> > - goto disable_error_report_exit;
> > - }
> > + if (!ret)
> > + return ret;
> >
> > - return ret;
> > + dev_err(&pcidev->dev, "enumeration failure %d.\n", ret);
> >
> > disable_error_report_exit:
> > pci_disable_pcie_error_reporting(pcidev);
> > --
> > 2.7.4
^ permalink raw reply [flat|nested] 21+ messages in thread* Re: [PATCH v3 2/7] fpga: dfl: pci: add irq info for feature devices enumeration
2020-04-01 2:59 ` Xu Yilun
@ 2020-04-01 3:44 ` Wu Hao
2020-04-01 5:41 ` Xu Yilun
0 siblings, 1 reply; 21+ messages in thread
From: Wu Hao @ 2020-04-01 3:44 UTC (permalink / raw)
To: Xu Yilun; +Cc: mdf, linux-fpga, linux-kernel, trix, bhu, Luwei Kang
On Wed, Apr 01, 2020 at 10:59:02AM +0800, Xu Yilun wrote:
> On Tue, Mar 31, 2020 at 12:41:20PM +0800, Wu Hao wrote:
> > On Tue, Mar 24, 2020 at 04:32:38PM +0800, Xu Yilun wrote:
> > > Some DFL FPGA PCIe cards (e.g. Intel FPGA Programmable Acceleration
> > > Card) support MSI-X based interrupts. This patch allows PCIe driver
> > > to prepare and pass interrupt resources to DFL via enumeration API.
> > > These interrupt resources could then be assigned to actual features
> > > which use them.
> > >
> > > Signed-off-by: Luwei Kang <luwei.kang@intel.com>
> > > Signed-off-by: Wu Hao <hao.wu@intel.com>
> > > Signed-off-by: Xu Yilun <yilun.xu@intel.com>
> > > ----
> > > v2: put irq resources init code inside cce_enumerate_feature_dev()
> > > Some minor changes for Hao's comments.
> > > v3: Some minor fix for Hao's comments for v2.
> > > ---
> > > drivers/fpga/dfl-pci.c | 76 ++++++++++++++++++++++++++++++++++++++++++++------
> > > 1 file changed, 67 insertions(+), 9 deletions(-)
> > >
> > > diff --git a/drivers/fpga/dfl-pci.c b/drivers/fpga/dfl-pci.c
> > > index 5387550..66027aa 100644
> > > --- a/drivers/fpga/dfl-pci.c
> > > +++ b/drivers/fpga/dfl-pci.c
> > > @@ -39,6 +39,28 @@ static void __iomem *cci_pci_ioremap_bar(struct pci_dev *pcidev, int bar)
> > > return pcim_iomap_table(pcidev)[bar];
> > > }
> > >
> > > +static int cci_pci_alloc_irq(struct pci_dev *pcidev)
> > > +{
> > > + int nvec = pci_msix_vec_count(pcidev);
> > > + int ret;
> >
> > maybe int ret, nvec = pci_msix..
> >
> > > +
> > > + if (nvec <= 0) {
> > > + dev_dbg(&pcidev->dev, "fpga interrupt not supported\n");
> > > + return 0;
> > > + }
> > > +
> > > + ret = pci_alloc_irq_vectors(pcidev, nvec, nvec, PCI_IRQ_MSIX);
> > > + if (ret < 0)
> > > + return ret;
> > > +
> > > + return nvec;
> > > +}
> > > +
> > > +static void cci_pci_free_irq(struct pci_dev *pcidev)
> > > +{
> > > + pci_free_irq_vectors(pcidev);
> > > +}
> > > +
> > > /* PCI Device ID */
> > > #define PCIE_DEVICE_ID_PF_INT_5_X 0xBCBD
> > > #define PCIE_DEVICE_ID_PF_INT_6_X 0xBCC0
> > > @@ -78,17 +100,33 @@ static void cci_remove_feature_devs(struct pci_dev *pcidev)
> > >
> > > /* remove all children feature devices */
> > > dfl_fpga_feature_devs_remove(drvdata->cdev);
> > > + cci_pci_free_irq(pcidev);
> > > +}
> > > +
> > > +static int *cci_pci_create_irq_table(struct pci_dev *pcidev, unsigned int nvec)
> > > +{
> > > + unsigned int i;
> > > + int *table;
> > > +
> > > + table = kcalloc(nvec, sizeof(int), GFP_KERNEL);
> > > + if (table) {
> > > + for (i = 0; i < nvec; i++)
> > > + table[i] = pci_irq_vector(pcidev, i);
> > > + }
> > > +
> > > + return table;
> > > }
> > >
> > > /* enumerate feature devices under pci device */
> > > static int cci_enumerate_feature_devs(struct pci_dev *pcidev)
> > > {
> > > struct cci_drvdata *drvdata = pci_get_drvdata(pcidev);
> > > + int port_num, bar, i, nvec, ret = 0;
> > > struct dfl_fpga_enum_info *info;
> > > struct dfl_fpga_cdev *cdev;
> > > resource_size_t start, len;
> > > - int port_num, bar, i, ret = 0;
> > > void __iomem *base;
> > > + int *irq_table;
> > > u32 offset;
> > > u64 v;
> > >
> > > @@ -97,11 +135,30 @@ static int cci_enumerate_feature_devs(struct pci_dev *pcidev)
> > > if (!info)
> > > return -ENOMEM;
> > >
> > > + /* add irq info for enumeration if the device support irq */
> > > + nvec = cci_pci_alloc_irq(pcidev);
> > > + if (nvec < 0) {
> > > + dev_err(&pcidev->dev, "Fail to alloc irq %d.\n", nvec);
> > > + ret = nvec;
> > > + goto enum_info_free_exit;
> > > + } else if (nvec) {
> > > + irq_table = cci_pci_create_irq_table(pcidev, nvec);
> > > + if (!irq_table) {
> > > + ret = -ENOMEM;
> > > + goto irq_free_exit;
> > > + }
> > > +
> > > + ret = dfl_fpga_enum_info_add_irq(info, nvec, irq_table);
> > > + kfree(irq_table);
> >
> > i see you create a function for cci_pci_free_irq instead of using kernel api
> > directly, to make it more readable, so why not have a remove irq table function
> > here too.
>
> The irq_table is not alloced in cci_pci_alloc_irq,
> cci_pci_create_irq_table does. Actually cci_pci_alloc/free_irq are not
> related to irq_table for DFL.
>
> So maybe we don't have to change this?
I mean, you have cci_pci_alloc/free_irq but cci_pci_create_irq_table/kfree.
why don't you use cci_pci_remove_irq_table or something instead of kfree?
Hao
>
> >
> > Actually patch looks good to me, with above minor fixes.
> >
> > Acked-by: Wu Hao <hao.wu@intel.com>
> >
> > Hao
> >
> > > + if (ret)
> > > + goto irq_free_exit;
> > > + }
> > > +
> > > /* start to find Device Feature List from Bar 0 */
> > > base = cci_pci_ioremap_bar(pcidev, 0);
> > > if (!base) {
> > > ret = -ENOMEM;
> > > - goto enum_info_free_exit;
> > > + goto irq_free_exit;
> > > }
> > >
> > > /*
> > > @@ -154,7 +211,7 @@ static int cci_enumerate_feature_devs(struct pci_dev *pcidev)
> > > dfl_fpga_enum_info_add_dfl(info, start, len, base);
> > > } else {
> > > ret = -ENODEV;
> > > - goto enum_info_free_exit;
> > > + goto irq_free_exit;
> > > }
> > >
> > > /* start enumeration with prepared enumeration information */
> > > @@ -162,11 +219,14 @@ static int cci_enumerate_feature_devs(struct pci_dev *pcidev)
> > > if (IS_ERR(cdev)) {
> > > dev_err(&pcidev->dev, "Enumeration failure\n");
> > > ret = PTR_ERR(cdev);
> > > - goto enum_info_free_exit;
> > > + goto irq_free_exit;
> > > }
> > >
> > > drvdata->cdev = cdev;
> > >
> > > +irq_free_exit:
> > > + if (ret)
> > > + cci_pci_free_irq(pcidev);
> > > enum_info_free_exit:
> > > dfl_fpga_enum_info_free(info);
> > >
> > > @@ -211,12 +271,10 @@ int cci_pci_probe(struct pci_dev *pcidev, const struct pci_device_id *pcidevid)
> > > }
> > >
> > > ret = cci_enumerate_feature_devs(pcidev);
> > > - if (ret) {
> > > - dev_err(&pcidev->dev, "enumeration failure %d.\n", ret);
> > > - goto disable_error_report_exit;
> > > - }
> > > + if (!ret)
> > > + return ret;
> > >
> > > - return ret;
> > > + dev_err(&pcidev->dev, "enumeration failure %d.\n", ret);
> > >
> > > disable_error_report_exit:
> > > pci_disable_pcie_error_reporting(pcidev);
> > > --
> > > 2.7.4
^ permalink raw reply [flat|nested] 21+ messages in thread* Re: [PATCH v3 2/7] fpga: dfl: pci: add irq info for feature devices enumeration
2020-04-01 3:44 ` Wu Hao
@ 2020-04-01 5:41 ` Xu Yilun
0 siblings, 0 replies; 21+ messages in thread
From: Xu Yilun @ 2020-04-01 5:41 UTC (permalink / raw)
To: Wu Hao; +Cc: mdf, linux-fpga, linux-kernel, trix, bhu, Luwei Kang
On Wed, Apr 01, 2020 at 11:44:30AM +0800, Wu Hao wrote:
> On Wed, Apr 01, 2020 at 10:59:02AM +0800, Xu Yilun wrote:
> > On Tue, Mar 31, 2020 at 12:41:20PM +0800, Wu Hao wrote:
> > > On Tue, Mar 24, 2020 at 04:32:38PM +0800, Xu Yilun wrote:
> > > > Some DFL FPGA PCIe cards (e.g. Intel FPGA Programmable Acceleration
> > > > Card) support MSI-X based interrupts. This patch allows PCIe driver
> > > > to prepare and pass interrupt resources to DFL via enumeration API.
> > > > These interrupt resources could then be assigned to actual features
> > > > which use them.
> > > >
> > > > Signed-off-by: Luwei Kang <luwei.kang@intel.com>
> > > > Signed-off-by: Wu Hao <hao.wu@intel.com>
> > > > Signed-off-by: Xu Yilun <yilun.xu@intel.com>
> > > > ----
> > > > v2: put irq resources init code inside cce_enumerate_feature_dev()
> > > > Some minor changes for Hao's comments.
> > > > v3: Some minor fix for Hao's comments for v2.
> > > > ---
> > > > drivers/fpga/dfl-pci.c | 76 ++++++++++++++++++++++++++++++++++++++++++++------
> > > > 1 file changed, 67 insertions(+), 9 deletions(-)
> > > >
> > > > diff --git a/drivers/fpga/dfl-pci.c b/drivers/fpga/dfl-pci.c
> > > > index 5387550..66027aa 100644
> > > > --- a/drivers/fpga/dfl-pci.c
> > > > +++ b/drivers/fpga/dfl-pci.c
> > > > @@ -39,6 +39,28 @@ static void __iomem *cci_pci_ioremap_bar(struct pci_dev *pcidev, int bar)
> > > > return pcim_iomap_table(pcidev)[bar];
> > > > }
> > > >
> > > > +static int cci_pci_alloc_irq(struct pci_dev *pcidev)
> > > > +{
> > > > + int nvec = pci_msix_vec_count(pcidev);
> > > > + int ret;
> > >
> > > maybe int ret, nvec = pci_msix..
> > >
> > > > +
> > > > + if (nvec <= 0) {
> > > > + dev_dbg(&pcidev->dev, "fpga interrupt not supported\n");
> > > > + return 0;
> > > > + }
> > > > +
> > > > + ret = pci_alloc_irq_vectors(pcidev, nvec, nvec, PCI_IRQ_MSIX);
> > > > + if (ret < 0)
> > > > + return ret;
> > > > +
> > > > + return nvec;
> > > > +}
> > > > +
> > > > +static void cci_pci_free_irq(struct pci_dev *pcidev)
> > > > +{
> > > > + pci_free_irq_vectors(pcidev);
> > > > +}
> > > > +
> > > > /* PCI Device ID */
> > > > #define PCIE_DEVICE_ID_PF_INT_5_X 0xBCBD
> > > > #define PCIE_DEVICE_ID_PF_INT_6_X 0xBCC0
> > > > @@ -78,17 +100,33 @@ static void cci_remove_feature_devs(struct pci_dev *pcidev)
> > > >
> > > > /* remove all children feature devices */
> > > > dfl_fpga_feature_devs_remove(drvdata->cdev);
> > > > + cci_pci_free_irq(pcidev);
> > > > +}
> > > > +
> > > > +static int *cci_pci_create_irq_table(struct pci_dev *pcidev, unsigned int nvec)
> > > > +{
> > > > + unsigned int i;
> > > > + int *table;
> > > > +
> > > > + table = kcalloc(nvec, sizeof(int), GFP_KERNEL);
> > > > + if (table) {
> > > > + for (i = 0; i < nvec; i++)
> > > > + table[i] = pci_irq_vector(pcidev, i);
> > > > + }
> > > > +
> > > > + return table;
> > > > }
> > > >
> > > > /* enumerate feature devices under pci device */
> > > > static int cci_enumerate_feature_devs(struct pci_dev *pcidev)
> > > > {
> > > > struct cci_drvdata *drvdata = pci_get_drvdata(pcidev);
> > > > + int port_num, bar, i, nvec, ret = 0;
> > > > struct dfl_fpga_enum_info *info;
> > > > struct dfl_fpga_cdev *cdev;
> > > > resource_size_t start, len;
> > > > - int port_num, bar, i, ret = 0;
> > > > void __iomem *base;
> > > > + int *irq_table;
> > > > u32 offset;
> > > > u64 v;
> > > >
> > > > @@ -97,11 +135,30 @@ static int cci_enumerate_feature_devs(struct pci_dev *pcidev)
> > > > if (!info)
> > > > return -ENOMEM;
> > > >
> > > > + /* add irq info for enumeration if the device support irq */
> > > > + nvec = cci_pci_alloc_irq(pcidev);
> > > > + if (nvec < 0) {
> > > > + dev_err(&pcidev->dev, "Fail to alloc irq %d.\n", nvec);
> > > > + ret = nvec;
> > > > + goto enum_info_free_exit;
> > > > + } else if (nvec) {
> > > > + irq_table = cci_pci_create_irq_table(pcidev, nvec);
> > > > + if (!irq_table) {
> > > > + ret = -ENOMEM;
> > > > + goto irq_free_exit;
> > > > + }
> > > > +
> > > > + ret = dfl_fpga_enum_info_add_irq(info, nvec, irq_table);
> > > > + kfree(irq_table);
> > >
> > > i see you create a function for cci_pci_free_irq instead of using kernel api
> > > directly, to make it more readable, so why not have a remove irq table function
> > > here too.
> >
> > The irq_table is not alloced in cci_pci_alloc_irq,
> > cci_pci_create_irq_table does. Actually cci_pci_alloc/free_irq are not
> > related to irq_table for DFL.
> >
> > So maybe we don't have to change this?
>
> I mean, you have cci_pci_alloc/free_irq but cci_pci_create_irq_table/kfree.
> why don't you use cci_pci_remove_irq_table or something instead of kfree?
Sorry for my misunderstanding. I can make this change. Thanks.
>
> Hao
>
> >
> > >
> > > Actually patch looks good to me, with above minor fixes.
> > >
> > > Acked-by: Wu Hao <hao.wu@intel.com>
> > >
> > > Hao
> > >
> > > > + if (ret)
> > > > + goto irq_free_exit;
> > > > + }
> > > > +
> > > > /* start to find Device Feature List from Bar 0 */
> > > > base = cci_pci_ioremap_bar(pcidev, 0);
> > > > if (!base) {
> > > > ret = -ENOMEM;
> > > > - goto enum_info_free_exit;
> > > > + goto irq_free_exit;
> > > > }
> > > >
> > > > /*
> > > > @@ -154,7 +211,7 @@ static int cci_enumerate_feature_devs(struct pci_dev *pcidev)
> > > > dfl_fpga_enum_info_add_dfl(info, start, len, base);
> > > > } else {
> > > > ret = -ENODEV;
> > > > - goto enum_info_free_exit;
> > > > + goto irq_free_exit;
> > > > }
> > > >
> > > > /* start enumeration with prepared enumeration information */
> > > > @@ -162,11 +219,14 @@ static int cci_enumerate_feature_devs(struct pci_dev *pcidev)
> > > > if (IS_ERR(cdev)) {
> > > > dev_err(&pcidev->dev, "Enumeration failure\n");
> > > > ret = PTR_ERR(cdev);
> > > > - goto enum_info_free_exit;
> > > > + goto irq_free_exit;
> > > > }
> > > >
> > > > drvdata->cdev = cdev;
> > > >
> > > > +irq_free_exit:
> > > > + if (ret)
> > > > + cci_pci_free_irq(pcidev);
> > > > enum_info_free_exit:
> > > > dfl_fpga_enum_info_free(info);
> > > >
> > > > @@ -211,12 +271,10 @@ int cci_pci_probe(struct pci_dev *pcidev, const struct pci_device_id *pcidevid)
> > > > }
> > > >
> > > > ret = cci_enumerate_feature_devs(pcidev);
> > > > - if (ret) {
> > > > - dev_err(&pcidev->dev, "enumeration failure %d.\n", ret);
> > > > - goto disable_error_report_exit;
> > > > - }
> > > > + if (!ret)
> > > > + return ret;
> > > >
> > > > - return ret;
> > > > + dev_err(&pcidev->dev, "enumeration failure %d.\n", ret);
> > > >
> > > > disable_error_report_exit:
> > > > pci_disable_pcie_error_reporting(pcidev);
> > > > --
> > > > 2.7.4
^ permalink raw reply [flat|nested] 21+ messages in thread
* [PATCH v3 3/7] fpga: dfl: introduce interrupt trigger setting API
2020-03-24 8:32 [PATCH v3 0/7] Add interrupt support to FPGA DFL drivers Xu Yilun
2020-03-24 8:32 ` [PATCH v3 1/7] fpga: dfl: parse interrupt info for feature devices on enumeration Xu Yilun
2020-03-24 8:32 ` [PATCH v3 2/7] fpga: dfl: pci: add irq info for feature devices enumeration Xu Yilun
@ 2020-03-24 8:32 ` Xu Yilun
2020-03-31 5:01 ` Wu Hao
2020-03-24 8:32 ` [PATCH v3 4/7] fpga: dfl: afu: add interrupt support for error reporting Xu Yilun
` (3 subsequent siblings)
6 siblings, 1 reply; 21+ messages in thread
From: Xu Yilun @ 2020-03-24 8:32 UTC (permalink / raw)
To: mdf, linux-fpga, linux-kernel; +Cc: trix, bhu, Xu Yilun, Luwei Kang, Wu Hao
FPGA user applications may be interested in interrupts generated by
DFL features. For example, users can implement their own FPGA
logics with interrupts enabled in AFU (Accelerated Function Unit,
dynamic region of DFL based FPGA). So user applications need to be
notified to handle these interrupts.
In order to allow userspace applications to monitor interrupts,
driver requires userspace to provide eventfds as interrupt
notification channels. Applications then poll/select on the eventfds
to get notified.
This patch introduces a generic helper function for sub features to
do eventfds binding with given interrupts.
Signed-off-by: Luwei Kang <luwei.kang@intel.com>
Signed-off-by: Wu Hao <hao.wu@intel.com>
Signed-off-by: Xu Yilun <yilun.xu@intel.com>
----
v2: use unsigned int instead of int for irq array indexes in
dfl_fpga_set_irq_triggers()
Improves comments for NULL fds param in dfl_fpga_set_irq_triggers()
v3: Improve comments of dfl_fpga_set_irq_triggers()
refines code for dfl_fpga_set_irq_triggers, delete local variable j
---
drivers/fpga/dfl.c | 97 ++++++++++++++++++++++++++++++++++++++++++++++++++++++
drivers/fpga/dfl.h | 11 +++++++
2 files changed, 108 insertions(+)
diff --git a/drivers/fpga/dfl.c b/drivers/fpga/dfl.c
index bc8d966..80805e5 100644
--- a/drivers/fpga/dfl.c
+++ b/drivers/fpga/dfl.c
@@ -535,6 +535,7 @@ static int build_info_commit_dev(struct build_feature_devs_info *binfo)
unsigned int i;
/* save resource information for each feature */
+ feature->dev = fdev;
feature->id = finfo->fid;
feature->resource_index = index;
feature->ioaddr = finfo->ioaddr;
@@ -1389,6 +1390,102 @@ int dfl_fpga_cdev_config_ports_vf(struct dfl_fpga_cdev *cdev, int num_vfs)
}
EXPORT_SYMBOL_GPL(dfl_fpga_cdev_config_ports_vf);
+static irqreturn_t dfl_irq_handler(int irq, void *arg)
+{
+ struct eventfd_ctx *trigger = arg;
+
+ eventfd_signal(trigger, 1);
+ return IRQ_HANDLED;
+}
+
+static int do_set_irq_trigger(struct dfl_feature *feature, unsigned int idx,
+ int fd)
+{
+ struct platform_device *pdev = feature->dev;
+ struct eventfd_ctx *trigger;
+ int irq, ret;
+
+ if (idx >= feature->nr_irqs)
+ return -EINVAL;
+
+ irq = feature->irq_ctx[idx].irq;
+
+ if (feature->irq_ctx[idx].trigger) {
+ free_irq(irq, feature->irq_ctx[idx].trigger);
+ kfree(feature->irq_ctx[idx].name);
+ eventfd_ctx_put(feature->irq_ctx[idx].trigger);
+ feature->irq_ctx[idx].trigger = NULL;
+ }
+
+ if (fd < 0)
+ return 0;
+
+ feature->irq_ctx[idx].name =
+ kasprintf(GFP_KERNEL, "fpga-irq[%u](%s-%llx)", idx,
+ dev_name(&pdev->dev),
+ (unsigned long long)feature->id);
+ if (!feature->irq_ctx[idx].name)
+ return -ENOMEM;
+
+ trigger = eventfd_ctx_fdget(fd);
+ if (IS_ERR(trigger)) {
+ ret = PTR_ERR(trigger);
+ goto free_name;
+ }
+
+ ret = request_irq(irq, dfl_irq_handler, 0,
+ feature->irq_ctx[idx].name, trigger);
+ if (!ret) {
+ feature->irq_ctx[idx].trigger = trigger;
+ return ret;
+ }
+
+ eventfd_ctx_put(trigger);
+free_name:
+ kfree(feature->irq_ctx[idx].name);
+
+ return ret;
+}
+
+/**
+ * dfl_fpga_set_irq_triggers - set eventfd triggers for dfl feature interrupts
+ *
+ * @feature: dfl sub feature.
+ * @start: start of irq index in this dfl sub feature.
+ * @count: number of irqs.
+ * @fds: eventfds to bind with irqs. unbind related irq if fds[n] is negative.
+ * unbind "count" specified number of irqs if fds ptr is NULL.
+ *
+ * Bind given eventfds with irqs in this dfl sub feature. Unbind related irq if
+ * fds[n] is negative. Unbind "count" specified number of irqs if fds ptr is
+ * NULL.
+ *
+ * Return: 0 on success, negative error code otherwise.
+ */
+int dfl_fpga_set_irq_triggers(struct dfl_feature *feature, unsigned int start,
+ unsigned int count, int32_t *fds)
+{
+ unsigned int i;
+ int ret = 0;
+
+ if (start + count < start || start + count > feature->nr_irqs)
+ return -EINVAL;
+
+ for (i = 0; i < count; i++) {
+ int fd = fds ? fds[i] : -1;
+
+ ret = do_set_irq_trigger(feature, start + i, fd);
+ if (ret) {
+ while (i--)
+ do_set_irq_trigger(feature, start + i, -1);
+ break;
+ }
+ }
+
+ return ret;
+}
+EXPORT_SYMBOL_GPL(dfl_fpga_set_irq_triggers);
+
static void __exit dfl_fpga_exit(void)
{
dfl_chardev_uinit();
diff --git a/drivers/fpga/dfl.h b/drivers/fpga/dfl.h
index 4bc165f..63eacef 100644
--- a/drivers/fpga/dfl.h
+++ b/drivers/fpga/dfl.h
@@ -24,6 +24,8 @@
#include <linux/slab.h>
#include <linux/uuid.h>
#include <linux/fpga/fpga-region.h>
+#include <linux/interrupt.h>
+#include <linux/eventfd.h>
/* maximum supported number of ports */
#define MAX_DFL_FPGA_PORT_NUM 4
@@ -213,14 +215,19 @@ struct dfl_feature_driver {
* struct dfl_feature_irq_ctx - dfl private feature interrupt context
*
* @irq: Linux IRQ number of this interrupt.
+ * @trigger: eventfd context to signal when interrupt happens.
+ * @name: irq name needed when requesting irq.
*/
struct dfl_feature_irq_ctx {
int irq;
+ struct eventfd_ctx *trigger;
+ char *name;
};
/**
* struct dfl_feature - sub feature of the feature devices
*
+ * @dev: ptr to pdev of the feature device which has the sub feature.
* @id: sub feature id.
* @resource_index: each sub feature has one mmio resource for its registers.
* this index is used to find its mmio resource from the
@@ -231,6 +238,7 @@ struct dfl_feature_irq_ctx {
* @ops: ops of this sub feature.
*/
struct dfl_feature {
+ struct platform_device *dev;
u64 id;
int resource_index;
void __iomem *ioaddr;
@@ -506,4 +514,7 @@ int dfl_fpga_cdev_release_port(struct dfl_fpga_cdev *cdev, int port_id);
int dfl_fpga_cdev_assign_port(struct dfl_fpga_cdev *cdev, int port_id);
void dfl_fpga_cdev_config_ports_pf(struct dfl_fpga_cdev *cdev);
int dfl_fpga_cdev_config_ports_vf(struct dfl_fpga_cdev *cdev, int num_vf);
+
+int dfl_fpga_set_irq_triggers(struct dfl_feature *feature, unsigned int start,
+ unsigned int count, int32_t *fds);
#endif /* __FPGA_DFL_H */
--
2.7.4
^ permalink raw reply related [flat|nested] 21+ messages in thread* Re: [PATCH v3 3/7] fpga: dfl: introduce interrupt trigger setting API
2020-03-24 8:32 ` [PATCH v3 3/7] fpga: dfl: introduce interrupt trigger setting API Xu Yilun
@ 2020-03-31 5:01 ` Wu Hao
2020-04-01 3:03 ` Xu Yilun
0 siblings, 1 reply; 21+ messages in thread
From: Wu Hao @ 2020-03-31 5:01 UTC (permalink / raw)
To: Xu Yilun; +Cc: mdf, linux-fpga, linux-kernel, trix, bhu, Luwei Kang
On Tue, Mar 24, 2020 at 04:32:39PM +0800, Xu Yilun wrote:
> FPGA user applications may be interested in interrupts generated by
> DFL features. For example, users can implement their own FPGA
> logics with interrupts enabled in AFU (Accelerated Function Unit,
> dynamic region of DFL based FPGA). So user applications need to be
> notified to handle these interrupts.
>
> In order to allow userspace applications to monitor interrupts,
> driver requires userspace to provide eventfds as interrupt
> notification channels. Applications then poll/select on the eventfds
> to get notified.
>
> This patch introduces a generic helper function for sub features to
> do eventfds binding with given interrupts.
>
> Signed-off-by: Luwei Kang <luwei.kang@intel.com>
> Signed-off-by: Wu Hao <hao.wu@intel.com>
> Signed-off-by: Xu Yilun <yilun.xu@intel.com>
> ----
> v2: use unsigned int instead of int for irq array indexes in
> dfl_fpga_set_irq_triggers()
> Improves comments for NULL fds param in dfl_fpga_set_irq_triggers()
> v3: Improve comments of dfl_fpga_set_irq_triggers()
> refines code for dfl_fpga_set_irq_triggers, delete local variable j
> ---
> drivers/fpga/dfl.c | 97 ++++++++++++++++++++++++++++++++++++++++++++++++++++++
> drivers/fpga/dfl.h | 11 +++++++
> 2 files changed, 108 insertions(+)
>
> diff --git a/drivers/fpga/dfl.c b/drivers/fpga/dfl.c
> index bc8d966..80805e5 100644
> --- a/drivers/fpga/dfl.c
> +++ b/drivers/fpga/dfl.c
> @@ -535,6 +535,7 @@ static int build_info_commit_dev(struct build_feature_devs_info *binfo)
> unsigned int i;
>
> /* save resource information for each feature */
> + feature->dev = fdev;
> feature->id = finfo->fid;
> feature->resource_index = index;
> feature->ioaddr = finfo->ioaddr;
> @@ -1389,6 +1390,102 @@ int dfl_fpga_cdev_config_ports_vf(struct dfl_fpga_cdev *cdev, int num_vfs)
> }
> EXPORT_SYMBOL_GPL(dfl_fpga_cdev_config_ports_vf);
>
> +static irqreturn_t dfl_irq_handler(int irq, void *arg)
> +{
> + struct eventfd_ctx *trigger = arg;
> +
> + eventfd_signal(trigger, 1);
> + return IRQ_HANDLED;
> +}
> +
> +static int do_set_irq_trigger(struct dfl_feature *feature, unsigned int idx,
> + int fd)
> +{
> + struct platform_device *pdev = feature->dev;
> + struct eventfd_ctx *trigger;
> + int irq, ret;
> +
> + if (idx >= feature->nr_irqs)
> + return -EINVAL;
> +
> + irq = feature->irq_ctx[idx].irq;
> +
> + if (feature->irq_ctx[idx].trigger) {
> + free_irq(irq, feature->irq_ctx[idx].trigger);
> + kfree(feature->irq_ctx[idx].name);
> + eventfd_ctx_put(feature->irq_ctx[idx].trigger);
> + feature->irq_ctx[idx].trigger = NULL;
> + }
> +
> + if (fd < 0)
> + return 0;
> +
> + feature->irq_ctx[idx].name =
> + kasprintf(GFP_KERNEL, "fpga-irq[%u](%s-%llx)", idx,
> + dev_name(&pdev->dev),
> + (unsigned long long)feature->id);
> + if (!feature->irq_ctx[idx].name)
> + return -ENOMEM;
> +
> + trigger = eventfd_ctx_fdget(fd);
> + if (IS_ERR(trigger)) {
> + ret = PTR_ERR(trigger);
> + goto free_name;
> + }
> +
> + ret = request_irq(irq, dfl_irq_handler, 0,
> + feature->irq_ctx[idx].name, trigger);
> + if (!ret) {
> + feature->irq_ctx[idx].trigger = trigger;
> + return ret;
> + }
> +
> + eventfd_ctx_put(trigger);
> +free_name:
> + kfree(feature->irq_ctx[idx].name);
> +
> + return ret;
> +}
> +
> +/**
> + * dfl_fpga_set_irq_triggers - set eventfd triggers for dfl feature interrupts
> + *
> + * @feature: dfl sub feature.
> + * @start: start of irq index in this dfl sub feature.
> + * @count: number of irqs.
> + * @fds: eventfds to bind with irqs. unbind related irq if fds[n] is negative.
> + * unbind "count" specified number of irqs if fds ptr is NULL.
> + *
> + * Bind given eventfds with irqs in this dfl sub feature. Unbind related irq if
> + * fds[n] is negative. Unbind "count" specified number of irqs if fds ptr is
> + * NULL.
> + *
> + * Return: 0 on success, negative error code otherwise.
> + */
> +int dfl_fpga_set_irq_triggers(struct dfl_feature *feature, unsigned int start,
> + unsigned int count, int32_t *fds)
> +{
> + unsigned int i;
> + int ret = 0;
> +
> + if (start + count < start || start + count > feature->nr_irqs)
> + return -EINVAL;
> +
> + for (i = 0; i < count; i++) {
> + int fd = fds ? fds[i] : -1;
> +
> + ret = do_set_irq_trigger(feature, start + i, fd);
> + if (ret) {
> + while (i--)
> + do_set_irq_trigger(feature, start + i, -1);
> + break;
> + }
> + }
> +
> + return ret;
> +}
> +EXPORT_SYMBOL_GPL(dfl_fpga_set_irq_triggers);
When i looked into patch 4, 5, 6. I found the ioctl handling functions to set
irq triggers are exact the same. Do you think is it possible to share more
common code then?
Other place looks good to me.
Thanks
Hao
> +
> static void __exit dfl_fpga_exit(void)
> {
> dfl_chardev_uinit();
> diff --git a/drivers/fpga/dfl.h b/drivers/fpga/dfl.h
> index 4bc165f..63eacef 100644
> --- a/drivers/fpga/dfl.h
> +++ b/drivers/fpga/dfl.h
> @@ -24,6 +24,8 @@
> #include <linux/slab.h>
> #include <linux/uuid.h>
> #include <linux/fpga/fpga-region.h>
> +#include <linux/interrupt.h>
> +#include <linux/eventfd.h>
>
> /* maximum supported number of ports */
> #define MAX_DFL_FPGA_PORT_NUM 4
> @@ -213,14 +215,19 @@ struct dfl_feature_driver {
> * struct dfl_feature_irq_ctx - dfl private feature interrupt context
> *
> * @irq: Linux IRQ number of this interrupt.
> + * @trigger: eventfd context to signal when interrupt happens.
> + * @name: irq name needed when requesting irq.
> */
> struct dfl_feature_irq_ctx {
> int irq;
> + struct eventfd_ctx *trigger;
> + char *name;
> };
>
> /**
> * struct dfl_feature - sub feature of the feature devices
> *
> + * @dev: ptr to pdev of the feature device which has the sub feature.
> * @id: sub feature id.
> * @resource_index: each sub feature has one mmio resource for its registers.
> * this index is used to find its mmio resource from the
> @@ -231,6 +238,7 @@ struct dfl_feature_irq_ctx {
> * @ops: ops of this sub feature.
> */
> struct dfl_feature {
> + struct platform_device *dev;
> u64 id;
> int resource_index;
> void __iomem *ioaddr;
> @@ -506,4 +514,7 @@ int dfl_fpga_cdev_release_port(struct dfl_fpga_cdev *cdev, int port_id);
> int dfl_fpga_cdev_assign_port(struct dfl_fpga_cdev *cdev, int port_id);
> void dfl_fpga_cdev_config_ports_pf(struct dfl_fpga_cdev *cdev);
> int dfl_fpga_cdev_config_ports_vf(struct dfl_fpga_cdev *cdev, int num_vf);
> +
> +int dfl_fpga_set_irq_triggers(struct dfl_feature *feature, unsigned int start,
> + unsigned int count, int32_t *fds);
> #endif /* __FPGA_DFL_H */
> --
> 2.7.4
^ permalink raw reply [flat|nested] 21+ messages in thread* Re: [PATCH v3 3/7] fpga: dfl: introduce interrupt trigger setting API
2020-03-31 5:01 ` Wu Hao
@ 2020-04-01 3:03 ` Xu Yilun
0 siblings, 0 replies; 21+ messages in thread
From: Xu Yilun @ 2020-04-01 3:03 UTC (permalink / raw)
To: Wu Hao; +Cc: mdf, linux-fpga, linux-kernel, trix, bhu, Luwei Kang
On Tue, Mar 31, 2020 at 01:01:41PM +0800, Wu Hao wrote:
> On Tue, Mar 24, 2020 at 04:32:39PM +0800, Xu Yilun wrote:
> > FPGA user applications may be interested in interrupts generated by
> > DFL features. For example, users can implement their own FPGA
> > logics with interrupts enabled in AFU (Accelerated Function Unit,
> > dynamic region of DFL based FPGA). So user applications need to be
> > notified to handle these interrupts.
> >
> > In order to allow userspace applications to monitor interrupts,
> > driver requires userspace to provide eventfds as interrupt
> > notification channels. Applications then poll/select on the eventfds
> > to get notified.
> >
> > This patch introduces a generic helper function for sub features to
> > do eventfds binding with given interrupts.
> >
> > Signed-off-by: Luwei Kang <luwei.kang@intel.com>
> > Signed-off-by: Wu Hao <hao.wu@intel.com>
> > Signed-off-by: Xu Yilun <yilun.xu@intel.com>
> > ----
> > v2: use unsigned int instead of int for irq array indexes in
> > dfl_fpga_set_irq_triggers()
> > Improves comments for NULL fds param in dfl_fpga_set_irq_triggers()
> > v3: Improve comments of dfl_fpga_set_irq_triggers()
> > refines code for dfl_fpga_set_irq_triggers, delete local variable j
> > ---
> > drivers/fpga/dfl.c | 97 ++++++++++++++++++++++++++++++++++++++++++++++++++++++
> > drivers/fpga/dfl.h | 11 +++++++
> > 2 files changed, 108 insertions(+)
> >
> > diff --git a/drivers/fpga/dfl.c b/drivers/fpga/dfl.c
> > index bc8d966..80805e5 100644
> > --- a/drivers/fpga/dfl.c
> > +++ b/drivers/fpga/dfl.c
> > @@ -535,6 +535,7 @@ static int build_info_commit_dev(struct build_feature_devs_info *binfo)
> > unsigned int i;
> >
> > /* save resource information for each feature */
> > + feature->dev = fdev;
> > feature->id = finfo->fid;
> > feature->resource_index = index;
> > feature->ioaddr = finfo->ioaddr;
> > @@ -1389,6 +1390,102 @@ int dfl_fpga_cdev_config_ports_vf(struct dfl_fpga_cdev *cdev, int num_vfs)
> > }
> > EXPORT_SYMBOL_GPL(dfl_fpga_cdev_config_ports_vf);
> >
> > +static irqreturn_t dfl_irq_handler(int irq, void *arg)
> > +{
> > + struct eventfd_ctx *trigger = arg;
> > +
> > + eventfd_signal(trigger, 1);
> > + return IRQ_HANDLED;
> > +}
> > +
> > +static int do_set_irq_trigger(struct dfl_feature *feature, unsigned int idx,
> > + int fd)
> > +{
> > + struct platform_device *pdev = feature->dev;
> > + struct eventfd_ctx *trigger;
> > + int irq, ret;
> > +
> > + if (idx >= feature->nr_irqs)
> > + return -EINVAL;
> > +
> > + irq = feature->irq_ctx[idx].irq;
> > +
> > + if (feature->irq_ctx[idx].trigger) {
> > + free_irq(irq, feature->irq_ctx[idx].trigger);
> > + kfree(feature->irq_ctx[idx].name);
> > + eventfd_ctx_put(feature->irq_ctx[idx].trigger);
> > + feature->irq_ctx[idx].trigger = NULL;
> > + }
> > +
> > + if (fd < 0)
> > + return 0;
> > +
> > + feature->irq_ctx[idx].name =
> > + kasprintf(GFP_KERNEL, "fpga-irq[%u](%s-%llx)", idx,
> > + dev_name(&pdev->dev),
> > + (unsigned long long)feature->id);
> > + if (!feature->irq_ctx[idx].name)
> > + return -ENOMEM;
> > +
> > + trigger = eventfd_ctx_fdget(fd);
> > + if (IS_ERR(trigger)) {
> > + ret = PTR_ERR(trigger);
> > + goto free_name;
> > + }
> > +
> > + ret = request_irq(irq, dfl_irq_handler, 0,
> > + feature->irq_ctx[idx].name, trigger);
> > + if (!ret) {
> > + feature->irq_ctx[idx].trigger = trigger;
> > + return ret;
> > + }
> > +
> > + eventfd_ctx_put(trigger);
> > +free_name:
> > + kfree(feature->irq_ctx[idx].name);
> > +
> > + return ret;
> > +}
> > +
> > +/**
> > + * dfl_fpga_set_irq_triggers - set eventfd triggers for dfl feature interrupts
> > + *
> > + * @feature: dfl sub feature.
> > + * @start: start of irq index in this dfl sub feature.
> > + * @count: number of irqs.
> > + * @fds: eventfds to bind with irqs. unbind related irq if fds[n] is negative.
> > + * unbind "count" specified number of irqs if fds ptr is NULL.
> > + *
> > + * Bind given eventfds with irqs in this dfl sub feature. Unbind related irq if
> > + * fds[n] is negative. Unbind "count" specified number of irqs if fds ptr is
> > + * NULL.
> > + *
> > + * Return: 0 on success, negative error code otherwise.
> > + */
> > +int dfl_fpga_set_irq_triggers(struct dfl_feature *feature, unsigned int start,
> > + unsigned int count, int32_t *fds)
> > +{
> > + unsigned int i;
> > + int ret = 0;
> > +
> > + if (start + count < start || start + count > feature->nr_irqs)
> > + return -EINVAL;
> > +
> > + for (i = 0; i < count; i++) {
> > + int fd = fds ? fds[i] : -1;
> > +
> > + ret = do_set_irq_trigger(feature, start + i, fd);
> > + if (ret) {
> > + while (i--)
> > + do_set_irq_trigger(feature, start + i, -1);
> > + break;
> > + }
> > + }
> > +
> > + return ret;
> > +}
> > +EXPORT_SYMBOL_GPL(dfl_fpga_set_irq_triggers);
>
> When i looked into patch 4, 5, 6. I found the ioctl handling functions to set
> irq triggers are exact the same. Do you think is it possible to share more
> common code then?
Yes, I think the common code could be added in Patch #4.
>
> Other place looks good to me.
>
> Thanks
> Hao
>
> > +
> > static void __exit dfl_fpga_exit(void)
> > {
> > dfl_chardev_uinit();
> > diff --git a/drivers/fpga/dfl.h b/drivers/fpga/dfl.h
> > index 4bc165f..63eacef 100644
> > --- a/drivers/fpga/dfl.h
> > +++ b/drivers/fpga/dfl.h
> > @@ -24,6 +24,8 @@
> > #include <linux/slab.h>
> > #include <linux/uuid.h>
> > #include <linux/fpga/fpga-region.h>
> > +#include <linux/interrupt.h>
> > +#include <linux/eventfd.h>
> >
> > /* maximum supported number of ports */
> > #define MAX_DFL_FPGA_PORT_NUM 4
> > @@ -213,14 +215,19 @@ struct dfl_feature_driver {
> > * struct dfl_feature_irq_ctx - dfl private feature interrupt context
> > *
> > * @irq: Linux IRQ number of this interrupt.
> > + * @trigger: eventfd context to signal when interrupt happens.
> > + * @name: irq name needed when requesting irq.
> > */
> > struct dfl_feature_irq_ctx {
> > int irq;
> > + struct eventfd_ctx *trigger;
> > + char *name;
> > };
> >
> > /**
> > * struct dfl_feature - sub feature of the feature devices
> > *
> > + * @dev: ptr to pdev of the feature device which has the sub feature.
> > * @id: sub feature id.
> > * @resource_index: each sub feature has one mmio resource for its registers.
> > * this index is used to find its mmio resource from the
> > @@ -231,6 +238,7 @@ struct dfl_feature_irq_ctx {
> > * @ops: ops of this sub feature.
> > */
> > struct dfl_feature {
> > + struct platform_device *dev;
> > u64 id;
> > int resource_index;
> > void __iomem *ioaddr;
> > @@ -506,4 +514,7 @@ int dfl_fpga_cdev_release_port(struct dfl_fpga_cdev *cdev, int port_id);
> > int dfl_fpga_cdev_assign_port(struct dfl_fpga_cdev *cdev, int port_id);
> > void dfl_fpga_cdev_config_ports_pf(struct dfl_fpga_cdev *cdev);
> > int dfl_fpga_cdev_config_ports_vf(struct dfl_fpga_cdev *cdev, int num_vf);
> > +
> > +int dfl_fpga_set_irq_triggers(struct dfl_feature *feature, unsigned int start,
> > + unsigned int count, int32_t *fds);
> > #endif /* __FPGA_DFL_H */
> > --
> > 2.7.4
^ permalink raw reply [flat|nested] 21+ messages in thread
* [PATCH v3 4/7] fpga: dfl: afu: add interrupt support for error reporting
2020-03-24 8:32 [PATCH v3 0/7] Add interrupt support to FPGA DFL drivers Xu Yilun
` (2 preceding siblings ...)
2020-03-24 8:32 ` [PATCH v3 3/7] fpga: dfl: introduce interrupt trigger setting API Xu Yilun
@ 2020-03-24 8:32 ` Xu Yilun
2020-03-31 5:10 ` Wu Hao
2020-03-24 8:32 ` [PATCH v3 5/7] fpga: dfl: fme: add interrupt support for global " Xu Yilun
` (2 subsequent siblings)
6 siblings, 1 reply; 21+ messages in thread
From: Xu Yilun @ 2020-03-24 8:32 UTC (permalink / raw)
To: mdf, linux-fpga, linux-kernel; +Cc: trix, bhu, Xu Yilun, Luwei Kang, Wu Hao
Error reporting interrupt is very useful to notify users that some
errors are detected by the hardware. Once users are notified, they
could query hardware logged error states, no need to continuously
poll on these states.
This patch follows the common DFL interrupt notification and handling
mechanism, implements two ioctl commands below for user to query
number of irqs supported, and set/unset interrupt triggers.
Ioctls:
* DFL_FPGA_PORT_ERR_GET_IRQ_NUM
get the number of irqs, which is used to determine whether/how many
interrupts error reporting feature supports.
* DFL_FPGA_PORT_ERR_SET_IRQ
set/unset given eventfds as error interrupt triggers.
Signed-off-by: Luwei Kang <luwei.kang@intel.com>
Signed-off-by: Wu Hao <hao.wu@intel.com>
Signed-off-by: Xu Yilun <yilun.xu@intel.com>
----
v2: use DFL_FPGA_PORT_ERR_GET_IRQ_NUM instead of
DFL_FPGA_PORT_ERR_GET_INFO
Delete flag field for DFL_FPGA_PORT_ERR_SET_IRQ param
v3: put_user() instead of copy_to_user()
improves comments
---
drivers/fpga/dfl-afu-error.c | 60 +++++++++++++++++++++++++++++++++++++++++++
drivers/fpga/dfl-afu-main.c | 4 +++
include/uapi/linux/fpga-dfl.h | 29 +++++++++++++++++++++
3 files changed, 93 insertions(+)
diff --git a/drivers/fpga/dfl-afu-error.c b/drivers/fpga/dfl-afu-error.c
index c1467ae..757f9f5 100644
--- a/drivers/fpga/dfl-afu-error.c
+++ b/drivers/fpga/dfl-afu-error.c
@@ -15,6 +15,7 @@
*/
#include <linux/uaccess.h>
+#include <linux/fpga-dfl.h>
#include "dfl-afu.h"
@@ -219,6 +220,64 @@ static void port_err_uinit(struct platform_device *pdev,
afu_port_err_mask(&pdev->dev, true);
}
+static long
+port_err_get_num_irqs(struct platform_device *pdev,
+ struct dfl_feature *feature, unsigned long arg)
+{
+ return put_user(feature->nr_irqs, (__u32 __user *)arg);
+}
+
+static long port_err_set_irq(struct platform_device *pdev,
+ struct dfl_feature *feature, unsigned long arg)
+{
+ struct dfl_feature_platform_data *pdata = dev_get_platdata(&pdev->dev);
+ struct dfl_fpga_irq_set hdr;
+ s32 *fds;
+ long ret;
+
+ if (!feature->nr_irqs)
+ return -ENOENT;
+
+ if (copy_from_user(&hdr, (void __user *)arg, sizeof(hdr)))
+ return -EFAULT;
+
+ if (!hdr.count || (hdr.start + hdr.count > feature->nr_irqs) ||
+ (hdr.start + hdr.count < hdr.start))
+ return -EINVAL;
+
+ fds = memdup_user((void __user *)(arg + sizeof(hdr)),
+ hdr.count * sizeof(s32));
+ if (IS_ERR(fds))
+ return PTR_ERR(fds);
+
+ mutex_lock(&pdata->lock);
+ ret = dfl_fpga_set_irq_triggers(feature, hdr.start, hdr.count, fds);
+ mutex_unlock(&pdata->lock);
+
+ kfree(fds);
+ return ret;
+}
+
+static long
+port_err_ioctl(struct platform_device *pdev, struct dfl_feature *feature,
+ unsigned int cmd, unsigned long arg)
+{
+ long ret = -ENODEV;
+
+ switch (cmd) {
+ case DFL_FPGA_PORT_ERR_GET_IRQ_NUM:
+ ret = port_err_get_num_irqs(pdev, feature, arg);
+ break;
+ case DFL_FPGA_PORT_ERR_SET_IRQ:
+ ret = port_err_set_irq(pdev, feature, arg);
+ break;
+ default:
+ dev_dbg(&pdev->dev, "%x cmd not handled", cmd);
+ }
+
+ return ret;
+}
+
const struct dfl_feature_id port_err_id_table[] = {
{.id = PORT_FEATURE_ID_ERROR,},
{0,}
@@ -227,4 +286,5 @@ const struct dfl_feature_id port_err_id_table[] = {
const struct dfl_feature_ops port_err_ops = {
.init = port_err_init,
.uinit = port_err_uinit,
+ .ioctl = port_err_ioctl,
};
diff --git a/drivers/fpga/dfl-afu-main.c b/drivers/fpga/dfl-afu-main.c
index b0c3178..357cd5d 100644
--- a/drivers/fpga/dfl-afu-main.c
+++ b/drivers/fpga/dfl-afu-main.c
@@ -577,6 +577,7 @@ static int afu_release(struct inode *inode, struct file *filp)
{
struct platform_device *pdev = filp->private_data;
struct dfl_feature_platform_data *pdata;
+ struct dfl_feature *feature;
dev_dbg(&pdev->dev, "Device File Release\n");
@@ -586,6 +587,9 @@ static int afu_release(struct inode *inode, struct file *filp)
dfl_feature_dev_use_end(pdata);
if (!dfl_feature_dev_use_count(pdata)) {
+ dfl_fpga_dev_for_each_feature(pdata, feature)
+ dfl_fpga_set_irq_triggers(feature, 0,
+ feature->nr_irqs, NULL);
__port_reset(pdev);
afu_dma_region_destroy(pdata);
}
diff --git a/include/uapi/linux/fpga-dfl.h b/include/uapi/linux/fpga-dfl.h
index ec70a0746..9ade943 100644
--- a/include/uapi/linux/fpga-dfl.h
+++ b/include/uapi/linux/fpga-dfl.h
@@ -151,6 +151,35 @@ struct dfl_fpga_port_dma_unmap {
#define DFL_FPGA_PORT_DMA_UNMAP _IO(DFL_FPGA_MAGIC, DFL_PORT_BASE + 4)
+/**
+ * DFL_FPGA_PORT_ERR_GET_IRQ_NUM - _IOR(DFL_FPGA_MAGIC, DFL_PORT_BASE + 5,
+ * __u32 num_irqs)
+ *
+ * Get the number of irqs supported by the fpga port error reporting private
+ * feature. Currently hardware supports up to 1 irq.
+ * Return: 0 on success, -errno on failure.
+ */
+#define DFL_FPGA_PORT_ERR_GET_IRQ_NUM _IOR(DFL_FPGA_MAGIC, \
+ DFL_PORT_BASE + 5, __u32)
+
+/**
+ * DFL_FPGA_PORT_ERR_SET_IRQ - _IOW(DFL_FPGA_MAGIC, DFL_PORT_BASE + 6,
+ * struct dfl_fpga_irq_set)
+ *
+ * Set fpga port error reporting interrupt trigger if evtfds[n] is valid.
+ * Unset related interrupt trigger if evtfds[n] is a negative value.
+ * Return: 0 on success, -errno on failure.
+ */
+struct dfl_fpga_irq_set {
+ __u32 start; /* Index of the first irq */
+ __u32 count; /* The number of eventfd handler */
+ __s32 evtfds[]; /* Eventfd handler */
+};
+
+#define DFL_FPGA_PORT_ERR_SET_IRQ _IOW(DFL_FPGA_MAGIC, \
+ DFL_PORT_BASE + 6, \
+ struct dfl_fpga_irq_set)
+
/* IOCTLs for FME file descriptor */
/**
--
2.7.4
^ permalink raw reply related [flat|nested] 21+ messages in thread* Re: [PATCH v3 4/7] fpga: dfl: afu: add interrupt support for error reporting
2020-03-24 8:32 ` [PATCH v3 4/7] fpga: dfl: afu: add interrupt support for error reporting Xu Yilun
@ 2020-03-31 5:10 ` Wu Hao
0 siblings, 0 replies; 21+ messages in thread
From: Wu Hao @ 2020-03-31 5:10 UTC (permalink / raw)
To: Xu Yilun; +Cc: mdf, linux-fpga, linux-kernel, trix, bhu, Luwei Kang
On Tue, Mar 24, 2020 at 04:32:40PM +0800, Xu Yilun wrote:
> Error reporting interrupt is very useful to notify users that some
> errors are detected by the hardware. Once users are notified, they
> could query hardware logged error states, no need to continuously
> poll on these states.
>
> This patch follows the common DFL interrupt notification and handling
> mechanism, implements two ioctl commands below for user to query
> number of irqs supported, and set/unset interrupt triggers.
>
> Ioctls:
> * DFL_FPGA_PORT_ERR_GET_IRQ_NUM
> get the number of irqs, which is used to determine whether/how many
> interrupts error reporting feature supports.
>
> * DFL_FPGA_PORT_ERR_SET_IRQ
> set/unset given eventfds as error interrupt triggers.
>
> Signed-off-by: Luwei Kang <luwei.kang@intel.com>
> Signed-off-by: Wu Hao <hao.wu@intel.com>
> Signed-off-by: Xu Yilun <yilun.xu@intel.com>
> ----
> v2: use DFL_FPGA_PORT_ERR_GET_IRQ_NUM instead of
> DFL_FPGA_PORT_ERR_GET_INFO
> Delete flag field for DFL_FPGA_PORT_ERR_SET_IRQ param
> v3: put_user() instead of copy_to_user()
> improves comments
> ---
> drivers/fpga/dfl-afu-error.c | 60 +++++++++++++++++++++++++++++++++++++++++++
> drivers/fpga/dfl-afu-main.c | 4 +++
> include/uapi/linux/fpga-dfl.h | 29 +++++++++++++++++++++
> 3 files changed, 93 insertions(+)
>
> diff --git a/drivers/fpga/dfl-afu-error.c b/drivers/fpga/dfl-afu-error.c
> index c1467ae..757f9f5 100644
> --- a/drivers/fpga/dfl-afu-error.c
> +++ b/drivers/fpga/dfl-afu-error.c
> @@ -15,6 +15,7 @@
> */
>
> #include <linux/uaccess.h>
> +#include <linux/fpga-dfl.h>
>
> #include "dfl-afu.h"
>
> @@ -219,6 +220,64 @@ static void port_err_uinit(struct platform_device *pdev,
> afu_port_err_mask(&pdev->dev, true);
> }
>
> +static long
> +port_err_get_num_irqs(struct platform_device *pdev,
> + struct dfl_feature *feature, unsigned long arg)
> +{
> + return put_user(feature->nr_irqs, (__u32 __user *)arg);
> +}
Looks like this function is same in patch 5 and 6 too. Is it possible, we can
share the common code? same case for below set irq function, right?
Thanks
Hao
> +
> +static long port_err_set_irq(struct platform_device *pdev,
> + struct dfl_feature *feature, unsigned long arg)
> +{
> + struct dfl_feature_platform_data *pdata = dev_get_platdata(&pdev->dev);
> + struct dfl_fpga_irq_set hdr;
> + s32 *fds;
> + long ret;
> +
> + if (!feature->nr_irqs)
> + return -ENOENT;
> +
> + if (copy_from_user(&hdr, (void __user *)arg, sizeof(hdr)))
> + return -EFAULT;
> +
> + if (!hdr.count || (hdr.start + hdr.count > feature->nr_irqs) ||
> + (hdr.start + hdr.count < hdr.start))
> + return -EINVAL;
> +
> + fds = memdup_user((void __user *)(arg + sizeof(hdr)),
> + hdr.count * sizeof(s32));
> + if (IS_ERR(fds))
> + return PTR_ERR(fds);
> +
> + mutex_lock(&pdata->lock);
> + ret = dfl_fpga_set_irq_triggers(feature, hdr.start, hdr.count, fds);
> + mutex_unlock(&pdata->lock);
> +
> + kfree(fds);
> + return ret;
> +}
> +
> +static long
> +port_err_ioctl(struct platform_device *pdev, struct dfl_feature *feature,
> + unsigned int cmd, unsigned long arg)
> +{
> + long ret = -ENODEV;
> +
> + switch (cmd) {
> + case DFL_FPGA_PORT_ERR_GET_IRQ_NUM:
> + ret = port_err_get_num_irqs(pdev, feature, arg);
> + break;
> + case DFL_FPGA_PORT_ERR_SET_IRQ:
> + ret = port_err_set_irq(pdev, feature, arg);
> + break;
> + default:
> + dev_dbg(&pdev->dev, "%x cmd not handled", cmd);
> + }
> +
> + return ret;
> +}
> +
> const struct dfl_feature_id port_err_id_table[] = {
> {.id = PORT_FEATURE_ID_ERROR,},
> {0,}
> @@ -227,4 +286,5 @@ const struct dfl_feature_id port_err_id_table[] = {
> const struct dfl_feature_ops port_err_ops = {
> .init = port_err_init,
> .uinit = port_err_uinit,
> + .ioctl = port_err_ioctl,
> };
> diff --git a/drivers/fpga/dfl-afu-main.c b/drivers/fpga/dfl-afu-main.c
> index b0c3178..357cd5d 100644
> --- a/drivers/fpga/dfl-afu-main.c
> +++ b/drivers/fpga/dfl-afu-main.c
> @@ -577,6 +577,7 @@ static int afu_release(struct inode *inode, struct file *filp)
> {
> struct platform_device *pdev = filp->private_data;
> struct dfl_feature_platform_data *pdata;
> + struct dfl_feature *feature;
>
> dev_dbg(&pdev->dev, "Device File Release\n");
>
> @@ -586,6 +587,9 @@ static int afu_release(struct inode *inode, struct file *filp)
> dfl_feature_dev_use_end(pdata);
>
> if (!dfl_feature_dev_use_count(pdata)) {
> + dfl_fpga_dev_for_each_feature(pdata, feature)
> + dfl_fpga_set_irq_triggers(feature, 0,
> + feature->nr_irqs, NULL);
> __port_reset(pdev);
> afu_dma_region_destroy(pdata);
> }
> diff --git a/include/uapi/linux/fpga-dfl.h b/include/uapi/linux/fpga-dfl.h
> index ec70a0746..9ade943 100644
> --- a/include/uapi/linux/fpga-dfl.h
> +++ b/include/uapi/linux/fpga-dfl.h
> @@ -151,6 +151,35 @@ struct dfl_fpga_port_dma_unmap {
>
> #define DFL_FPGA_PORT_DMA_UNMAP _IO(DFL_FPGA_MAGIC, DFL_PORT_BASE + 4)
>
> +/**
> + * DFL_FPGA_PORT_ERR_GET_IRQ_NUM - _IOR(DFL_FPGA_MAGIC, DFL_PORT_BASE + 5,
> + * __u32 num_irqs)
> + *
> + * Get the number of irqs supported by the fpga port error reporting private
> + * feature. Currently hardware supports up to 1 irq.
> + * Return: 0 on success, -errno on failure.
> + */
> +#define DFL_FPGA_PORT_ERR_GET_IRQ_NUM _IOR(DFL_FPGA_MAGIC, \
> + DFL_PORT_BASE + 5, __u32)
> +
> +/**
> + * DFL_FPGA_PORT_ERR_SET_IRQ - _IOW(DFL_FPGA_MAGIC, DFL_PORT_BASE + 6,
> + * struct dfl_fpga_irq_set)
> + *
> + * Set fpga port error reporting interrupt trigger if evtfds[n] is valid.
> + * Unset related interrupt trigger if evtfds[n] is a negative value.
> + * Return: 0 on success, -errno on failure.
> + */
> +struct dfl_fpga_irq_set {
> + __u32 start; /* Index of the first irq */
> + __u32 count; /* The number of eventfd handler */
> + __s32 evtfds[]; /* Eventfd handler */
> +};
> +
> +#define DFL_FPGA_PORT_ERR_SET_IRQ _IOW(DFL_FPGA_MAGIC, \
> + DFL_PORT_BASE + 6, \
> + struct dfl_fpga_irq_set)
> +
> /* IOCTLs for FME file descriptor */
>
> /**
> --
> 2.7.4
^ permalink raw reply [flat|nested] 21+ messages in thread
* [PATCH v3 5/7] fpga: dfl: fme: add interrupt support for global error reporting
2020-03-24 8:32 [PATCH v3 0/7] Add interrupt support to FPGA DFL drivers Xu Yilun
` (3 preceding siblings ...)
2020-03-24 8:32 ` [PATCH v3 4/7] fpga: dfl: afu: add interrupt support for error reporting Xu Yilun
@ 2020-03-24 8:32 ` Xu Yilun
2020-03-24 8:32 ` [PATCH v3 6/7] fpga: dfl: afu: add user interrupt support Xu Yilun
2020-03-24 8:32 ` [PATCH v3 7/7] Documentation: fpga: dfl: add descriptions for interrupt related interfaces Xu Yilun
6 siblings, 0 replies; 21+ messages in thread
From: Xu Yilun @ 2020-03-24 8:32 UTC (permalink / raw)
To: mdf, linux-fpga, linux-kernel; +Cc: trix, bhu, Xu Yilun, Luwei Kang, Wu Hao
Error reporting interrupt is very useful to notify users that some
errors are detected by the hardware. Once users are notified, they
could query hardware logged error states, no need to continuously
poll on these states.
This patch follows the common DFL interrupt notification and handling
mechanism. And it implements two ioctls below for user to query
number of irqs supported, and set/unset interrupt triggers.
Ioctls:
* DFL_FPGA_FME_ERR_GET_IRQ_NUM
get the number of irqs, which is used to determine whether/how many
interrupts fme error reporting feature supports.
* DFL_FPGA_FME_ERR_SET_IRQ
set/unset given eventfds as fme error reporting interrupt triggers.
Signed-off-by: Luwei Kang <luwei.kang@intel.com>
Signed-off-by: Wu Hao <hao.wu@intel.com>
Signed-off-by: Xu Yilun <yilun.xu@intel.com>
----
v2: use DFL_FPGA_FME_ERR_GET_IRQ_NUM instead of
DFL_FPGA_FME_ERR_GET_INFO
Delete flags field for DFL_FPGA_FME_ERR_SET_IRQ
v3: put_user() instead of copy_to_user()
improves comments
---
drivers/fpga/dfl-fme-error.c | 62 +++++++++++++++++++++++++++++++++++++++++++
drivers/fpga/dfl-fme-main.c | 6 +++++
include/uapi/linux/fpga-dfl.h | 23 ++++++++++++++++
3 files changed, 91 insertions(+)
diff --git a/drivers/fpga/dfl-fme-error.c b/drivers/fpga/dfl-fme-error.c
index f897d41..ea5b73a 100644
--- a/drivers/fpga/dfl-fme-error.c
+++ b/drivers/fpga/dfl-fme-error.c
@@ -16,6 +16,7 @@
*/
#include <linux/uaccess.h>
+#include <linux/fpga-dfl.h>
#include "dfl.h"
#include "dfl-fme.h"
@@ -348,6 +349,66 @@ static void fme_global_err_uinit(struct platform_device *pdev,
fme_err_mask(&pdev->dev, true);
}
+static long
+fme_global_err_get_num_irqs(struct platform_device *pdev,
+ struct dfl_feature *feature, unsigned long arg)
+{
+ return put_user(feature->nr_irqs, (__u32 __user *)arg);
+}
+
+static long
+fme_global_err_set_irq(struct platform_device *pdev,
+ struct dfl_feature *feature, unsigned long arg)
+{
+ struct dfl_feature_platform_data *pdata = dev_get_platdata(&pdev->dev);
+ struct dfl_fpga_irq_set hdr;
+ s32 *fds;
+ long ret;
+
+ if (!feature->nr_irqs)
+ return -ENOENT;
+
+ if (copy_from_user(&hdr, (void __user *)arg, sizeof(hdr)))
+ return -EFAULT;
+
+ if (!hdr.count || (hdr.start + hdr.count > feature->nr_irqs) ||
+ (hdr.start + hdr.count < hdr.start))
+ return -EINVAL;
+
+ fds = memdup_user((void __user *)(arg + sizeof(hdr)),
+ hdr.count * sizeof(s32));
+ if (IS_ERR(fds))
+ return PTR_ERR(fds);
+
+ mutex_lock(&pdata->lock);
+ ret = dfl_fpga_set_irq_triggers(feature, hdr.start, hdr.count, fds);
+ mutex_unlock(&pdata->lock);
+
+ kfree(fds);
+ return ret;
+}
+
+static long
+fme_global_error_ioctl(struct platform_device *pdev,
+ struct dfl_feature *feature,
+ unsigned int cmd, unsigned long arg)
+{
+ long ret = -ENODEV;
+
+ switch (cmd) {
+ case DFL_FPGA_FME_ERR_GET_IRQ_NUM:
+ ret = fme_global_err_get_num_irqs(pdev, feature, arg);
+ break;
+ case DFL_FPGA_FME_ERR_SET_IRQ:
+ ret = fme_global_err_set_irq(pdev, feature, arg);
+ break;
+ default:
+ dev_dbg(&pdev->dev, "%x cmd not handled", cmd);
+ }
+
+ return ret;
+}
+
const struct dfl_feature_id fme_global_err_id_table[] = {
{.id = FME_FEATURE_ID_GLOBAL_ERR,},
{0,}
@@ -356,4 +417,5 @@ const struct dfl_feature_id fme_global_err_id_table[] = {
const struct dfl_feature_ops fme_global_err_ops = {
.init = fme_global_err_init,
.uinit = fme_global_err_uinit,
+ .ioctl = fme_global_error_ioctl,
};
diff --git a/drivers/fpga/dfl-fme-main.c b/drivers/fpga/dfl-fme-main.c
index 56d720c..ab3722d 100644
--- a/drivers/fpga/dfl-fme-main.c
+++ b/drivers/fpga/dfl-fme-main.c
@@ -616,11 +616,17 @@ static int fme_release(struct inode *inode, struct file *filp)
{
struct dfl_feature_platform_data *pdata = filp->private_data;
struct platform_device *pdev = pdata->dev;
+ struct dfl_feature *feature;
dev_dbg(&pdev->dev, "Device File Release\n");
mutex_lock(&pdata->lock);
dfl_feature_dev_use_end(pdata);
+
+ if (!dfl_feature_dev_use_count(pdata))
+ dfl_fpga_dev_for_each_feature(pdata, feature)
+ dfl_fpga_set_irq_triggers(feature, 0,
+ feature->nr_irqs, NULL);
mutex_unlock(&pdata->lock);
return 0;
diff --git a/include/uapi/linux/fpga-dfl.h b/include/uapi/linux/fpga-dfl.h
index 9ade943..206bad9 100644
--- a/include/uapi/linux/fpga-dfl.h
+++ b/include/uapi/linux/fpga-dfl.h
@@ -223,4 +223,27 @@ struct dfl_fpga_fme_port_pr {
*/
#define DFL_FPGA_FME_PORT_ASSIGN _IOW(DFL_FPGA_MAGIC, DFL_FME_BASE + 2, int)
+/**
+ * DFL_FPGA_FME_ERR_GET_IRQ_NUM - _IOR(DFL_FPGA_MAGIC, DFL_FME_BASE + 3,
+ * __u32 num_irqs)
+ *
+ * Get the number of irqs supported by the fpga fme error reporting private
+ * feature. Currently hardware supports up to 1 irq.
+ * Return: 0 on success, -errno on failure.
+ */
+#define DFL_FPGA_FME_ERR_GET_IRQ_NUM _IOR(DFL_FPGA_MAGIC, \
+ DFL_FME_BASE + 3, __u32)
+
+/**
+ * DFL_FPGA_FME_ERR_SET_IRQ - _IOW(DFL_FPGA_MAGIC, DFL_FME_BASE + 4,
+ * struct dfl_fpga_irq_set)
+ *
+ * Set fpga fme error reporting interrupt trigger if evtfds[n] is valid.
+ * Unset related interrupt trigger if evtfds[n] is a negative value.
+ * Return: 0 on success, -errno on failure.
+ */
+#define DFL_FPGA_FME_ERR_SET_IRQ _IOW(DFL_FPGA_MAGIC, \
+ DFL_FME_BASE + 4, \
+ struct dfl_fpga_irq_set)
+
#endif /* _UAPI_LINUX_FPGA_DFL_H */
--
2.7.4
^ permalink raw reply related [flat|nested] 21+ messages in thread* [PATCH v3 6/7] fpga: dfl: afu: add user interrupt support
2020-03-24 8:32 [PATCH v3 0/7] Add interrupt support to FPGA DFL drivers Xu Yilun
` (4 preceding siblings ...)
2020-03-24 8:32 ` [PATCH v3 5/7] fpga: dfl: fme: add interrupt support for global " Xu Yilun
@ 2020-03-24 8:32 ` Xu Yilun
2020-03-31 5:15 ` Wu Hao
2020-03-24 8:32 ` [PATCH v3 7/7] Documentation: fpga: dfl: add descriptions for interrupt related interfaces Xu Yilun
6 siblings, 1 reply; 21+ messages in thread
From: Xu Yilun @ 2020-03-24 8:32 UTC (permalink / raw)
To: mdf, linux-fpga, linux-kernel; +Cc: trix, bhu, Xu Yilun, Luwei Kang, Wu Hao
AFU (Accelerated Function Unit) is dynamic region of the DFL based FPGA,
and always defined by users. Some DFL based FPGA cards allow users to
implement their own interrupts in AFU. In order to support this,
hardware implements a new UINT (User Interrupt) private feature with
related capability register which describes the number of supported
user interrupts as well as the local index of the interrupts for
software enumeration, and from software side, driver follows the common
DFL interrupt notification and handling mechanism, and it implements
two ioctls below for user to query number of irqs supported and set/unset
interrupt triggers.
Ioctls:
* DFL_FPGA_PORT_UINT_GET_IRQ_NUM
get the number of irqs, which is used to determine how many interrupts
UINT feature supports.
* DFL_FPGA_PORT_UINT_SET_IRQ
set/unset eventfds as AFU user interrupt triggers.
Signed-off-by: Luwei Kang <luwei.kang@intel.com>
Signed-off-by: Wu Hao <hao.wu@intel.com>
Signed-off-by: Xu Yilun <yilun.xu@intel.com>
----
v2: use DFL_FPGA_PORT_UINT_GET_IRQ_NUM instead of
DFL_FPGA_PORT_UINT_GET_INFO
Delete flags field for DFL_FPGA_PORT_UINT_SET_IRQ
v3: put_user() instead of copy_to_user()
improves comments
---
drivers/fpga/dfl-afu-main.c | 70 +++++++++++++++++++++++++++++++++++++++++++
include/uapi/linux/fpga-dfl.h | 23 ++++++++++++++
2 files changed, 93 insertions(+)
diff --git a/drivers/fpga/dfl-afu-main.c b/drivers/fpga/dfl-afu-main.c
index 357cd5d..d2db5b6 100644
--- a/drivers/fpga/dfl-afu-main.c
+++ b/drivers/fpga/dfl-afu-main.c
@@ -529,6 +529,72 @@ static const struct dfl_feature_ops port_stp_ops = {
.init = port_stp_init,
};
+static long
+port_uint_get_num_irqs(struct platform_device *pdev,
+ struct dfl_feature *feature, unsigned long arg)
+{
+ return put_user(feature->nr_irqs, (__u32 __user *)arg);
+}
+
+static long port_uint_set_irq(struct platform_device *pdev,
+ struct dfl_feature *feature, unsigned long arg)
+{
+ struct dfl_feature_platform_data *pdata = dev_get_platdata(&pdev->dev);
+ struct dfl_fpga_irq_set hdr;
+ s32 *fds;
+ long ret;
+
+ if (!feature->nr_irqs)
+ return -ENOENT;
+
+ if (copy_from_user(&hdr, (void __user *)arg, sizeof(hdr)))
+ return -EFAULT;
+
+ if (!hdr.count || (hdr.start + hdr.count > feature->nr_irqs) ||
+ (hdr.start + hdr.count < hdr.start))
+ return -EINVAL;
+
+ fds = memdup_user((void __user *)(arg + sizeof(hdr)),
+ hdr.count * sizeof(s32));
+ if (IS_ERR(fds))
+ return PTR_ERR(fds);
+
+ mutex_lock(&pdata->lock);
+ ret = dfl_fpga_set_irq_triggers(feature, hdr.start, hdr.count, fds);
+ mutex_unlock(&pdata->lock);
+
+ kfree(fds);
+ return ret;
+}
+
+static long
+port_uint_ioctl(struct platform_device *pdev, struct dfl_feature *feature,
+ unsigned int cmd, unsigned long arg)
+{
+ long ret = -ENODEV;
+
+ switch (cmd) {
+ case DFL_FPGA_PORT_UINT_GET_IRQ_NUM:
+ ret = port_uint_get_num_irqs(pdev, feature, arg);
+ break;
+ case DFL_FPGA_PORT_UINT_SET_IRQ:
+ ret = port_uint_set_irq(pdev, feature, arg);
+ break;
+ default:
+ dev_dbg(&pdev->dev, "%x cmd not handled", cmd);
+ }
+ return ret;
+}
+
+static const struct dfl_feature_id port_uint_id_table[] = {
+ {.id = PORT_FEATURE_ID_UINT,},
+ {0,}
+};
+
+static const struct dfl_feature_ops port_uint_ops = {
+ .ioctl = port_uint_ioctl,
+};
+
static struct dfl_feature_driver port_feature_drvs[] = {
{
.id_table = port_hdr_id_table,
@@ -547,6 +613,10 @@ static struct dfl_feature_driver port_feature_drvs[] = {
.ops = &port_stp_ops,
},
{
+ .id_table = port_uint_id_table,
+ .ops = &port_uint_ops,
+ },
+ {
.ops = NULL,
}
};
diff --git a/include/uapi/linux/fpga-dfl.h b/include/uapi/linux/fpga-dfl.h
index 206bad9..5f885a8 100644
--- a/include/uapi/linux/fpga-dfl.h
+++ b/include/uapi/linux/fpga-dfl.h
@@ -180,6 +180,29 @@ struct dfl_fpga_irq_set {
DFL_PORT_BASE + 6, \
struct dfl_fpga_irq_set)
+/**
+ * DFL_FPGA_PORT_UINT_GET_IRQ_NUM - _IOR(DFL_FPGA_MAGIC, DFL_PORT_BASE + 7,
+ * __u32 num_irqs)
+ *
+ * Get the number of irqs supported by the fpga AFU user interrupt private
+ * feature.
+ * Return: 0 on success, -errno on failure.
+ */
+#define DFL_FPGA_PORT_UINT_GET_IRQ_NUM _IOR(DFL_FPGA_MAGIC, \
+ DFL_PORT_BASE + 7, __u32)
+
+/**
+ * DFL_FPGA_PORT_UINT_SET_IRQ - _IOW(DFL_FPGA_MAGIC, DFL_PORT_BASE + 8,
+ * struct dfl_fpga_irq_set)
+ *
+ * Set fpga afu user interrupt trigger if evtfds[n] is valid.
+ * Unset related interrupt trigger if evtfds[n] is a negative value.
+ * Return: 0 on success, -errno on failure.
+ */
+#define DFL_FPGA_PORT_UINT_SET_IRQ _IOW(DFL_FPGA_MAGIC, \
+ DFL_PORT_BASE + 8, \
+ struct dfl_fpga_irq_set)
+
/* IOCTLs for FME file descriptor */
/**
--
2.7.4
^ permalink raw reply related [flat|nested] 21+ messages in thread* Re: [PATCH v3 6/7] fpga: dfl: afu: add user interrupt support
2020-03-24 8:32 ` [PATCH v3 6/7] fpga: dfl: afu: add user interrupt support Xu Yilun
@ 2020-03-31 5:15 ` Wu Hao
2020-04-01 3:13 ` Xu Yilun
0 siblings, 1 reply; 21+ messages in thread
From: Wu Hao @ 2020-03-31 5:15 UTC (permalink / raw)
To: Xu Yilun; +Cc: mdf, linux-fpga, linux-kernel, trix, bhu, Luwei Kang
On Tue, Mar 24, 2020 at 04:32:42PM +0800, Xu Yilun wrote:
> AFU (Accelerated Function Unit) is dynamic region of the DFL based FPGA,
> and always defined by users. Some DFL based FPGA cards allow users to
> implement their own interrupts in AFU. In order to support this,
> hardware implements a new UINT (User Interrupt) private feature with
User Interrupt seems a little confusing, maybe we can just call it
AFU Interrupt whenever possible. How do you think?
Thanks
Hao
> related capability register which describes the number of supported
> user interrupts as well as the local index of the interrupts for
> software enumeration, and from software side, driver follows the common
> DFL interrupt notification and handling mechanism, and it implements
> two ioctls below for user to query number of irqs supported and set/unset
> interrupt triggers.
>
> Ioctls:
> * DFL_FPGA_PORT_UINT_GET_IRQ_NUM
> get the number of irqs, which is used to determine how many interrupts
> UINT feature supports.
>
> * DFL_FPGA_PORT_UINT_SET_IRQ
> set/unset eventfds as AFU user interrupt triggers.
>
> Signed-off-by: Luwei Kang <luwei.kang@intel.com>
> Signed-off-by: Wu Hao <hao.wu@intel.com>
> Signed-off-by: Xu Yilun <yilun.xu@intel.com>
> ----
> v2: use DFL_FPGA_PORT_UINT_GET_IRQ_NUM instead of
> DFL_FPGA_PORT_UINT_GET_INFO
> Delete flags field for DFL_FPGA_PORT_UINT_SET_IRQ
> v3: put_user() instead of copy_to_user()
> improves comments
> ---
> drivers/fpga/dfl-afu-main.c | 70 +++++++++++++++++++++++++++++++++++++++++++
> include/uapi/linux/fpga-dfl.h | 23 ++++++++++++++
> 2 files changed, 93 insertions(+)
>
> diff --git a/drivers/fpga/dfl-afu-main.c b/drivers/fpga/dfl-afu-main.c
> index 357cd5d..d2db5b6 100644
> --- a/drivers/fpga/dfl-afu-main.c
> +++ b/drivers/fpga/dfl-afu-main.c
> @@ -529,6 +529,72 @@ static const struct dfl_feature_ops port_stp_ops = {
> .init = port_stp_init,
> };
>
> +static long
> +port_uint_get_num_irqs(struct platform_device *pdev,
> + struct dfl_feature *feature, unsigned long arg)
> +{
> + return put_user(feature->nr_irqs, (__u32 __user *)arg);
> +}
> +
> +static long port_uint_set_irq(struct platform_device *pdev,
> + struct dfl_feature *feature, unsigned long arg)
> +{
> + struct dfl_feature_platform_data *pdata = dev_get_platdata(&pdev->dev);
> + struct dfl_fpga_irq_set hdr;
> + s32 *fds;
> + long ret;
> +
> + if (!feature->nr_irqs)
> + return -ENOENT;
> +
> + if (copy_from_user(&hdr, (void __user *)arg, sizeof(hdr)))
> + return -EFAULT;
> +
> + if (!hdr.count || (hdr.start + hdr.count > feature->nr_irqs) ||
> + (hdr.start + hdr.count < hdr.start))
> + return -EINVAL;
> +
> + fds = memdup_user((void __user *)(arg + sizeof(hdr)),
> + hdr.count * sizeof(s32));
> + if (IS_ERR(fds))
> + return PTR_ERR(fds);
> +
> + mutex_lock(&pdata->lock);
> + ret = dfl_fpga_set_irq_triggers(feature, hdr.start, hdr.count, fds);
> + mutex_unlock(&pdata->lock);
> +
> + kfree(fds);
> + return ret;
> +}
> +
> +static long
> +port_uint_ioctl(struct platform_device *pdev, struct dfl_feature *feature,
> + unsigned int cmd, unsigned long arg)
> +{
> + long ret = -ENODEV;
> +
> + switch (cmd) {
> + case DFL_FPGA_PORT_UINT_GET_IRQ_NUM:
> + ret = port_uint_get_num_irqs(pdev, feature, arg);
> + break;
> + case DFL_FPGA_PORT_UINT_SET_IRQ:
> + ret = port_uint_set_irq(pdev, feature, arg);
> + break;
> + default:
> + dev_dbg(&pdev->dev, "%x cmd not handled", cmd);
> + }
> + return ret;
> +}
> +
> +static const struct dfl_feature_id port_uint_id_table[] = {
> + {.id = PORT_FEATURE_ID_UINT,},
> + {0,}
> +};
> +
> +static const struct dfl_feature_ops port_uint_ops = {
> + .ioctl = port_uint_ioctl,
> +};
> +
> static struct dfl_feature_driver port_feature_drvs[] = {
> {
> .id_table = port_hdr_id_table,
> @@ -547,6 +613,10 @@ static struct dfl_feature_driver port_feature_drvs[] = {
> .ops = &port_stp_ops,
> },
> {
> + .id_table = port_uint_id_table,
> + .ops = &port_uint_ops,
> + },
> + {
> .ops = NULL,
> }
> };
> diff --git a/include/uapi/linux/fpga-dfl.h b/include/uapi/linux/fpga-dfl.h
> index 206bad9..5f885a8 100644
> --- a/include/uapi/linux/fpga-dfl.h
> +++ b/include/uapi/linux/fpga-dfl.h
> @@ -180,6 +180,29 @@ struct dfl_fpga_irq_set {
> DFL_PORT_BASE + 6, \
> struct dfl_fpga_irq_set)
>
> +/**
> + * DFL_FPGA_PORT_UINT_GET_IRQ_NUM - _IOR(DFL_FPGA_MAGIC, DFL_PORT_BASE + 7,
> + * __u32 num_irqs)
> + *
> + * Get the number of irqs supported by the fpga AFU user interrupt private
> + * feature.
> + * Return: 0 on success, -errno on failure.
> + */
> +#define DFL_FPGA_PORT_UINT_GET_IRQ_NUM _IOR(DFL_FPGA_MAGIC, \
> + DFL_PORT_BASE + 7, __u32)
> +
> +/**
> + * DFL_FPGA_PORT_UINT_SET_IRQ - _IOW(DFL_FPGA_MAGIC, DFL_PORT_BASE + 8,
> + * struct dfl_fpga_irq_set)
> + *
> + * Set fpga afu user interrupt trigger if evtfds[n] is valid.
> + * Unset related interrupt trigger if evtfds[n] is a negative value.
> + * Return: 0 on success, -errno on failure.
> + */
> +#define DFL_FPGA_PORT_UINT_SET_IRQ _IOW(DFL_FPGA_MAGIC, \
> + DFL_PORT_BASE + 8, \
> + struct dfl_fpga_irq_set)
> +
> /* IOCTLs for FME file descriptor */
>
> /**
> --
> 2.7.4
^ permalink raw reply [flat|nested] 21+ messages in thread* Re: [PATCH v3 6/7] fpga: dfl: afu: add user interrupt support
2020-03-31 5:15 ` Wu Hao
@ 2020-04-01 3:13 ` Xu Yilun
0 siblings, 0 replies; 21+ messages in thread
From: Xu Yilun @ 2020-04-01 3:13 UTC (permalink / raw)
To: Wu Hao; +Cc: mdf, linux-fpga, linux-kernel, trix, bhu, Luwei Kang
On Tue, Mar 31, 2020 at 01:15:50PM +0800, Wu Hao wrote:
> On Tue, Mar 24, 2020 at 04:32:42PM +0800, Xu Yilun wrote:
> > AFU (Accelerated Function Unit) is dynamic region of the DFL based FPGA,
> > and always defined by users. Some DFL based FPGA cards allow users to
> > implement their own interrupts in AFU. In order to support this,
> > hardware implements a new UINT (User Interrupt) private feature with
>
> User Interrupt seems a little confusing, maybe we can just call it
> AFU Interrupt whenever possible. How do you think?
OK. It's more clear. I'll change it.
>
> Thanks
> Hao
>
> > related capability register which describes the number of supported
> > user interrupts as well as the local index of the interrupts for
> > software enumeration, and from software side, driver follows the common
> > DFL interrupt notification and handling mechanism, and it implements
> > two ioctls below for user to query number of irqs supported and set/unset
> > interrupt triggers.
> >
> > Ioctls:
> > * DFL_FPGA_PORT_UINT_GET_IRQ_NUM
> > get the number of irqs, which is used to determine how many interrupts
> > UINT feature supports.
> >
> > * DFL_FPGA_PORT_UINT_SET_IRQ
> > set/unset eventfds as AFU user interrupt triggers.
> >
> > Signed-off-by: Luwei Kang <luwei.kang@intel.com>
> > Signed-off-by: Wu Hao <hao.wu@intel.com>
> > Signed-off-by: Xu Yilun <yilun.xu@intel.com>
> > ----
> > v2: use DFL_FPGA_PORT_UINT_GET_IRQ_NUM instead of
> > DFL_FPGA_PORT_UINT_GET_INFO
> > Delete flags field for DFL_FPGA_PORT_UINT_SET_IRQ
> > v3: put_user() instead of copy_to_user()
> > improves comments
> > ---
> > drivers/fpga/dfl-afu-main.c | 70 +++++++++++++++++++++++++++++++++++++++++++
> > include/uapi/linux/fpga-dfl.h | 23 ++++++++++++++
> > 2 files changed, 93 insertions(+)
> >
> > diff --git a/drivers/fpga/dfl-afu-main.c b/drivers/fpga/dfl-afu-main.c
> > index 357cd5d..d2db5b6 100644
> > --- a/drivers/fpga/dfl-afu-main.c
> > +++ b/drivers/fpga/dfl-afu-main.c
> > @@ -529,6 +529,72 @@ static const struct dfl_feature_ops port_stp_ops = {
> > .init = port_stp_init,
> > };
> >
> > +static long
> > +port_uint_get_num_irqs(struct platform_device *pdev,
> > + struct dfl_feature *feature, unsigned long arg)
> > +{
> > + return put_user(feature->nr_irqs, (__u32 __user *)arg);
> > +}
> > +
> > +static long port_uint_set_irq(struct platform_device *pdev,
> > + struct dfl_feature *feature, unsigned long arg)
> > +{
> > + struct dfl_feature_platform_data *pdata = dev_get_platdata(&pdev->dev);
> > + struct dfl_fpga_irq_set hdr;
> > + s32 *fds;
> > + long ret;
> > +
> > + if (!feature->nr_irqs)
> > + return -ENOENT;
> > +
> > + if (copy_from_user(&hdr, (void __user *)arg, sizeof(hdr)))
> > + return -EFAULT;
> > +
> > + if (!hdr.count || (hdr.start + hdr.count > feature->nr_irqs) ||
> > + (hdr.start + hdr.count < hdr.start))
> > + return -EINVAL;
> > +
> > + fds = memdup_user((void __user *)(arg + sizeof(hdr)),
> > + hdr.count * sizeof(s32));
> > + if (IS_ERR(fds))
> > + return PTR_ERR(fds);
> > +
> > + mutex_lock(&pdata->lock);
> > + ret = dfl_fpga_set_irq_triggers(feature, hdr.start, hdr.count, fds);
> > + mutex_unlock(&pdata->lock);
> > +
> > + kfree(fds);
> > + return ret;
> > +}
> > +
> > +static long
> > +port_uint_ioctl(struct platform_device *pdev, struct dfl_feature *feature,
> > + unsigned int cmd, unsigned long arg)
> > +{
> > + long ret = -ENODEV;
> > +
> > + switch (cmd) {
> > + case DFL_FPGA_PORT_UINT_GET_IRQ_NUM:
> > + ret = port_uint_get_num_irqs(pdev, feature, arg);
> > + break;
> > + case DFL_FPGA_PORT_UINT_SET_IRQ:
> > + ret = port_uint_set_irq(pdev, feature, arg);
> > + break;
> > + default:
> > + dev_dbg(&pdev->dev, "%x cmd not handled", cmd);
> > + }
> > + return ret;
> > +}
> > +
> > +static const struct dfl_feature_id port_uint_id_table[] = {
> > + {.id = PORT_FEATURE_ID_UINT,},
> > + {0,}
> > +};
> > +
> > +static const struct dfl_feature_ops port_uint_ops = {
> > + .ioctl = port_uint_ioctl,
> > +};
> > +
> > static struct dfl_feature_driver port_feature_drvs[] = {
> > {
> > .id_table = port_hdr_id_table,
> > @@ -547,6 +613,10 @@ static struct dfl_feature_driver port_feature_drvs[] = {
> > .ops = &port_stp_ops,
> > },
> > {
> > + .id_table = port_uint_id_table,
> > + .ops = &port_uint_ops,
> > + },
> > + {
> > .ops = NULL,
> > }
> > };
> > diff --git a/include/uapi/linux/fpga-dfl.h b/include/uapi/linux/fpga-dfl.h
> > index 206bad9..5f885a8 100644
> > --- a/include/uapi/linux/fpga-dfl.h
> > +++ b/include/uapi/linux/fpga-dfl.h
> > @@ -180,6 +180,29 @@ struct dfl_fpga_irq_set {
> > DFL_PORT_BASE + 6, \
> > struct dfl_fpga_irq_set)
> >
> > +/**
> > + * DFL_FPGA_PORT_UINT_GET_IRQ_NUM - _IOR(DFL_FPGA_MAGIC, DFL_PORT_BASE + 7,
> > + * __u32 num_irqs)
> > + *
> > + * Get the number of irqs supported by the fpga AFU user interrupt private
> > + * feature.
> > + * Return: 0 on success, -errno on failure.
> > + */
> > +#define DFL_FPGA_PORT_UINT_GET_IRQ_NUM _IOR(DFL_FPGA_MAGIC, \
> > + DFL_PORT_BASE + 7, __u32)
> > +
> > +/**
> > + * DFL_FPGA_PORT_UINT_SET_IRQ - _IOW(DFL_FPGA_MAGIC, DFL_PORT_BASE + 8,
> > + * struct dfl_fpga_irq_set)
> > + *
> > + * Set fpga afu user interrupt trigger if evtfds[n] is valid.
> > + * Unset related interrupt trigger if evtfds[n] is a negative value.
> > + * Return: 0 on success, -errno on failure.
> > + */
> > +#define DFL_FPGA_PORT_UINT_SET_IRQ _IOW(DFL_FPGA_MAGIC, \
> > + DFL_PORT_BASE + 8, \
> > + struct dfl_fpga_irq_set)
> > +
> > /* IOCTLs for FME file descriptor */
> >
> > /**
> > --
> > 2.7.4
^ permalink raw reply [flat|nested] 21+ messages in thread
* [PATCH v3 7/7] Documentation: fpga: dfl: add descriptions for interrupt related interfaces.
2020-03-24 8:32 [PATCH v3 0/7] Add interrupt support to FPGA DFL drivers Xu Yilun
` (5 preceding siblings ...)
2020-03-24 8:32 ` [PATCH v3 6/7] fpga: dfl: afu: add user interrupt support Xu Yilun
@ 2020-03-24 8:32 ` Xu Yilun
6 siblings, 0 replies; 21+ messages in thread
From: Xu Yilun @ 2020-03-24 8:32 UTC (permalink / raw)
To: mdf, linux-fpga, linux-kernel; +Cc: trix, bhu, Xu Yilun, Luwei Kang, Wu Hao
This patch adds introductions of interrupt related interfaces for FME
error reporting, port error reporting and AFU user interrupts features.
Signed-off-by: Luwei Kang <luwei.kang@intel.com>
Signed-off-by: Wu Hao <hao.wu@intel.com>
Signed-off-by: Xu Yilun <yilun.xu@intel.com>
----
v2: Update Documents cause change of irq ioctl interfaces.
v3: No change
---
Documentation/fpga/dfl.rst | 17 +++++++++++++++++
1 file changed, 17 insertions(+)
diff --git a/Documentation/fpga/dfl.rst b/Documentation/fpga/dfl.rst
index 094fc8a..c7ed3e4 100644
--- a/Documentation/fpga/dfl.rst
+++ b/Documentation/fpga/dfl.rst
@@ -89,6 +89,8 @@ The following functions are exposed through ioctls:
- Program bitstream (DFL_FPGA_FME_PORT_PR)
- Assign port to PF (DFL_FPGA_FME_PORT_ASSIGN)
- Release port from PF (DFL_FPGA_FME_PORT_RELEASE)
+- Get number of irqs of FME global error (DFL_FPGA_FME_ERR_GET_IRQ_NUM)
+- Set interrupt trigger for FME error (DFL_FPGA_FME_ERR_SET_IRQ)
More functions are exposed through sysfs
(/sys/class/fpga_region/regionX/dfl-fme.n/):
@@ -144,6 +146,10 @@ The following functions are exposed through ioctls:
- Map DMA buffer (DFL_FPGA_PORT_DMA_MAP)
- Unmap DMA buffer (DFL_FPGA_PORT_DMA_UNMAP)
- Reset AFU (DFL_FPGA_PORT_RESET)
+- Get number of irqs of port error (DFL_FPGA_PORT_ERR_GET_IRQ_NUM)
+- Set interrupt trigger for port error (DFL_FPGA_PORT_ERR_SET_IRQ)
+- Get number of irqs of UINT (DFL_FPGA_PORT_UINT_GET_IRQ_NUM)
+- Set interrupt trigger for UINT (DFL_FPGA_PORT_UINT_SET_IRQ)
DFL_FPGA_PORT_RESET:
reset the FPGA Port and its AFU. Userspace can do Port
@@ -378,6 +384,17 @@ The device nodes used for ioctl() or mmap() can be referenced through::
/sys/class/fpga_region/<regionX>/<dfl-port.n>/dev
+Interrupt support
+=================
+Some FME and AFU private features are able to generate interrupts. As mentioned
+above, users could call ioctl (DFL_FPGA_*_GET_IRQ_NUM) to know whether or how
+many interrupts are supported for this private feature. Drivers also implement
+an eventfd based interrupt handling mechanism for users to get notified when
+interrupt happens. Users could set eventfds to driver via
+ioctl (DFL_FPGA_*_SET_IRQ), and then poll/select on these eventfds waiting for
+notification.
+
+
Add new FIUs support
====================
It's possible that developers made some new function blocks (FIUs) under this
--
2.7.4
^ permalink raw reply related [flat|nested] 21+ messages in thread