* [PATCH v1] pinctrl: sunrisepoint: Fix PAD lock register offset for SPT-H
@ 2020-04-01 8:55 Andy Shevchenko
2020-04-01 9:50 ` Mika Westerberg
0 siblings, 1 reply; 3+ messages in thread
From: Andy Shevchenko @ 2020-04-01 8:55 UTC (permalink / raw)
To: Mika Westerberg, linux-gpio, Linus Walleij; +Cc: Andy Shevchenko
It appears that SPT-H variant has different offset for PAD locking registers.
Fix it here.
Fixes: 551fa5801ef1 ("pinctrl: intel: sunrisepoint: Add Intel Sunrisepoint-H support")
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
---
drivers/pinctrl/intel/pinctrl-sunrisepoint.c | 15 ++++++++-------
1 file changed, 8 insertions(+), 7 deletions(-)
diff --git a/drivers/pinctrl/intel/pinctrl-sunrisepoint.c b/drivers/pinctrl/intel/pinctrl-sunrisepoint.c
index 330c8f077b73..4d7a86a5a37b 100644
--- a/drivers/pinctrl/intel/pinctrl-sunrisepoint.c
+++ b/drivers/pinctrl/intel/pinctrl-sunrisepoint.c
@@ -15,17 +15,18 @@
#include "pinctrl-intel.h"
-#define SPT_PAD_OWN 0x020
-#define SPT_PADCFGLOCK 0x0a0
-#define SPT_HOSTSW_OWN 0x0d0
-#define SPT_GPI_IS 0x100
-#define SPT_GPI_IE 0x120
+#define SPT_PAD_OWN 0x020
+#define SPT_H_PADCFGLOCK 0x090
+#define SPT_LP_PADCFGLOCK 0x0a0
+#define SPT_HOSTSW_OWN 0x0d0
+#define SPT_GPI_IS 0x100
+#define SPT_GPI_IE 0x120
#define SPT_COMMUNITY(b, s, e) \
{ \
.barno = (b), \
.padown_offset = SPT_PAD_OWN, \
- .padcfglock_offset = SPT_PADCFGLOCK, \
+ .padcfglock_offset = SPT_LP_PADCFGLOCK, \
.hostown_offset = SPT_HOSTSW_OWN, \
.is_offset = SPT_GPI_IS, \
.ie_offset = SPT_GPI_IE, \
@@ -47,7 +48,7 @@
{ \
.barno = (b), \
.padown_offset = SPT_PAD_OWN, \
- .padcfglock_offset = SPT_PADCFGLOCK, \
+ .padcfglock_offset = SPT_H_PADCFGLOCK, \
.hostown_offset = SPT_HOSTSW_OWN, \
.is_offset = SPT_GPI_IS, \
.ie_offset = SPT_GPI_IE, \
--
2.25.1
^ permalink raw reply related [flat|nested] 3+ messages in thread
* Re: [PATCH v1] pinctrl: sunrisepoint: Fix PAD lock register offset for SPT-H
2020-04-01 8:55 [PATCH v1] pinctrl: sunrisepoint: Fix PAD lock register offset for SPT-H Andy Shevchenko
@ 2020-04-01 9:50 ` Mika Westerberg
2020-04-13 10:46 ` Andy Shevchenko
0 siblings, 1 reply; 3+ messages in thread
From: Mika Westerberg @ 2020-04-01 9:50 UTC (permalink / raw)
To: Andy Shevchenko; +Cc: linux-gpio, Linus Walleij
On Wed, Apr 01, 2020 at 11:55:53AM +0300, Andy Shevchenko wrote:
> It appears that SPT-H variant has different offset for PAD locking registers.
> Fix it here.
>
> Fixes: 551fa5801ef1 ("pinctrl: intel: sunrisepoint: Add Intel Sunrisepoint-H support")
> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
^ permalink raw reply [flat|nested] 3+ messages in thread
* Re: [PATCH v1] pinctrl: sunrisepoint: Fix PAD lock register offset for SPT-H
2020-04-01 9:50 ` Mika Westerberg
@ 2020-04-13 10:46 ` Andy Shevchenko
0 siblings, 0 replies; 3+ messages in thread
From: Andy Shevchenko @ 2020-04-13 10:46 UTC (permalink / raw)
To: Mika Westerberg; +Cc: linux-gpio, Linus Walleij
On Wed, Apr 01, 2020 at 12:50:02PM +0300, Mika Westerberg wrote:
> On Wed, Apr 01, 2020 at 11:55:53AM +0300, Andy Shevchenko wrote:
> > It appears that SPT-H variant has different offset for PAD locking registers.
> > Fix it here.
> >
> > Fixes: 551fa5801ef1 ("pinctrl: intel: sunrisepoint: Add Intel Sunrisepoint-H support")
> > Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
>
> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Pushed to fixes, thanks!
--
With Best Regards,
Andy Shevchenko
^ permalink raw reply [flat|nested] 3+ messages in thread
end of thread, other threads:[~2020-04-13 10:46 UTC | newest]
Thread overview: 3+ messages (download: mbox.gz / follow: Atom feed)
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2020-04-01 8:55 [PATCH v1] pinctrl: sunrisepoint: Fix PAD lock register offset for SPT-H Andy Shevchenko
2020-04-01 9:50 ` Mika Westerberg
2020-04-13 10:46 ` Andy Shevchenko
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