From: Gavin Shan <gshan@redhat.com> To: kvmarm@lists.cs.columbia.edu Cc: maz@kernel.org, sudeep.holla@arm.com, shan.gavin@gmail.com, catalin.marinas@arm.com, will@kernel.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH RFCv1 3/7] kvm/arm64: Replace hsr with esr Date: Fri, 10 Apr 2020 18:58:16 +1000 [thread overview] Message-ID: <20200410085820.758686-4-gshan@redhat.com> (raw) In-Reply-To: <20200410085820.758686-1-gshan@redhat.com> This replace the variable names to make them self-explaining. The tracepoint isn't changed accordingly because they're part of ABI: * @hsr to @esr * @hsr_ec to @ec * Use kvm_vcpu_trap_get_class() helper if possible Signed-off-by: Gavin Shan <gshan@redhat.com> --- arch/arm64/kvm/handle_exit.c | 28 ++++++++++++++-------------- arch/arm64/kvm/hyp/switch.c | 9 ++++----- arch/arm64/kvm/sys_regs.c | 30 +++++++++++++++--------------- 3 files changed, 33 insertions(+), 34 deletions(-) diff --git a/arch/arm64/kvm/handle_exit.c b/arch/arm64/kvm/handle_exit.c index 00858db82a64..e3b3dcd5b811 100644 --- a/arch/arm64/kvm/handle_exit.c +++ b/arch/arm64/kvm/handle_exit.c @@ -123,13 +123,13 @@ static int kvm_handle_wfx(struct kvm_vcpu *vcpu, struct kvm_run *run) */ static int kvm_handle_guest_debug(struct kvm_vcpu *vcpu, struct kvm_run *run) { - u32 hsr = kvm_vcpu_get_esr(vcpu); + u32 esr = kvm_vcpu_get_esr(vcpu); int ret = 0; run->exit_reason = KVM_EXIT_DEBUG; - run->debug.arch.hsr = hsr; + run->debug.arch.hsr = esr; - switch (ESR_ELx_EC(hsr)) { + switch (kvm_vcpu_trap_get_class(esr)) { case ESR_ELx_EC_WATCHPT_LOW: run->debug.arch.far = vcpu->arch.fault.far_el2; /* fall through */ @@ -139,8 +139,8 @@ static int kvm_handle_guest_debug(struct kvm_vcpu *vcpu, struct kvm_run *run) case ESR_ELx_EC_BRK64: break; default: - kvm_err("%s: un-handled case hsr: %#08x\n", - __func__, (unsigned int) hsr); + kvm_err("%s: un-handled case esr: %#08x\n", + __func__, (unsigned int)esr); ret = -1; break; } @@ -150,10 +150,10 @@ static int kvm_handle_guest_debug(struct kvm_vcpu *vcpu, struct kvm_run *run) static int kvm_handle_unknown_ec(struct kvm_vcpu *vcpu, struct kvm_run *run) { - u32 hsr = kvm_vcpu_get_esr(vcpu); + u32 esr = kvm_vcpu_get_esr(vcpu); - kvm_pr_unimpl("Unknown exception class: hsr: %#08x -- %s\n", - hsr, esr_get_class_string(hsr)); + kvm_pr_unimpl("Unknown exception class: esr: %#08x -- %s\n", + esr, esr_get_class_string(esr)); kvm_inject_undefined(vcpu); return 1; @@ -230,10 +230,10 @@ static exit_handle_fn arm_exit_handlers[] = { static exit_handle_fn kvm_get_exit_handler(struct kvm_vcpu *vcpu) { - u32 hsr = kvm_vcpu_get_esr(vcpu); - u8 hsr_ec = ESR_ELx_EC(hsr); + u32 esr = kvm_vcpu_get_esr(vcpu); + u8 ec = kvm_vcpu_trap_get_class(esr); - return arm_exit_handlers[hsr_ec]; + return arm_exit_handlers[ec]; } /* @@ -273,15 +273,15 @@ int handle_exit(struct kvm_vcpu *vcpu, struct kvm_run *run, { if (ARM_SERROR_PENDING(exception_index)) { u32 esr = kvm_vcpu_get_esr(vcpu); - u8 hsr_ec = ESR_ELx_EC(esr); + u8 ec = kvm_vcpu_trap_get_class(esr); /* * HVC/SMC already have an adjusted PC, which we need * to correct in order to return to after having * injected the SError. */ - if (hsr_ec == ESR_ELx_EC_HVC32 || hsr_ec == ESR_ELx_EC_HVC64 || - hsr_ec == ESR_ELx_EC_SMC32 || hsr_ec == ESR_ELx_EC_SMC64) { + if (ec == ESR_ELx_EC_HVC32 || ec == ESR_ELx_EC_HVC64 || + ec == ESR_ELx_EC_SMC32 || ec == ESR_ELx_EC_SMC64) { u32 adj = kvm_vcpu_trap_il_is32bit(esr) ? 4 : 2; *vcpu_pc(vcpu) -= adj; } diff --git a/arch/arm64/kvm/hyp/switch.c b/arch/arm64/kvm/hyp/switch.c index 369f22f49f3d..7bf4840bf90e 100644 --- a/arch/arm64/kvm/hyp/switch.c +++ b/arch/arm64/kvm/hyp/switch.c @@ -356,8 +356,8 @@ static bool __hyp_text __populate_fault_info(struct kvm_vcpu *vcpu) static bool __hyp_text __hyp_handle_fpsimd(struct kvm_vcpu *vcpu) { u32 esr = kvm_vcpu_get_esr(vcpu); + u8 ec = kvm_vcpu_trap_get_class(esr); bool vhe, sve_guest, sve_host; - u8 hsr_ec; if (!system_supports_fpsimd()) return false; @@ -372,14 +372,13 @@ static bool __hyp_text __hyp_handle_fpsimd(struct kvm_vcpu *vcpu) vhe = has_vhe(); } - hsr_ec = kvm_vcpu_trap_get_class(esr); - if (hsr_ec != ESR_ELx_EC_FP_ASIMD && - hsr_ec != ESR_ELx_EC_SVE) + if (ec != ESR_ELx_EC_FP_ASIMD && + ec != ESR_ELx_EC_SVE) return false; /* Don't handle SVE traps for non-SVE vcpus here: */ if (!sve_guest) - if (hsr_ec != ESR_ELx_EC_FP_ASIMD) + if (ec != ESR_ELx_EC_FP_ASIMD) return false; /* Valid trap. Switch the context: */ diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c index 012fff834a4b..58f81ab519af 100644 --- a/arch/arm64/kvm/sys_regs.c +++ b/arch/arm64/kvm/sys_regs.c @@ -2182,10 +2182,10 @@ static void unhandled_cp_access(struct kvm_vcpu *vcpu, struct sys_reg_params *params) { u32 esr = kvm_vcpu_get_esr(vcpu); - u8 hsr_ec = kvm_vcpu_trap_get_class(esr); + u8 ec = kvm_vcpu_trap_get_class(esr); int cp = -1; - switch(hsr_ec) { + switch (ec) { case ESR_ELx_EC_CP15_32: case ESR_ELx_EC_CP15_64: cp = 15; @@ -2216,17 +2216,17 @@ static int kvm_handle_cp_64(struct kvm_vcpu *vcpu, size_t nr_specific) { struct sys_reg_params params; - u32 hsr = kvm_vcpu_get_esr(vcpu); - int Rt = kvm_vcpu_sys_get_rt(hsr); - int Rt2 = (hsr >> 10) & 0x1f; + u32 esr = kvm_vcpu_get_esr(vcpu); + int Rt = kvm_vcpu_sys_get_rt(esr); + int Rt2 = (esr >> 10) & 0x1f; params.is_aarch32 = true; params.is_32bit = false; - params.CRm = (hsr >> 1) & 0xf; - params.is_write = ((hsr & 1) == 0); + params.CRm = (esr >> 1) & 0xf; + params.is_write = ((esr & 1) == 0); params.Op0 = 0; - params.Op1 = (hsr >> 16) & 0xf; + params.Op1 = (esr >> 16) & 0xf; params.Op2 = 0; params.CRn = 0; @@ -2273,18 +2273,18 @@ static int kvm_handle_cp_32(struct kvm_vcpu *vcpu, size_t nr_specific) { struct sys_reg_params params; - u32 hsr = kvm_vcpu_get_esr(vcpu); - int Rt = kvm_vcpu_sys_get_rt(hsr); + u32 esr = kvm_vcpu_get_esr(vcpu); + int Rt = kvm_vcpu_sys_get_rt(esr); params.is_aarch32 = true; params.is_32bit = true; - params.CRm = (hsr >> 1) & 0xf; + params.CRm = (esr >> 1) & 0xf; params.regval = vcpu_get_reg(vcpu, Rt); - params.is_write = ((hsr & 1) == 0); - params.CRn = (hsr >> 10) & 0xf; + params.is_write = ((esr & 1) == 0); + params.CRn = (esr >> 10) & 0xf; params.Op0 = 0; - params.Op1 = (hsr >> 14) & 0x7; - params.Op2 = (hsr >> 17) & 0x7; + params.Op1 = (esr >> 14) & 0x7; + params.Op2 = (esr >> 17) & 0x7; if (!emulate_cp(vcpu, ¶ms, target_specific, nr_specific) || !emulate_cp(vcpu, ¶ms, global, nr_global)) { -- 2.23.0 _______________________________________________ kvmarm mailing list kvmarm@lists.cs.columbia.edu https://lists.cs.columbia.edu/mailman/listinfo/kvmarm
WARNING: multiple messages have this Message-ID (diff)
From: Gavin Shan <gshan@redhat.com> To: kvmarm@lists.cs.columbia.edu Cc: mark.rutland@arm.com, drjones@redhat.com, suzuki.poulose@arm.com, maz@kernel.org, sudeep.holla@arm.com, eric.auger@redhat.com, james.morse@arm.com, shan.gavin@gmail.com, catalin.marinas@arm.com, will@kernel.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH RFCv1 3/7] kvm/arm64: Replace hsr with esr Date: Fri, 10 Apr 2020 18:58:16 +1000 [thread overview] Message-ID: <20200410085820.758686-4-gshan@redhat.com> (raw) In-Reply-To: <20200410085820.758686-1-gshan@redhat.com> This replace the variable names to make them self-explaining. The tracepoint isn't changed accordingly because they're part of ABI: * @hsr to @esr * @hsr_ec to @ec * Use kvm_vcpu_trap_get_class() helper if possible Signed-off-by: Gavin Shan <gshan@redhat.com> --- arch/arm64/kvm/handle_exit.c | 28 ++++++++++++++-------------- arch/arm64/kvm/hyp/switch.c | 9 ++++----- arch/arm64/kvm/sys_regs.c | 30 +++++++++++++++--------------- 3 files changed, 33 insertions(+), 34 deletions(-) diff --git a/arch/arm64/kvm/handle_exit.c b/arch/arm64/kvm/handle_exit.c index 00858db82a64..e3b3dcd5b811 100644 --- a/arch/arm64/kvm/handle_exit.c +++ b/arch/arm64/kvm/handle_exit.c @@ -123,13 +123,13 @@ static int kvm_handle_wfx(struct kvm_vcpu *vcpu, struct kvm_run *run) */ static int kvm_handle_guest_debug(struct kvm_vcpu *vcpu, struct kvm_run *run) { - u32 hsr = kvm_vcpu_get_esr(vcpu); + u32 esr = kvm_vcpu_get_esr(vcpu); int ret = 0; run->exit_reason = KVM_EXIT_DEBUG; - run->debug.arch.hsr = hsr; + run->debug.arch.hsr = esr; - switch (ESR_ELx_EC(hsr)) { + switch (kvm_vcpu_trap_get_class(esr)) { case ESR_ELx_EC_WATCHPT_LOW: run->debug.arch.far = vcpu->arch.fault.far_el2; /* fall through */ @@ -139,8 +139,8 @@ static int kvm_handle_guest_debug(struct kvm_vcpu *vcpu, struct kvm_run *run) case ESR_ELx_EC_BRK64: break; default: - kvm_err("%s: un-handled case hsr: %#08x\n", - __func__, (unsigned int) hsr); + kvm_err("%s: un-handled case esr: %#08x\n", + __func__, (unsigned int)esr); ret = -1; break; } @@ -150,10 +150,10 @@ static int kvm_handle_guest_debug(struct kvm_vcpu *vcpu, struct kvm_run *run) static int kvm_handle_unknown_ec(struct kvm_vcpu *vcpu, struct kvm_run *run) { - u32 hsr = kvm_vcpu_get_esr(vcpu); + u32 esr = kvm_vcpu_get_esr(vcpu); - kvm_pr_unimpl("Unknown exception class: hsr: %#08x -- %s\n", - hsr, esr_get_class_string(hsr)); + kvm_pr_unimpl("Unknown exception class: esr: %#08x -- %s\n", + esr, esr_get_class_string(esr)); kvm_inject_undefined(vcpu); return 1; @@ -230,10 +230,10 @@ static exit_handle_fn arm_exit_handlers[] = { static exit_handle_fn kvm_get_exit_handler(struct kvm_vcpu *vcpu) { - u32 hsr = kvm_vcpu_get_esr(vcpu); - u8 hsr_ec = ESR_ELx_EC(hsr); + u32 esr = kvm_vcpu_get_esr(vcpu); + u8 ec = kvm_vcpu_trap_get_class(esr); - return arm_exit_handlers[hsr_ec]; + return arm_exit_handlers[ec]; } /* @@ -273,15 +273,15 @@ int handle_exit(struct kvm_vcpu *vcpu, struct kvm_run *run, { if (ARM_SERROR_PENDING(exception_index)) { u32 esr = kvm_vcpu_get_esr(vcpu); - u8 hsr_ec = ESR_ELx_EC(esr); + u8 ec = kvm_vcpu_trap_get_class(esr); /* * HVC/SMC already have an adjusted PC, which we need * to correct in order to return to after having * injected the SError. */ - if (hsr_ec == ESR_ELx_EC_HVC32 || hsr_ec == ESR_ELx_EC_HVC64 || - hsr_ec == ESR_ELx_EC_SMC32 || hsr_ec == ESR_ELx_EC_SMC64) { + if (ec == ESR_ELx_EC_HVC32 || ec == ESR_ELx_EC_HVC64 || + ec == ESR_ELx_EC_SMC32 || ec == ESR_ELx_EC_SMC64) { u32 adj = kvm_vcpu_trap_il_is32bit(esr) ? 4 : 2; *vcpu_pc(vcpu) -= adj; } diff --git a/arch/arm64/kvm/hyp/switch.c b/arch/arm64/kvm/hyp/switch.c index 369f22f49f3d..7bf4840bf90e 100644 --- a/arch/arm64/kvm/hyp/switch.c +++ b/arch/arm64/kvm/hyp/switch.c @@ -356,8 +356,8 @@ static bool __hyp_text __populate_fault_info(struct kvm_vcpu *vcpu) static bool __hyp_text __hyp_handle_fpsimd(struct kvm_vcpu *vcpu) { u32 esr = kvm_vcpu_get_esr(vcpu); + u8 ec = kvm_vcpu_trap_get_class(esr); bool vhe, sve_guest, sve_host; - u8 hsr_ec; if (!system_supports_fpsimd()) return false; @@ -372,14 +372,13 @@ static bool __hyp_text __hyp_handle_fpsimd(struct kvm_vcpu *vcpu) vhe = has_vhe(); } - hsr_ec = kvm_vcpu_trap_get_class(esr); - if (hsr_ec != ESR_ELx_EC_FP_ASIMD && - hsr_ec != ESR_ELx_EC_SVE) + if (ec != ESR_ELx_EC_FP_ASIMD && + ec != ESR_ELx_EC_SVE) return false; /* Don't handle SVE traps for non-SVE vcpus here: */ if (!sve_guest) - if (hsr_ec != ESR_ELx_EC_FP_ASIMD) + if (ec != ESR_ELx_EC_FP_ASIMD) return false; /* Valid trap. Switch the context: */ diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c index 012fff834a4b..58f81ab519af 100644 --- a/arch/arm64/kvm/sys_regs.c +++ b/arch/arm64/kvm/sys_regs.c @@ -2182,10 +2182,10 @@ static void unhandled_cp_access(struct kvm_vcpu *vcpu, struct sys_reg_params *params) { u32 esr = kvm_vcpu_get_esr(vcpu); - u8 hsr_ec = kvm_vcpu_trap_get_class(esr); + u8 ec = kvm_vcpu_trap_get_class(esr); int cp = -1; - switch(hsr_ec) { + switch (ec) { case ESR_ELx_EC_CP15_32: case ESR_ELx_EC_CP15_64: cp = 15; @@ -2216,17 +2216,17 @@ static int kvm_handle_cp_64(struct kvm_vcpu *vcpu, size_t nr_specific) { struct sys_reg_params params; - u32 hsr = kvm_vcpu_get_esr(vcpu); - int Rt = kvm_vcpu_sys_get_rt(hsr); - int Rt2 = (hsr >> 10) & 0x1f; + u32 esr = kvm_vcpu_get_esr(vcpu); + int Rt = kvm_vcpu_sys_get_rt(esr); + int Rt2 = (esr >> 10) & 0x1f; params.is_aarch32 = true; params.is_32bit = false; - params.CRm = (hsr >> 1) & 0xf; - params.is_write = ((hsr & 1) == 0); + params.CRm = (esr >> 1) & 0xf; + params.is_write = ((esr & 1) == 0); params.Op0 = 0; - params.Op1 = (hsr >> 16) & 0xf; + params.Op1 = (esr >> 16) & 0xf; params.Op2 = 0; params.CRn = 0; @@ -2273,18 +2273,18 @@ static int kvm_handle_cp_32(struct kvm_vcpu *vcpu, size_t nr_specific) { struct sys_reg_params params; - u32 hsr = kvm_vcpu_get_esr(vcpu); - int Rt = kvm_vcpu_sys_get_rt(hsr); + u32 esr = kvm_vcpu_get_esr(vcpu); + int Rt = kvm_vcpu_sys_get_rt(esr); params.is_aarch32 = true; params.is_32bit = true; - params.CRm = (hsr >> 1) & 0xf; + params.CRm = (esr >> 1) & 0xf; params.regval = vcpu_get_reg(vcpu, Rt); - params.is_write = ((hsr & 1) == 0); - params.CRn = (hsr >> 10) & 0xf; + params.is_write = ((esr & 1) == 0); + params.CRn = (esr >> 10) & 0xf; params.Op0 = 0; - params.Op1 = (hsr >> 14) & 0x7; - params.Op2 = (hsr >> 17) & 0x7; + params.Op1 = (esr >> 14) & 0x7; + params.Op2 = (esr >> 17) & 0x7; if (!emulate_cp(vcpu, ¶ms, target_specific, nr_specific) || !emulate_cp(vcpu, ¶ms, global, nr_global)) { -- 2.23.0 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2020-04-10 9:42 UTC|newest] Thread overview: 31+ messages / expand[flat|nested] mbox.gz Atom feed top 2020-04-10 8:58 [PATCH RFCv1 0/7] Support Async Page Fault Gavin Shan 2020-04-10 8:58 ` Gavin Shan 2020-04-10 8:58 ` [PATCH RFCv1 1/7] kvm/arm64: Rename kvm_vcpu_get_hsr() to kvm_vcpu_get_esr() Gavin Shan 2020-04-10 8:58 ` Gavin Shan 2020-04-10 8:58 ` [PATCH RFCv1 2/7] kvm/arm64: Detach ESR operator from vCPU struct Gavin Shan 2020-04-10 8:58 ` Gavin Shan 2020-04-10 8:58 ` Gavin Shan [this message] 2020-04-10 8:58 ` [PATCH RFCv1 3/7] kvm/arm64: Replace hsr with esr Gavin Shan 2020-04-10 8:58 ` [PATCH RFCv1 4/7] kvm/arm64: Export kvm_handle_user_mem_abort() with prefault mode Gavin Shan 2020-04-10 8:58 ` Gavin Shan 2020-04-10 8:58 ` [PATCH RFCv1 5/7] kvm/arm64: Allow inject data abort with specified DFSC Gavin Shan 2020-04-10 8:58 ` Gavin Shan 2020-04-10 8:58 ` [PATCH RFCv1 6/7] kvm/arm64: Support async page fault Gavin Shan 2020-04-10 8:58 ` Gavin Shan 2020-04-10 20:27 ` kbuild test robot 2020-04-10 8:58 ` [PATCH RFCv1 7/7] arm64: " Gavin Shan 2020-04-10 8:58 ` Gavin Shan 2020-04-10 12:52 ` [PATCH RFCv1 0/7] Support Async Page Fault Marc Zyngier 2020-04-10 12:52 ` Marc Zyngier 2020-04-14 5:39 ` Gavin Shan 2020-04-14 5:39 ` Gavin Shan 2020-04-14 11:05 ` Mark Rutland 2020-04-14 11:05 ` Mark Rutland 2020-04-16 7:59 ` Gavin Shan 2020-04-16 7:59 ` Gavin Shan 2020-04-16 9:16 ` Mark Rutland 2020-04-16 9:16 ` Mark Rutland 2020-04-16 9:21 ` Will Deacon 2020-04-16 9:21 ` Will Deacon 2020-04-17 10:34 ` Gavin Shan 2020-04-17 10:34 ` Gavin Shan
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