* [PATCH-for-5.1 v3 00/24] various: Fix error-propagation with Coccinelle scripts (part 1)
@ 2020-04-12 22:35 ` Philippe Mathieu-Daudé
0 siblings, 0 replies; 98+ messages in thread
From: Philippe Mathieu-Daudé @ 2020-04-12 22:35 UTC (permalink / raw)
To: qemu-devel
Cc: Joel Stanley, Jean-Christophe Dubois, Subbaraya Sundeep,
Max Reitz, Palmer Dabbelt, qemu-ppc, Sagar Karandikar,
Markus Armbruster, Jeff Cody, Peter Maydell, Xie Changlong,
Fam Zheng, Eduardo Habkost, Alistair Francis, qemu-arm,
Wen Congyang, Philippe Mathieu-Daudé,
Bastian Koppelmann, Edgar E. Iglesias, Kevin Wolf,
Marc-André Lureau, David Gibson, Jason Wang, Peter Chubb,
Beniamino Galvani, Alistair Francis, qemu-riscv,
Cédric Le Goater, qemu-block, Paolo Bonzini, Andrew Jeffery,
Michael S. Tsirkin, Richard Henderson,
Philippe Mathieu-Daudé
This series is inspired of Peter Maydell fix [1]:
"hw/arm/xlnx-zynqmp.c: fix some error-handling code",
but grew after v1 [2] review :/
Markus: I added the cocci patches to your Error section, I hope
that's fine :)
Part 1: Simplify error propagation by moving some code from
DeviceClass::realize() to DeviceClass:initfn().
Regards,
Phil.
[1] https://www.mail-archive.com/qemu-devel@nongnu.org/msg691636.html
[2] https://www.mail-archive.com/qemu-devel@nongnu.org/msg692155.html
Supersedes: <20200406174743.16956-1-f4bug@amsat.org>
Philippe Mathieu-Daud=C3=A9 (24):
various: Remove suspicious '\' character outside of #define in C code
scripts/coccinelle: Script to simplify DeviceClass error propagation
hw/arm/allwinner-a10: Move some code from realize() to init()
hw/arm/aspeed_ast2600: Simplify use of Error*
hw/arm/aspeed_ast2600: Move some code from realize() to init()
hw/arm/aspeed_soc: Move some code from realize() to init()
hw/arm/aspeed_soc: Simplify use of Error*
hw/arm/fsl-imx6: Simplify checks on 'smp_cpus' count
hw/arm/fsl-imx6: Move some code from realize() to init()
hw/arm/fsl-imx31: Move some code from realize() to init()
hw/arm/msf2-soc: Store MemoryRegion in MSF2State
hw/arm/stm32f205_soc: Store MemoryRegion in STM32F205State
hw/arm/stm32f205_soc: Move some code from realize() to init()
hw/arm/xlnx-zynqmp: Use single propagate_error() call
hw/arm/xlnx-zynqmp: Split xlnx_zynqmp_create_rpu() as init + realize
hw/arm/xlnx-zynqmp: Move some code from realize() to init()
hw/microblaze/xlnx-zynqmp-pmu: Move some code from realize() to init()
hw/pci-host/pnv_phb3: Move some code from realize() to init()
hw/riscv/sifive_e: Move some code from realize() to init()
hw/riscv/sifive_u: Use single type_init()
hw/riscv/sifive_u: Move some code from realize() to init()
hw/riscv/sifive_u: Store MemoryRegion in SiFiveUSoCState
hw/riscv/sifive_u: Move some code from realize() to init()
hw/riscv/sifive_u: Rename MachineClass::init()
...implify-init-realize-error_propagate.cocci | 69 ++++++++++
include/hw/arm/msf2-soc.h | 4 +
include/hw/arm/stm32f205_soc.h | 4 +
include/hw/riscv/sifive_u.h | 2 +
block/replication.c | 4 +-
block/vhdx.c | 8 +-
dump/dump.c | 2 +-
hw/arm/allwinner-a10.c | 26 ++--
hw/arm/aspeed_ast2600.c | 61 +++++----
hw/arm/aspeed_soc.c | 19 +--
hw/arm/fsl-imx31.c | 4 +-
hw/arm/fsl-imx6.c | 55 ++++----
hw/arm/msf2-soc.c | 18 +--
hw/arm/stm32f205_soc.c | 28 ++--
hw/arm/xlnx-zynqmp.c | 126 +++++++++---------
hw/microblaze/xlnx-zynqmp-pmu.c | 46 +++----
hw/net/virtio-net.c | 2 +-
hw/pci-host/pnv_phb3.c | 8 +-
hw/riscv/sifive_e.c | 26 ++--
hw/riscv/sifive_u.c | 66 +++++----
hw/scsi/scsi-disk.c | 2 +-
hw/sd/sdhci.c | 2 +-
target/i386/cpu.c | 18 +--
target/microblaze/cpu.c | 14 +-
target/ppc/translate_init.inc.c | 4 +-
MAINTAINERS | 1 +
26 files changed, 342 insertions(+), 277 deletions(-)
create mode 100644 scripts/coccinelle/simplify-init-realize-error_propagate.=
cocci
--=20
2.21.1
^ permalink raw reply [flat|nested] 98+ messages in thread* [PATCH-for-5.1 v3 01/24] various: Remove suspicious '\' character outside of #define in C code
2020-04-12 22:35 ` Philippe Mathieu-Daudé
@ 2020-04-12 22:35 ` Philippe Mathieu-Daudé
-1 siblings, 0 replies; 98+ messages in thread
From: Philippe Mathieu-Daudé @ 2020-04-12 22:35 UTC (permalink / raw)
To: qemu-devel
Cc: Fam Zheng, Peter Maydell, Sagar Karandikar, Michael S. Tsirkin,
Jeff Cody, Jason Wang, Alistair Francis, Edgar E. Iglesias,
Subbaraya Sundeep, qemu-block, Markus Armbruster, Max Reitz,
Joel Stanley, Marc-André Lureau, Richard Henderson,
Philippe Mathieu-Daudé,
Eduardo Habkost, Xie Changlong, Alistair Francis,
Beniamino Galvani, qemu-arm, Peter Chubb, Cédric Le Goater,
Palmer Dabbelt, David Gibson, Kevin Wolf, qemu-riscv,
Andrew Jeffery, Wen Congyang, Philippe Mathieu-Daudé,
Jean-Christophe Dubois, qemu-ppc, Bastian Koppelmann,
Paolo Bonzini
Fixes the following coccinelle warnings:
$ spatch --sp-file --verbose-parsing ... \
scripts/coccinelle/remove_local_err.cocci
...
SUSPICIOUS: a \ character appears outside of a #define at ./target/ppc/translate_init.inc.c:5213
SUSPICIOUS: a \ character appears outside of a #define at ./target/ppc/translate_init.inc.c:5261
SUSPICIOUS: a \ character appears outside of a #define at ./target/microblaze/cpu.c:166
SUSPICIOUS: a \ character appears outside of a #define at ./target/microblaze/cpu.c:167
SUSPICIOUS: a \ character appears outside of a #define at ./target/microblaze/cpu.c:169
SUSPICIOUS: a \ character appears outside of a #define at ./target/microblaze/cpu.c:170
SUSPICIOUS: a \ character appears outside of a #define at ./target/microblaze/cpu.c:171
SUSPICIOUS: a \ character appears outside of a #define at ./target/microblaze/cpu.c:172
SUSPICIOUS: a \ character appears outside of a #define at ./target/microblaze/cpu.c:173
SUSPICIOUS: a \ character appears outside of a #define at ./target/i386/cpu.c:5787
SUSPICIOUS: a \ character appears outside of a #define at ./target/i386/cpu.c:5789
SUSPICIOUS: a \ character appears outside of a #define at ./target/i386/cpu.c:5800
SUSPICIOUS: a \ character appears outside of a #define at ./target/i386/cpu.c:5801
SUSPICIOUS: a \ character appears outside of a #define at ./target/i386/cpu.c:5802
SUSPICIOUS: a \ character appears outside of a #define at ./target/i386/cpu.c:5804
SUSPICIOUS: a \ character appears outside of a #define at ./target/i386/cpu.c:5805
SUSPICIOUS: a \ character appears outside of a #define at ./target/i386/cpu.c:5806
SUSPICIOUS: a \ character appears outside of a #define at ./target/i386/cpu.c:6329
SUSPICIOUS: a \ character appears outside of a #define at ./hw/sd/sdhci.c:1133
SUSPICIOUS: a \ character appears outside of a #define at ./hw/scsi/scsi-disk.c:3081
SUSPICIOUS: a \ character appears outside of a #define at ./hw/net/virtio-net.c:1529
SUSPICIOUS: a \ character appears outside of a #define at ./hw/riscv/sifive_u.c:468
SUSPICIOUS: a \ character appears outside of a #define at ./dump/dump.c:1895
SUSPICIOUS: a \ character appears outside of a #define at ./block/vhdx.c:2209
SUSPICIOUS: a \ character appears outside of a #define at ./block/vhdx.c:2215
SUSPICIOUS: a \ character appears outside of a #define at ./block/vhdx.c:2221
SUSPICIOUS: a \ character appears outside of a #define at ./block/vhdx.c:2222
SUSPICIOUS: a \ character appears outside of a #define at ./block/replication.c:172
SUSPICIOUS: a \ character appears outside of a #define at ./block/replication.c:173
Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
block/replication.c | 4 ++--
block/vhdx.c | 8 ++++----
dump/dump.c | 2 +-
hw/net/virtio-net.c | 2 +-
hw/riscv/sifive_u.c | 2 +-
hw/scsi/scsi-disk.c | 2 +-
hw/sd/sdhci.c | 2 +-
target/i386/cpu.c | 18 +++++++++---------
target/microblaze/cpu.c | 14 +++++++-------
target/ppc/translate_init.inc.c | 4 ++--
10 files changed, 29 insertions(+), 29 deletions(-)
diff --git a/block/replication.c b/block/replication.c
index da013c2041..971f0fe266 100644
--- a/block/replication.c
+++ b/block/replication.c
@@ -172,8 +172,8 @@ static void replication_child_perm(BlockDriverState *bs, BdrvChild *c,
if ((bs->open_flags & (BDRV_O_INACTIVE | BDRV_O_RDWR)) == BDRV_O_RDWR) {
*nperm |= BLK_PERM_WRITE;
}
- *nshared = BLK_PERM_CONSISTENT_READ \
- | BLK_PERM_WRITE \
+ *nshared = BLK_PERM_CONSISTENT_READ
+ | BLK_PERM_WRITE
| BLK_PERM_WRITE_UNCHANGED;
return;
}
diff --git a/block/vhdx.c b/block/vhdx.c
index 33e57cd656..e16fdc2f2d 100644
--- a/block/vhdx.c
+++ b/block/vhdx.c
@@ -2206,20 +2206,20 @@ static QemuOptsList vhdx_create_opts = {
.name = VHDX_BLOCK_OPT_BLOCK_SIZE,
.type = QEMU_OPT_SIZE,
.def_value_str = stringify(0),
- .help = "Block Size; min 1MB, max 256MB. " \
+ .help = "Block Size; min 1MB, max 256MB. "
"0 means auto-calculate based on image size."
},
{
.name = BLOCK_OPT_SUBFMT,
.type = QEMU_OPT_STRING,
- .help = "VHDX format type, can be either 'dynamic' or 'fixed'. "\
+ .help = "VHDX format type, can be either 'dynamic' or 'fixed'. "
"Default is 'dynamic'."
},
{
.name = VHDX_BLOCK_OPT_ZERO,
.type = QEMU_OPT_BOOL,
- .help = "Force use of payload blocks of type 'ZERO'. "\
- "Non-standard, but default. Do not set to 'off' when "\
+ .help = "Force use of payload blocks of type 'ZERO'. "
+ "Non-standard, but default. Do not set to 'off' when "
"using 'qemu-img convert' with subformat=dynamic."
},
{ NULL }
diff --git a/dump/dump.c b/dump/dump.c
index 22ed1d3b0d..248ea06370 100644
--- a/dump/dump.c
+++ b/dump/dump.c
@@ -1892,7 +1892,7 @@ static void dump_process(DumpState *s, Error **errp)
result = qmp_query_dump(NULL);
/* should never fail */
assert(result);
- qapi_event_send_dump_completed(result, !!local_err, (local_err ? \
+ qapi_event_send_dump_completed(result, !!local_err, (local_err ?
error_get_pretty(local_err) : NULL));
qapi_free_DumpQueryResult(result);
diff --git a/hw/net/virtio-net.c b/hw/net/virtio-net.c
index a46e3b37a7..eddfa7f923 100644
--- a/hw/net/virtio-net.c
+++ b/hw/net/virtio-net.c
@@ -1526,7 +1526,7 @@ static void virtio_net_rsc_extract_unit6(VirtioNetRscChain *chain,
+ sizeof(struct eth_header));
unit->ip = ip6;
unit->ip_plen = &(ip6->ip6_ctlun.ip6_un1.ip6_un1_plen);
- unit->tcp = (struct tcp_header *)(((uint8_t *)unit->ip)\
+ unit->tcp = (struct tcp_header *)(((uint8_t *)unit->ip)
+ sizeof(struct ip6_header));
unit->tcp_hdrlen = (htons(unit->tcp->th_offset_flags) & 0xF000) >> 10;
diff --git a/hw/riscv/sifive_u.c b/hw/riscv/sifive_u.c
index 56351c4faa..998666c91f 100644
--- a/hw/riscv/sifive_u.c
+++ b/hw/riscv/sifive_u.c
@@ -465,7 +465,7 @@ static void riscv_sifive_u_machine_instance_init(Object *obj)
object_property_add_bool(obj, "start-in-flash", sifive_u_get_start_in_flash,
sifive_u_set_start_in_flash, NULL);
object_property_set_description(obj, "start-in-flash",
- "Set on to tell QEMU's ROM to jump to " \
+ "Set on to tell QEMU's ROM to jump to "
"flash. Otherwise QEMU will jump to DRAM",
NULL);
}
diff --git a/hw/scsi/scsi-disk.c b/hw/scsi/scsi-disk.c
index 1c0cb63a6f..e5bcd0baf8 100644
--- a/hw/scsi/scsi-disk.c
+++ b/hw/scsi/scsi-disk.c
@@ -3078,7 +3078,7 @@ static const TypeInfo scsi_cd_info = {
#ifdef __linux__
static Property scsi_block_properties[] = {
- DEFINE_BLOCK_ERROR_PROPERTIES(SCSIDiskState, qdev.conf), \
+ DEFINE_BLOCK_ERROR_PROPERTIES(SCSIDiskState, qdev.conf),
DEFINE_PROP_DRIVE("drive", SCSIDiskState, qdev.conf.blk),
DEFINE_PROP_BOOL("share-rw", SCSIDiskState, qdev.conf.share_rw, false),
DEFINE_PROP_UINT16("rotation_rate", SCSIDiskState, rotation_rate, 0),
diff --git a/hw/sd/sdhci.c b/hw/sd/sdhci.c
index de63ffb037..70531ad360 100644
--- a/hw/sd/sdhci.c
+++ b/hw/sd/sdhci.c
@@ -1130,7 +1130,7 @@ sdhci_write(void *opaque, hwaddr offset, uint64_t val, unsigned size)
/* Limit block size to the maximum buffer size */
if (extract32(s->blksize, 0, 12) > s->buf_maxsz) {
- qemu_log_mask(LOG_GUEST_ERROR, "%s: Size 0x%x is larger than " \
+ qemu_log_mask(LOG_GUEST_ERROR, "%s: Size 0x%x is larger than "
"the maximum buffer 0x%x", __func__, s->blksize,
s->buf_maxsz);
diff --git a/target/i386/cpu.c b/target/i386/cpu.c
index 90ffc5f3b1..9c256ab159 100644
--- a/target/i386/cpu.c
+++ b/target/i386/cpu.c
@@ -5784,9 +5784,9 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index, uint32_t count,
host_cpuid(index, 0, eax, ebx, ecx, edx);
break;
}
- *eax = (L1_DTLB_2M_ASSOC << 24) | (L1_DTLB_2M_ENTRIES << 16) | \
+ *eax = (L1_DTLB_2M_ASSOC << 24) | (L1_DTLB_2M_ENTRIES << 16) |
(L1_ITLB_2M_ASSOC << 8) | (L1_ITLB_2M_ENTRIES);
- *ebx = (L1_DTLB_4K_ASSOC << 24) | (L1_DTLB_4K_ENTRIES << 16) | \
+ *ebx = (L1_DTLB_4K_ASSOC << 24) | (L1_DTLB_4K_ENTRIES << 16) |
(L1_ITLB_4K_ASSOC << 8) | (L1_ITLB_4K_ENTRIES);
*ecx = encode_cache_cpuid80000005(env->cache_info_amd.l1d_cache);
*edx = encode_cache_cpuid80000005(env->cache_info_amd.l1i_cache);
@@ -5797,13 +5797,13 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index, uint32_t count,
host_cpuid(index, 0, eax, ebx, ecx, edx);
break;
}
- *eax = (AMD_ENC_ASSOC(L2_DTLB_2M_ASSOC) << 28) | \
- (L2_DTLB_2M_ENTRIES << 16) | \
- (AMD_ENC_ASSOC(L2_ITLB_2M_ASSOC) << 12) | \
+ *eax = (AMD_ENC_ASSOC(L2_DTLB_2M_ASSOC) << 28) |
+ (L2_DTLB_2M_ENTRIES << 16) |
+ (AMD_ENC_ASSOC(L2_ITLB_2M_ASSOC) << 12) |
(L2_ITLB_2M_ENTRIES);
- *ebx = (AMD_ENC_ASSOC(L2_DTLB_4K_ASSOC) << 28) | \
- (L2_DTLB_4K_ENTRIES << 16) | \
- (AMD_ENC_ASSOC(L2_ITLB_4K_ASSOC) << 12) | \
+ *ebx = (AMD_ENC_ASSOC(L2_DTLB_4K_ASSOC) << 28) |
+ (L2_DTLB_4K_ENTRIES << 16) |
+ (AMD_ENC_ASSOC(L2_ITLB_4K_ASSOC) << 12) |
(L2_ITLB_4K_ENTRIES);
encode_cache_cpuid80000006(env->cache_info_amd.l2_cache,
cpu->enable_l3_cache ?
@@ -6326,7 +6326,7 @@ static void x86_cpu_expand_features(X86CPU *cpu, Error **errp)
*/
env->features[w] |=
x86_cpu_get_supported_feature_word(w, cpu->migratable) &
- ~env->user_features[w] & \
+ ~env->user_features[w] &
~feature_word_info[w].no_autoenable_flags;
}
}
diff --git a/target/microblaze/cpu.c b/target/microblaze/cpu.c
index a2c2f271df..c9cf2364ca 100644
--- a/target/microblaze/cpu.c
+++ b/target/microblaze/cpu.c
@@ -163,14 +163,14 @@ static void mb_cpu_realizefn(DeviceState *dev, Error **errp)
qemu_init_vcpu(cs);
- env->pvr.regs[0] = PVR0_USE_EXC_MASK \
- | PVR0_USE_ICACHE_MASK \
+ env->pvr.regs[0] = PVR0_USE_EXC_MASK
+ | PVR0_USE_ICACHE_MASK
| PVR0_USE_DCACHE_MASK;
- env->pvr.regs[2] = PVR2_D_OPB_MASK \
- | PVR2_D_LMB_MASK \
- | PVR2_I_OPB_MASK \
- | PVR2_I_LMB_MASK \
- | PVR2_FPU_EXC_MASK \
+ env->pvr.regs[2] = PVR2_D_OPB_MASK
+ | PVR2_D_LMB_MASK
+ | PVR2_I_OPB_MASK
+ | PVR2_I_LMB_MASK
+ | PVR2_FPU_EXC_MASK
| 0;
version = cpu->cfg.version ? cpu->cfg.version : DEFAULT_CPU_VERSION;
diff --git a/target/ppc/translate_init.inc.c b/target/ppc/translate_init.inc.c
index e853164a86..fd763e588e 100644
--- a/target/ppc/translate_init.inc.c
+++ b/target/ppc/translate_init.inc.c
@@ -5210,7 +5210,7 @@ POWERPC_FAMILY(e5500)(ObjectClass *oc, void *data)
PPC_FLOAT_STFIWX | PPC_WAIT |
PPC_MEM_TLBSYNC | PPC_TLBIVAX | PPC_MEM_SYNC |
PPC_64B | PPC_POPCNTB | PPC_POPCNTWD;
- pcc->insns_flags2 = PPC2_BOOKE206 | PPC2_PRCNTL | PPC2_PERM_ISA206 | \
+ pcc->insns_flags2 = PPC2_BOOKE206 | PPC2_PRCNTL | PPC2_PERM_ISA206 |
PPC2_FP_CVT_S64;
pcc->msr_mask = (1ull << MSR_CM) |
(1ull << MSR_GS) |
@@ -5258,7 +5258,7 @@ POWERPC_FAMILY(e6500)(ObjectClass *oc, void *data)
PPC_FLOAT_STFIWX | PPC_WAIT |
PPC_MEM_TLBSYNC | PPC_TLBIVAX | PPC_MEM_SYNC |
PPC_64B | PPC_POPCNTB | PPC_POPCNTWD | PPC_ALTIVEC;
- pcc->insns_flags2 = PPC2_BOOKE206 | PPC2_PRCNTL | PPC2_PERM_ISA206 | \
+ pcc->insns_flags2 = PPC2_BOOKE206 | PPC2_PRCNTL | PPC2_PERM_ISA206 |
PPC2_FP_CVT_S64 | PPC2_ATOMIC_ISA206;
pcc->msr_mask = (1ull << MSR_CM) |
(1ull << MSR_GS) |
--
2.21.1
^ permalink raw reply related [flat|nested] 98+ messages in thread* [PATCH-for-5.1 v3 01/24] various: Remove suspicious '\' character outside of #define in C code
@ 2020-04-12 22:35 ` Philippe Mathieu-Daudé
0 siblings, 0 replies; 98+ messages in thread
From: Philippe Mathieu-Daudé @ 2020-04-12 22:35 UTC (permalink / raw)
To: qemu-devel
Cc: Joel Stanley, Jean-Christophe Dubois, Subbaraya Sundeep,
Max Reitz, Palmer Dabbelt, qemu-ppc, Sagar Karandikar,
Markus Armbruster, Jeff Cody, Peter Maydell, Xie Changlong,
Fam Zheng, Eduardo Habkost, Alistair Francis, qemu-arm,
Wen Congyang, Philippe Mathieu-Daudé,
Bastian Koppelmann, Edgar E. Iglesias, Kevin Wolf,
Marc-André Lureau, David Gibson, Jason Wang, Peter Chubb,
Beniamino Galvani, Alistair Francis, qemu-riscv,
Cédric Le Goater, qemu-block, Paolo Bonzini, Andrew Jeffery,
Michael S. Tsirkin, Richard Henderson,
Philippe Mathieu-Daudé
Fixes the following coccinelle warnings:
$ spatch --sp-file --verbose-parsing ... \
scripts/coccinelle/remove_local_err.cocci
...
SUSPICIOUS: a \ character appears outside of a #define at ./target/ppc/translate_init.inc.c:5213
SUSPICIOUS: a \ character appears outside of a #define at ./target/ppc/translate_init.inc.c:5261
SUSPICIOUS: a \ character appears outside of a #define at ./target/microblaze/cpu.c:166
SUSPICIOUS: a \ character appears outside of a #define at ./target/microblaze/cpu.c:167
SUSPICIOUS: a \ character appears outside of a #define at ./target/microblaze/cpu.c:169
SUSPICIOUS: a \ character appears outside of a #define at ./target/microblaze/cpu.c:170
SUSPICIOUS: a \ character appears outside of a #define at ./target/microblaze/cpu.c:171
SUSPICIOUS: a \ character appears outside of a #define at ./target/microblaze/cpu.c:172
SUSPICIOUS: a \ character appears outside of a #define at ./target/microblaze/cpu.c:173
SUSPICIOUS: a \ character appears outside of a #define at ./target/i386/cpu.c:5787
SUSPICIOUS: a \ character appears outside of a #define at ./target/i386/cpu.c:5789
SUSPICIOUS: a \ character appears outside of a #define at ./target/i386/cpu.c:5800
SUSPICIOUS: a \ character appears outside of a #define at ./target/i386/cpu.c:5801
SUSPICIOUS: a \ character appears outside of a #define at ./target/i386/cpu.c:5802
SUSPICIOUS: a \ character appears outside of a #define at ./target/i386/cpu.c:5804
SUSPICIOUS: a \ character appears outside of a #define at ./target/i386/cpu.c:5805
SUSPICIOUS: a \ character appears outside of a #define at ./target/i386/cpu.c:5806
SUSPICIOUS: a \ character appears outside of a #define at ./target/i386/cpu.c:6329
SUSPICIOUS: a \ character appears outside of a #define at ./hw/sd/sdhci.c:1133
SUSPICIOUS: a \ character appears outside of a #define at ./hw/scsi/scsi-disk.c:3081
SUSPICIOUS: a \ character appears outside of a #define at ./hw/net/virtio-net.c:1529
SUSPICIOUS: a \ character appears outside of a #define at ./hw/riscv/sifive_u.c:468
SUSPICIOUS: a \ character appears outside of a #define at ./dump/dump.c:1895
SUSPICIOUS: a \ character appears outside of a #define at ./block/vhdx.c:2209
SUSPICIOUS: a \ character appears outside of a #define at ./block/vhdx.c:2215
SUSPICIOUS: a \ character appears outside of a #define at ./block/vhdx.c:2221
SUSPICIOUS: a \ character appears outside of a #define at ./block/vhdx.c:2222
SUSPICIOUS: a \ character appears outside of a #define at ./block/replication.c:172
SUSPICIOUS: a \ character appears outside of a #define at ./block/replication.c:173
Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
block/replication.c | 4 ++--
block/vhdx.c | 8 ++++----
dump/dump.c | 2 +-
hw/net/virtio-net.c | 2 +-
hw/riscv/sifive_u.c | 2 +-
hw/scsi/scsi-disk.c | 2 +-
hw/sd/sdhci.c | 2 +-
target/i386/cpu.c | 18 +++++++++---------
target/microblaze/cpu.c | 14 +++++++-------
target/ppc/translate_init.inc.c | 4 ++--
10 files changed, 29 insertions(+), 29 deletions(-)
diff --git a/block/replication.c b/block/replication.c
index da013c2041..971f0fe266 100644
--- a/block/replication.c
+++ b/block/replication.c
@@ -172,8 +172,8 @@ static void replication_child_perm(BlockDriverState *bs, BdrvChild *c,
if ((bs->open_flags & (BDRV_O_INACTIVE | BDRV_O_RDWR)) == BDRV_O_RDWR) {
*nperm |= BLK_PERM_WRITE;
}
- *nshared = BLK_PERM_CONSISTENT_READ \
- | BLK_PERM_WRITE \
+ *nshared = BLK_PERM_CONSISTENT_READ
+ | BLK_PERM_WRITE
| BLK_PERM_WRITE_UNCHANGED;
return;
}
diff --git a/block/vhdx.c b/block/vhdx.c
index 33e57cd656..e16fdc2f2d 100644
--- a/block/vhdx.c
+++ b/block/vhdx.c
@@ -2206,20 +2206,20 @@ static QemuOptsList vhdx_create_opts = {
.name = VHDX_BLOCK_OPT_BLOCK_SIZE,
.type = QEMU_OPT_SIZE,
.def_value_str = stringify(0),
- .help = "Block Size; min 1MB, max 256MB. " \
+ .help = "Block Size; min 1MB, max 256MB. "
"0 means auto-calculate based on image size."
},
{
.name = BLOCK_OPT_SUBFMT,
.type = QEMU_OPT_STRING,
- .help = "VHDX format type, can be either 'dynamic' or 'fixed'. "\
+ .help = "VHDX format type, can be either 'dynamic' or 'fixed'. "
"Default is 'dynamic'."
},
{
.name = VHDX_BLOCK_OPT_ZERO,
.type = QEMU_OPT_BOOL,
- .help = "Force use of payload blocks of type 'ZERO'. "\
- "Non-standard, but default. Do not set to 'off' when "\
+ .help = "Force use of payload blocks of type 'ZERO'. "
+ "Non-standard, but default. Do not set to 'off' when "
"using 'qemu-img convert' with subformat=dynamic."
},
{ NULL }
diff --git a/dump/dump.c b/dump/dump.c
index 22ed1d3b0d..248ea06370 100644
--- a/dump/dump.c
+++ b/dump/dump.c
@@ -1892,7 +1892,7 @@ static void dump_process(DumpState *s, Error **errp)
result = qmp_query_dump(NULL);
/* should never fail */
assert(result);
- qapi_event_send_dump_completed(result, !!local_err, (local_err ? \
+ qapi_event_send_dump_completed(result, !!local_err, (local_err ?
error_get_pretty(local_err) : NULL));
qapi_free_DumpQueryResult(result);
diff --git a/hw/net/virtio-net.c b/hw/net/virtio-net.c
index a46e3b37a7..eddfa7f923 100644
--- a/hw/net/virtio-net.c
+++ b/hw/net/virtio-net.c
@@ -1526,7 +1526,7 @@ static void virtio_net_rsc_extract_unit6(VirtioNetRscChain *chain,
+ sizeof(struct eth_header));
unit->ip = ip6;
unit->ip_plen = &(ip6->ip6_ctlun.ip6_un1.ip6_un1_plen);
- unit->tcp = (struct tcp_header *)(((uint8_t *)unit->ip)\
+ unit->tcp = (struct tcp_header *)(((uint8_t *)unit->ip)
+ sizeof(struct ip6_header));
unit->tcp_hdrlen = (htons(unit->tcp->th_offset_flags) & 0xF000) >> 10;
diff --git a/hw/riscv/sifive_u.c b/hw/riscv/sifive_u.c
index 56351c4faa..998666c91f 100644
--- a/hw/riscv/sifive_u.c
+++ b/hw/riscv/sifive_u.c
@@ -465,7 +465,7 @@ static void riscv_sifive_u_machine_instance_init(Object *obj)
object_property_add_bool(obj, "start-in-flash", sifive_u_get_start_in_flash,
sifive_u_set_start_in_flash, NULL);
object_property_set_description(obj, "start-in-flash",
- "Set on to tell QEMU's ROM to jump to " \
+ "Set on to tell QEMU's ROM to jump to "
"flash. Otherwise QEMU will jump to DRAM",
NULL);
}
diff --git a/hw/scsi/scsi-disk.c b/hw/scsi/scsi-disk.c
index 1c0cb63a6f..e5bcd0baf8 100644
--- a/hw/scsi/scsi-disk.c
+++ b/hw/scsi/scsi-disk.c
@@ -3078,7 +3078,7 @@ static const TypeInfo scsi_cd_info = {
#ifdef __linux__
static Property scsi_block_properties[] = {
- DEFINE_BLOCK_ERROR_PROPERTIES(SCSIDiskState, qdev.conf), \
+ DEFINE_BLOCK_ERROR_PROPERTIES(SCSIDiskState, qdev.conf),
DEFINE_PROP_DRIVE("drive", SCSIDiskState, qdev.conf.blk),
DEFINE_PROP_BOOL("share-rw", SCSIDiskState, qdev.conf.share_rw, false),
DEFINE_PROP_UINT16("rotation_rate", SCSIDiskState, rotation_rate, 0),
diff --git a/hw/sd/sdhci.c b/hw/sd/sdhci.c
index de63ffb037..70531ad360 100644
--- a/hw/sd/sdhci.c
+++ b/hw/sd/sdhci.c
@@ -1130,7 +1130,7 @@ sdhci_write(void *opaque, hwaddr offset, uint64_t val, unsigned size)
/* Limit block size to the maximum buffer size */
if (extract32(s->blksize, 0, 12) > s->buf_maxsz) {
- qemu_log_mask(LOG_GUEST_ERROR, "%s: Size 0x%x is larger than " \
+ qemu_log_mask(LOG_GUEST_ERROR, "%s: Size 0x%x is larger than "
"the maximum buffer 0x%x", __func__, s->blksize,
s->buf_maxsz);
diff --git a/target/i386/cpu.c b/target/i386/cpu.c
index 90ffc5f3b1..9c256ab159 100644
--- a/target/i386/cpu.c
+++ b/target/i386/cpu.c
@@ -5784,9 +5784,9 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index, uint32_t count,
host_cpuid(index, 0, eax, ebx, ecx, edx);
break;
}
- *eax = (L1_DTLB_2M_ASSOC << 24) | (L1_DTLB_2M_ENTRIES << 16) | \
+ *eax = (L1_DTLB_2M_ASSOC << 24) | (L1_DTLB_2M_ENTRIES << 16) |
(L1_ITLB_2M_ASSOC << 8) | (L1_ITLB_2M_ENTRIES);
- *ebx = (L1_DTLB_4K_ASSOC << 24) | (L1_DTLB_4K_ENTRIES << 16) | \
+ *ebx = (L1_DTLB_4K_ASSOC << 24) | (L1_DTLB_4K_ENTRIES << 16) |
(L1_ITLB_4K_ASSOC << 8) | (L1_ITLB_4K_ENTRIES);
*ecx = encode_cache_cpuid80000005(env->cache_info_amd.l1d_cache);
*edx = encode_cache_cpuid80000005(env->cache_info_amd.l1i_cache);
@@ -5797,13 +5797,13 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index, uint32_t count,
host_cpuid(index, 0, eax, ebx, ecx, edx);
break;
}
- *eax = (AMD_ENC_ASSOC(L2_DTLB_2M_ASSOC) << 28) | \
- (L2_DTLB_2M_ENTRIES << 16) | \
- (AMD_ENC_ASSOC(L2_ITLB_2M_ASSOC) << 12) | \
+ *eax = (AMD_ENC_ASSOC(L2_DTLB_2M_ASSOC) << 28) |
+ (L2_DTLB_2M_ENTRIES << 16) |
+ (AMD_ENC_ASSOC(L2_ITLB_2M_ASSOC) << 12) |
(L2_ITLB_2M_ENTRIES);
- *ebx = (AMD_ENC_ASSOC(L2_DTLB_4K_ASSOC) << 28) | \
- (L2_DTLB_4K_ENTRIES << 16) | \
- (AMD_ENC_ASSOC(L2_ITLB_4K_ASSOC) << 12) | \
+ *ebx = (AMD_ENC_ASSOC(L2_DTLB_4K_ASSOC) << 28) |
+ (L2_DTLB_4K_ENTRIES << 16) |
+ (AMD_ENC_ASSOC(L2_ITLB_4K_ASSOC) << 12) |
(L2_ITLB_4K_ENTRIES);
encode_cache_cpuid80000006(env->cache_info_amd.l2_cache,
cpu->enable_l3_cache ?
@@ -6326,7 +6326,7 @@ static void x86_cpu_expand_features(X86CPU *cpu, Error **errp)
*/
env->features[w] |=
x86_cpu_get_supported_feature_word(w, cpu->migratable) &
- ~env->user_features[w] & \
+ ~env->user_features[w] &
~feature_word_info[w].no_autoenable_flags;
}
}
diff --git a/target/microblaze/cpu.c b/target/microblaze/cpu.c
index a2c2f271df..c9cf2364ca 100644
--- a/target/microblaze/cpu.c
+++ b/target/microblaze/cpu.c
@@ -163,14 +163,14 @@ static void mb_cpu_realizefn(DeviceState *dev, Error **errp)
qemu_init_vcpu(cs);
- env->pvr.regs[0] = PVR0_USE_EXC_MASK \
- | PVR0_USE_ICACHE_MASK \
+ env->pvr.regs[0] = PVR0_USE_EXC_MASK
+ | PVR0_USE_ICACHE_MASK
| PVR0_USE_DCACHE_MASK;
- env->pvr.regs[2] = PVR2_D_OPB_MASK \
- | PVR2_D_LMB_MASK \
- | PVR2_I_OPB_MASK \
- | PVR2_I_LMB_MASK \
- | PVR2_FPU_EXC_MASK \
+ env->pvr.regs[2] = PVR2_D_OPB_MASK
+ | PVR2_D_LMB_MASK
+ | PVR2_I_OPB_MASK
+ | PVR2_I_LMB_MASK
+ | PVR2_FPU_EXC_MASK
| 0;
version = cpu->cfg.version ? cpu->cfg.version : DEFAULT_CPU_VERSION;
diff --git a/target/ppc/translate_init.inc.c b/target/ppc/translate_init.inc.c
index e853164a86..fd763e588e 100644
--- a/target/ppc/translate_init.inc.c
+++ b/target/ppc/translate_init.inc.c
@@ -5210,7 +5210,7 @@ POWERPC_FAMILY(e5500)(ObjectClass *oc, void *data)
PPC_FLOAT_STFIWX | PPC_WAIT |
PPC_MEM_TLBSYNC | PPC_TLBIVAX | PPC_MEM_SYNC |
PPC_64B | PPC_POPCNTB | PPC_POPCNTWD;
- pcc->insns_flags2 = PPC2_BOOKE206 | PPC2_PRCNTL | PPC2_PERM_ISA206 | \
+ pcc->insns_flags2 = PPC2_BOOKE206 | PPC2_PRCNTL | PPC2_PERM_ISA206 |
PPC2_FP_CVT_S64;
pcc->msr_mask = (1ull << MSR_CM) |
(1ull << MSR_GS) |
@@ -5258,7 +5258,7 @@ POWERPC_FAMILY(e6500)(ObjectClass *oc, void *data)
PPC_FLOAT_STFIWX | PPC_WAIT |
PPC_MEM_TLBSYNC | PPC_TLBIVAX | PPC_MEM_SYNC |
PPC_64B | PPC_POPCNTB | PPC_POPCNTWD | PPC_ALTIVEC;
- pcc->insns_flags2 = PPC2_BOOKE206 | PPC2_PRCNTL | PPC2_PERM_ISA206 | \
+ pcc->insns_flags2 = PPC2_BOOKE206 | PPC2_PRCNTL | PPC2_PERM_ISA206 |
PPC2_FP_CVT_S64 | PPC2_ATOMIC_ISA206;
pcc->msr_mask = (1ull << MSR_CM) |
(1ull << MSR_GS) |
--
2.21.1
^ permalink raw reply related [flat|nested] 98+ messages in thread* Re: [PATCH-for-5.1 v3 01/24] various: Remove suspicious '\' character outside of #define in C code
2020-04-12 22:35 ` Philippe Mathieu-Daudé
@ 2020-04-13 15:56 ` Alistair Francis
-1 siblings, 0 replies; 98+ messages in thread
From: Alistair Francis @ 2020-04-13 15:56 UTC (permalink / raw)
To: Philippe Mathieu-Daudé
Cc: Fam Zheng, Peter Maydell, Sagar Karandikar, Michael S. Tsirkin,
Jeff Cody, Jason Wang, qemu-devel@nongnu.org Developers,
Alistair Francis, Edgar E. Iglesias, Max Reitz, Qemu-block,
Markus Armbruster, Joel Stanley, Marc-André Lureau,
David Gibson, Philippe Mathieu-Daudé,
Eduardo Habkost, Jean-Christophe Dubois, Xie Changlong,
Alistair Francis, Beniamino Galvani, qemu-arm, Peter Chubb,
Cédric Le Goater, open list:New World, Richard Henderson,
Kevin Wolf, open list:RISC-V, Andrew Jeffery, Wen Congyang,
Subbaraya Sundeep, Palmer Dabbelt, Bastian Koppelmann,
Paolo Bonzini
On Sun, Apr 12, 2020 at 3:38 PM Philippe Mathieu-Daudé <f4bug@amsat.org> wrote:
>
> Fixes the following coccinelle warnings:
>
> $ spatch --sp-file --verbose-parsing ... \
> scripts/coccinelle/remove_local_err.cocci
> ...
> SUSPICIOUS: a \ character appears outside of a #define at ./target/ppc/translate_init.inc.c:5213
> SUSPICIOUS: a \ character appears outside of a #define at ./target/ppc/translate_init.inc.c:5261
> SUSPICIOUS: a \ character appears outside of a #define at ./target/microblaze/cpu.c:166
> SUSPICIOUS: a \ character appears outside of a #define at ./target/microblaze/cpu.c:167
> SUSPICIOUS: a \ character appears outside of a #define at ./target/microblaze/cpu.c:169
> SUSPICIOUS: a \ character appears outside of a #define at ./target/microblaze/cpu.c:170
> SUSPICIOUS: a \ character appears outside of a #define at ./target/microblaze/cpu.c:171
> SUSPICIOUS: a \ character appears outside of a #define at ./target/microblaze/cpu.c:172
> SUSPICIOUS: a \ character appears outside of a #define at ./target/microblaze/cpu.c:173
> SUSPICIOUS: a \ character appears outside of a #define at ./target/i386/cpu.c:5787
> SUSPICIOUS: a \ character appears outside of a #define at ./target/i386/cpu.c:5789
> SUSPICIOUS: a \ character appears outside of a #define at ./target/i386/cpu.c:5800
> SUSPICIOUS: a \ character appears outside of a #define at ./target/i386/cpu.c:5801
> SUSPICIOUS: a \ character appears outside of a #define at ./target/i386/cpu.c:5802
> SUSPICIOUS: a \ character appears outside of a #define at ./target/i386/cpu.c:5804
> SUSPICIOUS: a \ character appears outside of a #define at ./target/i386/cpu.c:5805
> SUSPICIOUS: a \ character appears outside of a #define at ./target/i386/cpu.c:5806
> SUSPICIOUS: a \ character appears outside of a #define at ./target/i386/cpu.c:6329
> SUSPICIOUS: a \ character appears outside of a #define at ./hw/sd/sdhci.c:1133
> SUSPICIOUS: a \ character appears outside of a #define at ./hw/scsi/scsi-disk.c:3081
> SUSPICIOUS: a \ character appears outside of a #define at ./hw/net/virtio-net.c:1529
> SUSPICIOUS: a \ character appears outside of a #define at ./hw/riscv/sifive_u.c:468
> SUSPICIOUS: a \ character appears outside of a #define at ./dump/dump.c:1895
> SUSPICIOUS: a \ character appears outside of a #define at ./block/vhdx.c:2209
> SUSPICIOUS: a \ character appears outside of a #define at ./block/vhdx.c:2215
> SUSPICIOUS: a \ character appears outside of a #define at ./block/vhdx.c:2221
> SUSPICIOUS: a \ character appears outside of a #define at ./block/vhdx.c:2222
> SUSPICIOUS: a \ character appears outside of a #define at ./block/replication.c:172
> SUSPICIOUS: a \ character appears outside of a #define at ./block/replication.c:173
>
> Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com>
> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Alistair
> ---
> block/replication.c | 4 ++--
> block/vhdx.c | 8 ++++----
> dump/dump.c | 2 +-
> hw/net/virtio-net.c | 2 +-
> hw/riscv/sifive_u.c | 2 +-
> hw/scsi/scsi-disk.c | 2 +-
> hw/sd/sdhci.c | 2 +-
> target/i386/cpu.c | 18 +++++++++---------
> target/microblaze/cpu.c | 14 +++++++-------
> target/ppc/translate_init.inc.c | 4 ++--
> 10 files changed, 29 insertions(+), 29 deletions(-)
>
> diff --git a/block/replication.c b/block/replication.c
> index da013c2041..971f0fe266 100644
> --- a/block/replication.c
> +++ b/block/replication.c
> @@ -172,8 +172,8 @@ static void replication_child_perm(BlockDriverState *bs, BdrvChild *c,
> if ((bs->open_flags & (BDRV_O_INACTIVE | BDRV_O_RDWR)) == BDRV_O_RDWR) {
> *nperm |= BLK_PERM_WRITE;
> }
> - *nshared = BLK_PERM_CONSISTENT_READ \
> - | BLK_PERM_WRITE \
> + *nshared = BLK_PERM_CONSISTENT_READ
> + | BLK_PERM_WRITE
> | BLK_PERM_WRITE_UNCHANGED;
> return;
> }
> diff --git a/block/vhdx.c b/block/vhdx.c
> index 33e57cd656..e16fdc2f2d 100644
> --- a/block/vhdx.c
> +++ b/block/vhdx.c
> @@ -2206,20 +2206,20 @@ static QemuOptsList vhdx_create_opts = {
> .name = VHDX_BLOCK_OPT_BLOCK_SIZE,
> .type = QEMU_OPT_SIZE,
> .def_value_str = stringify(0),
> - .help = "Block Size; min 1MB, max 256MB. " \
> + .help = "Block Size; min 1MB, max 256MB. "
> "0 means auto-calculate based on image size."
> },
> {
> .name = BLOCK_OPT_SUBFMT,
> .type = QEMU_OPT_STRING,
> - .help = "VHDX format type, can be either 'dynamic' or 'fixed'. "\
> + .help = "VHDX format type, can be either 'dynamic' or 'fixed'. "
> "Default is 'dynamic'."
> },
> {
> .name = VHDX_BLOCK_OPT_ZERO,
> .type = QEMU_OPT_BOOL,
> - .help = "Force use of payload blocks of type 'ZERO'. "\
> - "Non-standard, but default. Do not set to 'off' when "\
> + .help = "Force use of payload blocks of type 'ZERO'. "
> + "Non-standard, but default. Do not set to 'off' when "
> "using 'qemu-img convert' with subformat=dynamic."
> },
> { NULL }
> diff --git a/dump/dump.c b/dump/dump.c
> index 22ed1d3b0d..248ea06370 100644
> --- a/dump/dump.c
> +++ b/dump/dump.c
> @@ -1892,7 +1892,7 @@ static void dump_process(DumpState *s, Error **errp)
> result = qmp_query_dump(NULL);
> /* should never fail */
> assert(result);
> - qapi_event_send_dump_completed(result, !!local_err, (local_err ? \
> + qapi_event_send_dump_completed(result, !!local_err, (local_err ?
> error_get_pretty(local_err) : NULL));
> qapi_free_DumpQueryResult(result);
>
> diff --git a/hw/net/virtio-net.c b/hw/net/virtio-net.c
> index a46e3b37a7..eddfa7f923 100644
> --- a/hw/net/virtio-net.c
> +++ b/hw/net/virtio-net.c
> @@ -1526,7 +1526,7 @@ static void virtio_net_rsc_extract_unit6(VirtioNetRscChain *chain,
> + sizeof(struct eth_header));
> unit->ip = ip6;
> unit->ip_plen = &(ip6->ip6_ctlun.ip6_un1.ip6_un1_plen);
> - unit->tcp = (struct tcp_header *)(((uint8_t *)unit->ip)\
> + unit->tcp = (struct tcp_header *)(((uint8_t *)unit->ip)
> + sizeof(struct ip6_header));
> unit->tcp_hdrlen = (htons(unit->tcp->th_offset_flags) & 0xF000) >> 10;
>
> diff --git a/hw/riscv/sifive_u.c b/hw/riscv/sifive_u.c
> index 56351c4faa..998666c91f 100644
> --- a/hw/riscv/sifive_u.c
> +++ b/hw/riscv/sifive_u.c
> @@ -465,7 +465,7 @@ static void riscv_sifive_u_machine_instance_init(Object *obj)
> object_property_add_bool(obj, "start-in-flash", sifive_u_get_start_in_flash,
> sifive_u_set_start_in_flash, NULL);
> object_property_set_description(obj, "start-in-flash",
> - "Set on to tell QEMU's ROM to jump to " \
> + "Set on to tell QEMU's ROM to jump to "
> "flash. Otherwise QEMU will jump to DRAM",
> NULL);
> }
> diff --git a/hw/scsi/scsi-disk.c b/hw/scsi/scsi-disk.c
> index 1c0cb63a6f..e5bcd0baf8 100644
> --- a/hw/scsi/scsi-disk.c
> +++ b/hw/scsi/scsi-disk.c
> @@ -3078,7 +3078,7 @@ static const TypeInfo scsi_cd_info = {
>
> #ifdef __linux__
> static Property scsi_block_properties[] = {
> - DEFINE_BLOCK_ERROR_PROPERTIES(SCSIDiskState, qdev.conf), \
> + DEFINE_BLOCK_ERROR_PROPERTIES(SCSIDiskState, qdev.conf),
> DEFINE_PROP_DRIVE("drive", SCSIDiskState, qdev.conf.blk),
> DEFINE_PROP_BOOL("share-rw", SCSIDiskState, qdev.conf.share_rw, false),
> DEFINE_PROP_UINT16("rotation_rate", SCSIDiskState, rotation_rate, 0),
> diff --git a/hw/sd/sdhci.c b/hw/sd/sdhci.c
> index de63ffb037..70531ad360 100644
> --- a/hw/sd/sdhci.c
> +++ b/hw/sd/sdhci.c
> @@ -1130,7 +1130,7 @@ sdhci_write(void *opaque, hwaddr offset, uint64_t val, unsigned size)
>
> /* Limit block size to the maximum buffer size */
> if (extract32(s->blksize, 0, 12) > s->buf_maxsz) {
> - qemu_log_mask(LOG_GUEST_ERROR, "%s: Size 0x%x is larger than " \
> + qemu_log_mask(LOG_GUEST_ERROR, "%s: Size 0x%x is larger than "
> "the maximum buffer 0x%x", __func__, s->blksize,
> s->buf_maxsz);
>
> diff --git a/target/i386/cpu.c b/target/i386/cpu.c
> index 90ffc5f3b1..9c256ab159 100644
> --- a/target/i386/cpu.c
> +++ b/target/i386/cpu.c
> @@ -5784,9 +5784,9 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index, uint32_t count,
> host_cpuid(index, 0, eax, ebx, ecx, edx);
> break;
> }
> - *eax = (L1_DTLB_2M_ASSOC << 24) | (L1_DTLB_2M_ENTRIES << 16) | \
> + *eax = (L1_DTLB_2M_ASSOC << 24) | (L1_DTLB_2M_ENTRIES << 16) |
> (L1_ITLB_2M_ASSOC << 8) | (L1_ITLB_2M_ENTRIES);
> - *ebx = (L1_DTLB_4K_ASSOC << 24) | (L1_DTLB_4K_ENTRIES << 16) | \
> + *ebx = (L1_DTLB_4K_ASSOC << 24) | (L1_DTLB_4K_ENTRIES << 16) |
> (L1_ITLB_4K_ASSOC << 8) | (L1_ITLB_4K_ENTRIES);
> *ecx = encode_cache_cpuid80000005(env->cache_info_amd.l1d_cache);
> *edx = encode_cache_cpuid80000005(env->cache_info_amd.l1i_cache);
> @@ -5797,13 +5797,13 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index, uint32_t count,
> host_cpuid(index, 0, eax, ebx, ecx, edx);
> break;
> }
> - *eax = (AMD_ENC_ASSOC(L2_DTLB_2M_ASSOC) << 28) | \
> - (L2_DTLB_2M_ENTRIES << 16) | \
> - (AMD_ENC_ASSOC(L2_ITLB_2M_ASSOC) << 12) | \
> + *eax = (AMD_ENC_ASSOC(L2_DTLB_2M_ASSOC) << 28) |
> + (L2_DTLB_2M_ENTRIES << 16) |
> + (AMD_ENC_ASSOC(L2_ITLB_2M_ASSOC) << 12) |
> (L2_ITLB_2M_ENTRIES);
> - *ebx = (AMD_ENC_ASSOC(L2_DTLB_4K_ASSOC) << 28) | \
> - (L2_DTLB_4K_ENTRIES << 16) | \
> - (AMD_ENC_ASSOC(L2_ITLB_4K_ASSOC) << 12) | \
> + *ebx = (AMD_ENC_ASSOC(L2_DTLB_4K_ASSOC) << 28) |
> + (L2_DTLB_4K_ENTRIES << 16) |
> + (AMD_ENC_ASSOC(L2_ITLB_4K_ASSOC) << 12) |
> (L2_ITLB_4K_ENTRIES);
> encode_cache_cpuid80000006(env->cache_info_amd.l2_cache,
> cpu->enable_l3_cache ?
> @@ -6326,7 +6326,7 @@ static void x86_cpu_expand_features(X86CPU *cpu, Error **errp)
> */
> env->features[w] |=
> x86_cpu_get_supported_feature_word(w, cpu->migratable) &
> - ~env->user_features[w] & \
> + ~env->user_features[w] &
> ~feature_word_info[w].no_autoenable_flags;
> }
> }
> diff --git a/target/microblaze/cpu.c b/target/microblaze/cpu.c
> index a2c2f271df..c9cf2364ca 100644
> --- a/target/microblaze/cpu.c
> +++ b/target/microblaze/cpu.c
> @@ -163,14 +163,14 @@ static void mb_cpu_realizefn(DeviceState *dev, Error **errp)
>
> qemu_init_vcpu(cs);
>
> - env->pvr.regs[0] = PVR0_USE_EXC_MASK \
> - | PVR0_USE_ICACHE_MASK \
> + env->pvr.regs[0] = PVR0_USE_EXC_MASK
> + | PVR0_USE_ICACHE_MASK
> | PVR0_USE_DCACHE_MASK;
> - env->pvr.regs[2] = PVR2_D_OPB_MASK \
> - | PVR2_D_LMB_MASK \
> - | PVR2_I_OPB_MASK \
> - | PVR2_I_LMB_MASK \
> - | PVR2_FPU_EXC_MASK \
> + env->pvr.regs[2] = PVR2_D_OPB_MASK
> + | PVR2_D_LMB_MASK
> + | PVR2_I_OPB_MASK
> + | PVR2_I_LMB_MASK
> + | PVR2_FPU_EXC_MASK
> | 0;
>
> version = cpu->cfg.version ? cpu->cfg.version : DEFAULT_CPU_VERSION;
> diff --git a/target/ppc/translate_init.inc.c b/target/ppc/translate_init.inc.c
> index e853164a86..fd763e588e 100644
> --- a/target/ppc/translate_init.inc.c
> +++ b/target/ppc/translate_init.inc.c
> @@ -5210,7 +5210,7 @@ POWERPC_FAMILY(e5500)(ObjectClass *oc, void *data)
> PPC_FLOAT_STFIWX | PPC_WAIT |
> PPC_MEM_TLBSYNC | PPC_TLBIVAX | PPC_MEM_SYNC |
> PPC_64B | PPC_POPCNTB | PPC_POPCNTWD;
> - pcc->insns_flags2 = PPC2_BOOKE206 | PPC2_PRCNTL | PPC2_PERM_ISA206 | \
> + pcc->insns_flags2 = PPC2_BOOKE206 | PPC2_PRCNTL | PPC2_PERM_ISA206 |
> PPC2_FP_CVT_S64;
> pcc->msr_mask = (1ull << MSR_CM) |
> (1ull << MSR_GS) |
> @@ -5258,7 +5258,7 @@ POWERPC_FAMILY(e6500)(ObjectClass *oc, void *data)
> PPC_FLOAT_STFIWX | PPC_WAIT |
> PPC_MEM_TLBSYNC | PPC_TLBIVAX | PPC_MEM_SYNC |
> PPC_64B | PPC_POPCNTB | PPC_POPCNTWD | PPC_ALTIVEC;
> - pcc->insns_flags2 = PPC2_BOOKE206 | PPC2_PRCNTL | PPC2_PERM_ISA206 | \
> + pcc->insns_flags2 = PPC2_BOOKE206 | PPC2_PRCNTL | PPC2_PERM_ISA206 |
> PPC2_FP_CVT_S64 | PPC2_ATOMIC_ISA206;
> pcc->msr_mask = (1ull << MSR_CM) |
> (1ull << MSR_GS) |
> --
> 2.21.1
>
>
^ permalink raw reply [flat|nested] 98+ messages in thread* Re: [PATCH-for-5.1 v3 01/24] various: Remove suspicious '\' character outside of #define in C code
@ 2020-04-13 15:56 ` Alistair Francis
0 siblings, 0 replies; 98+ messages in thread
From: Alistair Francis @ 2020-04-13 15:56 UTC (permalink / raw)
To: Philippe Mathieu-Daudé
Cc: qemu-devel@nongnu.org Developers, Fam Zheng, Peter Maydell,
Sagar Karandikar, Michael S. Tsirkin, Jeff Cody, Jason Wang,
Alistair Francis, Edgar E. Iglesias, Subbaraya Sundeep,
Qemu-block, Markus Armbruster, Max Reitz, Joel Stanley,
Marc-André Lureau, Richard Henderson,
Philippe Mathieu-Daudé,
Eduardo Habkost, Xie Changlong, Alistair Francis,
Beniamino Galvani, qemu-arm, Peter Chubb, Cédric Le Goater,
Palmer Dabbelt, David Gibson, Kevin Wolf, open list:RISC-V,
Andrew Jeffery, Wen Congyang, Jean-Christophe Dubois,
open list:New World, Bastian Koppelmann, Paolo Bonzini
On Sun, Apr 12, 2020 at 3:38 PM Philippe Mathieu-Daudé <f4bug@amsat.org> wrote:
>
> Fixes the following coccinelle warnings:
>
> $ spatch --sp-file --verbose-parsing ... \
> scripts/coccinelle/remove_local_err.cocci
> ...
> SUSPICIOUS: a \ character appears outside of a #define at ./target/ppc/translate_init.inc.c:5213
> SUSPICIOUS: a \ character appears outside of a #define at ./target/ppc/translate_init.inc.c:5261
> SUSPICIOUS: a \ character appears outside of a #define at ./target/microblaze/cpu.c:166
> SUSPICIOUS: a \ character appears outside of a #define at ./target/microblaze/cpu.c:167
> SUSPICIOUS: a \ character appears outside of a #define at ./target/microblaze/cpu.c:169
> SUSPICIOUS: a \ character appears outside of a #define at ./target/microblaze/cpu.c:170
> SUSPICIOUS: a \ character appears outside of a #define at ./target/microblaze/cpu.c:171
> SUSPICIOUS: a \ character appears outside of a #define at ./target/microblaze/cpu.c:172
> SUSPICIOUS: a \ character appears outside of a #define at ./target/microblaze/cpu.c:173
> SUSPICIOUS: a \ character appears outside of a #define at ./target/i386/cpu.c:5787
> SUSPICIOUS: a \ character appears outside of a #define at ./target/i386/cpu.c:5789
> SUSPICIOUS: a \ character appears outside of a #define at ./target/i386/cpu.c:5800
> SUSPICIOUS: a \ character appears outside of a #define at ./target/i386/cpu.c:5801
> SUSPICIOUS: a \ character appears outside of a #define at ./target/i386/cpu.c:5802
> SUSPICIOUS: a \ character appears outside of a #define at ./target/i386/cpu.c:5804
> SUSPICIOUS: a \ character appears outside of a #define at ./target/i386/cpu.c:5805
> SUSPICIOUS: a \ character appears outside of a #define at ./target/i386/cpu.c:5806
> SUSPICIOUS: a \ character appears outside of a #define at ./target/i386/cpu.c:6329
> SUSPICIOUS: a \ character appears outside of a #define at ./hw/sd/sdhci.c:1133
> SUSPICIOUS: a \ character appears outside of a #define at ./hw/scsi/scsi-disk.c:3081
> SUSPICIOUS: a \ character appears outside of a #define at ./hw/net/virtio-net.c:1529
> SUSPICIOUS: a \ character appears outside of a #define at ./hw/riscv/sifive_u.c:468
> SUSPICIOUS: a \ character appears outside of a #define at ./dump/dump.c:1895
> SUSPICIOUS: a \ character appears outside of a #define at ./block/vhdx.c:2209
> SUSPICIOUS: a \ character appears outside of a #define at ./block/vhdx.c:2215
> SUSPICIOUS: a \ character appears outside of a #define at ./block/vhdx.c:2221
> SUSPICIOUS: a \ character appears outside of a #define at ./block/vhdx.c:2222
> SUSPICIOUS: a \ character appears outside of a #define at ./block/replication.c:172
> SUSPICIOUS: a \ character appears outside of a #define at ./block/replication.c:173
>
> Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com>
> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Alistair
> ---
> block/replication.c | 4 ++--
> block/vhdx.c | 8 ++++----
> dump/dump.c | 2 +-
> hw/net/virtio-net.c | 2 +-
> hw/riscv/sifive_u.c | 2 +-
> hw/scsi/scsi-disk.c | 2 +-
> hw/sd/sdhci.c | 2 +-
> target/i386/cpu.c | 18 +++++++++---------
> target/microblaze/cpu.c | 14 +++++++-------
> target/ppc/translate_init.inc.c | 4 ++--
> 10 files changed, 29 insertions(+), 29 deletions(-)
>
> diff --git a/block/replication.c b/block/replication.c
> index da013c2041..971f0fe266 100644
> --- a/block/replication.c
> +++ b/block/replication.c
> @@ -172,8 +172,8 @@ static void replication_child_perm(BlockDriverState *bs, BdrvChild *c,
> if ((bs->open_flags & (BDRV_O_INACTIVE | BDRV_O_RDWR)) == BDRV_O_RDWR) {
> *nperm |= BLK_PERM_WRITE;
> }
> - *nshared = BLK_PERM_CONSISTENT_READ \
> - | BLK_PERM_WRITE \
> + *nshared = BLK_PERM_CONSISTENT_READ
> + | BLK_PERM_WRITE
> | BLK_PERM_WRITE_UNCHANGED;
> return;
> }
> diff --git a/block/vhdx.c b/block/vhdx.c
> index 33e57cd656..e16fdc2f2d 100644
> --- a/block/vhdx.c
> +++ b/block/vhdx.c
> @@ -2206,20 +2206,20 @@ static QemuOptsList vhdx_create_opts = {
> .name = VHDX_BLOCK_OPT_BLOCK_SIZE,
> .type = QEMU_OPT_SIZE,
> .def_value_str = stringify(0),
> - .help = "Block Size; min 1MB, max 256MB. " \
> + .help = "Block Size; min 1MB, max 256MB. "
> "0 means auto-calculate based on image size."
> },
> {
> .name = BLOCK_OPT_SUBFMT,
> .type = QEMU_OPT_STRING,
> - .help = "VHDX format type, can be either 'dynamic' or 'fixed'. "\
> + .help = "VHDX format type, can be either 'dynamic' or 'fixed'. "
> "Default is 'dynamic'."
> },
> {
> .name = VHDX_BLOCK_OPT_ZERO,
> .type = QEMU_OPT_BOOL,
> - .help = "Force use of payload blocks of type 'ZERO'. "\
> - "Non-standard, but default. Do not set to 'off' when "\
> + .help = "Force use of payload blocks of type 'ZERO'. "
> + "Non-standard, but default. Do not set to 'off' when "
> "using 'qemu-img convert' with subformat=dynamic."
> },
> { NULL }
> diff --git a/dump/dump.c b/dump/dump.c
> index 22ed1d3b0d..248ea06370 100644
> --- a/dump/dump.c
> +++ b/dump/dump.c
> @@ -1892,7 +1892,7 @@ static void dump_process(DumpState *s, Error **errp)
> result = qmp_query_dump(NULL);
> /* should never fail */
> assert(result);
> - qapi_event_send_dump_completed(result, !!local_err, (local_err ? \
> + qapi_event_send_dump_completed(result, !!local_err, (local_err ?
> error_get_pretty(local_err) : NULL));
> qapi_free_DumpQueryResult(result);
>
> diff --git a/hw/net/virtio-net.c b/hw/net/virtio-net.c
> index a46e3b37a7..eddfa7f923 100644
> --- a/hw/net/virtio-net.c
> +++ b/hw/net/virtio-net.c
> @@ -1526,7 +1526,7 @@ static void virtio_net_rsc_extract_unit6(VirtioNetRscChain *chain,
> + sizeof(struct eth_header));
> unit->ip = ip6;
> unit->ip_plen = &(ip6->ip6_ctlun.ip6_un1.ip6_un1_plen);
> - unit->tcp = (struct tcp_header *)(((uint8_t *)unit->ip)\
> + unit->tcp = (struct tcp_header *)(((uint8_t *)unit->ip)
> + sizeof(struct ip6_header));
> unit->tcp_hdrlen = (htons(unit->tcp->th_offset_flags) & 0xF000) >> 10;
>
> diff --git a/hw/riscv/sifive_u.c b/hw/riscv/sifive_u.c
> index 56351c4faa..998666c91f 100644
> --- a/hw/riscv/sifive_u.c
> +++ b/hw/riscv/sifive_u.c
> @@ -465,7 +465,7 @@ static void riscv_sifive_u_machine_instance_init(Object *obj)
> object_property_add_bool(obj, "start-in-flash", sifive_u_get_start_in_flash,
> sifive_u_set_start_in_flash, NULL);
> object_property_set_description(obj, "start-in-flash",
> - "Set on to tell QEMU's ROM to jump to " \
> + "Set on to tell QEMU's ROM to jump to "
> "flash. Otherwise QEMU will jump to DRAM",
> NULL);
> }
> diff --git a/hw/scsi/scsi-disk.c b/hw/scsi/scsi-disk.c
> index 1c0cb63a6f..e5bcd0baf8 100644
> --- a/hw/scsi/scsi-disk.c
> +++ b/hw/scsi/scsi-disk.c
> @@ -3078,7 +3078,7 @@ static const TypeInfo scsi_cd_info = {
>
> #ifdef __linux__
> static Property scsi_block_properties[] = {
> - DEFINE_BLOCK_ERROR_PROPERTIES(SCSIDiskState, qdev.conf), \
> + DEFINE_BLOCK_ERROR_PROPERTIES(SCSIDiskState, qdev.conf),
> DEFINE_PROP_DRIVE("drive", SCSIDiskState, qdev.conf.blk),
> DEFINE_PROP_BOOL("share-rw", SCSIDiskState, qdev.conf.share_rw, false),
> DEFINE_PROP_UINT16("rotation_rate", SCSIDiskState, rotation_rate, 0),
> diff --git a/hw/sd/sdhci.c b/hw/sd/sdhci.c
> index de63ffb037..70531ad360 100644
> --- a/hw/sd/sdhci.c
> +++ b/hw/sd/sdhci.c
> @@ -1130,7 +1130,7 @@ sdhci_write(void *opaque, hwaddr offset, uint64_t val, unsigned size)
>
> /* Limit block size to the maximum buffer size */
> if (extract32(s->blksize, 0, 12) > s->buf_maxsz) {
> - qemu_log_mask(LOG_GUEST_ERROR, "%s: Size 0x%x is larger than " \
> + qemu_log_mask(LOG_GUEST_ERROR, "%s: Size 0x%x is larger than "
> "the maximum buffer 0x%x", __func__, s->blksize,
> s->buf_maxsz);
>
> diff --git a/target/i386/cpu.c b/target/i386/cpu.c
> index 90ffc5f3b1..9c256ab159 100644
> --- a/target/i386/cpu.c
> +++ b/target/i386/cpu.c
> @@ -5784,9 +5784,9 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index, uint32_t count,
> host_cpuid(index, 0, eax, ebx, ecx, edx);
> break;
> }
> - *eax = (L1_DTLB_2M_ASSOC << 24) | (L1_DTLB_2M_ENTRIES << 16) | \
> + *eax = (L1_DTLB_2M_ASSOC << 24) | (L1_DTLB_2M_ENTRIES << 16) |
> (L1_ITLB_2M_ASSOC << 8) | (L1_ITLB_2M_ENTRIES);
> - *ebx = (L1_DTLB_4K_ASSOC << 24) | (L1_DTLB_4K_ENTRIES << 16) | \
> + *ebx = (L1_DTLB_4K_ASSOC << 24) | (L1_DTLB_4K_ENTRIES << 16) |
> (L1_ITLB_4K_ASSOC << 8) | (L1_ITLB_4K_ENTRIES);
> *ecx = encode_cache_cpuid80000005(env->cache_info_amd.l1d_cache);
> *edx = encode_cache_cpuid80000005(env->cache_info_amd.l1i_cache);
> @@ -5797,13 +5797,13 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index, uint32_t count,
> host_cpuid(index, 0, eax, ebx, ecx, edx);
> break;
> }
> - *eax = (AMD_ENC_ASSOC(L2_DTLB_2M_ASSOC) << 28) | \
> - (L2_DTLB_2M_ENTRIES << 16) | \
> - (AMD_ENC_ASSOC(L2_ITLB_2M_ASSOC) << 12) | \
> + *eax = (AMD_ENC_ASSOC(L2_DTLB_2M_ASSOC) << 28) |
> + (L2_DTLB_2M_ENTRIES << 16) |
> + (AMD_ENC_ASSOC(L2_ITLB_2M_ASSOC) << 12) |
> (L2_ITLB_2M_ENTRIES);
> - *ebx = (AMD_ENC_ASSOC(L2_DTLB_4K_ASSOC) << 28) | \
> - (L2_DTLB_4K_ENTRIES << 16) | \
> - (AMD_ENC_ASSOC(L2_ITLB_4K_ASSOC) << 12) | \
> + *ebx = (AMD_ENC_ASSOC(L2_DTLB_4K_ASSOC) << 28) |
> + (L2_DTLB_4K_ENTRIES << 16) |
> + (AMD_ENC_ASSOC(L2_ITLB_4K_ASSOC) << 12) |
> (L2_ITLB_4K_ENTRIES);
> encode_cache_cpuid80000006(env->cache_info_amd.l2_cache,
> cpu->enable_l3_cache ?
> @@ -6326,7 +6326,7 @@ static void x86_cpu_expand_features(X86CPU *cpu, Error **errp)
> */
> env->features[w] |=
> x86_cpu_get_supported_feature_word(w, cpu->migratable) &
> - ~env->user_features[w] & \
> + ~env->user_features[w] &
> ~feature_word_info[w].no_autoenable_flags;
> }
> }
> diff --git a/target/microblaze/cpu.c b/target/microblaze/cpu.c
> index a2c2f271df..c9cf2364ca 100644
> --- a/target/microblaze/cpu.c
> +++ b/target/microblaze/cpu.c
> @@ -163,14 +163,14 @@ static void mb_cpu_realizefn(DeviceState *dev, Error **errp)
>
> qemu_init_vcpu(cs);
>
> - env->pvr.regs[0] = PVR0_USE_EXC_MASK \
> - | PVR0_USE_ICACHE_MASK \
> + env->pvr.regs[0] = PVR0_USE_EXC_MASK
> + | PVR0_USE_ICACHE_MASK
> | PVR0_USE_DCACHE_MASK;
> - env->pvr.regs[2] = PVR2_D_OPB_MASK \
> - | PVR2_D_LMB_MASK \
> - | PVR2_I_OPB_MASK \
> - | PVR2_I_LMB_MASK \
> - | PVR2_FPU_EXC_MASK \
> + env->pvr.regs[2] = PVR2_D_OPB_MASK
> + | PVR2_D_LMB_MASK
> + | PVR2_I_OPB_MASK
> + | PVR2_I_LMB_MASK
> + | PVR2_FPU_EXC_MASK
> | 0;
>
> version = cpu->cfg.version ? cpu->cfg.version : DEFAULT_CPU_VERSION;
> diff --git a/target/ppc/translate_init.inc.c b/target/ppc/translate_init.inc.c
> index e853164a86..fd763e588e 100644
> --- a/target/ppc/translate_init.inc.c
> +++ b/target/ppc/translate_init.inc.c
> @@ -5210,7 +5210,7 @@ POWERPC_FAMILY(e5500)(ObjectClass *oc, void *data)
> PPC_FLOAT_STFIWX | PPC_WAIT |
> PPC_MEM_TLBSYNC | PPC_TLBIVAX | PPC_MEM_SYNC |
> PPC_64B | PPC_POPCNTB | PPC_POPCNTWD;
> - pcc->insns_flags2 = PPC2_BOOKE206 | PPC2_PRCNTL | PPC2_PERM_ISA206 | \
> + pcc->insns_flags2 = PPC2_BOOKE206 | PPC2_PRCNTL | PPC2_PERM_ISA206 |
> PPC2_FP_CVT_S64;
> pcc->msr_mask = (1ull << MSR_CM) |
> (1ull << MSR_GS) |
> @@ -5258,7 +5258,7 @@ POWERPC_FAMILY(e6500)(ObjectClass *oc, void *data)
> PPC_FLOAT_STFIWX | PPC_WAIT |
> PPC_MEM_TLBSYNC | PPC_TLBIVAX | PPC_MEM_SYNC |
> PPC_64B | PPC_POPCNTB | PPC_POPCNTWD | PPC_ALTIVEC;
> - pcc->insns_flags2 = PPC2_BOOKE206 | PPC2_PRCNTL | PPC2_PERM_ISA206 | \
> + pcc->insns_flags2 = PPC2_BOOKE206 | PPC2_PRCNTL | PPC2_PERM_ISA206 |
> PPC2_FP_CVT_S64 | PPC2_ATOMIC_ISA206;
> pcc->msr_mask = (1ull << MSR_CM) |
> (1ull << MSR_GS) |
> --
> 2.21.1
>
>
^ permalink raw reply [flat|nested] 98+ messages in thread
* Re: [PATCH-for-5.1 v3 01/24] various: Remove suspicious '\' character outside of #define in C code
2020-04-12 22:35 ` Philippe Mathieu-Daudé
@ 2020-04-14 2:08 ` David Gibson
-1 siblings, 0 replies; 98+ messages in thread
From: David Gibson @ 2020-04-14 2:08 UTC (permalink / raw)
To: Philippe Mathieu-Daudé
Cc: Fam Zheng, Peter Maydell, Sagar Karandikar, Michael S. Tsirkin,
Jeff Cody, Jason Wang, qemu-devel, Alistair Francis,
Edgar E. Iglesias, Max Reitz, qemu-block, Markus Armbruster,
Joel Stanley, qemu-ppc, Philippe Mathieu-Daudé,
Eduardo Habkost, Jean-Christophe Dubois, Xie Changlong,
Alistair Francis, Beniamino Galvani, qemu-arm, Peter Chubb,
Cédric Le Goater, Marc-André Lureau, Richard Henderson,
Kevin Wolf, qemu-riscv, Andrew Jeffery, Wen Congyang,
Subbaraya Sundeep, Palmer Dabbelt, Bastian Koppelmann,
Paolo Bonzini
[-- Attachment #1: Type: text/plain, Size: 13943 bytes --]
On Mon, Apr 13, 2020 at 12:35:56AM +0200, Philippe Mathieu-Daudé wrote:
> Fixes the following coccinelle warnings:
>
> $ spatch --sp-file --verbose-parsing ... \
> scripts/coccinelle/remove_local_err.cocci
> ...
> SUSPICIOUS: a \ character appears outside of a #define at ./target/ppc/translate_init.inc.c:5213
> SUSPICIOUS: a \ character appears outside of a #define at ./target/ppc/translate_init.inc.c:5261
> SUSPICIOUS: a \ character appears outside of a #define at ./target/microblaze/cpu.c:166
> SUSPICIOUS: a \ character appears outside of a #define at ./target/microblaze/cpu.c:167
> SUSPICIOUS: a \ character appears outside of a #define at ./target/microblaze/cpu.c:169
> SUSPICIOUS: a \ character appears outside of a #define at ./target/microblaze/cpu.c:170
> SUSPICIOUS: a \ character appears outside of a #define at ./target/microblaze/cpu.c:171
> SUSPICIOUS: a \ character appears outside of a #define at ./target/microblaze/cpu.c:172
> SUSPICIOUS: a \ character appears outside of a #define at ./target/microblaze/cpu.c:173
> SUSPICIOUS: a \ character appears outside of a #define at ./target/i386/cpu.c:5787
> SUSPICIOUS: a \ character appears outside of a #define at ./target/i386/cpu.c:5789
> SUSPICIOUS: a \ character appears outside of a #define at ./target/i386/cpu.c:5800
> SUSPICIOUS: a \ character appears outside of a #define at ./target/i386/cpu.c:5801
> SUSPICIOUS: a \ character appears outside of a #define at ./target/i386/cpu.c:5802
> SUSPICIOUS: a \ character appears outside of a #define at ./target/i386/cpu.c:5804
> SUSPICIOUS: a \ character appears outside of a #define at ./target/i386/cpu.c:5805
> SUSPICIOUS: a \ character appears outside of a #define at ./target/i386/cpu.c:5806
> SUSPICIOUS: a \ character appears outside of a #define at ./target/i386/cpu.c:6329
> SUSPICIOUS: a \ character appears outside of a #define at ./hw/sd/sdhci.c:1133
> SUSPICIOUS: a \ character appears outside of a #define at ./hw/scsi/scsi-disk.c:3081
> SUSPICIOUS: a \ character appears outside of a #define at ./hw/net/virtio-net.c:1529
> SUSPICIOUS: a \ character appears outside of a #define at ./hw/riscv/sifive_u.c:468
> SUSPICIOUS: a \ character appears outside of a #define at ./dump/dump.c:1895
> SUSPICIOUS: a \ character appears outside of a #define at ./block/vhdx.c:2209
> SUSPICIOUS: a \ character appears outside of a #define at ./block/vhdx.c:2215
> SUSPICIOUS: a \ character appears outside of a #define at ./block/vhdx.c:2221
> SUSPICIOUS: a \ character appears outside of a #define at ./block/vhdx.c:2222
> SUSPICIOUS: a \ character appears outside of a #define at ./block/replication.c:172
> SUSPICIOUS: a \ character appears outside of a #define at ./block/replication.c:173
>
> Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com>
> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
ppc parts
Acked-by: David Gibson <david@gibson.dropbear.id.au>
> ---
> block/replication.c | 4 ++--
> block/vhdx.c | 8 ++++----
> dump/dump.c | 2 +-
> hw/net/virtio-net.c | 2 +-
> hw/riscv/sifive_u.c | 2 +-
> hw/scsi/scsi-disk.c | 2 +-
> hw/sd/sdhci.c | 2 +-
> target/i386/cpu.c | 18 +++++++++---------
> target/microblaze/cpu.c | 14 +++++++-------
> target/ppc/translate_init.inc.c | 4 ++--
> 10 files changed, 29 insertions(+), 29 deletions(-)
>
> diff --git a/block/replication.c b/block/replication.c
> index da013c2041..971f0fe266 100644
> --- a/block/replication.c
> +++ b/block/replication.c
> @@ -172,8 +172,8 @@ static void replication_child_perm(BlockDriverState *bs, BdrvChild *c,
> if ((bs->open_flags & (BDRV_O_INACTIVE | BDRV_O_RDWR)) == BDRV_O_RDWR) {
> *nperm |= BLK_PERM_WRITE;
> }
> - *nshared = BLK_PERM_CONSISTENT_READ \
> - | BLK_PERM_WRITE \
> + *nshared = BLK_PERM_CONSISTENT_READ
> + | BLK_PERM_WRITE
> | BLK_PERM_WRITE_UNCHANGED;
> return;
> }
> diff --git a/block/vhdx.c b/block/vhdx.c
> index 33e57cd656..e16fdc2f2d 100644
> --- a/block/vhdx.c
> +++ b/block/vhdx.c
> @@ -2206,20 +2206,20 @@ static QemuOptsList vhdx_create_opts = {
> .name = VHDX_BLOCK_OPT_BLOCK_SIZE,
> .type = QEMU_OPT_SIZE,
> .def_value_str = stringify(0),
> - .help = "Block Size; min 1MB, max 256MB. " \
> + .help = "Block Size; min 1MB, max 256MB. "
> "0 means auto-calculate based on image size."
> },
> {
> .name = BLOCK_OPT_SUBFMT,
> .type = QEMU_OPT_STRING,
> - .help = "VHDX format type, can be either 'dynamic' or 'fixed'. "\
> + .help = "VHDX format type, can be either 'dynamic' or 'fixed'. "
> "Default is 'dynamic'."
> },
> {
> .name = VHDX_BLOCK_OPT_ZERO,
> .type = QEMU_OPT_BOOL,
> - .help = "Force use of payload blocks of type 'ZERO'. "\
> - "Non-standard, but default. Do not set to 'off' when "\
> + .help = "Force use of payload blocks of type 'ZERO'. "
> + "Non-standard, but default. Do not set to 'off' when "
> "using 'qemu-img convert' with subformat=dynamic."
> },
> { NULL }
> diff --git a/dump/dump.c b/dump/dump.c
> index 22ed1d3b0d..248ea06370 100644
> --- a/dump/dump.c
> +++ b/dump/dump.c
> @@ -1892,7 +1892,7 @@ static void dump_process(DumpState *s, Error **errp)
> result = qmp_query_dump(NULL);
> /* should never fail */
> assert(result);
> - qapi_event_send_dump_completed(result, !!local_err, (local_err ? \
> + qapi_event_send_dump_completed(result, !!local_err, (local_err ?
> error_get_pretty(local_err) : NULL));
> qapi_free_DumpQueryResult(result);
>
> diff --git a/hw/net/virtio-net.c b/hw/net/virtio-net.c
> index a46e3b37a7..eddfa7f923 100644
> --- a/hw/net/virtio-net.c
> +++ b/hw/net/virtio-net.c
> @@ -1526,7 +1526,7 @@ static void virtio_net_rsc_extract_unit6(VirtioNetRscChain *chain,
> + sizeof(struct eth_header));
> unit->ip = ip6;
> unit->ip_plen = &(ip6->ip6_ctlun.ip6_un1.ip6_un1_plen);
> - unit->tcp = (struct tcp_header *)(((uint8_t *)unit->ip)\
> + unit->tcp = (struct tcp_header *)(((uint8_t *)unit->ip)
> + sizeof(struct ip6_header));
> unit->tcp_hdrlen = (htons(unit->tcp->th_offset_flags) & 0xF000) >> 10;
>
> diff --git a/hw/riscv/sifive_u.c b/hw/riscv/sifive_u.c
> index 56351c4faa..998666c91f 100644
> --- a/hw/riscv/sifive_u.c
> +++ b/hw/riscv/sifive_u.c
> @@ -465,7 +465,7 @@ static void riscv_sifive_u_machine_instance_init(Object *obj)
> object_property_add_bool(obj, "start-in-flash", sifive_u_get_start_in_flash,
> sifive_u_set_start_in_flash, NULL);
> object_property_set_description(obj, "start-in-flash",
> - "Set on to tell QEMU's ROM to jump to " \
> + "Set on to tell QEMU's ROM to jump to "
> "flash. Otherwise QEMU will jump to DRAM",
> NULL);
> }
> diff --git a/hw/scsi/scsi-disk.c b/hw/scsi/scsi-disk.c
> index 1c0cb63a6f..e5bcd0baf8 100644
> --- a/hw/scsi/scsi-disk.c
> +++ b/hw/scsi/scsi-disk.c
> @@ -3078,7 +3078,7 @@ static const TypeInfo scsi_cd_info = {
>
> #ifdef __linux__
> static Property scsi_block_properties[] = {
> - DEFINE_BLOCK_ERROR_PROPERTIES(SCSIDiskState, qdev.conf), \
> + DEFINE_BLOCK_ERROR_PROPERTIES(SCSIDiskState, qdev.conf),
> DEFINE_PROP_DRIVE("drive", SCSIDiskState, qdev.conf.blk),
> DEFINE_PROP_BOOL("share-rw", SCSIDiskState, qdev.conf.share_rw, false),
> DEFINE_PROP_UINT16("rotation_rate", SCSIDiskState, rotation_rate, 0),
> diff --git a/hw/sd/sdhci.c b/hw/sd/sdhci.c
> index de63ffb037..70531ad360 100644
> --- a/hw/sd/sdhci.c
> +++ b/hw/sd/sdhci.c
> @@ -1130,7 +1130,7 @@ sdhci_write(void *opaque, hwaddr offset, uint64_t val, unsigned size)
>
> /* Limit block size to the maximum buffer size */
> if (extract32(s->blksize, 0, 12) > s->buf_maxsz) {
> - qemu_log_mask(LOG_GUEST_ERROR, "%s: Size 0x%x is larger than " \
> + qemu_log_mask(LOG_GUEST_ERROR, "%s: Size 0x%x is larger than "
> "the maximum buffer 0x%x", __func__, s->blksize,
> s->buf_maxsz);
>
> diff --git a/target/i386/cpu.c b/target/i386/cpu.c
> index 90ffc5f3b1..9c256ab159 100644
> --- a/target/i386/cpu.c
> +++ b/target/i386/cpu.c
> @@ -5784,9 +5784,9 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index, uint32_t count,
> host_cpuid(index, 0, eax, ebx, ecx, edx);
> break;
> }
> - *eax = (L1_DTLB_2M_ASSOC << 24) | (L1_DTLB_2M_ENTRIES << 16) | \
> + *eax = (L1_DTLB_2M_ASSOC << 24) | (L1_DTLB_2M_ENTRIES << 16) |
> (L1_ITLB_2M_ASSOC << 8) | (L1_ITLB_2M_ENTRIES);
> - *ebx = (L1_DTLB_4K_ASSOC << 24) | (L1_DTLB_4K_ENTRIES << 16) | \
> + *ebx = (L1_DTLB_4K_ASSOC << 24) | (L1_DTLB_4K_ENTRIES << 16) |
> (L1_ITLB_4K_ASSOC << 8) | (L1_ITLB_4K_ENTRIES);
> *ecx = encode_cache_cpuid80000005(env->cache_info_amd.l1d_cache);
> *edx = encode_cache_cpuid80000005(env->cache_info_amd.l1i_cache);
> @@ -5797,13 +5797,13 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index, uint32_t count,
> host_cpuid(index, 0, eax, ebx, ecx, edx);
> break;
> }
> - *eax = (AMD_ENC_ASSOC(L2_DTLB_2M_ASSOC) << 28) | \
> - (L2_DTLB_2M_ENTRIES << 16) | \
> - (AMD_ENC_ASSOC(L2_ITLB_2M_ASSOC) << 12) | \
> + *eax = (AMD_ENC_ASSOC(L2_DTLB_2M_ASSOC) << 28) |
> + (L2_DTLB_2M_ENTRIES << 16) |
> + (AMD_ENC_ASSOC(L2_ITLB_2M_ASSOC) << 12) |
> (L2_ITLB_2M_ENTRIES);
> - *ebx = (AMD_ENC_ASSOC(L2_DTLB_4K_ASSOC) << 28) | \
> - (L2_DTLB_4K_ENTRIES << 16) | \
> - (AMD_ENC_ASSOC(L2_ITLB_4K_ASSOC) << 12) | \
> + *ebx = (AMD_ENC_ASSOC(L2_DTLB_4K_ASSOC) << 28) |
> + (L2_DTLB_4K_ENTRIES << 16) |
> + (AMD_ENC_ASSOC(L2_ITLB_4K_ASSOC) << 12) |
> (L2_ITLB_4K_ENTRIES);
> encode_cache_cpuid80000006(env->cache_info_amd.l2_cache,
> cpu->enable_l3_cache ?
> @@ -6326,7 +6326,7 @@ static void x86_cpu_expand_features(X86CPU *cpu, Error **errp)
> */
> env->features[w] |=
> x86_cpu_get_supported_feature_word(w, cpu->migratable) &
> - ~env->user_features[w] & \
> + ~env->user_features[w] &
> ~feature_word_info[w].no_autoenable_flags;
> }
> }
> diff --git a/target/microblaze/cpu.c b/target/microblaze/cpu.c
> index a2c2f271df..c9cf2364ca 100644
> --- a/target/microblaze/cpu.c
> +++ b/target/microblaze/cpu.c
> @@ -163,14 +163,14 @@ static void mb_cpu_realizefn(DeviceState *dev, Error **errp)
>
> qemu_init_vcpu(cs);
>
> - env->pvr.regs[0] = PVR0_USE_EXC_MASK \
> - | PVR0_USE_ICACHE_MASK \
> + env->pvr.regs[0] = PVR0_USE_EXC_MASK
> + | PVR0_USE_ICACHE_MASK
> | PVR0_USE_DCACHE_MASK;
> - env->pvr.regs[2] = PVR2_D_OPB_MASK \
> - | PVR2_D_LMB_MASK \
> - | PVR2_I_OPB_MASK \
> - | PVR2_I_LMB_MASK \
> - | PVR2_FPU_EXC_MASK \
> + env->pvr.regs[2] = PVR2_D_OPB_MASK
> + | PVR2_D_LMB_MASK
> + | PVR2_I_OPB_MASK
> + | PVR2_I_LMB_MASK
> + | PVR2_FPU_EXC_MASK
> | 0;
>
> version = cpu->cfg.version ? cpu->cfg.version : DEFAULT_CPU_VERSION;
> diff --git a/target/ppc/translate_init.inc.c b/target/ppc/translate_init.inc.c
> index e853164a86..fd763e588e 100644
> --- a/target/ppc/translate_init.inc.c
> +++ b/target/ppc/translate_init.inc.c
> @@ -5210,7 +5210,7 @@ POWERPC_FAMILY(e5500)(ObjectClass *oc, void *data)
> PPC_FLOAT_STFIWX | PPC_WAIT |
> PPC_MEM_TLBSYNC | PPC_TLBIVAX | PPC_MEM_SYNC |
> PPC_64B | PPC_POPCNTB | PPC_POPCNTWD;
> - pcc->insns_flags2 = PPC2_BOOKE206 | PPC2_PRCNTL | PPC2_PERM_ISA206 | \
> + pcc->insns_flags2 = PPC2_BOOKE206 | PPC2_PRCNTL | PPC2_PERM_ISA206 |
> PPC2_FP_CVT_S64;
> pcc->msr_mask = (1ull << MSR_CM) |
> (1ull << MSR_GS) |
> @@ -5258,7 +5258,7 @@ POWERPC_FAMILY(e6500)(ObjectClass *oc, void *data)
> PPC_FLOAT_STFIWX | PPC_WAIT |
> PPC_MEM_TLBSYNC | PPC_TLBIVAX | PPC_MEM_SYNC |
> PPC_64B | PPC_POPCNTB | PPC_POPCNTWD | PPC_ALTIVEC;
> - pcc->insns_flags2 = PPC2_BOOKE206 | PPC2_PRCNTL | PPC2_PERM_ISA206 | \
> + pcc->insns_flags2 = PPC2_BOOKE206 | PPC2_PRCNTL | PPC2_PERM_ISA206 |
> PPC2_FP_CVT_S64 | PPC2_ATOMIC_ISA206;
> pcc->msr_mask = (1ull << MSR_CM) |
> (1ull << MSR_GS) |
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 833 bytes --]
^ permalink raw reply [flat|nested] 98+ messages in thread* Re: [PATCH-for-5.1 v3 01/24] various: Remove suspicious '\' character outside of #define in C code
@ 2020-04-14 2:08 ` David Gibson
0 siblings, 0 replies; 98+ messages in thread
From: David Gibson @ 2020-04-14 2:08 UTC (permalink / raw)
To: Philippe Mathieu-Daudé
Cc: qemu-devel, Joel Stanley, Jean-Christophe Dubois,
Subbaraya Sundeep, Max Reitz, Palmer Dabbelt, qemu-ppc,
Sagar Karandikar, Markus Armbruster, Jeff Cody, Peter Maydell,
Xie Changlong, Fam Zheng, Eduardo Habkost, Alistair Francis,
qemu-arm, Wen Congyang, Philippe Mathieu-Daudé,
Bastian Koppelmann, Edgar E. Iglesias, Kevin Wolf,
Marc-André Lureau, Jason Wang, Peter Chubb,
Beniamino Galvani, Alistair Francis, qemu-riscv,
Cédric Le Goater, qemu-block, Paolo Bonzini, Andrew Jeffery,
Michael S. Tsirkin, Richard Henderson
[-- Attachment #1: Type: text/plain, Size: 13943 bytes --]
On Mon, Apr 13, 2020 at 12:35:56AM +0200, Philippe Mathieu-Daudé wrote:
> Fixes the following coccinelle warnings:
>
> $ spatch --sp-file --verbose-parsing ... \
> scripts/coccinelle/remove_local_err.cocci
> ...
> SUSPICIOUS: a \ character appears outside of a #define at ./target/ppc/translate_init.inc.c:5213
> SUSPICIOUS: a \ character appears outside of a #define at ./target/ppc/translate_init.inc.c:5261
> SUSPICIOUS: a \ character appears outside of a #define at ./target/microblaze/cpu.c:166
> SUSPICIOUS: a \ character appears outside of a #define at ./target/microblaze/cpu.c:167
> SUSPICIOUS: a \ character appears outside of a #define at ./target/microblaze/cpu.c:169
> SUSPICIOUS: a \ character appears outside of a #define at ./target/microblaze/cpu.c:170
> SUSPICIOUS: a \ character appears outside of a #define at ./target/microblaze/cpu.c:171
> SUSPICIOUS: a \ character appears outside of a #define at ./target/microblaze/cpu.c:172
> SUSPICIOUS: a \ character appears outside of a #define at ./target/microblaze/cpu.c:173
> SUSPICIOUS: a \ character appears outside of a #define at ./target/i386/cpu.c:5787
> SUSPICIOUS: a \ character appears outside of a #define at ./target/i386/cpu.c:5789
> SUSPICIOUS: a \ character appears outside of a #define at ./target/i386/cpu.c:5800
> SUSPICIOUS: a \ character appears outside of a #define at ./target/i386/cpu.c:5801
> SUSPICIOUS: a \ character appears outside of a #define at ./target/i386/cpu.c:5802
> SUSPICIOUS: a \ character appears outside of a #define at ./target/i386/cpu.c:5804
> SUSPICIOUS: a \ character appears outside of a #define at ./target/i386/cpu.c:5805
> SUSPICIOUS: a \ character appears outside of a #define at ./target/i386/cpu.c:5806
> SUSPICIOUS: a \ character appears outside of a #define at ./target/i386/cpu.c:6329
> SUSPICIOUS: a \ character appears outside of a #define at ./hw/sd/sdhci.c:1133
> SUSPICIOUS: a \ character appears outside of a #define at ./hw/scsi/scsi-disk.c:3081
> SUSPICIOUS: a \ character appears outside of a #define at ./hw/net/virtio-net.c:1529
> SUSPICIOUS: a \ character appears outside of a #define at ./hw/riscv/sifive_u.c:468
> SUSPICIOUS: a \ character appears outside of a #define at ./dump/dump.c:1895
> SUSPICIOUS: a \ character appears outside of a #define at ./block/vhdx.c:2209
> SUSPICIOUS: a \ character appears outside of a #define at ./block/vhdx.c:2215
> SUSPICIOUS: a \ character appears outside of a #define at ./block/vhdx.c:2221
> SUSPICIOUS: a \ character appears outside of a #define at ./block/vhdx.c:2222
> SUSPICIOUS: a \ character appears outside of a #define at ./block/replication.c:172
> SUSPICIOUS: a \ character appears outside of a #define at ./block/replication.c:173
>
> Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com>
> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
ppc parts
Acked-by: David Gibson <david@gibson.dropbear.id.au>
> ---
> block/replication.c | 4 ++--
> block/vhdx.c | 8 ++++----
> dump/dump.c | 2 +-
> hw/net/virtio-net.c | 2 +-
> hw/riscv/sifive_u.c | 2 +-
> hw/scsi/scsi-disk.c | 2 +-
> hw/sd/sdhci.c | 2 +-
> target/i386/cpu.c | 18 +++++++++---------
> target/microblaze/cpu.c | 14 +++++++-------
> target/ppc/translate_init.inc.c | 4 ++--
> 10 files changed, 29 insertions(+), 29 deletions(-)
>
> diff --git a/block/replication.c b/block/replication.c
> index da013c2041..971f0fe266 100644
> --- a/block/replication.c
> +++ b/block/replication.c
> @@ -172,8 +172,8 @@ static void replication_child_perm(BlockDriverState *bs, BdrvChild *c,
> if ((bs->open_flags & (BDRV_O_INACTIVE | BDRV_O_RDWR)) == BDRV_O_RDWR) {
> *nperm |= BLK_PERM_WRITE;
> }
> - *nshared = BLK_PERM_CONSISTENT_READ \
> - | BLK_PERM_WRITE \
> + *nshared = BLK_PERM_CONSISTENT_READ
> + | BLK_PERM_WRITE
> | BLK_PERM_WRITE_UNCHANGED;
> return;
> }
> diff --git a/block/vhdx.c b/block/vhdx.c
> index 33e57cd656..e16fdc2f2d 100644
> --- a/block/vhdx.c
> +++ b/block/vhdx.c
> @@ -2206,20 +2206,20 @@ static QemuOptsList vhdx_create_opts = {
> .name = VHDX_BLOCK_OPT_BLOCK_SIZE,
> .type = QEMU_OPT_SIZE,
> .def_value_str = stringify(0),
> - .help = "Block Size; min 1MB, max 256MB. " \
> + .help = "Block Size; min 1MB, max 256MB. "
> "0 means auto-calculate based on image size."
> },
> {
> .name = BLOCK_OPT_SUBFMT,
> .type = QEMU_OPT_STRING,
> - .help = "VHDX format type, can be either 'dynamic' or 'fixed'. "\
> + .help = "VHDX format type, can be either 'dynamic' or 'fixed'. "
> "Default is 'dynamic'."
> },
> {
> .name = VHDX_BLOCK_OPT_ZERO,
> .type = QEMU_OPT_BOOL,
> - .help = "Force use of payload blocks of type 'ZERO'. "\
> - "Non-standard, but default. Do not set to 'off' when "\
> + .help = "Force use of payload blocks of type 'ZERO'. "
> + "Non-standard, but default. Do not set to 'off' when "
> "using 'qemu-img convert' with subformat=dynamic."
> },
> { NULL }
> diff --git a/dump/dump.c b/dump/dump.c
> index 22ed1d3b0d..248ea06370 100644
> --- a/dump/dump.c
> +++ b/dump/dump.c
> @@ -1892,7 +1892,7 @@ static void dump_process(DumpState *s, Error **errp)
> result = qmp_query_dump(NULL);
> /* should never fail */
> assert(result);
> - qapi_event_send_dump_completed(result, !!local_err, (local_err ? \
> + qapi_event_send_dump_completed(result, !!local_err, (local_err ?
> error_get_pretty(local_err) : NULL));
> qapi_free_DumpQueryResult(result);
>
> diff --git a/hw/net/virtio-net.c b/hw/net/virtio-net.c
> index a46e3b37a7..eddfa7f923 100644
> --- a/hw/net/virtio-net.c
> +++ b/hw/net/virtio-net.c
> @@ -1526,7 +1526,7 @@ static void virtio_net_rsc_extract_unit6(VirtioNetRscChain *chain,
> + sizeof(struct eth_header));
> unit->ip = ip6;
> unit->ip_plen = &(ip6->ip6_ctlun.ip6_un1.ip6_un1_plen);
> - unit->tcp = (struct tcp_header *)(((uint8_t *)unit->ip)\
> + unit->tcp = (struct tcp_header *)(((uint8_t *)unit->ip)
> + sizeof(struct ip6_header));
> unit->tcp_hdrlen = (htons(unit->tcp->th_offset_flags) & 0xF000) >> 10;
>
> diff --git a/hw/riscv/sifive_u.c b/hw/riscv/sifive_u.c
> index 56351c4faa..998666c91f 100644
> --- a/hw/riscv/sifive_u.c
> +++ b/hw/riscv/sifive_u.c
> @@ -465,7 +465,7 @@ static void riscv_sifive_u_machine_instance_init(Object *obj)
> object_property_add_bool(obj, "start-in-flash", sifive_u_get_start_in_flash,
> sifive_u_set_start_in_flash, NULL);
> object_property_set_description(obj, "start-in-flash",
> - "Set on to tell QEMU's ROM to jump to " \
> + "Set on to tell QEMU's ROM to jump to "
> "flash. Otherwise QEMU will jump to DRAM",
> NULL);
> }
> diff --git a/hw/scsi/scsi-disk.c b/hw/scsi/scsi-disk.c
> index 1c0cb63a6f..e5bcd0baf8 100644
> --- a/hw/scsi/scsi-disk.c
> +++ b/hw/scsi/scsi-disk.c
> @@ -3078,7 +3078,7 @@ static const TypeInfo scsi_cd_info = {
>
> #ifdef __linux__
> static Property scsi_block_properties[] = {
> - DEFINE_BLOCK_ERROR_PROPERTIES(SCSIDiskState, qdev.conf), \
> + DEFINE_BLOCK_ERROR_PROPERTIES(SCSIDiskState, qdev.conf),
> DEFINE_PROP_DRIVE("drive", SCSIDiskState, qdev.conf.blk),
> DEFINE_PROP_BOOL("share-rw", SCSIDiskState, qdev.conf.share_rw, false),
> DEFINE_PROP_UINT16("rotation_rate", SCSIDiskState, rotation_rate, 0),
> diff --git a/hw/sd/sdhci.c b/hw/sd/sdhci.c
> index de63ffb037..70531ad360 100644
> --- a/hw/sd/sdhci.c
> +++ b/hw/sd/sdhci.c
> @@ -1130,7 +1130,7 @@ sdhci_write(void *opaque, hwaddr offset, uint64_t val, unsigned size)
>
> /* Limit block size to the maximum buffer size */
> if (extract32(s->blksize, 0, 12) > s->buf_maxsz) {
> - qemu_log_mask(LOG_GUEST_ERROR, "%s: Size 0x%x is larger than " \
> + qemu_log_mask(LOG_GUEST_ERROR, "%s: Size 0x%x is larger than "
> "the maximum buffer 0x%x", __func__, s->blksize,
> s->buf_maxsz);
>
> diff --git a/target/i386/cpu.c b/target/i386/cpu.c
> index 90ffc5f3b1..9c256ab159 100644
> --- a/target/i386/cpu.c
> +++ b/target/i386/cpu.c
> @@ -5784,9 +5784,9 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index, uint32_t count,
> host_cpuid(index, 0, eax, ebx, ecx, edx);
> break;
> }
> - *eax = (L1_DTLB_2M_ASSOC << 24) | (L1_DTLB_2M_ENTRIES << 16) | \
> + *eax = (L1_DTLB_2M_ASSOC << 24) | (L1_DTLB_2M_ENTRIES << 16) |
> (L1_ITLB_2M_ASSOC << 8) | (L1_ITLB_2M_ENTRIES);
> - *ebx = (L1_DTLB_4K_ASSOC << 24) | (L1_DTLB_4K_ENTRIES << 16) | \
> + *ebx = (L1_DTLB_4K_ASSOC << 24) | (L1_DTLB_4K_ENTRIES << 16) |
> (L1_ITLB_4K_ASSOC << 8) | (L1_ITLB_4K_ENTRIES);
> *ecx = encode_cache_cpuid80000005(env->cache_info_amd.l1d_cache);
> *edx = encode_cache_cpuid80000005(env->cache_info_amd.l1i_cache);
> @@ -5797,13 +5797,13 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index, uint32_t count,
> host_cpuid(index, 0, eax, ebx, ecx, edx);
> break;
> }
> - *eax = (AMD_ENC_ASSOC(L2_DTLB_2M_ASSOC) << 28) | \
> - (L2_DTLB_2M_ENTRIES << 16) | \
> - (AMD_ENC_ASSOC(L2_ITLB_2M_ASSOC) << 12) | \
> + *eax = (AMD_ENC_ASSOC(L2_DTLB_2M_ASSOC) << 28) |
> + (L2_DTLB_2M_ENTRIES << 16) |
> + (AMD_ENC_ASSOC(L2_ITLB_2M_ASSOC) << 12) |
> (L2_ITLB_2M_ENTRIES);
> - *ebx = (AMD_ENC_ASSOC(L2_DTLB_4K_ASSOC) << 28) | \
> - (L2_DTLB_4K_ENTRIES << 16) | \
> - (AMD_ENC_ASSOC(L2_ITLB_4K_ASSOC) << 12) | \
> + *ebx = (AMD_ENC_ASSOC(L2_DTLB_4K_ASSOC) << 28) |
> + (L2_DTLB_4K_ENTRIES << 16) |
> + (AMD_ENC_ASSOC(L2_ITLB_4K_ASSOC) << 12) |
> (L2_ITLB_4K_ENTRIES);
> encode_cache_cpuid80000006(env->cache_info_amd.l2_cache,
> cpu->enable_l3_cache ?
> @@ -6326,7 +6326,7 @@ static void x86_cpu_expand_features(X86CPU *cpu, Error **errp)
> */
> env->features[w] |=
> x86_cpu_get_supported_feature_word(w, cpu->migratable) &
> - ~env->user_features[w] & \
> + ~env->user_features[w] &
> ~feature_word_info[w].no_autoenable_flags;
> }
> }
> diff --git a/target/microblaze/cpu.c b/target/microblaze/cpu.c
> index a2c2f271df..c9cf2364ca 100644
> --- a/target/microblaze/cpu.c
> +++ b/target/microblaze/cpu.c
> @@ -163,14 +163,14 @@ static void mb_cpu_realizefn(DeviceState *dev, Error **errp)
>
> qemu_init_vcpu(cs);
>
> - env->pvr.regs[0] = PVR0_USE_EXC_MASK \
> - | PVR0_USE_ICACHE_MASK \
> + env->pvr.regs[0] = PVR0_USE_EXC_MASK
> + | PVR0_USE_ICACHE_MASK
> | PVR0_USE_DCACHE_MASK;
> - env->pvr.regs[2] = PVR2_D_OPB_MASK \
> - | PVR2_D_LMB_MASK \
> - | PVR2_I_OPB_MASK \
> - | PVR2_I_LMB_MASK \
> - | PVR2_FPU_EXC_MASK \
> + env->pvr.regs[2] = PVR2_D_OPB_MASK
> + | PVR2_D_LMB_MASK
> + | PVR2_I_OPB_MASK
> + | PVR2_I_LMB_MASK
> + | PVR2_FPU_EXC_MASK
> | 0;
>
> version = cpu->cfg.version ? cpu->cfg.version : DEFAULT_CPU_VERSION;
> diff --git a/target/ppc/translate_init.inc.c b/target/ppc/translate_init.inc.c
> index e853164a86..fd763e588e 100644
> --- a/target/ppc/translate_init.inc.c
> +++ b/target/ppc/translate_init.inc.c
> @@ -5210,7 +5210,7 @@ POWERPC_FAMILY(e5500)(ObjectClass *oc, void *data)
> PPC_FLOAT_STFIWX | PPC_WAIT |
> PPC_MEM_TLBSYNC | PPC_TLBIVAX | PPC_MEM_SYNC |
> PPC_64B | PPC_POPCNTB | PPC_POPCNTWD;
> - pcc->insns_flags2 = PPC2_BOOKE206 | PPC2_PRCNTL | PPC2_PERM_ISA206 | \
> + pcc->insns_flags2 = PPC2_BOOKE206 | PPC2_PRCNTL | PPC2_PERM_ISA206 |
> PPC2_FP_CVT_S64;
> pcc->msr_mask = (1ull << MSR_CM) |
> (1ull << MSR_GS) |
> @@ -5258,7 +5258,7 @@ POWERPC_FAMILY(e6500)(ObjectClass *oc, void *data)
> PPC_FLOAT_STFIWX | PPC_WAIT |
> PPC_MEM_TLBSYNC | PPC_TLBIVAX | PPC_MEM_SYNC |
> PPC_64B | PPC_POPCNTB | PPC_POPCNTWD | PPC_ALTIVEC;
> - pcc->insns_flags2 = PPC2_BOOKE206 | PPC2_PRCNTL | PPC2_PERM_ISA206 | \
> + pcc->insns_flags2 = PPC2_BOOKE206 | PPC2_PRCNTL | PPC2_PERM_ISA206 |
> PPC2_FP_CVT_S64 | PPC2_ATOMIC_ISA206;
> pcc->msr_mask = (1ull << MSR_CM) |
> (1ull << MSR_GS) |
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 833 bytes --]
^ permalink raw reply [flat|nested] 98+ messages in thread
* Re: [PATCH-for-5.1 v3 01/24] various: Remove suspicious '\' character outside of #define in C code
2020-04-12 22:35 ` Philippe Mathieu-Daudé
@ 2020-04-29 6:03 ` Markus Armbruster
-1 siblings, 0 replies; 98+ messages in thread
From: Markus Armbruster @ 2020-04-29 6:03 UTC (permalink / raw)
To: Philippe Mathieu-Daudé
Cc: Fam Zheng, Peter Maydell, Sagar Karandikar, Michael S. Tsirkin,
Jeff Cody, Jason Wang, qemu-devel, Alistair Francis,
Edgar E. Iglesias, Max Reitz, qemu-block, Markus Armbruster,
Joel Stanley, Marc-André Lureau, David Gibson,
Philippe Mathieu-Daudé,
Eduardo Habkost, Jean-Christophe Dubois, Xie Changlong,
Alistair Francis, Beniamino Galvani, qemu-arm, Peter Chubb,
Cédric Le Goater, qemu-ppc, Richard Henderson, Kevin Wolf,
qemu-riscv, Andrew Jeffery, Wen Congyang, Subbaraya Sundeep,
Palmer Dabbelt, Bastian Koppelmann, Paolo Bonzini
Philippe Mathieu-Daudé <f4bug@amsat.org> writes:
> Fixes the following coccinelle warnings:
>
> $ spatch --sp-file --verbose-parsing ... \
> scripts/coccinelle/remove_local_err.cocci
> ...
> SUSPICIOUS: a \ character appears outside of a #define at ./target/ppc/translate_init.inc.c:5213
[...]
> SUSPICIOUS: a \ character appears outside of a #define at ./block/replication.c:173
>
> Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com>
> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
I'm queuing this patch just to get it out of the way. Thanks!
^ permalink raw reply [flat|nested] 98+ messages in thread
* Re: [PATCH-for-5.1 v3 01/24] various: Remove suspicious '\' character outside of #define in C code
@ 2020-04-29 6:03 ` Markus Armbruster
0 siblings, 0 replies; 98+ messages in thread
From: Markus Armbruster @ 2020-04-29 6:03 UTC (permalink / raw)
To: Philippe Mathieu-Daudé
Cc: qemu-devel, Fam Zheng, Peter Maydell, Sagar Karandikar,
Michael S. Tsirkin, Jeff Cody, Jason Wang, Alistair Francis,
Edgar E. Iglesias, Subbaraya Sundeep, qemu-block,
Markus Armbruster, Max Reitz, Joel Stanley,
Marc-André Lureau, Richard Henderson,
Philippe Mathieu-Daudé,
Eduardo Habkost, Xie Changlong, Alistair Francis,
Beniamino Galvani, qemu-arm, Peter Chubb, Cédric Le Goater,
Palmer Dabbelt, David Gibson, Kevin Wolf, qemu-riscv,
Andrew Jeffery, Wen Congyang, Jean-Christophe Dubois, qemu-ppc,
Bastian Koppelmann, Paolo Bonzini
Philippe Mathieu-Daudé <f4bug@amsat.org> writes:
> Fixes the following coccinelle warnings:
>
> $ spatch --sp-file --verbose-parsing ... \
> scripts/coccinelle/remove_local_err.cocci
> ...
> SUSPICIOUS: a \ character appears outside of a #define at ./target/ppc/translate_init.inc.c:5213
[...]
> SUSPICIOUS: a \ character appears outside of a #define at ./block/replication.c:173
>
> Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com>
> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
I'm queuing this patch just to get it out of the way. Thanks!
^ permalink raw reply [flat|nested] 98+ messages in thread
* [PATCH-for-5.1 v3 02/24] scripts/coccinelle: Script to simplify DeviceClass error propagation
2020-04-12 22:35 ` Philippe Mathieu-Daudé
@ 2020-04-12 22:35 ` Philippe Mathieu-Daudé
-1 siblings, 0 replies; 98+ messages in thread
From: Philippe Mathieu-Daudé @ 2020-04-12 22:35 UTC (permalink / raw)
To: qemu-devel
Cc: Fam Zheng, Peter Maydell, Sagar Karandikar, Michael S. Tsirkin,
Jeff Cody, Jason Wang, Alistair Francis, Edgar E. Iglesias,
Subbaraya Sundeep, qemu-block, Markus Armbruster, Max Reitz,
Joel Stanley, Marc-André Lureau, Richard Henderson,
Philippe Mathieu-Daudé,
Eduardo Habkost, Xie Changlong, Alistair Francis,
Beniamino Galvani, qemu-arm, Peter Chubb, Cédric Le Goater,
Palmer Dabbelt, David Gibson, Kevin Wolf, qemu-riscv,
Andrew Jeffery, Wen Congyang, Philippe Mathieu-Daudé,
Jean-Christophe Dubois, qemu-ppc, Bastian Koppelmann,
Paolo Bonzini
When a device uses an Error* with data not modified before realize(),
this call can be moved to init(). Add a Coccinelle patch to find such
uses.
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
...implify-init-realize-error_propagate.cocci | 69 +++++++++++++++++++
MAINTAINERS | 1 +
2 files changed, 70 insertions(+)
create mode 100644 scripts/coccinelle/simplify-init-realize-error_propagate.cocci
diff --git a/scripts/coccinelle/simplify-init-realize-error_propagate.cocci b/scripts/coccinelle/simplify-init-realize-error_propagate.cocci
new file mode 100644
index 0000000000..2e3ec4d98a
--- /dev/null
+++ b/scripts/coccinelle/simplify-init-realize-error_propagate.cocci
@@ -0,0 +1,69 @@
+// Find error-propagation calls that don't need to be in DeviceClass::realize()
+// because they don't use information user can change before calling realize(),
+// so they can be moved to DeviceClass:initfn() where error propagation is not
+// needed.
+//
+// Copyright: (C) 2020 Philippe Mathieu-Daudé
+// This work is licensed under the terms of the GNU GPLv2 or later.
+//
+// spatch \
+// --macro-file scripts/cocci-macro-file.h \
+// --sp-file \
+// scripts/coccinelle/simplify-init-realize-error_propagate.cocci \
+// --timeout 60
+//
+// Inspired by https://www.mail-archive.com/qemu-devel@nongnu.org/msg692500.html
+
+
+@ match_class_init @
+TypeInfo info;
+identifier class_initfn;
+@@
+ info.class_init = class_initfn;
+
+
+@ match_instance_init @
+TypeInfo info;
+identifier instance_initfn;
+@@
+ info.instance_init = instance_initfn;
+
+
+@ match_realize @
+identifier match_class_init.class_initfn;
+DeviceClass *dc;
+identifier realizefn;
+@@
+void class_initfn(...)
+{
+ ...
+ dc->realize = realizefn;
+ ...
+}
+
+
+@ propagate_in_realize @
+identifier match_realize.realizefn;
+identifier err;
+identifier errp;
+identifier func_with_errp =~ "(?!object_property_set_link)";
+symbol error_abort, error_fatal;
+position pos;
+@@
+void realizefn@pos(..., Error **errp)
+{
+ ...
+ Error *err = NULL;
+ <+...
+ func_with_errp(..., \(&error_abort\|&error_fatal\));
+ ...+>
+}
+
+
+@ script:python @
+initfn << match_instance_init.instance_initfn;
+realizefn << match_realize.realizefn;
+p << propagate_in_realize.pos;
+@@
+print('>>> possible moves from {}() to {}() in {}:{}'
+ .format(initfn, realizefn, p[0].file, p[0].line))
diff --git a/MAINTAINERS b/MAINTAINERS
index 642c8e0b6b..6203543ec0 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -2058,6 +2058,7 @@ F: scripts/coccinelle/err-bad-newline.cocci
F: scripts/coccinelle/error-use-after-free.cocci
F: scripts/coccinelle/error_propagate_null.cocci
F: scripts/coccinelle/remove_local_err.cocci
+F: scripts/coccinelle/simplify-init-realize-error_propagate.cocci
F: scripts/coccinelle/use-error_fatal.cocci
GDB stub
--
2.21.1
^ permalink raw reply related [flat|nested] 98+ messages in thread* [PATCH-for-5.1 v3 02/24] scripts/coccinelle: Script to simplify DeviceClass error propagation
@ 2020-04-12 22:35 ` Philippe Mathieu-Daudé
0 siblings, 0 replies; 98+ messages in thread
From: Philippe Mathieu-Daudé @ 2020-04-12 22:35 UTC (permalink / raw)
To: qemu-devel
Cc: Joel Stanley, Jean-Christophe Dubois, Subbaraya Sundeep,
Max Reitz, Palmer Dabbelt, qemu-ppc, Sagar Karandikar,
Markus Armbruster, Jeff Cody, Peter Maydell, Xie Changlong,
Fam Zheng, Eduardo Habkost, Alistair Francis, qemu-arm,
Wen Congyang, Philippe Mathieu-Daudé,
Bastian Koppelmann, Edgar E. Iglesias, Kevin Wolf,
Marc-André Lureau, David Gibson, Jason Wang, Peter Chubb,
Beniamino Galvani, Alistair Francis, qemu-riscv,
Cédric Le Goater, qemu-block, Paolo Bonzini, Andrew Jeffery,
Michael S. Tsirkin, Richard Henderson,
Philippe Mathieu-Daudé
When a device uses an Error* with data not modified before realize(),
this call can be moved to init(). Add a Coccinelle patch to find such
uses.
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
...implify-init-realize-error_propagate.cocci | 69 +++++++++++++++++++
MAINTAINERS | 1 +
2 files changed, 70 insertions(+)
create mode 100644 scripts/coccinelle/simplify-init-realize-error_propagate.cocci
diff --git a/scripts/coccinelle/simplify-init-realize-error_propagate.cocci b/scripts/coccinelle/simplify-init-realize-error_propagate.cocci
new file mode 100644
index 0000000000..2e3ec4d98a
--- /dev/null
+++ b/scripts/coccinelle/simplify-init-realize-error_propagate.cocci
@@ -0,0 +1,69 @@
+// Find error-propagation calls that don't need to be in DeviceClass::realize()
+// because they don't use information user can change before calling realize(),
+// so they can be moved to DeviceClass:initfn() where error propagation is not
+// needed.
+//
+// Copyright: (C) 2020 Philippe Mathieu-Daudé
+// This work is licensed under the terms of the GNU GPLv2 or later.
+//
+// spatch \
+// --macro-file scripts/cocci-macro-file.h \
+// --sp-file \
+// scripts/coccinelle/simplify-init-realize-error_propagate.cocci \
+// --timeout 60
+//
+// Inspired by https://www.mail-archive.com/qemu-devel@nongnu.org/msg692500.html
+
+
+@ match_class_init @
+TypeInfo info;
+identifier class_initfn;
+@@
+ info.class_init = class_initfn;
+
+
+@ match_instance_init @
+TypeInfo info;
+identifier instance_initfn;
+@@
+ info.instance_init = instance_initfn;
+
+
+@ match_realize @
+identifier match_class_init.class_initfn;
+DeviceClass *dc;
+identifier realizefn;
+@@
+void class_initfn(...)
+{
+ ...
+ dc->realize = realizefn;
+ ...
+}
+
+
+@ propagate_in_realize @
+identifier match_realize.realizefn;
+identifier err;
+identifier errp;
+identifier func_with_errp =~ "(?!object_property_set_link)";
+symbol error_abort, error_fatal;
+position pos;
+@@
+void realizefn@pos(..., Error **errp)
+{
+ ...
+ Error *err = NULL;
+ <+...
+ func_with_errp(..., \(&error_abort\|&error_fatal\));
+ ...+>
+}
+
+
+@ script:python @
+initfn << match_instance_init.instance_initfn;
+realizefn << match_realize.realizefn;
+p << propagate_in_realize.pos;
+@@
+print('>>> possible moves from {}() to {}() in {}:{}'
+ .format(initfn, realizefn, p[0].file, p[0].line))
diff --git a/MAINTAINERS b/MAINTAINERS
index 642c8e0b6b..6203543ec0 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -2058,6 +2058,7 @@ F: scripts/coccinelle/err-bad-newline.cocci
F: scripts/coccinelle/error-use-after-free.cocci
F: scripts/coccinelle/error_propagate_null.cocci
F: scripts/coccinelle/remove_local_err.cocci
+F: scripts/coccinelle/simplify-init-realize-error_propagate.cocci
F: scripts/coccinelle/use-error_fatal.cocci
GDB stub
--
2.21.1
^ permalink raw reply related [flat|nested] 98+ messages in thread* Re: [PATCH-for-5.1 v3 02/24] scripts/coccinelle: Script to simplify DeviceClass error propagation
2020-04-12 22:35 ` Philippe Mathieu-Daudé
@ 2020-04-14 12:24 ` Markus Armbruster
-1 siblings, 0 replies; 98+ messages in thread
From: Markus Armbruster @ 2020-04-14 12:24 UTC (permalink / raw)
To: Philippe Mathieu-Daudé
Cc: Fam Zheng, Peter Maydell, Sagar Karandikar, Michael S. Tsirkin,
Jeff Cody, Jason Wang, qemu-devel, Alistair Francis,
Edgar E. Iglesias, Max Reitz, qemu-block, Markus Armbruster,
Joel Stanley, Marc-André Lureau, David Gibson,
Philippe Mathieu-Daudé,
Eduardo Habkost, Jean-Christophe Dubois, Xie Changlong,
Alistair Francis, Beniamino Galvani, qemu-arm, Peter Chubb,
Cédric Le Goater, qemu-ppc, Richard Henderson, Kevin Wolf,
qemu-riscv, Andrew Jeffery, Wen Congyang, Subbaraya Sundeep,
Palmer Dabbelt, Bastian Koppelmann, Paolo Bonzini
Philippe Mathieu-Daudé <f4bug@amsat.org> writes:
> When a device uses an Error* with data not modified before realize(),
> this call can be moved to init(). Add a Coccinelle patch to find such
> uses.
>
> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
> ---
> ...implify-init-realize-error_propagate.cocci | 69 +++++++++++++++++++
> MAINTAINERS | 1 +
> 2 files changed, 70 insertions(+)
> create mode 100644 scripts/coccinelle/simplify-init-realize-error_propagate.cocci
>
> diff --git a/scripts/coccinelle/simplify-init-realize-error_propagate.cocci b/scripts/coccinelle/simplify-init-realize-error_propagate.cocci
> new file mode 100644
> index 0000000000..2e3ec4d98a
> --- /dev/null
> +++ b/scripts/coccinelle/simplify-init-realize-error_propagate.cocci
> @@ -0,0 +1,69 @@
> +// Find error-propagation calls that don't need to be in DeviceClass::realize()
> +// because they don't use information user can change before calling realize(),
> +// so they can be moved to DeviceClass:initfn() where error propagation is not
> +// needed.
> +//
> +// Copyright: (C) 2020 Philippe Mathieu-Daudé
> +// This work is licensed under the terms of the GNU GPLv2 or later.
> +//
> +// spatch \
> +// --macro-file scripts/cocci-macro-file.h \
> +// --sp-file \
> +// scripts/coccinelle/simplify-init-realize-error_propagate.cocci \
> +// --timeout 60
> +//
> +// Inspired by https://www.mail-archive.com/qemu-devel@nongnu.org/msg692500.html
> +
> +
> +@ match_class_init @
> +TypeInfo info;
> +identifier class_initfn;
> +@@
> + info.class_init = class_initfn;
> +
> +
> +@ match_instance_init @
> +TypeInfo info;
> +identifier instance_initfn;
> +@@
> + info.instance_init = instance_initfn;
> +
> +
> +@ match_realize @
> +identifier match_class_init.class_initfn;
> +DeviceClass *dc;
> +identifier realizefn;
> +@@
> +void class_initfn(...)
> +{
> + ...
> + dc->realize = realizefn;
> + ...
> +}
I'm afraid this misses realize() methods of DeviceClass subclasses.
Consider PCI device "i6300esb" (picked just because it's simple).
pci_device_class_init() sets DeviceClass method realize() to
pci_qdev_realize(). pci_qdev_realize() does the work common to all PCI
devices, and calls PCIDeviceClass method realize() for the work specific
to the PCI device at hand.
i6300esb_class_init() sets PCIDeviceClass method realize() to
i6300esb_realize().
Your first rule should match i6300esb_info alright, and thus identify
i6300esb_class_init() as a class_init() method.
But your third rule can't match i6300esb_class_init()'s
k->realize = i6300esb_realize;
because @k is a PCIDeviceClass, not a DeviceClass.
I think it also misses cases that have a realize(), but no
instance_init().
Finding only some instances of an anti-pattern can still be useful. But
you should explain the script's limitations then, both in the script and
the commit message.
> +
> +
> +@ propagate_in_realize @
> +identifier match_realize.realizefn;
> +identifier err;
> +identifier errp;
> +identifier func_with_errp =~ "(?!object_property_set_link)";
What are you trying to accomplish with this lookahead assertion?
> +symbol error_abort, error_fatal;
> +position pos;
> +@@
> +void realizefn@pos(..., Error **errp)
> +{
> + ...
> + Error *err = NULL;
Why is this line required for a match?
> + <+...
> + func_with_errp(..., \(&error_abort\|&error_fatal\));
> + ...+>
> +}
> +
> +
> +@ script:python @
> +initfn << match_instance_init.instance_initfn;
> +realizefn << match_realize.realizefn;
> +p << propagate_in_realize.pos;
> +@@
> +print('>>> possible moves from {}() to {}() in {}:{}'
> + .format(initfn, realizefn, p[0].file, p[0].line))
> diff --git a/MAINTAINERS b/MAINTAINERS
> index 642c8e0b6b..6203543ec0 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -2058,6 +2058,7 @@ F: scripts/coccinelle/err-bad-newline.cocci
> F: scripts/coccinelle/error-use-after-free.cocci
> F: scripts/coccinelle/error_propagate_null.cocci
> F: scripts/coccinelle/remove_local_err.cocci
> +F: scripts/coccinelle/simplify-init-realize-error_propagate.cocci
> F: scripts/coccinelle/use-error_fatal.cocci
>
> GDB stub
^ permalink raw reply [flat|nested] 98+ messages in thread* Re: [PATCH-for-5.1 v3 02/24] scripts/coccinelle: Script to simplify DeviceClass error propagation
@ 2020-04-14 12:24 ` Markus Armbruster
0 siblings, 0 replies; 98+ messages in thread
From: Markus Armbruster @ 2020-04-14 12:24 UTC (permalink / raw)
To: Philippe Mathieu-Daudé
Cc: qemu-devel, Fam Zheng, Peter Maydell, Sagar Karandikar,
Michael S. Tsirkin, Jeff Cody, Jason Wang, Alistair Francis,
Edgar E. Iglesias, Subbaraya Sundeep, qemu-block,
Markus Armbruster, Max Reitz, Joel Stanley,
Marc-André Lureau, Richard Henderson,
Philippe Mathieu-Daudé,
Eduardo Habkost, Xie Changlong, Alistair Francis,
Beniamino Galvani, qemu-arm, Peter Chubb, Cédric Le Goater,
Palmer Dabbelt, David Gibson, Kevin Wolf, qemu-riscv,
Andrew Jeffery, Wen Congyang, Jean-Christophe Dubois, qemu-ppc,
Bastian Koppelmann, Paolo Bonzini
Philippe Mathieu-Daudé <f4bug@amsat.org> writes:
> When a device uses an Error* with data not modified before realize(),
> this call can be moved to init(). Add a Coccinelle patch to find such
> uses.
>
> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
> ---
> ...implify-init-realize-error_propagate.cocci | 69 +++++++++++++++++++
> MAINTAINERS | 1 +
> 2 files changed, 70 insertions(+)
> create mode 100644 scripts/coccinelle/simplify-init-realize-error_propagate.cocci
>
> diff --git a/scripts/coccinelle/simplify-init-realize-error_propagate.cocci b/scripts/coccinelle/simplify-init-realize-error_propagate.cocci
> new file mode 100644
> index 0000000000..2e3ec4d98a
> --- /dev/null
> +++ b/scripts/coccinelle/simplify-init-realize-error_propagate.cocci
> @@ -0,0 +1,69 @@
> +// Find error-propagation calls that don't need to be in DeviceClass::realize()
> +// because they don't use information user can change before calling realize(),
> +// so they can be moved to DeviceClass:initfn() where error propagation is not
> +// needed.
> +//
> +// Copyright: (C) 2020 Philippe Mathieu-Daudé
> +// This work is licensed under the terms of the GNU GPLv2 or later.
> +//
> +// spatch \
> +// --macro-file scripts/cocci-macro-file.h \
> +// --sp-file \
> +// scripts/coccinelle/simplify-init-realize-error_propagate.cocci \
> +// --timeout 60
> +//
> +// Inspired by https://www.mail-archive.com/qemu-devel@nongnu.org/msg692500.html
> +
> +
> +@ match_class_init @
> +TypeInfo info;
> +identifier class_initfn;
> +@@
> + info.class_init = class_initfn;
> +
> +
> +@ match_instance_init @
> +TypeInfo info;
> +identifier instance_initfn;
> +@@
> + info.instance_init = instance_initfn;
> +
> +
> +@ match_realize @
> +identifier match_class_init.class_initfn;
> +DeviceClass *dc;
> +identifier realizefn;
> +@@
> +void class_initfn(...)
> +{
> + ...
> + dc->realize = realizefn;
> + ...
> +}
I'm afraid this misses realize() methods of DeviceClass subclasses.
Consider PCI device "i6300esb" (picked just because it's simple).
pci_device_class_init() sets DeviceClass method realize() to
pci_qdev_realize(). pci_qdev_realize() does the work common to all PCI
devices, and calls PCIDeviceClass method realize() for the work specific
to the PCI device at hand.
i6300esb_class_init() sets PCIDeviceClass method realize() to
i6300esb_realize().
Your first rule should match i6300esb_info alright, and thus identify
i6300esb_class_init() as a class_init() method.
But your third rule can't match i6300esb_class_init()'s
k->realize = i6300esb_realize;
because @k is a PCIDeviceClass, not a DeviceClass.
I think it also misses cases that have a realize(), but no
instance_init().
Finding only some instances of an anti-pattern can still be useful. But
you should explain the script's limitations then, both in the script and
the commit message.
> +
> +
> +@ propagate_in_realize @
> +identifier match_realize.realizefn;
> +identifier err;
> +identifier errp;
> +identifier func_with_errp =~ "(?!object_property_set_link)";
What are you trying to accomplish with this lookahead assertion?
> +symbol error_abort, error_fatal;
> +position pos;
> +@@
> +void realizefn@pos(..., Error **errp)
> +{
> + ...
> + Error *err = NULL;
Why is this line required for a match?
> + <+...
> + func_with_errp(..., \(&error_abort\|&error_fatal\));
> + ...+>
> +}
> +
> +
> +@ script:python @
> +initfn << match_instance_init.instance_initfn;
> +realizefn << match_realize.realizefn;
> +p << propagate_in_realize.pos;
> +@@
> +print('>>> possible moves from {}() to {}() in {}:{}'
> + .format(initfn, realizefn, p[0].file, p[0].line))
> diff --git a/MAINTAINERS b/MAINTAINERS
> index 642c8e0b6b..6203543ec0 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -2058,6 +2058,7 @@ F: scripts/coccinelle/err-bad-newline.cocci
> F: scripts/coccinelle/error-use-after-free.cocci
> F: scripts/coccinelle/error_propagate_null.cocci
> F: scripts/coccinelle/remove_local_err.cocci
> +F: scripts/coccinelle/simplify-init-realize-error_propagate.cocci
> F: scripts/coccinelle/use-error_fatal.cocci
>
> GDB stub
^ permalink raw reply [flat|nested] 98+ messages in thread* Re: [PATCH-for-5.1 v3 02/24] scripts/coccinelle: Script to simplify DeviceClass error propagation
2020-04-14 12:24 ` Markus Armbruster
@ 2020-04-14 12:30 ` Philippe Mathieu-Daudé
-1 siblings, 0 replies; 98+ messages in thread
From: Philippe Mathieu-Daudé @ 2020-04-14 12:30 UTC (permalink / raw)
To: Markus Armbruster, Philippe Mathieu-Daudé
Cc: Fam Zheng, Peter Maydell, Sagar Karandikar, Michael S. Tsirkin,
Jeff Cody, Jason Wang, qemu-devel, Alistair Francis,
Edgar E. Iglesias, Max Reitz, qemu-block, Joel Stanley,
Marc-André Lureau, David Gibson, Eduardo Habkost,
Jean-Christophe Dubois, Xie Changlong, Alistair Francis,
Beniamino Galvani, qemu-arm, Peter Chubb, Cédric Le Goater,
qemu-ppc, Richard Henderson, Kevin Wolf, qemu-riscv,
Andrew Jeffery, Wen Congyang, Subbaraya Sundeep, Palmer Dabbelt,
Bastian Koppelmann, Paolo Bonzini
On 4/14/20 2:24 PM, Markus Armbruster wrote:
> Philippe Mathieu-Daudé <f4bug@amsat.org> writes:
>
>> When a device uses an Error* with data not modified before realize(),
>> this call can be moved to init(). Add a Coccinelle patch to find such
>> uses.
>>
>> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
>> ---
>> ...implify-init-realize-error_propagate.cocci | 69 +++++++++++++++++++
>> MAINTAINERS | 1 +
>> 2 files changed, 70 insertions(+)
>> create mode 100644 scripts/coccinelle/simplify-init-realize-error_propagate.cocci
>>
>> diff --git a/scripts/coccinelle/simplify-init-realize-error_propagate.cocci b/scripts/coccinelle/simplify-init-realize-error_propagate.cocci
>> new file mode 100644
>> index 0000000000..2e3ec4d98a
>> --- /dev/null
>> +++ b/scripts/coccinelle/simplify-init-realize-error_propagate.cocci
>> @@ -0,0 +1,69 @@
>> +// Find error-propagation calls that don't need to be in DeviceClass::realize()
>> +// because they don't use information user can change before calling realize(),
>> +// so they can be moved to DeviceClass:initfn() where error propagation is not
>> +// needed.
>> +//
>> +// Copyright: (C) 2020 Philippe Mathieu-Daudé
>> +// This work is licensed under the terms of the GNU GPLv2 or later.
>> +//
>> +// spatch \
>> +// --macro-file scripts/cocci-macro-file.h \
>> +// --sp-file \
>> +// scripts/coccinelle/simplify-init-realize-error_propagate.cocci \
>> +// --timeout 60
>> +//
>> +// Inspired by https://www.mail-archive.com/qemu-devel@nongnu.org/msg692500.html
>> +
>> +
>> +@ match_class_init @
>> +TypeInfo info;
>> +identifier class_initfn;
>> +@@
>> + info.class_init = class_initfn;
>> +
>> +
>> +@ match_instance_init @
>> +TypeInfo info;
>> +identifier instance_initfn;
>> +@@
>> + info.instance_init = instance_initfn;
>> +
>> +
>> +@ match_realize @
>> +identifier match_class_init.class_initfn;
>> +DeviceClass *dc;
>> +identifier realizefn;
>> +@@
>> +void class_initfn(...)
>> +{
>> + ...
>> + dc->realize = realizefn;
>> + ...
>> +}
>
> I'm afraid this misses realize() methods of DeviceClass subclasses.
> Consider PCI device "i6300esb" (picked just because it's simple).
>
> pci_device_class_init() sets DeviceClass method realize() to
> pci_qdev_realize(). pci_qdev_realize() does the work common to all PCI
> devices, and calls PCIDeviceClass method realize() for the work specific
> to the PCI device at hand.
>
> i6300esb_class_init() sets PCIDeviceClass method realize() to
> i6300esb_realize().
>
> Your first rule should match i6300esb_info alright, and thus identify
> i6300esb_class_init() as a class_init() method.
>
> But your third rule can't match i6300esb_class_init()'s
>
> k->realize = i6300esb_realize;
>
> because @k is a PCIDeviceClass, not a DeviceClass.
>
> I think it also misses cases that have a realize(), but no
> instance_init().
>
> Finding only some instances of an anti-pattern can still be useful. But
> you should explain the script's limitations then, both in the script and
> the commit message.
OK.
>
>> +
>> +
>> +@ propagate_in_realize @
>> +identifier match_realize.realizefn;
>> +identifier err;
>> +identifier errp;
>> +identifier func_with_errp =~ "(?!object_property_set_link)";
>
> What are you trying to accomplish with this lookahead assertion?
"match all func_with_errp() except object_property_set_link()"?
>
>> +symbol error_abort, error_fatal;
>> +position pos;
>> +@@
>> +void realizefn@pos(..., Error **errp)
>> +{
>> + ...
>> + Error *err = NULL;
>
> Why is this line required for a match?
Hmmm maybe I was expecting a local_err... else a left-over from previous
intents :)
>
>> + <+...
>> + func_with_errp(..., \(&error_abort\|&error_fatal\));
>> + ...+>
>> +}
>> +
>> +
>> +@ script:python @
>> +initfn << match_instance_init.instance_initfn;
>> +realizefn << match_realize.realizefn;
>> +p << propagate_in_realize.pos;
>> +@@
>> +print('>>> possible moves from {}() to {}() in {}:{}'
>> + .format(initfn, realizefn, p[0].file, p[0].line))
>> diff --git a/MAINTAINERS b/MAINTAINERS
>> index 642c8e0b6b..6203543ec0 100644
>> --- a/MAINTAINERS
>> +++ b/MAINTAINERS
>> @@ -2058,6 +2058,7 @@ F: scripts/coccinelle/err-bad-newline.cocci
>> F: scripts/coccinelle/error-use-after-free.cocci
>> F: scripts/coccinelle/error_propagate_null.cocci
>> F: scripts/coccinelle/remove_local_err.cocci
>> +F: scripts/coccinelle/simplify-init-realize-error_propagate.cocci
>> F: scripts/coccinelle/use-error_fatal.cocci
>>
>> GDB stub
>
^ permalink raw reply [flat|nested] 98+ messages in thread* Re: [PATCH-for-5.1 v3 02/24] scripts/coccinelle: Script to simplify DeviceClass error propagation
@ 2020-04-14 12:30 ` Philippe Mathieu-Daudé
0 siblings, 0 replies; 98+ messages in thread
From: Philippe Mathieu-Daudé @ 2020-04-14 12:30 UTC (permalink / raw)
To: Markus Armbruster, Philippe Mathieu-Daudé
Cc: qemu-devel, Fam Zheng, Peter Maydell, Sagar Karandikar,
Michael S. Tsirkin, Jeff Cody, Jason Wang, Alistair Francis,
Edgar E. Iglesias, Subbaraya Sundeep, qemu-block, Max Reitz,
Joel Stanley, Marc-André Lureau, Richard Henderson,
Eduardo Habkost, Xie Changlong, Alistair Francis,
Beniamino Galvani, qemu-arm, Peter Chubb, Cédric Le Goater,
Palmer Dabbelt, David Gibson, Kevin Wolf, qemu-riscv,
Andrew Jeffery, Wen Congyang, Jean-Christophe Dubois, qemu-ppc,
Bastian Koppelmann, Paolo Bonzini
On 4/14/20 2:24 PM, Markus Armbruster wrote:
> Philippe Mathieu-Daudé <f4bug@amsat.org> writes:
>
>> When a device uses an Error* with data not modified before realize(),
>> this call can be moved to init(). Add a Coccinelle patch to find such
>> uses.
>>
>> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
>> ---
>> ...implify-init-realize-error_propagate.cocci | 69 +++++++++++++++++++
>> MAINTAINERS | 1 +
>> 2 files changed, 70 insertions(+)
>> create mode 100644 scripts/coccinelle/simplify-init-realize-error_propagate.cocci
>>
>> diff --git a/scripts/coccinelle/simplify-init-realize-error_propagate.cocci b/scripts/coccinelle/simplify-init-realize-error_propagate.cocci
>> new file mode 100644
>> index 0000000000..2e3ec4d98a
>> --- /dev/null
>> +++ b/scripts/coccinelle/simplify-init-realize-error_propagate.cocci
>> @@ -0,0 +1,69 @@
>> +// Find error-propagation calls that don't need to be in DeviceClass::realize()
>> +// because they don't use information user can change before calling realize(),
>> +// so they can be moved to DeviceClass:initfn() where error propagation is not
>> +// needed.
>> +//
>> +// Copyright: (C) 2020 Philippe Mathieu-Daudé
>> +// This work is licensed under the terms of the GNU GPLv2 or later.
>> +//
>> +// spatch \
>> +// --macro-file scripts/cocci-macro-file.h \
>> +// --sp-file \
>> +// scripts/coccinelle/simplify-init-realize-error_propagate.cocci \
>> +// --timeout 60
>> +//
>> +// Inspired by https://www.mail-archive.com/qemu-devel@nongnu.org/msg692500.html
>> +
>> +
>> +@ match_class_init @
>> +TypeInfo info;
>> +identifier class_initfn;
>> +@@
>> + info.class_init = class_initfn;
>> +
>> +
>> +@ match_instance_init @
>> +TypeInfo info;
>> +identifier instance_initfn;
>> +@@
>> + info.instance_init = instance_initfn;
>> +
>> +
>> +@ match_realize @
>> +identifier match_class_init.class_initfn;
>> +DeviceClass *dc;
>> +identifier realizefn;
>> +@@
>> +void class_initfn(...)
>> +{
>> + ...
>> + dc->realize = realizefn;
>> + ...
>> +}
>
> I'm afraid this misses realize() methods of DeviceClass subclasses.
> Consider PCI device "i6300esb" (picked just because it's simple).
>
> pci_device_class_init() sets DeviceClass method realize() to
> pci_qdev_realize(). pci_qdev_realize() does the work common to all PCI
> devices, and calls PCIDeviceClass method realize() for the work specific
> to the PCI device at hand.
>
> i6300esb_class_init() sets PCIDeviceClass method realize() to
> i6300esb_realize().
>
> Your first rule should match i6300esb_info alright, and thus identify
> i6300esb_class_init() as a class_init() method.
>
> But your third rule can't match i6300esb_class_init()'s
>
> k->realize = i6300esb_realize;
>
> because @k is a PCIDeviceClass, not a DeviceClass.
>
> I think it also misses cases that have a realize(), but no
> instance_init().
>
> Finding only some instances of an anti-pattern can still be useful. But
> you should explain the script's limitations then, both in the script and
> the commit message.
OK.
>
>> +
>> +
>> +@ propagate_in_realize @
>> +identifier match_realize.realizefn;
>> +identifier err;
>> +identifier errp;
>> +identifier func_with_errp =~ "(?!object_property_set_link)";
>
> What are you trying to accomplish with this lookahead assertion?
"match all func_with_errp() except object_property_set_link()"?
>
>> +symbol error_abort, error_fatal;
>> +position pos;
>> +@@
>> +void realizefn@pos(..., Error **errp)
>> +{
>> + ...
>> + Error *err = NULL;
>
> Why is this line required for a match?
Hmmm maybe I was expecting a local_err... else a left-over from previous
intents :)
>
>> + <+...
>> + func_with_errp(..., \(&error_abort\|&error_fatal\));
>> + ...+>
>> +}
>> +
>> +
>> +@ script:python @
>> +initfn << match_instance_init.instance_initfn;
>> +realizefn << match_realize.realizefn;
>> +p << propagate_in_realize.pos;
>> +@@
>> +print('>>> possible moves from {}() to {}() in {}:{}'
>> + .format(initfn, realizefn, p[0].file, p[0].line))
>> diff --git a/MAINTAINERS b/MAINTAINERS
>> index 642c8e0b6b..6203543ec0 100644
>> --- a/MAINTAINERS
>> +++ b/MAINTAINERS
>> @@ -2058,6 +2058,7 @@ F: scripts/coccinelle/err-bad-newline.cocci
>> F: scripts/coccinelle/error-use-after-free.cocci
>> F: scripts/coccinelle/error_propagate_null.cocci
>> F: scripts/coccinelle/remove_local_err.cocci
>> +F: scripts/coccinelle/simplify-init-realize-error_propagate.cocci
>> F: scripts/coccinelle/use-error_fatal.cocci
>>
>> GDB stub
>
^ permalink raw reply [flat|nested] 98+ messages in thread* Re: [PATCH-for-5.1 v3 02/24] scripts/coccinelle: Script to simplify DeviceClass error propagation
2020-04-14 12:30 ` Philippe Mathieu-Daudé
@ 2020-04-14 13:17 ` Markus Armbruster
-1 siblings, 0 replies; 98+ messages in thread
From: Markus Armbruster @ 2020-04-14 13:17 UTC (permalink / raw)
To: Philippe Mathieu-Daudé
Cc: Fam Zheng, Peter Maydell, Sagar Karandikar, Michael S. Tsirkin,
Jeff Cody, Jason Wang, qemu-devel, Alistair Francis,
Edgar E. Iglesias, Max Reitz, qemu-block, Joel Stanley,
Marc-André Lureau, Richard Henderson, Eduardo Habkost,
Xie Changlong, Alistair Francis, Beniamino Galvani, qemu-arm,
Peter Chubb, Cédric Le Goater, Subbaraya Sundeep,
Palmer Dabbelt, David Gibson, Kevin Wolf, qemu-riscv,
Andrew Jeffery, Wen Congyang, Philippe Mathieu-Daudé,
Jean-Christophe Dubois, qemu-ppc, Bastian Koppelmann,
Paolo Bonzini
Philippe Mathieu-Daudé <philmd@redhat.com> writes:
> On 4/14/20 2:24 PM, Markus Armbruster wrote:
>> Philippe Mathieu-Daudé <f4bug@amsat.org> writes:
>>
>>> When a device uses an Error* with data not modified before realize(),
>>> this call can be moved to init(). Add a Coccinelle patch to find such
>>> uses.
>>>
>>> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
>>> ---
>>> ...implify-init-realize-error_propagate.cocci | 69 +++++++++++++++++++
>>> MAINTAINERS | 1 +
>>> 2 files changed, 70 insertions(+)
>>> create mode 100644 scripts/coccinelle/simplify-init-realize-error_propagate.cocci
>>>
>>> diff --git a/scripts/coccinelle/simplify-init-realize-error_propagate.cocci b/scripts/coccinelle/simplify-init-realize-error_propagate.cocci
>>> new file mode 100644
>>> index 0000000000..2e3ec4d98a
>>> --- /dev/null
>>> +++ b/scripts/coccinelle/simplify-init-realize-error_propagate.cocci
>>> @@ -0,0 +1,69 @@
>>> +// Find error-propagation calls that don't need to be in DeviceClass::realize()
>>> +// because they don't use information user can change before calling realize(),
>>> +// so they can be moved to DeviceClass:initfn() where error propagation is not
>>> +// needed.
>>> +//
>>> +// Copyright: (C) 2020 Philippe Mathieu-Daudé
>>> +// This work is licensed under the terms of the GNU GPLv2 or later.
>>> +//
>>> +// spatch \
>>> +// --macro-file scripts/cocci-macro-file.h \
>>> +// --sp-file \
>>> +// scripts/coccinelle/simplify-init-realize-error_propagate.cocci \
>>> +// --timeout 60
>>> +//
>>> +// Inspired by https://www.mail-archive.com/qemu-devel@nongnu.org/msg692500.html
>>> +
>>> +
>>> +@ match_class_init @
>>> +TypeInfo info;
>>> +identifier class_initfn;
>>> +@@
>>> + info.class_init = class_initfn;
>>> +
>>> +
>>> +@ match_instance_init @
>>> +TypeInfo info;
>>> +identifier instance_initfn;
>>> +@@
>>> + info.instance_init = instance_initfn;
>>> +
>>> +
>>> +@ match_realize @
>>> +identifier match_class_init.class_initfn;
>>> +DeviceClass *dc;
>>> +identifier realizefn;
>>> +@@
>>> +void class_initfn(...)
>>> +{
>>> + ...
>>> + dc->realize = realizefn;
>>> + ...
>>> +}
>>
>> I'm afraid this misses realize() methods of DeviceClass subclasses.
>> Consider PCI device "i6300esb" (picked just because it's simple).
>>
>> pci_device_class_init() sets DeviceClass method realize() to
>> pci_qdev_realize(). pci_qdev_realize() does the work common to all PCI
>> devices, and calls PCIDeviceClass method realize() for the work specific
>> to the PCI device at hand.
>>
>> i6300esb_class_init() sets PCIDeviceClass method realize() to
>> i6300esb_realize().
>>
>> Your first rule should match i6300esb_info alright, and thus identify
>> i6300esb_class_init() as a class_init() method.
>>
>> But your third rule can't match i6300esb_class_init()'s
>>
>> k->realize = i6300esb_realize;
>>
>> because @k is a PCIDeviceClass, not a DeviceClass.
>>
>> I think it also misses cases that have a realize(), but no
>> instance_init().
>>
>> Finding only some instances of an anti-pattern can still be useful. But
>> you should explain the script's limitations then, both in the script and
>> the commit message.
>
> OK.
>
>>
>>> +
>>> +
>>> +@ propagate_in_realize @
>>> +identifier match_realize.realizefn;
>>> +identifier err;
>>> +identifier errp;
>>> +identifier func_with_errp =~ "(?!object_property_set_link)";
>>
>> What are you trying to accomplish with this lookahead assertion?
>
> "match all func_with_errp() except object_property_set_link()"?
What's wrong with
identifier func_with_errp != object_property_set_link
?
[...]
^ permalink raw reply [flat|nested] 98+ messages in thread* Re: [PATCH-for-5.1 v3 02/24] scripts/coccinelle: Script to simplify DeviceClass error propagation
@ 2020-04-14 13:17 ` Markus Armbruster
0 siblings, 0 replies; 98+ messages in thread
From: Markus Armbruster @ 2020-04-14 13:17 UTC (permalink / raw)
To: Philippe Mathieu-Daudé
Cc: Philippe Mathieu-Daudé,
Fam Zheng, Peter Maydell, Sagar Karandikar, Michael S. Tsirkin,
Jeff Cody, Jason Wang, qemu-devel, Alistair Francis,
Edgar E. Iglesias, Max Reitz, qemu-block, Joel Stanley,
Marc-André Lureau, David Gibson, Eduardo Habkost,
Jean-Christophe Dubois, Xie Changlong, Alistair Francis,
Beniamino Galvani, qemu-arm, Peter Chubb, Cédric Le Goater,
qemu-ppc, Richard Henderson, Kevin Wolf, qemu-riscv,
Andrew Jeffery, Wen Congyang, Subbaraya Sundeep, Palmer Dabbelt,
Bastian Koppelmann, Paolo Bonzini
Philippe Mathieu-Daudé <philmd@redhat.com> writes:
> On 4/14/20 2:24 PM, Markus Armbruster wrote:
>> Philippe Mathieu-Daudé <f4bug@amsat.org> writes:
>>
>>> When a device uses an Error* with data not modified before realize(),
>>> this call can be moved to init(). Add a Coccinelle patch to find such
>>> uses.
>>>
>>> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
>>> ---
>>> ...implify-init-realize-error_propagate.cocci | 69 +++++++++++++++++++
>>> MAINTAINERS | 1 +
>>> 2 files changed, 70 insertions(+)
>>> create mode 100644 scripts/coccinelle/simplify-init-realize-error_propagate.cocci
>>>
>>> diff --git a/scripts/coccinelle/simplify-init-realize-error_propagate.cocci b/scripts/coccinelle/simplify-init-realize-error_propagate.cocci
>>> new file mode 100644
>>> index 0000000000..2e3ec4d98a
>>> --- /dev/null
>>> +++ b/scripts/coccinelle/simplify-init-realize-error_propagate.cocci
>>> @@ -0,0 +1,69 @@
>>> +// Find error-propagation calls that don't need to be in DeviceClass::realize()
>>> +// because they don't use information user can change before calling realize(),
>>> +// so they can be moved to DeviceClass:initfn() where error propagation is not
>>> +// needed.
>>> +//
>>> +// Copyright: (C) 2020 Philippe Mathieu-Daudé
>>> +// This work is licensed under the terms of the GNU GPLv2 or later.
>>> +//
>>> +// spatch \
>>> +// --macro-file scripts/cocci-macro-file.h \
>>> +// --sp-file \
>>> +// scripts/coccinelle/simplify-init-realize-error_propagate.cocci \
>>> +// --timeout 60
>>> +//
>>> +// Inspired by https://www.mail-archive.com/qemu-devel@nongnu.org/msg692500.html
>>> +
>>> +
>>> +@ match_class_init @
>>> +TypeInfo info;
>>> +identifier class_initfn;
>>> +@@
>>> + info.class_init = class_initfn;
>>> +
>>> +
>>> +@ match_instance_init @
>>> +TypeInfo info;
>>> +identifier instance_initfn;
>>> +@@
>>> + info.instance_init = instance_initfn;
>>> +
>>> +
>>> +@ match_realize @
>>> +identifier match_class_init.class_initfn;
>>> +DeviceClass *dc;
>>> +identifier realizefn;
>>> +@@
>>> +void class_initfn(...)
>>> +{
>>> + ...
>>> + dc->realize = realizefn;
>>> + ...
>>> +}
>>
>> I'm afraid this misses realize() methods of DeviceClass subclasses.
>> Consider PCI device "i6300esb" (picked just because it's simple).
>>
>> pci_device_class_init() sets DeviceClass method realize() to
>> pci_qdev_realize(). pci_qdev_realize() does the work common to all PCI
>> devices, and calls PCIDeviceClass method realize() for the work specific
>> to the PCI device at hand.
>>
>> i6300esb_class_init() sets PCIDeviceClass method realize() to
>> i6300esb_realize().
>>
>> Your first rule should match i6300esb_info alright, and thus identify
>> i6300esb_class_init() as a class_init() method.
>>
>> But your third rule can't match i6300esb_class_init()'s
>>
>> k->realize = i6300esb_realize;
>>
>> because @k is a PCIDeviceClass, not a DeviceClass.
>>
>> I think it also misses cases that have a realize(), but no
>> instance_init().
>>
>> Finding only some instances of an anti-pattern can still be useful. But
>> you should explain the script's limitations then, both in the script and
>> the commit message.
>
> OK.
>
>>
>>> +
>>> +
>>> +@ propagate_in_realize @
>>> +identifier match_realize.realizefn;
>>> +identifier err;
>>> +identifier errp;
>>> +identifier func_with_errp =~ "(?!object_property_set_link)";
>>
>> What are you trying to accomplish with this lookahead assertion?
>
> "match all func_with_errp() except object_property_set_link()"?
What's wrong with
identifier func_with_errp != object_property_set_link
?
[...]
^ permalink raw reply [flat|nested] 98+ messages in thread* Re: [PATCH-for-5.1 v3 02/24] scripts/coccinelle: Script to simplify DeviceClass error propagation
2020-04-14 13:17 ` Markus Armbruster
@ 2020-04-15 6:16 ` Philippe Mathieu-Daudé
-1 siblings, 0 replies; 98+ messages in thread
From: Philippe Mathieu-Daudé @ 2020-04-15 6:16 UTC (permalink / raw)
To: Markus Armbruster, Philippe Mathieu-Daudé
Cc: Fam Zheng, Peter Maydell, Sagar Karandikar, Michael S. Tsirkin,
Jeff Cody, Jason Wang, qemu-devel, Alistair Francis,
Edgar E. Iglesias, Jean-Christophe Dubois, qemu-block,
Joel Stanley, Marc-André Lureau, Richard Henderson,
Eduardo Habkost, Xie Changlong, Alistair Francis,
Beniamino Galvani, qemu-arm, Peter Chubb, Cédric Le Goater,
Subbaraya Sundeep, Palmer Dabbelt, David Gibson, Kevin Wolf,
qemu-riscv, Andrew Jeffery, Wen Congyang, Max Reitz, qemu-ppc,
Bastian Koppelmann, Paolo Bonzini
On 4/14/20 3:17 PM, Markus Armbruster wrote:
> Philippe Mathieu-Daudé <philmd@redhat.com> writes:
>
>> On 4/14/20 2:24 PM, Markus Armbruster wrote:
>>> Philippe Mathieu-Daudé <f4bug@amsat.org> writes:
>>>
>>>> When a device uses an Error* with data not modified before realize(),
>>>> this call can be moved to init(). Add a Coccinelle patch to find such
>>>> uses.
>>>>
>>>> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
>>>> ---
>>>> ...implify-init-realize-error_propagate.cocci | 69 +++++++++++++++++++
>>>> MAINTAINERS | 1 +
>>>> 2 files changed, 70 insertions(+)
>>>> create mode 100644 scripts/coccinelle/simplify-init-realize-error_propagate.cocci
>>>>
>>>> diff --git a/scripts/coccinelle/simplify-init-realize-error_propagate.cocci b/scripts/coccinelle/simplify-init-realize-error_propagate.cocci
>>>> new file mode 100644
>>>> index 0000000000..2e3ec4d98a
>>>> --- /dev/null
>>>> +++ b/scripts/coccinelle/simplify-init-realize-error_propagate.cocci
>>>> @@ -0,0 +1,69 @@
>>>> +// Find error-propagation calls that don't need to be in DeviceClass::realize()
>>>> +// because they don't use information user can change before calling realize(),
>>>> +// so they can be moved to DeviceClass:initfn() where error propagation is not
>>>> +// needed.
>>>> +//
>>>> +// Copyright: (C) 2020 Philippe Mathieu-Daudé
>>>> +// This work is licensed under the terms of the GNU GPLv2 or later.
>>>> +//
>>>> +// spatch \
>>>> +// --macro-file scripts/cocci-macro-file.h \
>>>> +// --sp-file \
>>>> +// scripts/coccinelle/simplify-init-realize-error_propagate.cocci \
>>>> +// --timeout 60
>>>> +//
>>>> +// Inspired by https://www.mail-archive.com/qemu-devel@nongnu.org/msg692500.html
>>>> +
>>>> +
>>>> +@ match_class_init @
>>>> +TypeInfo info;
>>>> +identifier class_initfn;
>>>> +@@
>>>> + info.class_init = class_initfn;
>>>> +
>>>> +
>>>> +@ match_instance_init @
>>>> +TypeInfo info;
>>>> +identifier instance_initfn;
>>>> +@@
>>>> + info.instance_init = instance_initfn;
>>>> +
>>>> +
>>>> +@ match_realize @
>>>> +identifier match_class_init.class_initfn;
>>>> +DeviceClass *dc;
>>>> +identifier realizefn;
>>>> +@@
>>>> +void class_initfn(...)
>>>> +{
>>>> + ...
>>>> + dc->realize = realizefn;
>>>> + ...
>>>> +}
>>>
>>> I'm afraid this misses realize() methods of DeviceClass subclasses.
>>> Consider PCI device "i6300esb" (picked just because it's simple).
>>>
>>> pci_device_class_init() sets DeviceClass method realize() to
>>> pci_qdev_realize(). pci_qdev_realize() does the work common to all PCI
>>> devices, and calls PCIDeviceClass method realize() for the work specific
>>> to the PCI device at hand.
>>>
>>> i6300esb_class_init() sets PCIDeviceClass method realize() to
>>> i6300esb_realize().
>>>
>>> Your first rule should match i6300esb_info alright, and thus identify
>>> i6300esb_class_init() as a class_init() method.
>>>
>>> But your third rule can't match i6300esb_class_init()'s
>>>
>>> k->realize = i6300esb_realize;
>>>
>>> because @k is a PCIDeviceClass, not a DeviceClass.
>>>
>>> I think it also misses cases that have a realize(), but no
>>> instance_init().
>>>
>>> Finding only some instances of an anti-pattern can still be useful. But
>>> you should explain the script's limitations then, both in the script and
>>> the commit message.
>>
>> OK.
>>
>>>
>>>> +
>>>> +
>>>> +@ propagate_in_realize @
>>>> +identifier match_realize.realizefn;
>>>> +identifier err;
>>>> +identifier errp;
>>>> +identifier func_with_errp =~ "(?!object_property_set_link)";
>>>
>>> What are you trying to accomplish with this lookahead assertion?
>>
>> "match all func_with_errp() except object_property_set_link()"?
>
> What's wrong with
>
> identifier func_with_errp != object_property_set_link
Nothing wrong, I didn't know this form by the time I wrote this script.
>
> ?
>
> [...]
>
^ permalink raw reply [flat|nested] 98+ messages in thread* Re: [PATCH-for-5.1 v3 02/24] scripts/coccinelle: Script to simplify DeviceClass error propagation
@ 2020-04-15 6:16 ` Philippe Mathieu-Daudé
0 siblings, 0 replies; 98+ messages in thread
From: Philippe Mathieu-Daudé @ 2020-04-15 6:16 UTC (permalink / raw)
To: Markus Armbruster, Philippe Mathieu-Daudé
Cc: Fam Zheng, Peter Maydell, Sagar Karandikar, Michael S. Tsirkin,
Jeff Cody, Jason Wang, qemu-devel, Alistair Francis,
Edgar E. Iglesias, Max Reitz, qemu-block, Joel Stanley,
Marc-André Lureau, David Gibson, Eduardo Habkost,
Jean-Christophe Dubois, Xie Changlong, Alistair Francis,
Beniamino Galvani, qemu-arm, Peter Chubb, Cédric Le Goater,
qemu-ppc, Richard Henderson, Kevin Wolf, qemu-riscv,
Andrew Jeffery, Wen Congyang, Subbaraya Sundeep, Palmer Dabbelt,
Bastian Koppelmann, Paolo Bonzini
On 4/14/20 3:17 PM, Markus Armbruster wrote:
> Philippe Mathieu-Daudé <philmd@redhat.com> writes:
>
>> On 4/14/20 2:24 PM, Markus Armbruster wrote:
>>> Philippe Mathieu-Daudé <f4bug@amsat.org> writes:
>>>
>>>> When a device uses an Error* with data not modified before realize(),
>>>> this call can be moved to init(). Add a Coccinelle patch to find such
>>>> uses.
>>>>
>>>> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
>>>> ---
>>>> ...implify-init-realize-error_propagate.cocci | 69 +++++++++++++++++++
>>>> MAINTAINERS | 1 +
>>>> 2 files changed, 70 insertions(+)
>>>> create mode 100644 scripts/coccinelle/simplify-init-realize-error_propagate.cocci
>>>>
>>>> diff --git a/scripts/coccinelle/simplify-init-realize-error_propagate.cocci b/scripts/coccinelle/simplify-init-realize-error_propagate.cocci
>>>> new file mode 100644
>>>> index 0000000000..2e3ec4d98a
>>>> --- /dev/null
>>>> +++ b/scripts/coccinelle/simplify-init-realize-error_propagate.cocci
>>>> @@ -0,0 +1,69 @@
>>>> +// Find error-propagation calls that don't need to be in DeviceClass::realize()
>>>> +// because they don't use information user can change before calling realize(),
>>>> +// so they can be moved to DeviceClass:initfn() where error propagation is not
>>>> +// needed.
>>>> +//
>>>> +// Copyright: (C) 2020 Philippe Mathieu-Daudé
>>>> +// This work is licensed under the terms of the GNU GPLv2 or later.
>>>> +//
>>>> +// spatch \
>>>> +// --macro-file scripts/cocci-macro-file.h \
>>>> +// --sp-file \
>>>> +// scripts/coccinelle/simplify-init-realize-error_propagate.cocci \
>>>> +// --timeout 60
>>>> +//
>>>> +// Inspired by https://www.mail-archive.com/qemu-devel@nongnu.org/msg692500.html
>>>> +
>>>> +
>>>> +@ match_class_init @
>>>> +TypeInfo info;
>>>> +identifier class_initfn;
>>>> +@@
>>>> + info.class_init = class_initfn;
>>>> +
>>>> +
>>>> +@ match_instance_init @
>>>> +TypeInfo info;
>>>> +identifier instance_initfn;
>>>> +@@
>>>> + info.instance_init = instance_initfn;
>>>> +
>>>> +
>>>> +@ match_realize @
>>>> +identifier match_class_init.class_initfn;
>>>> +DeviceClass *dc;
>>>> +identifier realizefn;
>>>> +@@
>>>> +void class_initfn(...)
>>>> +{
>>>> + ...
>>>> + dc->realize = realizefn;
>>>> + ...
>>>> +}
>>>
>>> I'm afraid this misses realize() methods of DeviceClass subclasses.
>>> Consider PCI device "i6300esb" (picked just because it's simple).
>>>
>>> pci_device_class_init() sets DeviceClass method realize() to
>>> pci_qdev_realize(). pci_qdev_realize() does the work common to all PCI
>>> devices, and calls PCIDeviceClass method realize() for the work specific
>>> to the PCI device at hand.
>>>
>>> i6300esb_class_init() sets PCIDeviceClass method realize() to
>>> i6300esb_realize().
>>>
>>> Your first rule should match i6300esb_info alright, and thus identify
>>> i6300esb_class_init() as a class_init() method.
>>>
>>> But your third rule can't match i6300esb_class_init()'s
>>>
>>> k->realize = i6300esb_realize;
>>>
>>> because @k is a PCIDeviceClass, not a DeviceClass.
>>>
>>> I think it also misses cases that have a realize(), but no
>>> instance_init().
>>>
>>> Finding only some instances of an anti-pattern can still be useful. But
>>> you should explain the script's limitations then, both in the script and
>>> the commit message.
>>
>> OK.
>>
>>>
>>>> +
>>>> +
>>>> +@ propagate_in_realize @
>>>> +identifier match_realize.realizefn;
>>>> +identifier err;
>>>> +identifier errp;
>>>> +identifier func_with_errp =~ "(?!object_property_set_link)";
>>>
>>> What are you trying to accomplish with this lookahead assertion?
>>
>> "match all func_with_errp() except object_property_set_link()"?
>
> What's wrong with
>
> identifier func_with_errp != object_property_set_link
Nothing wrong, I didn't know this form by the time I wrote this script.
>
> ?
>
> [...]
>
^ permalink raw reply [flat|nested] 98+ messages in thread
* [PATCH-for-5.1 v3 03/24] hw/arm/allwinner-a10: Move some code from realize() to init()
2020-04-12 22:35 ` Philippe Mathieu-Daudé
@ 2020-04-12 22:35 ` Philippe Mathieu-Daudé
-1 siblings, 0 replies; 98+ messages in thread
From: Philippe Mathieu-Daudé @ 2020-04-12 22:35 UTC (permalink / raw)
To: qemu-devel
Cc: Fam Zheng, Peter Maydell, Sagar Karandikar, Michael S. Tsirkin,
Jeff Cody, Jason Wang, Alistair Francis, Edgar E. Iglesias,
Subbaraya Sundeep, qemu-block, Markus Armbruster, Max Reitz,
Joel Stanley, Marc-André Lureau, Richard Henderson,
Philippe Mathieu-Daudé,
Eduardo Habkost, Xie Changlong, Alistair Francis,
Beniamino Galvani, qemu-arm, Peter Chubb, Cédric Le Goater,
Palmer Dabbelt, David Gibson, Kevin Wolf, qemu-riscv,
Andrew Jeffery, Wen Congyang, Philippe Mathieu-Daudé,
Jean-Christophe Dubois, qemu-ppc, Bastian Koppelmann,
Paolo Bonzini
Coccinelle reported:
$ spatch ... --timeout 60 --sp-file \
scripts/coccinelle/simplify-init-realize-error_propagate.cocci
HANDLING: ./hw/arm/allwinner-a10.c
>>> possible moves from aw_a10_init() to aw_a10_realize() in ./hw/arm/allwinner-a10.c:77
Move the calls using &error_fatal which don't depend on input
updated before realize() to init().
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
v3: Typo 'depend of' -> 'depend on' (eblake)
---
hw/arm/allwinner-a10.c | 26 +++++++++++++-------------
1 file changed, 13 insertions(+), 13 deletions(-)
diff --git a/hw/arm/allwinner-a10.c b/hw/arm/allwinner-a10.c
index 62a67a3e1a..f41395734a 100644
--- a/hw/arm/allwinner-a10.c
+++ b/hw/arm/allwinner-a10.c
@@ -60,10 +60,18 @@ static void aw_a10_init(Object *obj)
int i;
for (i = 0; i < AW_A10_NUM_USB; i++) {
+ char bus[16];
+
sysbus_init_child_obj(obj, "ehci[*]", OBJECT(&s->ehci[i]),
sizeof(s->ehci[i]), TYPE_PLATFORM_EHCI);
sysbus_init_child_obj(obj, "ohci[*]", OBJECT(&s->ohci[i]),
sizeof(s->ohci[i]), TYPE_SYSBUS_OHCI);
+ object_property_set_bool(OBJECT(&s->ehci[i]), true,
+ "companion-enable", &error_fatal);
+
+ sprintf(bus, "usb-bus.%d", i);
+ object_property_set_str(OBJECT(&s->ohci[i]), bus, "masterbus",
+ &error_fatal);
}
}
@@ -72,6 +80,11 @@ static void aw_a10_init(Object *obj)
sysbus_init_child_obj(obj, "rtc", &s->rtc, sizeof(s->rtc),
TYPE_AW_RTC_SUN4I);
+
+ memory_region_init_ram(&s->sram_a, obj, "sram A", 48 * KiB,
+ &error_fatal);
+ memory_region_add_subregion(get_system_memory(), 0x00000000, &s->sram_a);
+ create_unimplemented_device("a10-sram-ctrl", 0x01c00000, 4 * KiB);
}
static void aw_a10_realize(DeviceState *dev, Error **errp)
@@ -113,11 +126,6 @@ static void aw_a10_realize(DeviceState *dev, Error **errp)
sysbus_connect_irq(sysbusdev, 4, qdev_get_gpio_in(dev, 67));
sysbus_connect_irq(sysbusdev, 5, qdev_get_gpio_in(dev, 68));
- memory_region_init_ram(&s->sram_a, OBJECT(dev), "sram A", 48 * KiB,
- &error_fatal);
- memory_region_add_subregion(get_system_memory(), 0x00000000, &s->sram_a);
- create_unimplemented_device("a10-sram-ctrl", 0x01c00000, 4 * KiB);
-
/* FIXME use qdev NIC properties instead of nd_table[] */
if (nd_table[0].used) {
qemu_check_nic_model(&nd_table[0], TYPE_AW_EMAC);
@@ -149,12 +157,6 @@ static void aw_a10_realize(DeviceState *dev, Error **errp)
int i;
for (i = 0; i < AW_A10_NUM_USB; i++) {
- char bus[16];
-
- sprintf(bus, "usb-bus.%d", i);
-
- object_property_set_bool(OBJECT(&s->ehci[i]), true,
- "companion-enable", &error_fatal);
object_property_set_bool(OBJECT(&s->ehci[i]), true, "realized",
&error_fatal);
sysbus_mmio_map(SYS_BUS_DEVICE(&s->ehci[i]), 0,
@@ -162,8 +164,6 @@ static void aw_a10_realize(DeviceState *dev, Error **errp)
sysbus_connect_irq(SYS_BUS_DEVICE(&s->ehci[i]), 0,
qdev_get_gpio_in(dev, 39 + i));
- object_property_set_str(OBJECT(&s->ohci[i]), bus, "masterbus",
- &error_fatal);
object_property_set_bool(OBJECT(&s->ohci[i]), true, "realized",
&error_fatal);
sysbus_mmio_map(SYS_BUS_DEVICE(&s->ohci[i]), 0,
--
2.21.1
^ permalink raw reply related [flat|nested] 98+ messages in thread* [PATCH-for-5.1 v3 03/24] hw/arm/allwinner-a10: Move some code from realize() to init()
@ 2020-04-12 22:35 ` Philippe Mathieu-Daudé
0 siblings, 0 replies; 98+ messages in thread
From: Philippe Mathieu-Daudé @ 2020-04-12 22:35 UTC (permalink / raw)
To: qemu-devel
Cc: Joel Stanley, Jean-Christophe Dubois, Subbaraya Sundeep,
Max Reitz, Palmer Dabbelt, qemu-ppc, Sagar Karandikar,
Markus Armbruster, Jeff Cody, Peter Maydell, Xie Changlong,
Fam Zheng, Eduardo Habkost, Alistair Francis, qemu-arm,
Wen Congyang, Philippe Mathieu-Daudé,
Bastian Koppelmann, Edgar E. Iglesias, Kevin Wolf,
Marc-André Lureau, David Gibson, Jason Wang, Peter Chubb,
Beniamino Galvani, Alistair Francis, qemu-riscv,
Cédric Le Goater, qemu-block, Paolo Bonzini, Andrew Jeffery,
Michael S. Tsirkin, Richard Henderson,
Philippe Mathieu-Daudé
Coccinelle reported:
$ spatch ... --timeout 60 --sp-file \
scripts/coccinelle/simplify-init-realize-error_propagate.cocci
HANDLING: ./hw/arm/allwinner-a10.c
>>> possible moves from aw_a10_init() to aw_a10_realize() in ./hw/arm/allwinner-a10.c:77
Move the calls using &error_fatal which don't depend on input
updated before realize() to init().
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
v3: Typo 'depend of' -> 'depend on' (eblake)
---
hw/arm/allwinner-a10.c | 26 +++++++++++++-------------
1 file changed, 13 insertions(+), 13 deletions(-)
diff --git a/hw/arm/allwinner-a10.c b/hw/arm/allwinner-a10.c
index 62a67a3e1a..f41395734a 100644
--- a/hw/arm/allwinner-a10.c
+++ b/hw/arm/allwinner-a10.c
@@ -60,10 +60,18 @@ static void aw_a10_init(Object *obj)
int i;
for (i = 0; i < AW_A10_NUM_USB; i++) {
+ char bus[16];
+
sysbus_init_child_obj(obj, "ehci[*]", OBJECT(&s->ehci[i]),
sizeof(s->ehci[i]), TYPE_PLATFORM_EHCI);
sysbus_init_child_obj(obj, "ohci[*]", OBJECT(&s->ohci[i]),
sizeof(s->ohci[i]), TYPE_SYSBUS_OHCI);
+ object_property_set_bool(OBJECT(&s->ehci[i]), true,
+ "companion-enable", &error_fatal);
+
+ sprintf(bus, "usb-bus.%d", i);
+ object_property_set_str(OBJECT(&s->ohci[i]), bus, "masterbus",
+ &error_fatal);
}
}
@@ -72,6 +80,11 @@ static void aw_a10_init(Object *obj)
sysbus_init_child_obj(obj, "rtc", &s->rtc, sizeof(s->rtc),
TYPE_AW_RTC_SUN4I);
+
+ memory_region_init_ram(&s->sram_a, obj, "sram A", 48 * KiB,
+ &error_fatal);
+ memory_region_add_subregion(get_system_memory(), 0x00000000, &s->sram_a);
+ create_unimplemented_device("a10-sram-ctrl", 0x01c00000, 4 * KiB);
}
static void aw_a10_realize(DeviceState *dev, Error **errp)
@@ -113,11 +126,6 @@ static void aw_a10_realize(DeviceState *dev, Error **errp)
sysbus_connect_irq(sysbusdev, 4, qdev_get_gpio_in(dev, 67));
sysbus_connect_irq(sysbusdev, 5, qdev_get_gpio_in(dev, 68));
- memory_region_init_ram(&s->sram_a, OBJECT(dev), "sram A", 48 * KiB,
- &error_fatal);
- memory_region_add_subregion(get_system_memory(), 0x00000000, &s->sram_a);
- create_unimplemented_device("a10-sram-ctrl", 0x01c00000, 4 * KiB);
-
/* FIXME use qdev NIC properties instead of nd_table[] */
if (nd_table[0].used) {
qemu_check_nic_model(&nd_table[0], TYPE_AW_EMAC);
@@ -149,12 +157,6 @@ static void aw_a10_realize(DeviceState *dev, Error **errp)
int i;
for (i = 0; i < AW_A10_NUM_USB; i++) {
- char bus[16];
-
- sprintf(bus, "usb-bus.%d", i);
-
- object_property_set_bool(OBJECT(&s->ehci[i]), true,
- "companion-enable", &error_fatal);
object_property_set_bool(OBJECT(&s->ehci[i]), true, "realized",
&error_fatal);
sysbus_mmio_map(SYS_BUS_DEVICE(&s->ehci[i]), 0,
@@ -162,8 +164,6 @@ static void aw_a10_realize(DeviceState *dev, Error **errp)
sysbus_connect_irq(SYS_BUS_DEVICE(&s->ehci[i]), 0,
qdev_get_gpio_in(dev, 39 + i));
- object_property_set_str(OBJECT(&s->ohci[i]), bus, "masterbus",
- &error_fatal);
object_property_set_bool(OBJECT(&s->ohci[i]), true, "realized",
&error_fatal);
sysbus_mmio_map(SYS_BUS_DEVICE(&s->ohci[i]), 0,
--
2.21.1
^ permalink raw reply related [flat|nested] 98+ messages in thread* Re: [PATCH-for-5.1 v3 03/24] hw/arm/allwinner-a10: Move some code from realize() to init()
2020-04-12 22:35 ` Philippe Mathieu-Daudé
@ 2020-04-13 21:02 ` Philippe Mathieu-Daudé
-1 siblings, 0 replies; 98+ messages in thread
From: Philippe Mathieu-Daudé @ 2020-04-13 21:02 UTC (permalink / raw)
To: qemu-devel
Cc: Fam Zheng, Peter Maydell, Sagar Karandikar, Michael S. Tsirkin,
Jeff Cody, Jason Wang, Alistair Francis, Edgar E. Iglesias,
Subbaraya Sundeep, qemu-block, Markus Armbruster, Max Reitz,
Joel Stanley, Marc-André Lureau, Richard Henderson,
Philippe Mathieu-Daudé,
Eduardo Habkost, Xie Changlong, Alistair Francis,
Beniamino Galvani, qemu-arm, Peter Chubb, Cédric Le Goater,
Palmer Dabbelt, David Gibson, Kevin Wolf, qemu-riscv,
Andrew Jeffery, Wen Congyang, Jean-Christophe Dubois, qemu-ppc,
Bastian Koppelmann, Paolo Bonzini
On 4/13/20 12:35 AM, Philippe Mathieu-Daudé wrote:
> Coccinelle reported:
>
> $ spatch ... --timeout 60 --sp-file \
> scripts/coccinelle/simplify-init-realize-error_propagate.cocci
> HANDLING: ./hw/arm/allwinner-a10.c
> >>> possible moves from aw_a10_init() to aw_a10_realize() in ./hw/arm/allwinner-a10.c:77
>
> Move the calls using &error_fatal which don't depend on input
> updated before realize() to init().
>
> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
> ---
> v3: Typo 'depend of' -> 'depend on' (eblake)
> ---
> hw/arm/allwinner-a10.c | 26 +++++++++++++-------------
> 1 file changed, 13 insertions(+), 13 deletions(-)
>
> diff --git a/hw/arm/allwinner-a10.c b/hw/arm/allwinner-a10.c
> index 62a67a3e1a..f41395734a 100644
> --- a/hw/arm/allwinner-a10.c
> +++ b/hw/arm/allwinner-a10.c
> @@ -60,10 +60,18 @@ static void aw_a10_init(Object *obj)
> int i;
>
> for (i = 0; i < AW_A10_NUM_USB; i++) {
> + char bus[16];
> +
> sysbus_init_child_obj(obj, "ehci[*]", OBJECT(&s->ehci[i]),
> sizeof(s->ehci[i]), TYPE_PLATFORM_EHCI);
> sysbus_init_child_obj(obj, "ohci[*]", OBJECT(&s->ohci[i]),
> sizeof(s->ohci[i]), TYPE_SYSBUS_OHCI);
> + object_property_set_bool(OBJECT(&s->ehci[i]), true,
> + "companion-enable", &error_fatal);
> +
> + sprintf(bus, "usb-bus.%d", i);
> + object_property_set_str(OBJECT(&s->ohci[i]), bus, "masterbus",
> + &error_fatal);
> }
> }
>
> @@ -72,6 +80,11 @@ static void aw_a10_init(Object *obj)
>
> sysbus_init_child_obj(obj, "rtc", &s->rtc, sizeof(s->rtc),
> TYPE_AW_RTC_SUN4I);
> +
> + memory_region_init_ram(&s->sram_a, obj, "sram A", 48 * KiB,
> + &error_fatal);
> + memory_region_add_subregion(get_system_memory(), 0x00000000, &s->sram_a);
Unfortunately this makes qtest/device-introspect-test fail:
(qemu) device_add allwinner-a10,help
(qemu) device_add allwinner-a10,help
RAMBlock "sram A" already registered, abort!
Aborted (core dumped)
(gdb) bt
#1 0x00007ffff5089895 in abort () at /lib64/libc.so.6
#2 0x0000555557324445 in qemu_ram_set_idstr (new_block=0x614000026a40,
name=0x602000231a50 "sram A", dev=0x633000038800) at exec.c:2023
#3 0x00005555595ed050 in vmstate_register_ram (mr=0x633000049610,
dev=0x633000038800) at migration/savevm.c:2921
#4 0x0000555557569a85 in memory_region_init_ram (mr=0x633000049610,
owner=0x633000038800, name=0x55555a4da6a0 <str> "sram A", size=49152,
errp=0x55555c908d00 <error_fatal>)
at memory.c:3170
#5 0x0000555557b7cadf in aw_a10_init (obj=0x633000038800) at
hw/arm/allwinner-a10.c:84
#6 0x00005555599b0c09 in object_init_with_type (obj=0x633000038800,
ti=0x61300001da80) at qom/object.c:376
#7 0x0000555559994350 in object_initialize_with_type
(data=0x633000038800, size=97024, type=0x61300001da80) at qom/object.c:516
#8 0x0000555559996756 in object_new_with_type (type=0x61300001da80) at
qom/object.c:684
#9 0x0000555559996832 in object_new (typename=0x60200022e8b0
"allwinner-a10") at qom/object.c:699
#10 0x000055555979e809 in qmp_device_list_properties
(typename=0x60200022e8b0 "allwinner-a10", errp=0x7fffffffafc0) at
qom/qom-qmp-cmds.c:153
#11 0x00005555582b68cd in qdev_device_help (opts=0x607000120130) at
qdev-monitor.c:282
> + create_unimplemented_device("a10-sram-ctrl", 0x01c00000, 4 * KiB);
> }
>
> static void aw_a10_realize(DeviceState *dev, Error **errp)
> @@ -113,11 +126,6 @@ static void aw_a10_realize(DeviceState *dev, Error **errp)
> sysbus_connect_irq(sysbusdev, 4, qdev_get_gpio_in(dev, 67));
> sysbus_connect_irq(sysbusdev, 5, qdev_get_gpio_in(dev, 68));
>
> - memory_region_init_ram(&s->sram_a, OBJECT(dev), "sram A", 48 * KiB,
> - &error_fatal);
> - memory_region_add_subregion(get_system_memory(), 0x00000000, &s->sram_a);
> - create_unimplemented_device("a10-sram-ctrl", 0x01c00000, 4 * KiB);
> -
> /* FIXME use qdev NIC properties instead of nd_table[] */
> if (nd_table[0].used) {
> qemu_check_nic_model(&nd_table[0], TYPE_AW_EMAC);
> @@ -149,12 +157,6 @@ static void aw_a10_realize(DeviceState *dev, Error **errp)
> int i;
>
> for (i = 0; i < AW_A10_NUM_USB; i++) {
> - char bus[16];
> -
> - sprintf(bus, "usb-bus.%d", i);
> -
> - object_property_set_bool(OBJECT(&s->ehci[i]), true,
> - "companion-enable", &error_fatal);
> object_property_set_bool(OBJECT(&s->ehci[i]), true, "realized",
> &error_fatal);
> sysbus_mmio_map(SYS_BUS_DEVICE(&s->ehci[i]), 0,
> @@ -162,8 +164,6 @@ static void aw_a10_realize(DeviceState *dev, Error **errp)
> sysbus_connect_irq(SYS_BUS_DEVICE(&s->ehci[i]), 0,
> qdev_get_gpio_in(dev, 39 + i));
>
> - object_property_set_str(OBJECT(&s->ohci[i]), bus, "masterbus",
> - &error_fatal);
> object_property_set_bool(OBJECT(&s->ohci[i]), true, "realized",
> &error_fatal);
> sysbus_mmio_map(SYS_BUS_DEVICE(&s->ohci[i]), 0,
>
^ permalink raw reply [flat|nested] 98+ messages in thread* Re: [PATCH-for-5.1 v3 03/24] hw/arm/allwinner-a10: Move some code from realize() to init()
@ 2020-04-13 21:02 ` Philippe Mathieu-Daudé
0 siblings, 0 replies; 98+ messages in thread
From: Philippe Mathieu-Daudé @ 2020-04-13 21:02 UTC (permalink / raw)
To: qemu-devel
Cc: Joel Stanley, Jean-Christophe Dubois, Subbaraya Sundeep,
Max Reitz, Palmer Dabbelt, qemu-ppc, Sagar Karandikar,
Markus Armbruster, Jeff Cody, Peter Maydell, Xie Changlong,
Fam Zheng, Eduardo Habkost, Alistair Francis, qemu-arm,
Wen Congyang, Philippe Mathieu-Daudé,
Bastian Koppelmann, Edgar E. Iglesias, Kevin Wolf,
Marc-André Lureau, David Gibson, Jason Wang, Peter Chubb,
Beniamino Galvani, Alistair Francis, qemu-riscv,
Cédric Le Goater, qemu-block, Paolo Bonzini, Andrew Jeffery,
Michael S. Tsirkin, Richard Henderson
On 4/13/20 12:35 AM, Philippe Mathieu-Daudé wrote:
> Coccinelle reported:
>
> $ spatch ... --timeout 60 --sp-file \
> scripts/coccinelle/simplify-init-realize-error_propagate.cocci
> HANDLING: ./hw/arm/allwinner-a10.c
> >>> possible moves from aw_a10_init() to aw_a10_realize() in ./hw/arm/allwinner-a10.c:77
>
> Move the calls using &error_fatal which don't depend on input
> updated before realize() to init().
>
> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
> ---
> v3: Typo 'depend of' -> 'depend on' (eblake)
> ---
> hw/arm/allwinner-a10.c | 26 +++++++++++++-------------
> 1 file changed, 13 insertions(+), 13 deletions(-)
>
> diff --git a/hw/arm/allwinner-a10.c b/hw/arm/allwinner-a10.c
> index 62a67a3e1a..f41395734a 100644
> --- a/hw/arm/allwinner-a10.c
> +++ b/hw/arm/allwinner-a10.c
> @@ -60,10 +60,18 @@ static void aw_a10_init(Object *obj)
> int i;
>
> for (i = 0; i < AW_A10_NUM_USB; i++) {
> + char bus[16];
> +
> sysbus_init_child_obj(obj, "ehci[*]", OBJECT(&s->ehci[i]),
> sizeof(s->ehci[i]), TYPE_PLATFORM_EHCI);
> sysbus_init_child_obj(obj, "ohci[*]", OBJECT(&s->ohci[i]),
> sizeof(s->ohci[i]), TYPE_SYSBUS_OHCI);
> + object_property_set_bool(OBJECT(&s->ehci[i]), true,
> + "companion-enable", &error_fatal);
> +
> + sprintf(bus, "usb-bus.%d", i);
> + object_property_set_str(OBJECT(&s->ohci[i]), bus, "masterbus",
> + &error_fatal);
> }
> }
>
> @@ -72,6 +80,11 @@ static void aw_a10_init(Object *obj)
>
> sysbus_init_child_obj(obj, "rtc", &s->rtc, sizeof(s->rtc),
> TYPE_AW_RTC_SUN4I);
> +
> + memory_region_init_ram(&s->sram_a, obj, "sram A", 48 * KiB,
> + &error_fatal);
> + memory_region_add_subregion(get_system_memory(), 0x00000000, &s->sram_a);
Unfortunately this makes qtest/device-introspect-test fail:
(qemu) device_add allwinner-a10,help
(qemu) device_add allwinner-a10,help
RAMBlock "sram A" already registered, abort!
Aborted (core dumped)
(gdb) bt
#1 0x00007ffff5089895 in abort () at /lib64/libc.so.6
#2 0x0000555557324445 in qemu_ram_set_idstr (new_block=0x614000026a40,
name=0x602000231a50 "sram A", dev=0x633000038800) at exec.c:2023
#3 0x00005555595ed050 in vmstate_register_ram (mr=0x633000049610,
dev=0x633000038800) at migration/savevm.c:2921
#4 0x0000555557569a85 in memory_region_init_ram (mr=0x633000049610,
owner=0x633000038800, name=0x55555a4da6a0 <str> "sram A", size=49152,
errp=0x55555c908d00 <error_fatal>)
at memory.c:3170
#5 0x0000555557b7cadf in aw_a10_init (obj=0x633000038800) at
hw/arm/allwinner-a10.c:84
#6 0x00005555599b0c09 in object_init_with_type (obj=0x633000038800,
ti=0x61300001da80) at qom/object.c:376
#7 0x0000555559994350 in object_initialize_with_type
(data=0x633000038800, size=97024, type=0x61300001da80) at qom/object.c:516
#8 0x0000555559996756 in object_new_with_type (type=0x61300001da80) at
qom/object.c:684
#9 0x0000555559996832 in object_new (typename=0x60200022e8b0
"allwinner-a10") at qom/object.c:699
#10 0x000055555979e809 in qmp_device_list_properties
(typename=0x60200022e8b0 "allwinner-a10", errp=0x7fffffffafc0) at
qom/qom-qmp-cmds.c:153
#11 0x00005555582b68cd in qdev_device_help (opts=0x607000120130) at
qdev-monitor.c:282
> + create_unimplemented_device("a10-sram-ctrl", 0x01c00000, 4 * KiB);
> }
>
> static void aw_a10_realize(DeviceState *dev, Error **errp)
> @@ -113,11 +126,6 @@ static void aw_a10_realize(DeviceState *dev, Error **errp)
> sysbus_connect_irq(sysbusdev, 4, qdev_get_gpio_in(dev, 67));
> sysbus_connect_irq(sysbusdev, 5, qdev_get_gpio_in(dev, 68));
>
> - memory_region_init_ram(&s->sram_a, OBJECT(dev), "sram A", 48 * KiB,
> - &error_fatal);
> - memory_region_add_subregion(get_system_memory(), 0x00000000, &s->sram_a);
> - create_unimplemented_device("a10-sram-ctrl", 0x01c00000, 4 * KiB);
> -
> /* FIXME use qdev NIC properties instead of nd_table[] */
> if (nd_table[0].used) {
> qemu_check_nic_model(&nd_table[0], TYPE_AW_EMAC);
> @@ -149,12 +157,6 @@ static void aw_a10_realize(DeviceState *dev, Error **errp)
> int i;
>
> for (i = 0; i < AW_A10_NUM_USB; i++) {
> - char bus[16];
> -
> - sprintf(bus, "usb-bus.%d", i);
> -
> - object_property_set_bool(OBJECT(&s->ehci[i]), true,
> - "companion-enable", &error_fatal);
> object_property_set_bool(OBJECT(&s->ehci[i]), true, "realized",
> &error_fatal);
> sysbus_mmio_map(SYS_BUS_DEVICE(&s->ehci[i]), 0,
> @@ -162,8 +164,6 @@ static void aw_a10_realize(DeviceState *dev, Error **errp)
> sysbus_connect_irq(SYS_BUS_DEVICE(&s->ehci[i]), 0,
> qdev_get_gpio_in(dev, 39 + i));
>
> - object_property_set_str(OBJECT(&s->ohci[i]), bus, "masterbus",
> - &error_fatal);
> object_property_set_bool(OBJECT(&s->ohci[i]), true, "realized",
> &error_fatal);
> sysbus_mmio_map(SYS_BUS_DEVICE(&s->ohci[i]), 0,
>
^ permalink raw reply [flat|nested] 98+ messages in thread
* [PATCH-for-5.1 v3 04/24] hw/arm/aspeed_ast2600: Simplify use of Error*
2020-04-12 22:35 ` Philippe Mathieu-Daudé
@ 2020-04-12 22:35 ` Philippe Mathieu-Daudé
-1 siblings, 0 replies; 98+ messages in thread
From: Philippe Mathieu-Daudé @ 2020-04-12 22:35 UTC (permalink / raw)
To: qemu-devel
Cc: Fam Zheng, Peter Maydell, Sagar Karandikar, Michael S. Tsirkin,
Jeff Cody, Jason Wang, Alistair Francis, Edgar E. Iglesias,
Subbaraya Sundeep, qemu-block, Markus Armbruster, Max Reitz,
Joel Stanley, Marc-André Lureau, Richard Henderson,
Philippe Mathieu-Daudé,
Eduardo Habkost, Xie Changlong, Alistair Francis,
Beniamino Galvani, qemu-arm, Peter Chubb, Cédric Le Goater,
Palmer Dabbelt, David Gibson, Kevin Wolf, qemu-riscv,
Andrew Jeffery, Wen Congyang, Philippe Mathieu-Daudé,
Jean-Christophe Dubois, qemu-ppc, Bastian Koppelmann,
Paolo Bonzini
Coccinelle reported:
$ spatch ... --timeout 60 --sp-file \
scripts/coccinelle/simplify-init-realize-error_propagate.cocci
HANDLING: ./hw/arm/aspeed_ast2600.c
>>> possible moves from aspeed_soc_ast2600_init() to aspeed_soc_ast2600_realize() in ./hw/arm/aspeed_ast2600.c:243
While reviewing we notice we don't need two different Error*,
drop the one less used.
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
v3: Indented 'return'.
---
hw/arm/aspeed_ast2600.c | 20 +++++++++++++-------
1 file changed, 13 insertions(+), 7 deletions(-)
diff --git a/hw/arm/aspeed_ast2600.c b/hw/arm/aspeed_ast2600.c
index 1a869e09b9..a860ab6a35 100644
--- a/hw/arm/aspeed_ast2600.c
+++ b/hw/arm/aspeed_ast2600.c
@@ -245,7 +245,7 @@ static void aspeed_soc_ast2600_realize(DeviceState *dev, Error **errp)
int i;
AspeedSoCState *s = ASPEED_SOC(dev);
AspeedSoCClass *sc = ASPEED_SOC_GET_CLASS(s);
- Error *err = NULL, *local_err = NULL;
+ Error *err = NULL;
qemu_irq irq;
/* IO space */
@@ -418,9 +418,12 @@ static void aspeed_soc_ast2600_realize(DeviceState *dev, Error **errp)
return;
}
object_property_set_int(OBJECT(&s->spi[i]), 1, "num-cs", &err);
+ if (err) {
+ error_propagate(errp, err);
+ return;
+ }
object_property_set_bool(OBJECT(&s->spi[i]), true, "realized",
- &local_err);
- error_propagate(&err, local_err);
+ &err);
if (err) {
error_propagate(errp, err);
return;
@@ -472,12 +475,15 @@ static void aspeed_soc_ast2600_realize(DeviceState *dev, Error **errp)
qdev_set_nic_properties(DEVICE(&s->ftgmac100[i]), &nd_table[i]);
object_property_set_bool(OBJECT(&s->ftgmac100[i]), true, "aspeed",
&err);
- object_property_set_bool(OBJECT(&s->ftgmac100[i]), true, "realized",
- &local_err);
- error_propagate(&err, local_err);
if (err) {
error_propagate(errp, err);
- return;
+ return;
+ }
+ object_property_set_bool(OBJECT(&s->ftgmac100[i]), true, "realized",
+ &err);
+ if (err) {
+ error_propagate(errp, err);
+ return;
}
sysbus_mmio_map(SYS_BUS_DEVICE(&s->ftgmac100[i]), 0,
sc->memmap[ASPEED_ETH1 + i]);
--
2.21.1
^ permalink raw reply related [flat|nested] 98+ messages in thread* [PATCH-for-5.1 v3 04/24] hw/arm/aspeed_ast2600: Simplify use of Error*
@ 2020-04-12 22:35 ` Philippe Mathieu-Daudé
0 siblings, 0 replies; 98+ messages in thread
From: Philippe Mathieu-Daudé @ 2020-04-12 22:35 UTC (permalink / raw)
To: qemu-devel
Cc: Joel Stanley, Jean-Christophe Dubois, Subbaraya Sundeep,
Max Reitz, Palmer Dabbelt, qemu-ppc, Sagar Karandikar,
Markus Armbruster, Jeff Cody, Peter Maydell, Xie Changlong,
Fam Zheng, Eduardo Habkost, Alistair Francis, qemu-arm,
Wen Congyang, Philippe Mathieu-Daudé,
Bastian Koppelmann, Edgar E. Iglesias, Kevin Wolf,
Marc-André Lureau, David Gibson, Jason Wang, Peter Chubb,
Beniamino Galvani, Alistair Francis, qemu-riscv,
Cédric Le Goater, qemu-block, Paolo Bonzini, Andrew Jeffery,
Michael S. Tsirkin, Richard Henderson,
Philippe Mathieu-Daudé
Coccinelle reported:
$ spatch ... --timeout 60 --sp-file \
scripts/coccinelle/simplify-init-realize-error_propagate.cocci
HANDLING: ./hw/arm/aspeed_ast2600.c
>>> possible moves from aspeed_soc_ast2600_init() to aspeed_soc_ast2600_realize() in ./hw/arm/aspeed_ast2600.c:243
While reviewing we notice we don't need two different Error*,
drop the one less used.
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
v3: Indented 'return'.
---
hw/arm/aspeed_ast2600.c | 20 +++++++++++++-------
1 file changed, 13 insertions(+), 7 deletions(-)
diff --git a/hw/arm/aspeed_ast2600.c b/hw/arm/aspeed_ast2600.c
index 1a869e09b9..a860ab6a35 100644
--- a/hw/arm/aspeed_ast2600.c
+++ b/hw/arm/aspeed_ast2600.c
@@ -245,7 +245,7 @@ static void aspeed_soc_ast2600_realize(DeviceState *dev, Error **errp)
int i;
AspeedSoCState *s = ASPEED_SOC(dev);
AspeedSoCClass *sc = ASPEED_SOC_GET_CLASS(s);
- Error *err = NULL, *local_err = NULL;
+ Error *err = NULL;
qemu_irq irq;
/* IO space */
@@ -418,9 +418,12 @@ static void aspeed_soc_ast2600_realize(DeviceState *dev, Error **errp)
return;
}
object_property_set_int(OBJECT(&s->spi[i]), 1, "num-cs", &err);
+ if (err) {
+ error_propagate(errp, err);
+ return;
+ }
object_property_set_bool(OBJECT(&s->spi[i]), true, "realized",
- &local_err);
- error_propagate(&err, local_err);
+ &err);
if (err) {
error_propagate(errp, err);
return;
@@ -472,12 +475,15 @@ static void aspeed_soc_ast2600_realize(DeviceState *dev, Error **errp)
qdev_set_nic_properties(DEVICE(&s->ftgmac100[i]), &nd_table[i]);
object_property_set_bool(OBJECT(&s->ftgmac100[i]), true, "aspeed",
&err);
- object_property_set_bool(OBJECT(&s->ftgmac100[i]), true, "realized",
- &local_err);
- error_propagate(&err, local_err);
if (err) {
error_propagate(errp, err);
- return;
+ return;
+ }
+ object_property_set_bool(OBJECT(&s->ftgmac100[i]), true, "realized",
+ &err);
+ if (err) {
+ error_propagate(errp, err);
+ return;
}
sysbus_mmio_map(SYS_BUS_DEVICE(&s->ftgmac100[i]), 0,
sc->memmap[ASPEED_ETH1 + i]);
--
2.21.1
^ permalink raw reply related [flat|nested] 98+ messages in thread
* [PATCH-for-5.1 v3 05/24] hw/arm/aspeed_ast2600: Move some code from realize() to init()
2020-04-12 22:35 ` Philippe Mathieu-Daudé
@ 2020-04-12 22:36 ` Philippe Mathieu-Daudé
-1 siblings, 0 replies; 98+ messages in thread
From: Philippe Mathieu-Daudé @ 2020-04-12 22:36 UTC (permalink / raw)
To: qemu-devel
Cc: Fam Zheng, Peter Maydell, Sagar Karandikar, Michael S. Tsirkin,
Jeff Cody, Jason Wang, Alistair Francis, Edgar E. Iglesias,
Subbaraya Sundeep, qemu-block, Markus Armbruster, Max Reitz,
Joel Stanley, Marc-André Lureau, Richard Henderson,
Philippe Mathieu-Daudé,
Eduardo Habkost, Xie Changlong, Alistair Francis,
Beniamino Galvani, qemu-arm, Peter Chubb, Cédric Le Goater,
Palmer Dabbelt, David Gibson, Kevin Wolf, qemu-riscv,
Andrew Jeffery, Wen Congyang, Philippe Mathieu-Daudé,
Jean-Christophe Dubois, qemu-ppc, Bastian Koppelmann,
Paolo Bonzini
Coccinelle reported:
$ spatch ... --timeout 60 --sp-file \
scripts/coccinelle/simplify-init-realize-error_propagate.cocci
HANDLING: ./hw/arm/aspeed_ast2600.c
>>> possible moves from aspeed_soc_ast2600_init() to aspeed_soc_ast2600_realize() in ./hw/arm/aspeed_ast2600.c:243
Move the calls using &error_fatal which don't depend on input
updated before realize() to init().
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
v3: Typo 'depend of' -> 'depend on' (eblake)
---
hw/arm/aspeed_ast2600.c | 41 ++++++++++++++++++++---------------------
1 file changed, 20 insertions(+), 21 deletions(-)
diff --git a/hw/arm/aspeed_ast2600.c b/hw/arm/aspeed_ast2600.c
index a860ab6a35..64512f95c9 100644
--- a/hw/arm/aspeed_ast2600.c
+++ b/hw/arm/aspeed_ast2600.c
@@ -114,6 +114,16 @@ static qemu_irq aspeed_soc_get_irq(AspeedSoCState *s, int ctrl)
return qdev_get_gpio_in(DEVICE(&s->a7mpcore), sc->irqmap[ctrl]);
}
+/*
+ * ASPEED ast2600 has 0xf as cluster ID
+ *
+ * http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0388e/CIHEBGFG.html
+ */
+static uint64_t aspeed_calc_affinity(int cpu)
+{
+ return (0xf << ARM_AFF1_SHIFT) | cpu;
+}
+
static void aspeed_soc_ast2600_init(Object *obj)
{
AspeedSoCState *s = ASPEED_SOC(obj);
@@ -130,6 +140,13 @@ static void aspeed_soc_ast2600_init(Object *obj)
object_initialize_child(obj, "cpu[*]", OBJECT(&s->cpu[i]),
sizeof(s->cpu[i]), sc->cpu_type,
&error_abort, NULL);
+ object_property_set_int(OBJECT(&s->cpu[i]), QEMU_PSCI_CONDUIT_SMC,
+ "psci-conduit", &error_abort);
+ object_property_set_int(OBJECT(&s->cpu[i]), aspeed_calc_affinity(i),
+ "mp-affinity", &error_abort);
+
+ object_property_set_int(OBJECT(&s->cpu[i]), 1125000000, "cntfrq",
+ &error_abort);
}
snprintf(typename, sizeof(typename), "aspeed.scu-%s", socname);
@@ -146,6 +163,9 @@ static void aspeed_soc_ast2600_init(Object *obj)
sysbus_init_child_obj(obj, "a7mpcore", &s->a7mpcore,
sizeof(s->a7mpcore), TYPE_A15MPCORE_PRIV);
+ object_property_set_int(OBJECT(&s->a7mpcore),
+ ASPEED_SOC_AST2600_MAX_IRQ + GIC_INTERNAL,
+ "num-irq", &error_abort);
sysbus_init_child_obj(obj, "rtc", OBJECT(&s->rtc), sizeof(s->rtc),
TYPE_ASPEED_RTC);
@@ -230,16 +250,6 @@ static void aspeed_soc_ast2600_init(Object *obj)
TYPE_SYSBUS_SDHCI);
}
-/*
- * ASPEED ast2600 has 0xf as cluster ID
- *
- * http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0388e/CIHEBGFG.html
- */
-static uint64_t aspeed_calc_affinity(int cpu)
-{
- return (0xf << ARM_AFF1_SHIFT) | cpu;
-}
-
static void aspeed_soc_ast2600_realize(DeviceState *dev, Error **errp)
{
int i;
@@ -264,19 +274,11 @@ static void aspeed_soc_ast2600_realize(DeviceState *dev, Error **errp)
/* CPU */
for (i = 0; i < s->num_cpus; i++) {
- object_property_set_int(OBJECT(&s->cpu[i]), QEMU_PSCI_CONDUIT_SMC,
- "psci-conduit", &error_abort);
if (s->num_cpus > 1) {
object_property_set_int(OBJECT(&s->cpu[i]),
ASPEED_A7MPCORE_ADDR,
"reset-cbar", &error_abort);
}
- object_property_set_int(OBJECT(&s->cpu[i]), aspeed_calc_affinity(i),
- "mp-affinity", &error_abort);
-
- object_property_set_int(OBJECT(&s->cpu[i]), 1125000000, "cntfrq",
- &error_abort);
-
/*
* TODO: the secondary CPUs are started and a boot helper
* is needed when using -kernel
@@ -292,9 +294,6 @@ static void aspeed_soc_ast2600_realize(DeviceState *dev, Error **errp)
/* A7MPCORE */
object_property_set_int(OBJECT(&s->a7mpcore), s->num_cpus, "num-cpu",
&error_abort);
- object_property_set_int(OBJECT(&s->a7mpcore),
- ASPEED_SOC_AST2600_MAX_IRQ + GIC_INTERNAL,
- "num-irq", &error_abort);
object_property_set_bool(OBJECT(&s->a7mpcore), true, "realized",
&error_abort);
--
2.21.1
^ permalink raw reply related [flat|nested] 98+ messages in thread* [PATCH-for-5.1 v3 05/24] hw/arm/aspeed_ast2600: Move some code from realize() to init()
@ 2020-04-12 22:36 ` Philippe Mathieu-Daudé
0 siblings, 0 replies; 98+ messages in thread
From: Philippe Mathieu-Daudé @ 2020-04-12 22:36 UTC (permalink / raw)
To: qemu-devel
Cc: Joel Stanley, Jean-Christophe Dubois, Subbaraya Sundeep,
Max Reitz, Palmer Dabbelt, qemu-ppc, Sagar Karandikar,
Markus Armbruster, Jeff Cody, Peter Maydell, Xie Changlong,
Fam Zheng, Eduardo Habkost, Alistair Francis, qemu-arm,
Wen Congyang, Philippe Mathieu-Daudé,
Bastian Koppelmann, Edgar E. Iglesias, Kevin Wolf,
Marc-André Lureau, David Gibson, Jason Wang, Peter Chubb,
Beniamino Galvani, Alistair Francis, qemu-riscv,
Cédric Le Goater, qemu-block, Paolo Bonzini, Andrew Jeffery,
Michael S. Tsirkin, Richard Henderson,
Philippe Mathieu-Daudé
Coccinelle reported:
$ spatch ... --timeout 60 --sp-file \
scripts/coccinelle/simplify-init-realize-error_propagate.cocci
HANDLING: ./hw/arm/aspeed_ast2600.c
>>> possible moves from aspeed_soc_ast2600_init() to aspeed_soc_ast2600_realize() in ./hw/arm/aspeed_ast2600.c:243
Move the calls using &error_fatal which don't depend on input
updated before realize() to init().
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
v3: Typo 'depend of' -> 'depend on' (eblake)
---
hw/arm/aspeed_ast2600.c | 41 ++++++++++++++++++++---------------------
1 file changed, 20 insertions(+), 21 deletions(-)
diff --git a/hw/arm/aspeed_ast2600.c b/hw/arm/aspeed_ast2600.c
index a860ab6a35..64512f95c9 100644
--- a/hw/arm/aspeed_ast2600.c
+++ b/hw/arm/aspeed_ast2600.c
@@ -114,6 +114,16 @@ static qemu_irq aspeed_soc_get_irq(AspeedSoCState *s, int ctrl)
return qdev_get_gpio_in(DEVICE(&s->a7mpcore), sc->irqmap[ctrl]);
}
+/*
+ * ASPEED ast2600 has 0xf as cluster ID
+ *
+ * http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0388e/CIHEBGFG.html
+ */
+static uint64_t aspeed_calc_affinity(int cpu)
+{
+ return (0xf << ARM_AFF1_SHIFT) | cpu;
+}
+
static void aspeed_soc_ast2600_init(Object *obj)
{
AspeedSoCState *s = ASPEED_SOC(obj);
@@ -130,6 +140,13 @@ static void aspeed_soc_ast2600_init(Object *obj)
object_initialize_child(obj, "cpu[*]", OBJECT(&s->cpu[i]),
sizeof(s->cpu[i]), sc->cpu_type,
&error_abort, NULL);
+ object_property_set_int(OBJECT(&s->cpu[i]), QEMU_PSCI_CONDUIT_SMC,
+ "psci-conduit", &error_abort);
+ object_property_set_int(OBJECT(&s->cpu[i]), aspeed_calc_affinity(i),
+ "mp-affinity", &error_abort);
+
+ object_property_set_int(OBJECT(&s->cpu[i]), 1125000000, "cntfrq",
+ &error_abort);
}
snprintf(typename, sizeof(typename), "aspeed.scu-%s", socname);
@@ -146,6 +163,9 @@ static void aspeed_soc_ast2600_init(Object *obj)
sysbus_init_child_obj(obj, "a7mpcore", &s->a7mpcore,
sizeof(s->a7mpcore), TYPE_A15MPCORE_PRIV);
+ object_property_set_int(OBJECT(&s->a7mpcore),
+ ASPEED_SOC_AST2600_MAX_IRQ + GIC_INTERNAL,
+ "num-irq", &error_abort);
sysbus_init_child_obj(obj, "rtc", OBJECT(&s->rtc), sizeof(s->rtc),
TYPE_ASPEED_RTC);
@@ -230,16 +250,6 @@ static void aspeed_soc_ast2600_init(Object *obj)
TYPE_SYSBUS_SDHCI);
}
-/*
- * ASPEED ast2600 has 0xf as cluster ID
- *
- * http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0388e/CIHEBGFG.html
- */
-static uint64_t aspeed_calc_affinity(int cpu)
-{
- return (0xf << ARM_AFF1_SHIFT) | cpu;
-}
-
static void aspeed_soc_ast2600_realize(DeviceState *dev, Error **errp)
{
int i;
@@ -264,19 +274,11 @@ static void aspeed_soc_ast2600_realize(DeviceState *dev, Error **errp)
/* CPU */
for (i = 0; i < s->num_cpus; i++) {
- object_property_set_int(OBJECT(&s->cpu[i]), QEMU_PSCI_CONDUIT_SMC,
- "psci-conduit", &error_abort);
if (s->num_cpus > 1) {
object_property_set_int(OBJECT(&s->cpu[i]),
ASPEED_A7MPCORE_ADDR,
"reset-cbar", &error_abort);
}
- object_property_set_int(OBJECT(&s->cpu[i]), aspeed_calc_affinity(i),
- "mp-affinity", &error_abort);
-
- object_property_set_int(OBJECT(&s->cpu[i]), 1125000000, "cntfrq",
- &error_abort);
-
/*
* TODO: the secondary CPUs are started and a boot helper
* is needed when using -kernel
@@ -292,9 +294,6 @@ static void aspeed_soc_ast2600_realize(DeviceState *dev, Error **errp)
/* A7MPCORE */
object_property_set_int(OBJECT(&s->a7mpcore), s->num_cpus, "num-cpu",
&error_abort);
- object_property_set_int(OBJECT(&s->a7mpcore),
- ASPEED_SOC_AST2600_MAX_IRQ + GIC_INTERNAL,
- "num-irq", &error_abort);
object_property_set_bool(OBJECT(&s->a7mpcore), true, "realized",
&error_abort);
--
2.21.1
^ permalink raw reply related [flat|nested] 98+ messages in thread* Re: [PATCH-for-5.1 v3 05/24] hw/arm/aspeed_ast2600: Move some code from realize() to init()
2020-04-12 22:36 ` Philippe Mathieu-Daudé
@ 2020-04-15 7:50 ` Cédric Le Goater
-1 siblings, 0 replies; 98+ messages in thread
From: Cédric Le Goater @ 2020-04-15 7:50 UTC (permalink / raw)
To: Philippe Mathieu-Daudé, qemu-devel
Cc: Fam Zheng, Peter Maydell, Sagar Karandikar, Michael S. Tsirkin,
Jeff Cody, Jason Wang, Alistair Francis, Edgar E. Iglesias,
Subbaraya Sundeep, qemu-block, Markus Armbruster, Max Reitz,
Joel Stanley, Marc-André Lureau, Richard Henderson,
Philippe Mathieu-Daudé,
Eduardo Habkost, Xie Changlong, Alistair Francis,
Beniamino Galvani, qemu-arm, Peter Chubb, Palmer Dabbelt,
David Gibson, Kevin Wolf, qemu-riscv, Andrew Jeffery,
Wen Congyang, Jean-Christophe Dubois, qemu-ppc,
Bastian Koppelmann, Paolo Bonzini
On 4/13/20 12:36 AM, Philippe Mathieu-Daudé wrote:
> Coccinelle reported:
>
> $ spatch ... --timeout 60 --sp-file \
> scripts/coccinelle/simplify-init-realize-error_propagate.cocci
> HANDLING: ./hw/arm/aspeed_ast2600.c
> >>> possible moves from aspeed_soc_ast2600_init() to aspeed_soc_ast2600_realize() in ./hw/arm/aspeed_ast2600.c:243
>
> Move the calls using &error_fatal which don't depend on input
> updated before realize() to init().
>
> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
> ---
> v3: Typo 'depend of' -> 'depend on' (eblake)
> ---
> hw/arm/aspeed_ast2600.c | 41 ++++++++++++++++++++---------------------
> 1 file changed, 20 insertions(+), 21 deletions(-)
>
> diff --git a/hw/arm/aspeed_ast2600.c b/hw/arm/aspeed_ast2600.c
> index a860ab6a35..64512f95c9 100644
> --- a/hw/arm/aspeed_ast2600.c
> +++ b/hw/arm/aspeed_ast2600.c
> @@ -114,6 +114,16 @@ static qemu_irq aspeed_soc_get_irq(AspeedSoCState *s, int ctrl)
> return qdev_get_gpio_in(DEVICE(&s->a7mpcore), sc->irqmap[ctrl]);
> }
>
> +/*
> + * ASPEED ast2600 has 0xf as cluster ID
> + *
> + * http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0388e/CIHEBGFG.html
> + */
> +static uint64_t aspeed_calc_affinity(int cpu)
> +{
> + return (0xf << ARM_AFF1_SHIFT) | cpu;
> +}
> +
> static void aspeed_soc_ast2600_init(Object *obj)
> {
> AspeedSoCState *s = ASPEED_SOC(obj);
> @@ -130,6 +140,13 @@ static void aspeed_soc_ast2600_init(Object *obj)
> object_initialize_child(obj, "cpu[*]", OBJECT(&s->cpu[i]),
> sizeof(s->cpu[i]), sc->cpu_type,
> &error_abort, NULL);
> + object_property_set_int(OBJECT(&s->cpu[i]), QEMU_PSCI_CONDUIT_SMC,
> + "psci-conduit", &error_abort);
> + object_property_set_int(OBJECT(&s->cpu[i]), aspeed_calc_affinity(i),
> + "mp-affinity", &error_abort);
> +
> + object_property_set_int(OBJECT(&s->cpu[i]), 1125000000, "cntfrq",
> + &error_abort);
> }
>
> snprintf(typename, sizeof(typename), "aspeed.scu-%s", socname);
> @@ -146,6 +163,9 @@ static void aspeed_soc_ast2600_init(Object *obj)
>
> sysbus_init_child_obj(obj, "a7mpcore", &s->a7mpcore,
> sizeof(s->a7mpcore), TYPE_A15MPCORE_PRIV);
> + object_property_set_int(OBJECT(&s->a7mpcore),
> + ASPEED_SOC_AST2600_MAX_IRQ + GIC_INTERNAL,
> + "num-irq", &error_abort);
>
> sysbus_init_child_obj(obj, "rtc", OBJECT(&s->rtc), sizeof(s->rtc),
> TYPE_ASPEED_RTC);
> @@ -230,16 +250,6 @@ static void aspeed_soc_ast2600_init(Object *obj)
> TYPE_SYSBUS_SDHCI);
> }
>
> -/*
> - * ASPEED ast2600 has 0xf as cluster ID
> - *
> - * http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0388e/CIHEBGFG.html
> - */
> -static uint64_t aspeed_calc_affinity(int cpu)
> -{
> - return (0xf << ARM_AFF1_SHIFT) | cpu;
> -}
> -
> static void aspeed_soc_ast2600_realize(DeviceState *dev, Error **errp)
> {
> int i;
> @@ -264,19 +274,11 @@ static void aspeed_soc_ast2600_realize(DeviceState *dev, Error **errp)
>
> /* CPU */
> for (i = 0; i < s->num_cpus; i++) {
> - object_property_set_int(OBJECT(&s->cpu[i]), QEMU_PSCI_CONDUIT_SMC,
> - "psci-conduit", &error_abort);
> if (s->num_cpus > 1) {
> object_property_set_int(OBJECT(&s->cpu[i]),
> ASPEED_A7MPCORE_ADDR,
> "reset-cbar", &error_abort);
> }
> - object_property_set_int(OBJECT(&s->cpu[i]), aspeed_calc_affinity(i),
> - "mp-affinity", &error_abort);
> -
> - object_property_set_int(OBJECT(&s->cpu[i]), 1125000000, "cntfrq",
> - &error_abort);
> -
> /*
> * TODO: the secondary CPUs are started and a boot helper
> * is needed when using -kernel
> @@ -292,9 +294,6 @@ static void aspeed_soc_ast2600_realize(DeviceState *dev, Error **errp)
> /* A7MPCORE */
> object_property_set_int(OBJECT(&s->a7mpcore), s->num_cpus, "num-cpu",
> &error_abort);
> - object_property_set_int(OBJECT(&s->a7mpcore),
> - ASPEED_SOC_AST2600_MAX_IRQ + GIC_INTERNAL,
> - "num-irq", &error_abort);
>
> object_property_set_bool(OBJECT(&s->a7mpcore), true, "realized",
> &error_abort);
>
^ permalink raw reply [flat|nested] 98+ messages in thread* Re: [PATCH-for-5.1 v3 05/24] hw/arm/aspeed_ast2600: Move some code from realize() to init()
@ 2020-04-15 7:50 ` Cédric Le Goater
0 siblings, 0 replies; 98+ messages in thread
From: Cédric Le Goater @ 2020-04-15 7:50 UTC (permalink / raw)
To: Philippe Mathieu-Daudé, qemu-devel
Cc: Joel Stanley, Jean-Christophe Dubois, Subbaraya Sundeep,
Max Reitz, Palmer Dabbelt, qemu-ppc, Sagar Karandikar,
Markus Armbruster, Jeff Cody, Peter Maydell, Xie Changlong,
Fam Zheng, Eduardo Habkost, Alistair Francis, qemu-arm,
Wen Congyang, Philippe Mathieu-Daudé,
Bastian Koppelmann, Edgar E. Iglesias, Kevin Wolf,
Marc-André Lureau, David Gibson, Jason Wang, Peter Chubb,
Beniamino Galvani, Alistair Francis, qemu-riscv, qemu-block,
Paolo Bonzini, Andrew Jeffery, Michael S. Tsirkin,
Richard Henderson
On 4/13/20 12:36 AM, Philippe Mathieu-Daudé wrote:
> Coccinelle reported:
>
> $ spatch ... --timeout 60 --sp-file \
> scripts/coccinelle/simplify-init-realize-error_propagate.cocci
> HANDLING: ./hw/arm/aspeed_ast2600.c
> >>> possible moves from aspeed_soc_ast2600_init() to aspeed_soc_ast2600_realize() in ./hw/arm/aspeed_ast2600.c:243
>
> Move the calls using &error_fatal which don't depend on input
> updated before realize() to init().
>
> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
> ---
> v3: Typo 'depend of' -> 'depend on' (eblake)
> ---
> hw/arm/aspeed_ast2600.c | 41 ++++++++++++++++++++---------------------
> 1 file changed, 20 insertions(+), 21 deletions(-)
>
> diff --git a/hw/arm/aspeed_ast2600.c b/hw/arm/aspeed_ast2600.c
> index a860ab6a35..64512f95c9 100644
> --- a/hw/arm/aspeed_ast2600.c
> +++ b/hw/arm/aspeed_ast2600.c
> @@ -114,6 +114,16 @@ static qemu_irq aspeed_soc_get_irq(AspeedSoCState *s, int ctrl)
> return qdev_get_gpio_in(DEVICE(&s->a7mpcore), sc->irqmap[ctrl]);
> }
>
> +/*
> + * ASPEED ast2600 has 0xf as cluster ID
> + *
> + * http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0388e/CIHEBGFG.html
> + */
> +static uint64_t aspeed_calc_affinity(int cpu)
> +{
> + return (0xf << ARM_AFF1_SHIFT) | cpu;
> +}
> +
> static void aspeed_soc_ast2600_init(Object *obj)
> {
> AspeedSoCState *s = ASPEED_SOC(obj);
> @@ -130,6 +140,13 @@ static void aspeed_soc_ast2600_init(Object *obj)
> object_initialize_child(obj, "cpu[*]", OBJECT(&s->cpu[i]),
> sizeof(s->cpu[i]), sc->cpu_type,
> &error_abort, NULL);
> + object_property_set_int(OBJECT(&s->cpu[i]), QEMU_PSCI_CONDUIT_SMC,
> + "psci-conduit", &error_abort);
> + object_property_set_int(OBJECT(&s->cpu[i]), aspeed_calc_affinity(i),
> + "mp-affinity", &error_abort);
> +
> + object_property_set_int(OBJECT(&s->cpu[i]), 1125000000, "cntfrq",
> + &error_abort);
> }
>
> snprintf(typename, sizeof(typename), "aspeed.scu-%s", socname);
> @@ -146,6 +163,9 @@ static void aspeed_soc_ast2600_init(Object *obj)
>
> sysbus_init_child_obj(obj, "a7mpcore", &s->a7mpcore,
> sizeof(s->a7mpcore), TYPE_A15MPCORE_PRIV);
> + object_property_set_int(OBJECT(&s->a7mpcore),
> + ASPEED_SOC_AST2600_MAX_IRQ + GIC_INTERNAL,
> + "num-irq", &error_abort);
>
> sysbus_init_child_obj(obj, "rtc", OBJECT(&s->rtc), sizeof(s->rtc),
> TYPE_ASPEED_RTC);
> @@ -230,16 +250,6 @@ static void aspeed_soc_ast2600_init(Object *obj)
> TYPE_SYSBUS_SDHCI);
> }
>
> -/*
> - * ASPEED ast2600 has 0xf as cluster ID
> - *
> - * http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0388e/CIHEBGFG.html
> - */
> -static uint64_t aspeed_calc_affinity(int cpu)
> -{
> - return (0xf << ARM_AFF1_SHIFT) | cpu;
> -}
> -
> static void aspeed_soc_ast2600_realize(DeviceState *dev, Error **errp)
> {
> int i;
> @@ -264,19 +274,11 @@ static void aspeed_soc_ast2600_realize(DeviceState *dev, Error **errp)
>
> /* CPU */
> for (i = 0; i < s->num_cpus; i++) {
> - object_property_set_int(OBJECT(&s->cpu[i]), QEMU_PSCI_CONDUIT_SMC,
> - "psci-conduit", &error_abort);
> if (s->num_cpus > 1) {
> object_property_set_int(OBJECT(&s->cpu[i]),
> ASPEED_A7MPCORE_ADDR,
> "reset-cbar", &error_abort);
> }
> - object_property_set_int(OBJECT(&s->cpu[i]), aspeed_calc_affinity(i),
> - "mp-affinity", &error_abort);
> -
> - object_property_set_int(OBJECT(&s->cpu[i]), 1125000000, "cntfrq",
> - &error_abort);
> -
> /*
> * TODO: the secondary CPUs are started and a boot helper
> * is needed when using -kernel
> @@ -292,9 +294,6 @@ static void aspeed_soc_ast2600_realize(DeviceState *dev, Error **errp)
> /* A7MPCORE */
> object_property_set_int(OBJECT(&s->a7mpcore), s->num_cpus, "num-cpu",
> &error_abort);
> - object_property_set_int(OBJECT(&s->a7mpcore),
> - ASPEED_SOC_AST2600_MAX_IRQ + GIC_INTERNAL,
> - "num-irq", &error_abort);
>
> object_property_set_bool(OBJECT(&s->a7mpcore), true, "realized",
> &error_abort);
>
^ permalink raw reply [flat|nested] 98+ messages in thread
* [PATCH-for-5.1 v3 06/24] hw/arm/aspeed_soc: Move some code from realize() to init()
2020-04-12 22:35 ` Philippe Mathieu-Daudé
@ 2020-04-12 22:36 ` Philippe Mathieu-Daudé
-1 siblings, 0 replies; 98+ messages in thread
From: Philippe Mathieu-Daudé @ 2020-04-12 22:36 UTC (permalink / raw)
To: qemu-devel
Cc: Fam Zheng, Peter Maydell, Sagar Karandikar, Michael S. Tsirkin,
Jeff Cody, Jason Wang, Alistair Francis, Edgar E. Iglesias,
Subbaraya Sundeep, qemu-block, Markus Armbruster, Max Reitz,
Joel Stanley, Marc-André Lureau, Richard Henderson,
Philippe Mathieu-Daudé,
Eduardo Habkost, Xie Changlong, Alistair Francis,
Beniamino Galvani, qemu-arm, Peter Chubb, Cédric Le Goater,
Palmer Dabbelt, David Gibson, Kevin Wolf, qemu-riscv,
Andrew Jeffery, Wen Congyang, Philippe Mathieu-Daudé,
Jean-Christophe Dubois, qemu-ppc, Bastian Koppelmann,
Paolo Bonzini
Coccinelle reported:
$ spatch ... --timeout 60 --sp-file \
scripts/coccinelle/simplify-init-realize-error_propagate.cocci
HANDLING: ./hw/arm/aspeed_soc.c
>>> possible moves from aspeed_soc_init() to aspeed_soc_realize() in ./hw/arm/aspeed_soc.c:231
Move the calls using &error_fatal which don't depend on input
updated before realize() to init().
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
v3: Typo 'depend of' -> 'depend on' (eblake)
---
hw/arm/aspeed_soc.c | 6 ++----
1 file changed, 2 insertions(+), 4 deletions(-)
diff --git a/hw/arm/aspeed_soc.c b/hw/arm/aspeed_soc.c
index 696c7fda14..debd7c8faa 100644
--- a/hw/arm/aspeed_soc.c
+++ b/hw/arm/aspeed_soc.c
@@ -183,6 +183,7 @@ static void aspeed_soc_init(Object *obj)
snprintf(typename, sizeof(typename), "aspeed.spi%d-%s", i + 1, socname);
sysbus_init_child_obj(obj, "spi[*]", OBJECT(&s->spi[i]),
sizeof(s->spi[i]), typename);
+ object_property_set_int(OBJECT(&s->spi[i]), 1, "num-cs", &error_abort);
}
for (i = 0; i < sc->ehcis_num; i++) {
@@ -360,10 +361,7 @@ static void aspeed_soc_realize(DeviceState *dev, Error **errp)
/* SPI */
for (i = 0; i < sc->spis_num; i++) {
- object_property_set_int(OBJECT(&s->spi[i]), 1, "num-cs", &err);
- object_property_set_bool(OBJECT(&s->spi[i]), true, "realized",
- &local_err);
- error_propagate(&err, local_err);
+ object_property_set_bool(OBJECT(&s->spi[i]), true, "realized", &err);
if (err) {
error_propagate(errp, err);
return;
--
2.21.1
^ permalink raw reply related [flat|nested] 98+ messages in thread* [PATCH-for-5.1 v3 06/24] hw/arm/aspeed_soc: Move some code from realize() to init()
@ 2020-04-12 22:36 ` Philippe Mathieu-Daudé
0 siblings, 0 replies; 98+ messages in thread
From: Philippe Mathieu-Daudé @ 2020-04-12 22:36 UTC (permalink / raw)
To: qemu-devel
Cc: Joel Stanley, Jean-Christophe Dubois, Subbaraya Sundeep,
Max Reitz, Palmer Dabbelt, qemu-ppc, Sagar Karandikar,
Markus Armbruster, Jeff Cody, Peter Maydell, Xie Changlong,
Fam Zheng, Eduardo Habkost, Alistair Francis, qemu-arm,
Wen Congyang, Philippe Mathieu-Daudé,
Bastian Koppelmann, Edgar E. Iglesias, Kevin Wolf,
Marc-André Lureau, David Gibson, Jason Wang, Peter Chubb,
Beniamino Galvani, Alistair Francis, qemu-riscv,
Cédric Le Goater, qemu-block, Paolo Bonzini, Andrew Jeffery,
Michael S. Tsirkin, Richard Henderson,
Philippe Mathieu-Daudé
Coccinelle reported:
$ spatch ... --timeout 60 --sp-file \
scripts/coccinelle/simplify-init-realize-error_propagate.cocci
HANDLING: ./hw/arm/aspeed_soc.c
>>> possible moves from aspeed_soc_init() to aspeed_soc_realize() in ./hw/arm/aspeed_soc.c:231
Move the calls using &error_fatal which don't depend on input
updated before realize() to init().
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
v3: Typo 'depend of' -> 'depend on' (eblake)
---
hw/arm/aspeed_soc.c | 6 ++----
1 file changed, 2 insertions(+), 4 deletions(-)
diff --git a/hw/arm/aspeed_soc.c b/hw/arm/aspeed_soc.c
index 696c7fda14..debd7c8faa 100644
--- a/hw/arm/aspeed_soc.c
+++ b/hw/arm/aspeed_soc.c
@@ -183,6 +183,7 @@ static void aspeed_soc_init(Object *obj)
snprintf(typename, sizeof(typename), "aspeed.spi%d-%s", i + 1, socname);
sysbus_init_child_obj(obj, "spi[*]", OBJECT(&s->spi[i]),
sizeof(s->spi[i]), typename);
+ object_property_set_int(OBJECT(&s->spi[i]), 1, "num-cs", &error_abort);
}
for (i = 0; i < sc->ehcis_num; i++) {
@@ -360,10 +361,7 @@ static void aspeed_soc_realize(DeviceState *dev, Error **errp)
/* SPI */
for (i = 0; i < sc->spis_num; i++) {
- object_property_set_int(OBJECT(&s->spi[i]), 1, "num-cs", &err);
- object_property_set_bool(OBJECT(&s->spi[i]), true, "realized",
- &local_err);
- error_propagate(&err, local_err);
+ object_property_set_bool(OBJECT(&s->spi[i]), true, "realized", &err);
if (err) {
error_propagate(errp, err);
return;
--
2.21.1
^ permalink raw reply related [flat|nested] 98+ messages in thread
* [PATCH-for-5.1 v3 07/24] hw/arm/aspeed_soc: Simplify use of Error*
2020-04-12 22:35 ` Philippe Mathieu-Daudé
@ 2020-04-12 22:36 ` Philippe Mathieu-Daudé
-1 siblings, 0 replies; 98+ messages in thread
From: Philippe Mathieu-Daudé @ 2020-04-12 22:36 UTC (permalink / raw)
To: qemu-devel
Cc: Fam Zheng, Peter Maydell, Sagar Karandikar, Michael S. Tsirkin,
Jeff Cody, Jason Wang, Alistair Francis, Edgar E. Iglesias,
Subbaraya Sundeep, qemu-block, Markus Armbruster, Max Reitz,
Joel Stanley, Marc-André Lureau, Richard Henderson,
Philippe Mathieu-Daudé,
Eduardo Habkost, Xie Changlong, Alistair Francis,
Beniamino Galvani, qemu-arm, Peter Chubb, Cédric Le Goater,
Palmer Dabbelt, David Gibson, Kevin Wolf, qemu-riscv,
Andrew Jeffery, Wen Congyang, Philippe Mathieu-Daudé,
Jean-Christophe Dubois, qemu-ppc, Bastian Koppelmann,
Paolo Bonzini
In the previous commit we noticed we don't need two different
Error*, drop the one less used.
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
v3: Indent 'return'
---
hw/arm/aspeed_soc.c | 13 ++++++++-----
1 file changed, 8 insertions(+), 5 deletions(-)
diff --git a/hw/arm/aspeed_soc.c b/hw/arm/aspeed_soc.c
index debd7c8faa..4ee991ec16 100644
--- a/hw/arm/aspeed_soc.c
+++ b/hw/arm/aspeed_soc.c
@@ -234,7 +234,7 @@ static void aspeed_soc_realize(DeviceState *dev, Error **errp)
int i;
AspeedSoCState *s = ASPEED_SOC(dev);
AspeedSoCClass *sc = ASPEED_SOC_GET_CLASS(s);
- Error *err = NULL, *local_err = NULL;
+ Error *err = NULL;
/* IO space */
create_unimplemented_device("aspeed_soc.io", sc->memmap[ASPEED_IOMEM],
@@ -413,12 +413,15 @@ static void aspeed_soc_realize(DeviceState *dev, Error **errp)
qdev_set_nic_properties(DEVICE(&s->ftgmac100[i]), &nd_table[i]);
object_property_set_bool(OBJECT(&s->ftgmac100[i]), true, "aspeed",
&err);
- object_property_set_bool(OBJECT(&s->ftgmac100[i]), true, "realized",
- &local_err);
- error_propagate(&err, local_err);
if (err) {
error_propagate(errp, err);
- return;
+ return;
+ }
+ object_property_set_bool(OBJECT(&s->ftgmac100[i]), true, "realized",
+ &err);
+ if (err) {
+ error_propagate(errp, err);
+ return;
}
sysbus_mmio_map(SYS_BUS_DEVICE(&s->ftgmac100[i]), 0,
sc->memmap[ASPEED_ETH1 + i]);
--
2.21.1
^ permalink raw reply related [flat|nested] 98+ messages in thread* [PATCH-for-5.1 v3 07/24] hw/arm/aspeed_soc: Simplify use of Error*
@ 2020-04-12 22:36 ` Philippe Mathieu-Daudé
0 siblings, 0 replies; 98+ messages in thread
From: Philippe Mathieu-Daudé @ 2020-04-12 22:36 UTC (permalink / raw)
To: qemu-devel
Cc: Joel Stanley, Jean-Christophe Dubois, Subbaraya Sundeep,
Max Reitz, Palmer Dabbelt, qemu-ppc, Sagar Karandikar,
Markus Armbruster, Jeff Cody, Peter Maydell, Xie Changlong,
Fam Zheng, Eduardo Habkost, Alistair Francis, qemu-arm,
Wen Congyang, Philippe Mathieu-Daudé,
Bastian Koppelmann, Edgar E. Iglesias, Kevin Wolf,
Marc-André Lureau, David Gibson, Jason Wang, Peter Chubb,
Beniamino Galvani, Alistair Francis, qemu-riscv,
Cédric Le Goater, qemu-block, Paolo Bonzini, Andrew Jeffery,
Michael S. Tsirkin, Richard Henderson,
Philippe Mathieu-Daudé
In the previous commit we noticed we don't need two different
Error*, drop the one less used.
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
v3: Indent 'return'
---
hw/arm/aspeed_soc.c | 13 ++++++++-----
1 file changed, 8 insertions(+), 5 deletions(-)
diff --git a/hw/arm/aspeed_soc.c b/hw/arm/aspeed_soc.c
index debd7c8faa..4ee991ec16 100644
--- a/hw/arm/aspeed_soc.c
+++ b/hw/arm/aspeed_soc.c
@@ -234,7 +234,7 @@ static void aspeed_soc_realize(DeviceState *dev, Error **errp)
int i;
AspeedSoCState *s = ASPEED_SOC(dev);
AspeedSoCClass *sc = ASPEED_SOC_GET_CLASS(s);
- Error *err = NULL, *local_err = NULL;
+ Error *err = NULL;
/* IO space */
create_unimplemented_device("aspeed_soc.io", sc->memmap[ASPEED_IOMEM],
@@ -413,12 +413,15 @@ static void aspeed_soc_realize(DeviceState *dev, Error **errp)
qdev_set_nic_properties(DEVICE(&s->ftgmac100[i]), &nd_table[i]);
object_property_set_bool(OBJECT(&s->ftgmac100[i]), true, "aspeed",
&err);
- object_property_set_bool(OBJECT(&s->ftgmac100[i]), true, "realized",
- &local_err);
- error_propagate(&err, local_err);
if (err) {
error_propagate(errp, err);
- return;
+ return;
+ }
+ object_property_set_bool(OBJECT(&s->ftgmac100[i]), true, "realized",
+ &err);
+ if (err) {
+ error_propagate(errp, err);
+ return;
}
sysbus_mmio_map(SYS_BUS_DEVICE(&s->ftgmac100[i]), 0,
sc->memmap[ASPEED_ETH1 + i]);
--
2.21.1
^ permalink raw reply related [flat|nested] 98+ messages in thread
* [PATCH-for-5.1 v3 08/24] hw/arm/fsl-imx6: Simplify checks on 'smp_cpus' count
2020-04-12 22:35 ` Philippe Mathieu-Daudé
@ 2020-04-12 22:36 ` Philippe Mathieu-Daudé
-1 siblings, 0 replies; 98+ messages in thread
From: Philippe Mathieu-Daudé @ 2020-04-12 22:36 UTC (permalink / raw)
To: qemu-devel
Cc: Fam Zheng, Peter Maydell, Sagar Karandikar, Michael S. Tsirkin,
Jeff Cody, Jason Wang, Alistair Francis, Edgar E. Iglesias,
Subbaraya Sundeep, qemu-block, Markus Armbruster, Max Reitz,
Joel Stanley, Marc-André Lureau, Richard Henderson,
Philippe Mathieu-Daudé,
Eduardo Habkost, Xie Changlong, Alistair Francis,
Beniamino Galvani, qemu-arm, Peter Chubb, Cédric Le Goater,
Palmer Dabbelt, David Gibson, Kevin Wolf, qemu-riscv,
Andrew Jeffery, Wen Congyang, Philippe Mathieu-Daudé,
Jean-Christophe Dubois, qemu-ppc, Bastian Koppelmann,
Paolo Bonzini
Coccinelle failed at processing this file:
$ spatch ... --timeout 60 --sp-file \
scripts/coccinelle/simplify-init-realize-error_propagate.cocci
HANDLING: ./hw/arm/fsl-imx6.c
Fatal error: exception Coccinelle_modules.Common.Timeout
While reviewing we notice the smp_cpus count is already limited
by MachineClass::max_cpus:
static void sabrelite_machine_init(MachineClass *mc)
{
mc->max_cpus = FSL_IMX6_NUM_CPUS;
...
}
So remove the check in realize(), but still assert in init().
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
hw/arm/fsl-imx6.c | 8 ++------
1 file changed, 2 insertions(+), 6 deletions(-)
diff --git a/hw/arm/fsl-imx6.c b/hw/arm/fsl-imx6.c
index 13f1bf23a6..3d37352b08 100644
--- a/hw/arm/fsl-imx6.c
+++ b/hw/arm/fsl-imx6.c
@@ -37,10 +37,12 @@
static void fsl_imx6_init(Object *obj)
{
MachineState *ms = MACHINE(qdev_get_machine());
+ unsigned int smp_cpus = ms->smp.cpus;
FslIMX6State *s = FSL_IMX6(obj);
char name[NAME_SIZE];
int i;
+ assert(smp_cpus <= FSL_IMX6_NUM_CPUS);
for (i = 0; i < MIN(ms->smp.cpus, FSL_IMX6_NUM_CPUS); i++) {
snprintf(name, NAME_SIZE, "cpu%d", i);
object_initialize_child(obj, name, &s->cpu[i], sizeof(s->cpu[i]),
@@ -121,12 +123,6 @@ static void fsl_imx6_realize(DeviceState *dev, Error **errp)
Error *err = NULL;
unsigned int smp_cpus = ms->smp.cpus;
- if (smp_cpus > FSL_IMX6_NUM_CPUS) {
- error_setg(errp, "%s: Only %d CPUs are supported (%d requested)",
- TYPE_FSL_IMX6, FSL_IMX6_NUM_CPUS, smp_cpus);
- return;
- }
-
for (i = 0; i < smp_cpus; i++) {
/* On uniprocessor, the CBAR is set to 0 */
--
2.21.1
^ permalink raw reply related [flat|nested] 98+ messages in thread* [PATCH-for-5.1 v3 08/24] hw/arm/fsl-imx6: Simplify checks on 'smp_cpus' count
@ 2020-04-12 22:36 ` Philippe Mathieu-Daudé
0 siblings, 0 replies; 98+ messages in thread
From: Philippe Mathieu-Daudé @ 2020-04-12 22:36 UTC (permalink / raw)
To: qemu-devel
Cc: Joel Stanley, Jean-Christophe Dubois, Subbaraya Sundeep,
Max Reitz, Palmer Dabbelt, qemu-ppc, Sagar Karandikar,
Markus Armbruster, Jeff Cody, Peter Maydell, Xie Changlong,
Fam Zheng, Eduardo Habkost, Alistair Francis, qemu-arm,
Wen Congyang, Philippe Mathieu-Daudé,
Bastian Koppelmann, Edgar E. Iglesias, Kevin Wolf,
Marc-André Lureau, David Gibson, Jason Wang, Peter Chubb,
Beniamino Galvani, Alistair Francis, qemu-riscv,
Cédric Le Goater, qemu-block, Paolo Bonzini, Andrew Jeffery,
Michael S. Tsirkin, Richard Henderson,
Philippe Mathieu-Daudé
Coccinelle failed at processing this file:
$ spatch ... --timeout 60 --sp-file \
scripts/coccinelle/simplify-init-realize-error_propagate.cocci
HANDLING: ./hw/arm/fsl-imx6.c
Fatal error: exception Coccinelle_modules.Common.Timeout
While reviewing we notice the smp_cpus count is already limited
by MachineClass::max_cpus:
static void sabrelite_machine_init(MachineClass *mc)
{
mc->max_cpus = FSL_IMX6_NUM_CPUS;
...
}
So remove the check in realize(), but still assert in init().
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
hw/arm/fsl-imx6.c | 8 ++------
1 file changed, 2 insertions(+), 6 deletions(-)
diff --git a/hw/arm/fsl-imx6.c b/hw/arm/fsl-imx6.c
index 13f1bf23a6..3d37352b08 100644
--- a/hw/arm/fsl-imx6.c
+++ b/hw/arm/fsl-imx6.c
@@ -37,10 +37,12 @@
static void fsl_imx6_init(Object *obj)
{
MachineState *ms = MACHINE(qdev_get_machine());
+ unsigned int smp_cpus = ms->smp.cpus;
FslIMX6State *s = FSL_IMX6(obj);
char name[NAME_SIZE];
int i;
+ assert(smp_cpus <= FSL_IMX6_NUM_CPUS);
for (i = 0; i < MIN(ms->smp.cpus, FSL_IMX6_NUM_CPUS); i++) {
snprintf(name, NAME_SIZE, "cpu%d", i);
object_initialize_child(obj, name, &s->cpu[i], sizeof(s->cpu[i]),
@@ -121,12 +123,6 @@ static void fsl_imx6_realize(DeviceState *dev, Error **errp)
Error *err = NULL;
unsigned int smp_cpus = ms->smp.cpus;
- if (smp_cpus > FSL_IMX6_NUM_CPUS) {
- error_setg(errp, "%s: Only %d CPUs are supported (%d requested)",
- TYPE_FSL_IMX6, FSL_IMX6_NUM_CPUS, smp_cpus);
- return;
- }
-
for (i = 0; i < smp_cpus; i++) {
/* On uniprocessor, the CBAR is set to 0 */
--
2.21.1
^ permalink raw reply related [flat|nested] 98+ messages in thread
* [PATCH-for-5.1 v3 09/24] hw/arm/fsl-imx6: Move some code from realize() to init()
2020-04-12 22:35 ` Philippe Mathieu-Daudé
@ 2020-04-12 22:36 ` Philippe Mathieu-Daudé
-1 siblings, 0 replies; 98+ messages in thread
From: Philippe Mathieu-Daudé @ 2020-04-12 22:36 UTC (permalink / raw)
To: qemu-devel
Cc: Fam Zheng, Peter Maydell, Sagar Karandikar, Michael S. Tsirkin,
Jeff Cody, Jason Wang, Alistair Francis, Edgar E. Iglesias,
Subbaraya Sundeep, qemu-block, Markus Armbruster, Max Reitz,
Joel Stanley, Marc-André Lureau, Richard Henderson,
Philippe Mathieu-Daudé,
Eduardo Habkost, Xie Changlong, Alistair Francis,
Beniamino Galvani, qemu-arm, Peter Chubb, Cédric Le Goater,
Palmer Dabbelt, David Gibson, Kevin Wolf, qemu-riscv,
Andrew Jeffery, Wen Congyang, Philippe Mathieu-Daudé,
Jean-Christophe Dubois, qemu-ppc, Bastian Koppelmann,
Paolo Bonzini
Coccinelle failed at processing this file:
$ spatch ... --timeout 60 --sp-file \
scripts/coccinelle/simplify-init-realize-error_propagate.cocci
HANDLING: ./hw/arm/fsl-imx6.c
Fatal error: exception Coccinelle_modules.Common.Timeout
While reviewing we noticed some functions can be called at
init() time, reducing the need to add extra Error checks at
realize() time. Move them. The coccinelle script succeeds
after this.
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
hw/arm/fsl-imx6.c | 47 +++++++++++++++++++++++------------------------
1 file changed, 23 insertions(+), 24 deletions(-)
diff --git a/hw/arm/fsl-imx6.c b/hw/arm/fsl-imx6.c
index 3d37352b08..6bf8aa0404 100644
--- a/hw/arm/fsl-imx6.c
+++ b/hw/arm/fsl-imx6.c
@@ -48,11 +48,30 @@ static void fsl_imx6_init(Object *obj)
object_initialize_child(obj, name, &s->cpu[i], sizeof(s->cpu[i]),
ARM_CPU_TYPE_NAME("cortex-a9"),
&error_abort, NULL);
+
+ /* On uniprocessor, the CBAR is set to 0 */
+ if (smp_cpus > 1) {
+ object_property_set_int(OBJECT(&s->cpu[i]), FSL_IMX6_A9MPCORE_ADDR,
+ "reset-cbar", &error_abort);
+ }
+
+ /* All CPU but CPU 0 start in power off mode */
+ if (i) {
+ object_property_set_bool(OBJECT(&s->cpu[i]), true,
+ "start-powered-off", &error_abort);
+ }
}
sysbus_init_child_obj(obj, "a9mpcore", &s->a9mpcore, sizeof(s->a9mpcore),
TYPE_A9MPCORE_PRIV);
+ object_property_set_int(OBJECT(&s->a9mpcore), smp_cpus, "num-cpu",
+ &error_abort);
+
+ object_property_set_int(OBJECT(&s->a9mpcore),
+ FSL_IMX6_MAX_IRQ + GIC_INTERNAL, "num-irq",
+ &error_abort);
+
sysbus_init_child_obj(obj, "ccm", &s->ccm, sizeof(s->ccm), TYPE_IMX6_CCM);
sysbus_init_child_obj(obj, "src", &s->src, sizeof(s->src), TYPE_IMX6_SRC);
@@ -81,6 +100,10 @@ static void fsl_imx6_init(Object *obj)
snprintf(name, NAME_SIZE, "gpio%d", i + 1);
sysbus_init_child_obj(obj, name, &s->gpio[i], sizeof(s->gpio[i]),
TYPE_IMX_GPIO);
+ object_property_set_bool(OBJECT(&s->gpio[i]), true, "has-edge-sel",
+ &error_abort);
+ object_property_set_bool(OBJECT(&s->gpio[i]), true, "has-upper-pin-irq",
+ &error_abort);
}
for (i = 0; i < FSL_IMX6_NUM_ESDHCS; i++) {
@@ -124,19 +147,6 @@ static void fsl_imx6_realize(DeviceState *dev, Error **errp)
unsigned int smp_cpus = ms->smp.cpus;
for (i = 0; i < smp_cpus; i++) {
-
- /* On uniprocessor, the CBAR is set to 0 */
- if (smp_cpus > 1) {
- object_property_set_int(OBJECT(&s->cpu[i]), FSL_IMX6_A9MPCORE_ADDR,
- "reset-cbar", &error_abort);
- }
-
- /* All CPU but CPU 0 start in power off mode */
- if (i) {
- object_property_set_bool(OBJECT(&s->cpu[i]), true,
- "start-powered-off", &error_abort);
- }
-
object_property_set_bool(OBJECT(&s->cpu[i]), true, "realized", &err);
if (err) {
error_propagate(errp, err);
@@ -144,13 +154,6 @@ static void fsl_imx6_realize(DeviceState *dev, Error **errp)
}
}
- object_property_set_int(OBJECT(&s->a9mpcore), smp_cpus, "num-cpu",
- &error_abort);
-
- object_property_set_int(OBJECT(&s->a9mpcore),
- FSL_IMX6_MAX_IRQ + GIC_INTERNAL, "num-irq",
- &error_abort);
-
object_property_set_bool(OBJECT(&s->a9mpcore), true, "realized", &err);
if (err) {
error_propagate(errp, err);
@@ -310,10 +313,6 @@ static void fsl_imx6_realize(DeviceState *dev, Error **errp)
},
};
- object_property_set_bool(OBJECT(&s->gpio[i]), true, "has-edge-sel",
- &error_abort);
- object_property_set_bool(OBJECT(&s->gpio[i]), true, "has-upper-pin-irq",
- &error_abort);
object_property_set_bool(OBJECT(&s->gpio[i]), true, "realized", &err);
if (err) {
error_propagate(errp, err);
--
2.21.1
^ permalink raw reply related [flat|nested] 98+ messages in thread* [PATCH-for-5.1 v3 09/24] hw/arm/fsl-imx6: Move some code from realize() to init()
@ 2020-04-12 22:36 ` Philippe Mathieu-Daudé
0 siblings, 0 replies; 98+ messages in thread
From: Philippe Mathieu-Daudé @ 2020-04-12 22:36 UTC (permalink / raw)
To: qemu-devel
Cc: Joel Stanley, Jean-Christophe Dubois, Subbaraya Sundeep,
Max Reitz, Palmer Dabbelt, qemu-ppc, Sagar Karandikar,
Markus Armbruster, Jeff Cody, Peter Maydell, Xie Changlong,
Fam Zheng, Eduardo Habkost, Alistair Francis, qemu-arm,
Wen Congyang, Philippe Mathieu-Daudé,
Bastian Koppelmann, Edgar E. Iglesias, Kevin Wolf,
Marc-André Lureau, David Gibson, Jason Wang, Peter Chubb,
Beniamino Galvani, Alistair Francis, qemu-riscv,
Cédric Le Goater, qemu-block, Paolo Bonzini, Andrew Jeffery,
Michael S. Tsirkin, Richard Henderson,
Philippe Mathieu-Daudé
Coccinelle failed at processing this file:
$ spatch ... --timeout 60 --sp-file \
scripts/coccinelle/simplify-init-realize-error_propagate.cocci
HANDLING: ./hw/arm/fsl-imx6.c
Fatal error: exception Coccinelle_modules.Common.Timeout
While reviewing we noticed some functions can be called at
init() time, reducing the need to add extra Error checks at
realize() time. Move them. The coccinelle script succeeds
after this.
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
hw/arm/fsl-imx6.c | 47 +++++++++++++++++++++++------------------------
1 file changed, 23 insertions(+), 24 deletions(-)
diff --git a/hw/arm/fsl-imx6.c b/hw/arm/fsl-imx6.c
index 3d37352b08..6bf8aa0404 100644
--- a/hw/arm/fsl-imx6.c
+++ b/hw/arm/fsl-imx6.c
@@ -48,11 +48,30 @@ static void fsl_imx6_init(Object *obj)
object_initialize_child(obj, name, &s->cpu[i], sizeof(s->cpu[i]),
ARM_CPU_TYPE_NAME("cortex-a9"),
&error_abort, NULL);
+
+ /* On uniprocessor, the CBAR is set to 0 */
+ if (smp_cpus > 1) {
+ object_property_set_int(OBJECT(&s->cpu[i]), FSL_IMX6_A9MPCORE_ADDR,
+ "reset-cbar", &error_abort);
+ }
+
+ /* All CPU but CPU 0 start in power off mode */
+ if (i) {
+ object_property_set_bool(OBJECT(&s->cpu[i]), true,
+ "start-powered-off", &error_abort);
+ }
}
sysbus_init_child_obj(obj, "a9mpcore", &s->a9mpcore, sizeof(s->a9mpcore),
TYPE_A9MPCORE_PRIV);
+ object_property_set_int(OBJECT(&s->a9mpcore), smp_cpus, "num-cpu",
+ &error_abort);
+
+ object_property_set_int(OBJECT(&s->a9mpcore),
+ FSL_IMX6_MAX_IRQ + GIC_INTERNAL, "num-irq",
+ &error_abort);
+
sysbus_init_child_obj(obj, "ccm", &s->ccm, sizeof(s->ccm), TYPE_IMX6_CCM);
sysbus_init_child_obj(obj, "src", &s->src, sizeof(s->src), TYPE_IMX6_SRC);
@@ -81,6 +100,10 @@ static void fsl_imx6_init(Object *obj)
snprintf(name, NAME_SIZE, "gpio%d", i + 1);
sysbus_init_child_obj(obj, name, &s->gpio[i], sizeof(s->gpio[i]),
TYPE_IMX_GPIO);
+ object_property_set_bool(OBJECT(&s->gpio[i]), true, "has-edge-sel",
+ &error_abort);
+ object_property_set_bool(OBJECT(&s->gpio[i]), true, "has-upper-pin-irq",
+ &error_abort);
}
for (i = 0; i < FSL_IMX6_NUM_ESDHCS; i++) {
@@ -124,19 +147,6 @@ static void fsl_imx6_realize(DeviceState *dev, Error **errp)
unsigned int smp_cpus = ms->smp.cpus;
for (i = 0; i < smp_cpus; i++) {
-
- /* On uniprocessor, the CBAR is set to 0 */
- if (smp_cpus > 1) {
- object_property_set_int(OBJECT(&s->cpu[i]), FSL_IMX6_A9MPCORE_ADDR,
- "reset-cbar", &error_abort);
- }
-
- /* All CPU but CPU 0 start in power off mode */
- if (i) {
- object_property_set_bool(OBJECT(&s->cpu[i]), true,
- "start-powered-off", &error_abort);
- }
-
object_property_set_bool(OBJECT(&s->cpu[i]), true, "realized", &err);
if (err) {
error_propagate(errp, err);
@@ -144,13 +154,6 @@ static void fsl_imx6_realize(DeviceState *dev, Error **errp)
}
}
- object_property_set_int(OBJECT(&s->a9mpcore), smp_cpus, "num-cpu",
- &error_abort);
-
- object_property_set_int(OBJECT(&s->a9mpcore),
- FSL_IMX6_MAX_IRQ + GIC_INTERNAL, "num-irq",
- &error_abort);
-
object_property_set_bool(OBJECT(&s->a9mpcore), true, "realized", &err);
if (err) {
error_propagate(errp, err);
@@ -310,10 +313,6 @@ static void fsl_imx6_realize(DeviceState *dev, Error **errp)
},
};
- object_property_set_bool(OBJECT(&s->gpio[i]), true, "has-edge-sel",
- &error_abort);
- object_property_set_bool(OBJECT(&s->gpio[i]), true, "has-upper-pin-irq",
- &error_abort);
object_property_set_bool(OBJECT(&s->gpio[i]), true, "realized", &err);
if (err) {
error_propagate(errp, err);
--
2.21.1
^ permalink raw reply related [flat|nested] 98+ messages in thread
* [PATCH-for-5.1 v3 10/24] hw/arm/fsl-imx31: Move some code from realize() to init()
2020-04-12 22:35 ` Philippe Mathieu-Daudé
@ 2020-04-12 22:36 ` Philippe Mathieu-Daudé
-1 siblings, 0 replies; 98+ messages in thread
From: Philippe Mathieu-Daudé @ 2020-04-12 22:36 UTC (permalink / raw)
To: qemu-devel
Cc: Fam Zheng, Peter Maydell, Sagar Karandikar, Michael S. Tsirkin,
Jeff Cody, Jason Wang, Alistair Francis, Edgar E. Iglesias,
Subbaraya Sundeep, qemu-block, Markus Armbruster, Max Reitz,
Joel Stanley, Marc-André Lureau, Richard Henderson,
Philippe Mathieu-Daudé,
Eduardo Habkost, Xie Changlong, Alistair Francis,
Beniamino Galvani, qemu-arm, Peter Chubb, Cédric Le Goater,
Palmer Dabbelt, David Gibson, Kevin Wolf, qemu-riscv,
Andrew Jeffery, Wen Congyang, Philippe Mathieu-Daudé,
Jean-Christophe Dubois, qemu-ppc, Bastian Koppelmann,
Paolo Bonzini
Coccinelle reported:
$ spatch ... --timeout 60 --sp-file \
scripts/coccinelle/simplify-init-realize-error_propagate.cocci
HANDLING: hw/arm/fsl-imx31.c
>>> possible moves from fsl_imx31_init() to fsl_imx31_realize() in hw/arm/fsl-imx31.c:68
Move the calls using &error_abort which don't depend on input
updated before realize() to init().
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
v3: Typo 'depend of' -> 'depend on' (eblake)
---
hw/arm/fsl-imx31.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/hw/arm/fsl-imx31.c b/hw/arm/fsl-imx31.c
index 8472d2e911..61287e24f6 100644
--- a/hw/arm/fsl-imx31.c
+++ b/hw/arm/fsl-imx31.c
@@ -62,6 +62,8 @@ static void fsl_imx31_init(Object *obj)
for (i = 0; i < FSL_IMX31_NUM_GPIOS; i++) {
sysbus_init_child_obj(obj, "gpio[*]", &s->gpio[i], sizeof(s->gpio[i]),
TYPE_IMX_GPIO);
+ object_property_set_bool(OBJECT(&s->gpio[i]), false, "has-edge-sel",
+ &error_abort);
}
}
@@ -191,8 +193,6 @@ static void fsl_imx31_realize(DeviceState *dev, Error **errp)
{ FSL_IMX31_GPIO3_ADDR, FSL_IMX31_GPIO3_IRQ }
};
- object_property_set_bool(OBJECT(&s->gpio[i]), false, "has-edge-sel",
- &error_abort);
object_property_set_bool(OBJECT(&s->gpio[i]), true, "realized", &err);
if (err) {
error_propagate(errp, err);
--
2.21.1
^ permalink raw reply related [flat|nested] 98+ messages in thread* [PATCH-for-5.1 v3 10/24] hw/arm/fsl-imx31: Move some code from realize() to init()
@ 2020-04-12 22:36 ` Philippe Mathieu-Daudé
0 siblings, 0 replies; 98+ messages in thread
From: Philippe Mathieu-Daudé @ 2020-04-12 22:36 UTC (permalink / raw)
To: qemu-devel
Cc: Joel Stanley, Jean-Christophe Dubois, Subbaraya Sundeep,
Max Reitz, Palmer Dabbelt, qemu-ppc, Sagar Karandikar,
Markus Armbruster, Jeff Cody, Peter Maydell, Xie Changlong,
Fam Zheng, Eduardo Habkost, Alistair Francis, qemu-arm,
Wen Congyang, Philippe Mathieu-Daudé,
Bastian Koppelmann, Edgar E. Iglesias, Kevin Wolf,
Marc-André Lureau, David Gibson, Jason Wang, Peter Chubb,
Beniamino Galvani, Alistair Francis, qemu-riscv,
Cédric Le Goater, qemu-block, Paolo Bonzini, Andrew Jeffery,
Michael S. Tsirkin, Richard Henderson,
Philippe Mathieu-Daudé
Coccinelle reported:
$ spatch ... --timeout 60 --sp-file \
scripts/coccinelle/simplify-init-realize-error_propagate.cocci
HANDLING: hw/arm/fsl-imx31.c
>>> possible moves from fsl_imx31_init() to fsl_imx31_realize() in hw/arm/fsl-imx31.c:68
Move the calls using &error_abort which don't depend on input
updated before realize() to init().
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
v3: Typo 'depend of' -> 'depend on' (eblake)
---
hw/arm/fsl-imx31.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/hw/arm/fsl-imx31.c b/hw/arm/fsl-imx31.c
index 8472d2e911..61287e24f6 100644
--- a/hw/arm/fsl-imx31.c
+++ b/hw/arm/fsl-imx31.c
@@ -62,6 +62,8 @@ static void fsl_imx31_init(Object *obj)
for (i = 0; i < FSL_IMX31_NUM_GPIOS; i++) {
sysbus_init_child_obj(obj, "gpio[*]", &s->gpio[i], sizeof(s->gpio[i]),
TYPE_IMX_GPIO);
+ object_property_set_bool(OBJECT(&s->gpio[i]), false, "has-edge-sel",
+ &error_abort);
}
}
@@ -191,8 +193,6 @@ static void fsl_imx31_realize(DeviceState *dev, Error **errp)
{ FSL_IMX31_GPIO3_ADDR, FSL_IMX31_GPIO3_IRQ }
};
- object_property_set_bool(OBJECT(&s->gpio[i]), false, "has-edge-sel",
- &error_abort);
object_property_set_bool(OBJECT(&s->gpio[i]), true, "realized", &err);
if (err) {
error_propagate(errp, err);
--
2.21.1
^ permalink raw reply related [flat|nested] 98+ messages in thread
* [PATCH-for-5.1 v3 11/24] hw/arm/msf2-soc: Store MemoryRegion in MSF2State
2020-04-12 22:35 ` Philippe Mathieu-Daudé
@ 2020-04-12 22:36 ` Philippe Mathieu-Daudé
-1 siblings, 0 replies; 98+ messages in thread
From: Philippe Mathieu-Daudé @ 2020-04-12 22:36 UTC (permalink / raw)
To: qemu-devel
Cc: Fam Zheng, Peter Maydell, Sagar Karandikar, Michael S. Tsirkin,
Jeff Cody, Jason Wang, Alistair Francis, Edgar E. Iglesias,
Subbaraya Sundeep, qemu-block, Markus Armbruster, Max Reitz,
Joel Stanley, Marc-André Lureau, Richard Henderson,
Philippe Mathieu-Daudé,
Eduardo Habkost, Xie Changlong, Alistair Francis,
Beniamino Galvani, qemu-arm, Peter Chubb, Cédric Le Goater,
Palmer Dabbelt, David Gibson, Kevin Wolf, qemu-riscv,
Andrew Jeffery, Wen Congyang, Philippe Mathieu-Daudé,
Jean-Christophe Dubois, qemu-ppc, Bastian Koppelmann,
Paolo Bonzini
Coccinelle reported:
$ spatch ... --timeout 60 --sp-file \
scripts/coccinelle/simplify-init-realize-error_propagate.cocci
HANDLING: ./hw/arm/msf2-soc.c
>>> possible moves from m2sxxx_soc_initfn() to m2sxxx_soc_realize() in ./hw/arm/msf2-soc.c:86
While reviewing we notice storing the MemoryRegion in the device
state, we'll be able to later automatically simplify the error
propagation calls.
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
include/hw/arm/msf2-soc.h | 4 ++++
hw/arm/msf2-soc.c | 18 +++++++-----------
2 files changed, 11 insertions(+), 11 deletions(-)
diff --git a/include/hw/arm/msf2-soc.h b/include/hw/arm/msf2-soc.h
index 3cfe5c76ee..e4c5110036 100644
--- a/include/hw/arm/msf2-soc.h
+++ b/include/hw/arm/msf2-soc.h
@@ -50,6 +50,10 @@ typedef struct MSF2State {
ARMv7MState armv7m;
+ MemoryRegion sram;
+ MemoryRegion nvm;
+ MemoryRegion nvm_alias;
+
char *cpu_type;
char *part_name;
uint64_t envm_size;
diff --git a/hw/arm/msf2-soc.c b/hw/arm/msf2-soc.c
index 588d643b8d..e448b0ab74 100644
--- a/hw/arm/msf2-soc.c
+++ b/hw/arm/msf2-soc.c
@@ -90,13 +90,9 @@ static void m2sxxx_soc_realize(DeviceState *dev_soc, Error **errp)
SysBusDevice *busdev;
Error *err = NULL;
int i;
-
MemoryRegion *system_memory = get_system_memory();
- MemoryRegion *nvm = g_new(MemoryRegion, 1);
- MemoryRegion *nvm_alias = g_new(MemoryRegion, 1);
- MemoryRegion *sram = g_new(MemoryRegion, 1);
- memory_region_init_rom(nvm, OBJECT(dev_soc), "MSF2.eNVM", s->envm_size,
+ memory_region_init_rom(&s->nvm, OBJECT(dev_soc), "MSF2.eNVM", s->envm_size,
&error_fatal);
/*
* On power-on, the eNVM region 0x60000000 is automatically
@@ -104,15 +100,15 @@ static void m2sxxx_soc_realize(DeviceState *dev_soc, Error **errp)
* start address (0x0). We do not support remapping other eNVM,
* eSRAM and DDR regions by guest(via Sysreg) currently.
*/
- memory_region_init_alias(nvm_alias, OBJECT(dev_soc), "MSF2.eNVM", nvm, 0,
- s->envm_size);
+ memory_region_init_alias(&s->nvm_alias, OBJECT(dev_soc), "MSF2.eNVM",
+ &s->nvm, 0, s->envm_size);
- memory_region_add_subregion(system_memory, ENVM_BASE_ADDRESS, nvm);
- memory_region_add_subregion(system_memory, 0, nvm_alias);
+ memory_region_add_subregion(system_memory, ENVM_BASE_ADDRESS, &s->nvm);
+ memory_region_add_subregion(system_memory, 0, &s->nvm_alias);
- memory_region_init_ram(sram, NULL, "MSF2.eSRAM", s->esram_size,
+ memory_region_init_ram(&s->sram, NULL, "MSF2.eSRAM", s->esram_size,
&error_fatal);
- memory_region_add_subregion(system_memory, SRAM_BASE_ADDRESS, sram);
+ memory_region_add_subregion(system_memory, SRAM_BASE_ADDRESS, &s->sram);
armv7m = DEVICE(&s->armv7m);
qdev_prop_set_uint32(armv7m, "num-irq", 81);
--
2.21.1
^ permalink raw reply related [flat|nested] 98+ messages in thread* [PATCH-for-5.1 v3 11/24] hw/arm/msf2-soc: Store MemoryRegion in MSF2State
@ 2020-04-12 22:36 ` Philippe Mathieu-Daudé
0 siblings, 0 replies; 98+ messages in thread
From: Philippe Mathieu-Daudé @ 2020-04-12 22:36 UTC (permalink / raw)
To: qemu-devel
Cc: Joel Stanley, Jean-Christophe Dubois, Subbaraya Sundeep,
Max Reitz, Palmer Dabbelt, qemu-ppc, Sagar Karandikar,
Markus Armbruster, Jeff Cody, Peter Maydell, Xie Changlong,
Fam Zheng, Eduardo Habkost, Alistair Francis, qemu-arm,
Wen Congyang, Philippe Mathieu-Daudé,
Bastian Koppelmann, Edgar E. Iglesias, Kevin Wolf,
Marc-André Lureau, David Gibson, Jason Wang, Peter Chubb,
Beniamino Galvani, Alistair Francis, qemu-riscv,
Cédric Le Goater, qemu-block, Paolo Bonzini, Andrew Jeffery,
Michael S. Tsirkin, Richard Henderson,
Philippe Mathieu-Daudé
Coccinelle reported:
$ spatch ... --timeout 60 --sp-file \
scripts/coccinelle/simplify-init-realize-error_propagate.cocci
HANDLING: ./hw/arm/msf2-soc.c
>>> possible moves from m2sxxx_soc_initfn() to m2sxxx_soc_realize() in ./hw/arm/msf2-soc.c:86
While reviewing we notice storing the MemoryRegion in the device
state, we'll be able to later automatically simplify the error
propagation calls.
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
include/hw/arm/msf2-soc.h | 4 ++++
hw/arm/msf2-soc.c | 18 +++++++-----------
2 files changed, 11 insertions(+), 11 deletions(-)
diff --git a/include/hw/arm/msf2-soc.h b/include/hw/arm/msf2-soc.h
index 3cfe5c76ee..e4c5110036 100644
--- a/include/hw/arm/msf2-soc.h
+++ b/include/hw/arm/msf2-soc.h
@@ -50,6 +50,10 @@ typedef struct MSF2State {
ARMv7MState armv7m;
+ MemoryRegion sram;
+ MemoryRegion nvm;
+ MemoryRegion nvm_alias;
+
char *cpu_type;
char *part_name;
uint64_t envm_size;
diff --git a/hw/arm/msf2-soc.c b/hw/arm/msf2-soc.c
index 588d643b8d..e448b0ab74 100644
--- a/hw/arm/msf2-soc.c
+++ b/hw/arm/msf2-soc.c
@@ -90,13 +90,9 @@ static void m2sxxx_soc_realize(DeviceState *dev_soc, Error **errp)
SysBusDevice *busdev;
Error *err = NULL;
int i;
-
MemoryRegion *system_memory = get_system_memory();
- MemoryRegion *nvm = g_new(MemoryRegion, 1);
- MemoryRegion *nvm_alias = g_new(MemoryRegion, 1);
- MemoryRegion *sram = g_new(MemoryRegion, 1);
- memory_region_init_rom(nvm, OBJECT(dev_soc), "MSF2.eNVM", s->envm_size,
+ memory_region_init_rom(&s->nvm, OBJECT(dev_soc), "MSF2.eNVM", s->envm_size,
&error_fatal);
/*
* On power-on, the eNVM region 0x60000000 is automatically
@@ -104,15 +100,15 @@ static void m2sxxx_soc_realize(DeviceState *dev_soc, Error **errp)
* start address (0x0). We do not support remapping other eNVM,
* eSRAM and DDR regions by guest(via Sysreg) currently.
*/
- memory_region_init_alias(nvm_alias, OBJECT(dev_soc), "MSF2.eNVM", nvm, 0,
- s->envm_size);
+ memory_region_init_alias(&s->nvm_alias, OBJECT(dev_soc), "MSF2.eNVM",
+ &s->nvm, 0, s->envm_size);
- memory_region_add_subregion(system_memory, ENVM_BASE_ADDRESS, nvm);
- memory_region_add_subregion(system_memory, 0, nvm_alias);
+ memory_region_add_subregion(system_memory, ENVM_BASE_ADDRESS, &s->nvm);
+ memory_region_add_subregion(system_memory, 0, &s->nvm_alias);
- memory_region_init_ram(sram, NULL, "MSF2.eSRAM", s->esram_size,
+ memory_region_init_ram(&s->sram, NULL, "MSF2.eSRAM", s->esram_size,
&error_fatal);
- memory_region_add_subregion(system_memory, SRAM_BASE_ADDRESS, sram);
+ memory_region_add_subregion(system_memory, SRAM_BASE_ADDRESS, &s->sram);
armv7m = DEVICE(&s->armv7m);
qdev_prop_set_uint32(armv7m, "num-irq", 81);
--
2.21.1
^ permalink raw reply related [flat|nested] 98+ messages in thread* Re: [PATCH-for-5.1 v3 11/24] hw/arm/msf2-soc: Store MemoryRegion in MSF2State
2020-04-12 22:36 ` Philippe Mathieu-Daudé
@ 2020-04-13 21:59 ` Alistair Francis
-1 siblings, 0 replies; 98+ messages in thread
From: Alistair Francis @ 2020-04-13 21:59 UTC (permalink / raw)
To: Philippe Mathieu-Daudé
Cc: Fam Zheng, Peter Maydell, Sagar Karandikar, Michael S. Tsirkin,
Jeff Cody, Jason Wang, qemu-devel@nongnu.org Developers,
Alistair Francis, Edgar E. Iglesias, Max Reitz, Qemu-block,
Markus Armbruster, Joel Stanley, Marc-André Lureau,
David Gibson, Philippe Mathieu-Daudé,
Eduardo Habkost, Jean-Christophe Dubois, Xie Changlong,
Alistair Francis, Beniamino Galvani, qemu-arm, Peter Chubb,
Cédric Le Goater, open list:New World, Richard Henderson,
Kevin Wolf, open list:RISC-V, Andrew Jeffery, Wen Congyang,
Subbaraya Sundeep, Palmer Dabbelt, Bastian Koppelmann,
Paolo Bonzini
On Sun, Apr 12, 2020 at 3:40 PM Philippe Mathieu-Daudé <f4bug@amsat.org> wrote:
>
> Coccinelle reported:
>
> $ spatch ... --timeout 60 --sp-file \
> scripts/coccinelle/simplify-init-realize-error_propagate.cocci
> HANDLING: ./hw/arm/msf2-soc.c
> >>> possible moves from m2sxxx_soc_initfn() to m2sxxx_soc_realize() in ./hw/arm/msf2-soc.c:86
>
> While reviewing we notice storing the MemoryRegion in the device
> state, we'll be able to later automatically simplify the error
> propagation calls.
>
> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Alistair
> ---
> include/hw/arm/msf2-soc.h | 4 ++++
> hw/arm/msf2-soc.c | 18 +++++++-----------
> 2 files changed, 11 insertions(+), 11 deletions(-)
>
> diff --git a/include/hw/arm/msf2-soc.h b/include/hw/arm/msf2-soc.h
> index 3cfe5c76ee..e4c5110036 100644
> --- a/include/hw/arm/msf2-soc.h
> +++ b/include/hw/arm/msf2-soc.h
> @@ -50,6 +50,10 @@ typedef struct MSF2State {
>
> ARMv7MState armv7m;
>
> + MemoryRegion sram;
> + MemoryRegion nvm;
> + MemoryRegion nvm_alias;
> +
> char *cpu_type;
> char *part_name;
> uint64_t envm_size;
> diff --git a/hw/arm/msf2-soc.c b/hw/arm/msf2-soc.c
> index 588d643b8d..e448b0ab74 100644
> --- a/hw/arm/msf2-soc.c
> +++ b/hw/arm/msf2-soc.c
> @@ -90,13 +90,9 @@ static void m2sxxx_soc_realize(DeviceState *dev_soc, Error **errp)
> SysBusDevice *busdev;
> Error *err = NULL;
> int i;
> -
> MemoryRegion *system_memory = get_system_memory();
> - MemoryRegion *nvm = g_new(MemoryRegion, 1);
> - MemoryRegion *nvm_alias = g_new(MemoryRegion, 1);
> - MemoryRegion *sram = g_new(MemoryRegion, 1);
>
> - memory_region_init_rom(nvm, OBJECT(dev_soc), "MSF2.eNVM", s->envm_size,
> + memory_region_init_rom(&s->nvm, OBJECT(dev_soc), "MSF2.eNVM", s->envm_size,
> &error_fatal);
> /*
> * On power-on, the eNVM region 0x60000000 is automatically
> @@ -104,15 +100,15 @@ static void m2sxxx_soc_realize(DeviceState *dev_soc, Error **errp)
> * start address (0x0). We do not support remapping other eNVM,
> * eSRAM and DDR regions by guest(via Sysreg) currently.
> */
> - memory_region_init_alias(nvm_alias, OBJECT(dev_soc), "MSF2.eNVM", nvm, 0,
> - s->envm_size);
> + memory_region_init_alias(&s->nvm_alias, OBJECT(dev_soc), "MSF2.eNVM",
> + &s->nvm, 0, s->envm_size);
>
> - memory_region_add_subregion(system_memory, ENVM_BASE_ADDRESS, nvm);
> - memory_region_add_subregion(system_memory, 0, nvm_alias);
> + memory_region_add_subregion(system_memory, ENVM_BASE_ADDRESS, &s->nvm);
> + memory_region_add_subregion(system_memory, 0, &s->nvm_alias);
>
> - memory_region_init_ram(sram, NULL, "MSF2.eSRAM", s->esram_size,
> + memory_region_init_ram(&s->sram, NULL, "MSF2.eSRAM", s->esram_size,
> &error_fatal);
> - memory_region_add_subregion(system_memory, SRAM_BASE_ADDRESS, sram);
> + memory_region_add_subregion(system_memory, SRAM_BASE_ADDRESS, &s->sram);
>
> armv7m = DEVICE(&s->armv7m);
> qdev_prop_set_uint32(armv7m, "num-irq", 81);
> --
> 2.21.1
>
>
^ permalink raw reply [flat|nested] 98+ messages in thread* Re: [PATCH-for-5.1 v3 11/24] hw/arm/msf2-soc: Store MemoryRegion in MSF2State
@ 2020-04-13 21:59 ` Alistair Francis
0 siblings, 0 replies; 98+ messages in thread
From: Alistair Francis @ 2020-04-13 21:59 UTC (permalink / raw)
To: Philippe Mathieu-Daudé
Cc: qemu-devel@nongnu.org Developers, Fam Zheng, Peter Maydell,
Sagar Karandikar, Michael S. Tsirkin, Jeff Cody, Jason Wang,
Alistair Francis, Edgar E. Iglesias, Subbaraya Sundeep,
Qemu-block, Markus Armbruster, Max Reitz, Joel Stanley,
Marc-André Lureau, Richard Henderson,
Philippe Mathieu-Daudé,
Eduardo Habkost, Xie Changlong, Alistair Francis,
Beniamino Galvani, qemu-arm, Peter Chubb, Cédric Le Goater,
Palmer Dabbelt, David Gibson, Kevin Wolf, open list:RISC-V,
Andrew Jeffery, Wen Congyang, Jean-Christophe Dubois,
open list:New World, Bastian Koppelmann, Paolo Bonzini
On Sun, Apr 12, 2020 at 3:40 PM Philippe Mathieu-Daudé <f4bug@amsat.org> wrote:
>
> Coccinelle reported:
>
> $ spatch ... --timeout 60 --sp-file \
> scripts/coccinelle/simplify-init-realize-error_propagate.cocci
> HANDLING: ./hw/arm/msf2-soc.c
> >>> possible moves from m2sxxx_soc_initfn() to m2sxxx_soc_realize() in ./hw/arm/msf2-soc.c:86
>
> While reviewing we notice storing the MemoryRegion in the device
> state, we'll be able to later automatically simplify the error
> propagation calls.
>
> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Alistair
> ---
> include/hw/arm/msf2-soc.h | 4 ++++
> hw/arm/msf2-soc.c | 18 +++++++-----------
> 2 files changed, 11 insertions(+), 11 deletions(-)
>
> diff --git a/include/hw/arm/msf2-soc.h b/include/hw/arm/msf2-soc.h
> index 3cfe5c76ee..e4c5110036 100644
> --- a/include/hw/arm/msf2-soc.h
> +++ b/include/hw/arm/msf2-soc.h
> @@ -50,6 +50,10 @@ typedef struct MSF2State {
>
> ARMv7MState armv7m;
>
> + MemoryRegion sram;
> + MemoryRegion nvm;
> + MemoryRegion nvm_alias;
> +
> char *cpu_type;
> char *part_name;
> uint64_t envm_size;
> diff --git a/hw/arm/msf2-soc.c b/hw/arm/msf2-soc.c
> index 588d643b8d..e448b0ab74 100644
> --- a/hw/arm/msf2-soc.c
> +++ b/hw/arm/msf2-soc.c
> @@ -90,13 +90,9 @@ static void m2sxxx_soc_realize(DeviceState *dev_soc, Error **errp)
> SysBusDevice *busdev;
> Error *err = NULL;
> int i;
> -
> MemoryRegion *system_memory = get_system_memory();
> - MemoryRegion *nvm = g_new(MemoryRegion, 1);
> - MemoryRegion *nvm_alias = g_new(MemoryRegion, 1);
> - MemoryRegion *sram = g_new(MemoryRegion, 1);
>
> - memory_region_init_rom(nvm, OBJECT(dev_soc), "MSF2.eNVM", s->envm_size,
> + memory_region_init_rom(&s->nvm, OBJECT(dev_soc), "MSF2.eNVM", s->envm_size,
> &error_fatal);
> /*
> * On power-on, the eNVM region 0x60000000 is automatically
> @@ -104,15 +100,15 @@ static void m2sxxx_soc_realize(DeviceState *dev_soc, Error **errp)
> * start address (0x0). We do not support remapping other eNVM,
> * eSRAM and DDR regions by guest(via Sysreg) currently.
> */
> - memory_region_init_alias(nvm_alias, OBJECT(dev_soc), "MSF2.eNVM", nvm, 0,
> - s->envm_size);
> + memory_region_init_alias(&s->nvm_alias, OBJECT(dev_soc), "MSF2.eNVM",
> + &s->nvm, 0, s->envm_size);
>
> - memory_region_add_subregion(system_memory, ENVM_BASE_ADDRESS, nvm);
> - memory_region_add_subregion(system_memory, 0, nvm_alias);
> + memory_region_add_subregion(system_memory, ENVM_BASE_ADDRESS, &s->nvm);
> + memory_region_add_subregion(system_memory, 0, &s->nvm_alias);
>
> - memory_region_init_ram(sram, NULL, "MSF2.eSRAM", s->esram_size,
> + memory_region_init_ram(&s->sram, NULL, "MSF2.eSRAM", s->esram_size,
> &error_fatal);
> - memory_region_add_subregion(system_memory, SRAM_BASE_ADDRESS, sram);
> + memory_region_add_subregion(system_memory, SRAM_BASE_ADDRESS, &s->sram);
>
> armv7m = DEVICE(&s->armv7m);
> qdev_prop_set_uint32(armv7m, "num-irq", 81);
> --
> 2.21.1
>
>
^ permalink raw reply [flat|nested] 98+ messages in thread
* [PATCH-for-5.1 v3 12/24] hw/arm/stm32f205_soc: Store MemoryRegion in STM32F205State
2020-04-12 22:35 ` Philippe Mathieu-Daudé
@ 2020-04-12 22:36 ` Philippe Mathieu-Daudé
-1 siblings, 0 replies; 98+ messages in thread
From: Philippe Mathieu-Daudé @ 2020-04-12 22:36 UTC (permalink / raw)
To: qemu-devel
Cc: Fam Zheng, Peter Maydell, Sagar Karandikar, Michael S. Tsirkin,
Jeff Cody, Jason Wang, Alistair Francis, Edgar E. Iglesias,
Subbaraya Sundeep, qemu-block, Markus Armbruster, Max Reitz,
Joel Stanley, Marc-André Lureau, Richard Henderson,
Philippe Mathieu-Daudé,
Eduardo Habkost, Xie Changlong, Alistair Francis,
Beniamino Galvani, qemu-arm, Peter Chubb, Cédric Le Goater,
Palmer Dabbelt, David Gibson, Kevin Wolf, qemu-riscv,
Andrew Jeffery, Wen Congyang, Philippe Mathieu-Daudé,
Jean-Christophe Dubois, qemu-ppc, Bastian Koppelmann,
Paolo Bonzini
Coccinelle reported:
$ spatch ... --timeout 60 --sp-file \
scripts/coccinelle/simplify-init-realize-error_propagate.cocci
HANDLING: ./hw/arm/stm32f205_soc.c
>>> possible moves from stm32f205_soc_initfn() to stm32f205_soc_realize() in ./hw/arm/stm32f205_soc.c:83
While reviewing we notice storing the MemoryRegion in the device
state, we'll be able to later automatically simplify the error
propagation calls.
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
include/hw/arm/stm32f205_soc.h | 4 ++++
hw/arm/stm32f205_soc.c | 18 +++++++-----------
2 files changed, 11 insertions(+), 11 deletions(-)
diff --git a/include/hw/arm/stm32f205_soc.h b/include/hw/arm/stm32f205_soc.h
index 922a733f88..63e7e7c825 100644
--- a/include/hw/arm/stm32f205_soc.h
+++ b/include/hw/arm/stm32f205_soc.h
@@ -56,6 +56,10 @@ typedef struct STM32F205State {
ARMv7MState armv7m;
+ MemoryRegion sram;
+ MemoryRegion flash;
+ MemoryRegion flash_alias;
+
STM32F2XXSyscfgState syscfg;
STM32F2XXUsartState usart[STM_NUM_USARTS];
STM32F2XXTimerState timer[STM_NUM_TIMERS];
diff --git a/hw/arm/stm32f205_soc.c b/hw/arm/stm32f205_soc.c
index 118c342559..42f4e44134 100644
--- a/hw/arm/stm32f205_soc.c
+++ b/hw/arm/stm32f205_soc.c
@@ -87,23 +87,19 @@ static void stm32f205_soc_realize(DeviceState *dev_soc, Error **errp)
SysBusDevice *busdev;
Error *err = NULL;
int i;
-
MemoryRegion *system_memory = get_system_memory();
- MemoryRegion *sram = g_new(MemoryRegion, 1);
- MemoryRegion *flash = g_new(MemoryRegion, 1);
- MemoryRegion *flash_alias = g_new(MemoryRegion, 1);
- memory_region_init_rom(flash, OBJECT(dev_soc), "STM32F205.flash",
+ memory_region_init_rom(&s->flash, OBJECT(dev_soc), "STM32F205.flash",
FLASH_SIZE, &error_fatal);
- memory_region_init_alias(flash_alias, OBJECT(dev_soc),
- "STM32F205.flash.alias", flash, 0, FLASH_SIZE);
+ memory_region_init_alias(&s->flash_alias, OBJECT(dev_soc),
+ "STM32F205.flash.alias", &s->flash, 0, FLASH_SIZE);
- memory_region_add_subregion(system_memory, FLASH_BASE_ADDRESS, flash);
- memory_region_add_subregion(system_memory, 0, flash_alias);
+ memory_region_add_subregion(system_memory, FLASH_BASE_ADDRESS, &s->flash);
+ memory_region_add_subregion(system_memory, 0, &s->flash_alias);
- memory_region_init_ram(sram, NULL, "STM32F205.sram", SRAM_SIZE,
+ memory_region_init_ram(&s->sram, NULL, "STM32F205.sram", SRAM_SIZE,
&error_fatal);
- memory_region_add_subregion(system_memory, SRAM_BASE_ADDRESS, sram);
+ memory_region_add_subregion(system_memory, SRAM_BASE_ADDRESS, &s->sram);
armv7m = DEVICE(&s->armv7m);
qdev_prop_set_uint32(armv7m, "num-irq", 96);
--
2.21.1
^ permalink raw reply related [flat|nested] 98+ messages in thread* [PATCH-for-5.1 v3 12/24] hw/arm/stm32f205_soc: Store MemoryRegion in STM32F205State
@ 2020-04-12 22:36 ` Philippe Mathieu-Daudé
0 siblings, 0 replies; 98+ messages in thread
From: Philippe Mathieu-Daudé @ 2020-04-12 22:36 UTC (permalink / raw)
To: qemu-devel
Cc: Joel Stanley, Jean-Christophe Dubois, Subbaraya Sundeep,
Max Reitz, Palmer Dabbelt, qemu-ppc, Sagar Karandikar,
Markus Armbruster, Jeff Cody, Peter Maydell, Xie Changlong,
Fam Zheng, Eduardo Habkost, Alistair Francis, qemu-arm,
Wen Congyang, Philippe Mathieu-Daudé,
Bastian Koppelmann, Edgar E. Iglesias, Kevin Wolf,
Marc-André Lureau, David Gibson, Jason Wang, Peter Chubb,
Beniamino Galvani, Alistair Francis, qemu-riscv,
Cédric Le Goater, qemu-block, Paolo Bonzini, Andrew Jeffery,
Michael S. Tsirkin, Richard Henderson,
Philippe Mathieu-Daudé
Coccinelle reported:
$ spatch ... --timeout 60 --sp-file \
scripts/coccinelle/simplify-init-realize-error_propagate.cocci
HANDLING: ./hw/arm/stm32f205_soc.c
>>> possible moves from stm32f205_soc_initfn() to stm32f205_soc_realize() in ./hw/arm/stm32f205_soc.c:83
While reviewing we notice storing the MemoryRegion in the device
state, we'll be able to later automatically simplify the error
propagation calls.
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
include/hw/arm/stm32f205_soc.h | 4 ++++
hw/arm/stm32f205_soc.c | 18 +++++++-----------
2 files changed, 11 insertions(+), 11 deletions(-)
diff --git a/include/hw/arm/stm32f205_soc.h b/include/hw/arm/stm32f205_soc.h
index 922a733f88..63e7e7c825 100644
--- a/include/hw/arm/stm32f205_soc.h
+++ b/include/hw/arm/stm32f205_soc.h
@@ -56,6 +56,10 @@ typedef struct STM32F205State {
ARMv7MState armv7m;
+ MemoryRegion sram;
+ MemoryRegion flash;
+ MemoryRegion flash_alias;
+
STM32F2XXSyscfgState syscfg;
STM32F2XXUsartState usart[STM_NUM_USARTS];
STM32F2XXTimerState timer[STM_NUM_TIMERS];
diff --git a/hw/arm/stm32f205_soc.c b/hw/arm/stm32f205_soc.c
index 118c342559..42f4e44134 100644
--- a/hw/arm/stm32f205_soc.c
+++ b/hw/arm/stm32f205_soc.c
@@ -87,23 +87,19 @@ static void stm32f205_soc_realize(DeviceState *dev_soc, Error **errp)
SysBusDevice *busdev;
Error *err = NULL;
int i;
-
MemoryRegion *system_memory = get_system_memory();
- MemoryRegion *sram = g_new(MemoryRegion, 1);
- MemoryRegion *flash = g_new(MemoryRegion, 1);
- MemoryRegion *flash_alias = g_new(MemoryRegion, 1);
- memory_region_init_rom(flash, OBJECT(dev_soc), "STM32F205.flash",
+ memory_region_init_rom(&s->flash, OBJECT(dev_soc), "STM32F205.flash",
FLASH_SIZE, &error_fatal);
- memory_region_init_alias(flash_alias, OBJECT(dev_soc),
- "STM32F205.flash.alias", flash, 0, FLASH_SIZE);
+ memory_region_init_alias(&s->flash_alias, OBJECT(dev_soc),
+ "STM32F205.flash.alias", &s->flash, 0, FLASH_SIZE);
- memory_region_add_subregion(system_memory, FLASH_BASE_ADDRESS, flash);
- memory_region_add_subregion(system_memory, 0, flash_alias);
+ memory_region_add_subregion(system_memory, FLASH_BASE_ADDRESS, &s->flash);
+ memory_region_add_subregion(system_memory, 0, &s->flash_alias);
- memory_region_init_ram(sram, NULL, "STM32F205.sram", SRAM_SIZE,
+ memory_region_init_ram(&s->sram, NULL, "STM32F205.sram", SRAM_SIZE,
&error_fatal);
- memory_region_add_subregion(system_memory, SRAM_BASE_ADDRESS, sram);
+ memory_region_add_subregion(system_memory, SRAM_BASE_ADDRESS, &s->sram);
armv7m = DEVICE(&s->armv7m);
qdev_prop_set_uint32(armv7m, "num-irq", 96);
--
2.21.1
^ permalink raw reply related [flat|nested] 98+ messages in thread* Re: [PATCH-for-5.1 v3 12/24] hw/arm/stm32f205_soc: Store MemoryRegion in STM32F205State
2020-04-12 22:36 ` Philippe Mathieu-Daudé
@ 2020-04-13 22:00 ` Alistair Francis
-1 siblings, 0 replies; 98+ messages in thread
From: Alistair Francis @ 2020-04-13 22:00 UTC (permalink / raw)
To: Philippe Mathieu-Daudé
Cc: Fam Zheng, Peter Maydell, Sagar Karandikar, Michael S. Tsirkin,
Jeff Cody, Jason Wang, qemu-devel@nongnu.org Developers,
Alistair Francis, Edgar E. Iglesias, Max Reitz, Qemu-block,
Markus Armbruster, Joel Stanley, Marc-André Lureau,
David Gibson, Philippe Mathieu-Daudé,
Eduardo Habkost, Jean-Christophe Dubois, Xie Changlong,
Alistair Francis, Beniamino Galvani, qemu-arm, Peter Chubb,
Cédric Le Goater, open list:New World, Richard Henderson,
Kevin Wolf, open list:RISC-V, Andrew Jeffery, Wen Congyang,
Subbaraya Sundeep, Palmer Dabbelt, Bastian Koppelmann,
Paolo Bonzini
On Sun, Apr 12, 2020 at 3:41 PM Philippe Mathieu-Daudé <f4bug@amsat.org> wrote:
>
> Coccinelle reported:
>
> $ spatch ... --timeout 60 --sp-file \
> scripts/coccinelle/simplify-init-realize-error_propagate.cocci
> HANDLING: ./hw/arm/stm32f205_soc.c
> >>> possible moves from stm32f205_soc_initfn() to stm32f205_soc_realize() in ./hw/arm/stm32f205_soc.c:83
>
> While reviewing we notice storing the MemoryRegion in the device
> state, we'll be able to later automatically simplify the error
> propagation calls.
>
> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Alistair
> ---
> include/hw/arm/stm32f205_soc.h | 4 ++++
> hw/arm/stm32f205_soc.c | 18 +++++++-----------
> 2 files changed, 11 insertions(+), 11 deletions(-)
>
> diff --git a/include/hw/arm/stm32f205_soc.h b/include/hw/arm/stm32f205_soc.h
> index 922a733f88..63e7e7c825 100644
> --- a/include/hw/arm/stm32f205_soc.h
> +++ b/include/hw/arm/stm32f205_soc.h
> @@ -56,6 +56,10 @@ typedef struct STM32F205State {
>
> ARMv7MState armv7m;
>
> + MemoryRegion sram;
> + MemoryRegion flash;
> + MemoryRegion flash_alias;
> +
> STM32F2XXSyscfgState syscfg;
> STM32F2XXUsartState usart[STM_NUM_USARTS];
> STM32F2XXTimerState timer[STM_NUM_TIMERS];
> diff --git a/hw/arm/stm32f205_soc.c b/hw/arm/stm32f205_soc.c
> index 118c342559..42f4e44134 100644
> --- a/hw/arm/stm32f205_soc.c
> +++ b/hw/arm/stm32f205_soc.c
> @@ -87,23 +87,19 @@ static void stm32f205_soc_realize(DeviceState *dev_soc, Error **errp)
> SysBusDevice *busdev;
> Error *err = NULL;
> int i;
> -
> MemoryRegion *system_memory = get_system_memory();
> - MemoryRegion *sram = g_new(MemoryRegion, 1);
> - MemoryRegion *flash = g_new(MemoryRegion, 1);
> - MemoryRegion *flash_alias = g_new(MemoryRegion, 1);
>
> - memory_region_init_rom(flash, OBJECT(dev_soc), "STM32F205.flash",
> + memory_region_init_rom(&s->flash, OBJECT(dev_soc), "STM32F205.flash",
> FLASH_SIZE, &error_fatal);
> - memory_region_init_alias(flash_alias, OBJECT(dev_soc),
> - "STM32F205.flash.alias", flash, 0, FLASH_SIZE);
> + memory_region_init_alias(&s->flash_alias, OBJECT(dev_soc),
> + "STM32F205.flash.alias", &s->flash, 0, FLASH_SIZE);
>
> - memory_region_add_subregion(system_memory, FLASH_BASE_ADDRESS, flash);
> - memory_region_add_subregion(system_memory, 0, flash_alias);
> + memory_region_add_subregion(system_memory, FLASH_BASE_ADDRESS, &s->flash);
> + memory_region_add_subregion(system_memory, 0, &s->flash_alias);
>
> - memory_region_init_ram(sram, NULL, "STM32F205.sram", SRAM_SIZE,
> + memory_region_init_ram(&s->sram, NULL, "STM32F205.sram", SRAM_SIZE,
> &error_fatal);
> - memory_region_add_subregion(system_memory, SRAM_BASE_ADDRESS, sram);
> + memory_region_add_subregion(system_memory, SRAM_BASE_ADDRESS, &s->sram);
>
> armv7m = DEVICE(&s->armv7m);
> qdev_prop_set_uint32(armv7m, "num-irq", 96);
> --
> 2.21.1
>
>
^ permalink raw reply [flat|nested] 98+ messages in thread* Re: [PATCH-for-5.1 v3 12/24] hw/arm/stm32f205_soc: Store MemoryRegion in STM32F205State
@ 2020-04-13 22:00 ` Alistair Francis
0 siblings, 0 replies; 98+ messages in thread
From: Alistair Francis @ 2020-04-13 22:00 UTC (permalink / raw)
To: Philippe Mathieu-Daudé
Cc: qemu-devel@nongnu.org Developers, Fam Zheng, Peter Maydell,
Sagar Karandikar, Michael S. Tsirkin, Jeff Cody, Jason Wang,
Alistair Francis, Edgar E. Iglesias, Subbaraya Sundeep,
Qemu-block, Markus Armbruster, Max Reitz, Joel Stanley,
Marc-André Lureau, Richard Henderson,
Philippe Mathieu-Daudé,
Eduardo Habkost, Xie Changlong, Alistair Francis,
Beniamino Galvani, qemu-arm, Peter Chubb, Cédric Le Goater,
Palmer Dabbelt, David Gibson, Kevin Wolf, open list:RISC-V,
Andrew Jeffery, Wen Congyang, Jean-Christophe Dubois,
open list:New World, Bastian Koppelmann, Paolo Bonzini
On Sun, Apr 12, 2020 at 3:41 PM Philippe Mathieu-Daudé <f4bug@amsat.org> wrote:
>
> Coccinelle reported:
>
> $ spatch ... --timeout 60 --sp-file \
> scripts/coccinelle/simplify-init-realize-error_propagate.cocci
> HANDLING: ./hw/arm/stm32f205_soc.c
> >>> possible moves from stm32f205_soc_initfn() to stm32f205_soc_realize() in ./hw/arm/stm32f205_soc.c:83
>
> While reviewing we notice storing the MemoryRegion in the device
> state, we'll be able to later automatically simplify the error
> propagation calls.
>
> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Alistair
> ---
> include/hw/arm/stm32f205_soc.h | 4 ++++
> hw/arm/stm32f205_soc.c | 18 +++++++-----------
> 2 files changed, 11 insertions(+), 11 deletions(-)
>
> diff --git a/include/hw/arm/stm32f205_soc.h b/include/hw/arm/stm32f205_soc.h
> index 922a733f88..63e7e7c825 100644
> --- a/include/hw/arm/stm32f205_soc.h
> +++ b/include/hw/arm/stm32f205_soc.h
> @@ -56,6 +56,10 @@ typedef struct STM32F205State {
>
> ARMv7MState armv7m;
>
> + MemoryRegion sram;
> + MemoryRegion flash;
> + MemoryRegion flash_alias;
> +
> STM32F2XXSyscfgState syscfg;
> STM32F2XXUsartState usart[STM_NUM_USARTS];
> STM32F2XXTimerState timer[STM_NUM_TIMERS];
> diff --git a/hw/arm/stm32f205_soc.c b/hw/arm/stm32f205_soc.c
> index 118c342559..42f4e44134 100644
> --- a/hw/arm/stm32f205_soc.c
> +++ b/hw/arm/stm32f205_soc.c
> @@ -87,23 +87,19 @@ static void stm32f205_soc_realize(DeviceState *dev_soc, Error **errp)
> SysBusDevice *busdev;
> Error *err = NULL;
> int i;
> -
> MemoryRegion *system_memory = get_system_memory();
> - MemoryRegion *sram = g_new(MemoryRegion, 1);
> - MemoryRegion *flash = g_new(MemoryRegion, 1);
> - MemoryRegion *flash_alias = g_new(MemoryRegion, 1);
>
> - memory_region_init_rom(flash, OBJECT(dev_soc), "STM32F205.flash",
> + memory_region_init_rom(&s->flash, OBJECT(dev_soc), "STM32F205.flash",
> FLASH_SIZE, &error_fatal);
> - memory_region_init_alias(flash_alias, OBJECT(dev_soc),
> - "STM32F205.flash.alias", flash, 0, FLASH_SIZE);
> + memory_region_init_alias(&s->flash_alias, OBJECT(dev_soc),
> + "STM32F205.flash.alias", &s->flash, 0, FLASH_SIZE);
>
> - memory_region_add_subregion(system_memory, FLASH_BASE_ADDRESS, flash);
> - memory_region_add_subregion(system_memory, 0, flash_alias);
> + memory_region_add_subregion(system_memory, FLASH_BASE_ADDRESS, &s->flash);
> + memory_region_add_subregion(system_memory, 0, &s->flash_alias);
>
> - memory_region_init_ram(sram, NULL, "STM32F205.sram", SRAM_SIZE,
> + memory_region_init_ram(&s->sram, NULL, "STM32F205.sram", SRAM_SIZE,
> &error_fatal);
> - memory_region_add_subregion(system_memory, SRAM_BASE_ADDRESS, sram);
> + memory_region_add_subregion(system_memory, SRAM_BASE_ADDRESS, &s->sram);
>
> armv7m = DEVICE(&s->armv7m);
> qdev_prop_set_uint32(armv7m, "num-irq", 96);
> --
> 2.21.1
>
>
^ permalink raw reply [flat|nested] 98+ messages in thread
* [PATCH-for-5.1 v3 13/24] hw/arm/stm32f205_soc: Move some code from realize() to init()
2020-04-12 22:35 ` Philippe Mathieu-Daudé
@ 2020-04-12 22:36 ` Philippe Mathieu-Daudé
-1 siblings, 0 replies; 98+ messages in thread
From: Philippe Mathieu-Daudé @ 2020-04-12 22:36 UTC (permalink / raw)
To: qemu-devel
Cc: Fam Zheng, Peter Maydell, Sagar Karandikar, Michael S. Tsirkin,
Jeff Cody, Jason Wang, Alistair Francis, Edgar E. Iglesias,
Subbaraya Sundeep, qemu-block, Markus Armbruster, Max Reitz,
Joel Stanley, Marc-André Lureau, Richard Henderson,
Philippe Mathieu-Daudé,
Eduardo Habkost, Xie Changlong, Alistair Francis,
Beniamino Galvani, qemu-arm, Peter Chubb, Cédric Le Goater,
Palmer Dabbelt, David Gibson, Kevin Wolf, qemu-riscv,
Andrew Jeffery, Wen Congyang, Philippe Mathieu-Daudé,
Jean-Christophe Dubois, qemu-ppc, Bastian Koppelmann,
Paolo Bonzini
Coccinelle reported:
$ spatch ... --timeout 60 --sp-file \
scripts/coccinelle/simplify-init-realize-error_propagate.cocci
HANDLING: ./hw/arm/stm32f205_soc.c
>>> possible moves from stm32f205_soc_initfn() to stm32f205_soc_realize() in ./hw/arm/stm32f205_soc.c:83
Move the calls using &error_fatal which don't depend on input
updated before realize() to init().
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
v3: Typo 'depend of' -> 'depend on' (eblake)
---
hw/arm/stm32f205_soc.c | 20 ++++++++++----------
1 file changed, 10 insertions(+), 10 deletions(-)
diff --git a/hw/arm/stm32f205_soc.c b/hw/arm/stm32f205_soc.c
index 42f4e44134..76b0b0e9be 100644
--- a/hw/arm/stm32f205_soc.c
+++ b/hw/arm/stm32f205_soc.c
@@ -49,6 +49,7 @@ static const int spi_irq[STM_NUM_SPIS] = {35, 36, 51};
static void stm32f205_soc_initfn(Object *obj)
{
STM32F205State *s = STM32F205_SOC(obj);
+ MemoryRegion *system_memory = get_system_memory();
int i;
sysbus_init_child_obj(obj, "armv7m", &s->armv7m, sizeof(s->armv7m),
@@ -78,6 +79,14 @@ static void stm32f205_soc_initfn(Object *obj)
sysbus_init_child_obj(obj, "spi[*]", &s->spi[i], sizeof(s->spi[i]),
TYPE_STM32F2XX_SPI);
}
+
+ memory_region_init_ram(&s->sram, NULL, "STM32F205.sram", SRAM_SIZE,
+ &error_fatal);
+ memory_region_add_subregion(system_memory, SRAM_BASE_ADDRESS, &s->sram);
+
+ memory_region_init_rom(&s->flash, obj, "STM32F205.flash",
+ FLASH_SIZE, &error_fatal);
+ memory_region_add_subregion(system_memory, FLASH_BASE_ADDRESS, &s->flash);
}
static void stm32f205_soc_realize(DeviceState *dev_soc, Error **errp)
@@ -87,19 +96,10 @@ static void stm32f205_soc_realize(DeviceState *dev_soc, Error **errp)
SysBusDevice *busdev;
Error *err = NULL;
int i;
- MemoryRegion *system_memory = get_system_memory();
- memory_region_init_rom(&s->flash, OBJECT(dev_soc), "STM32F205.flash",
- FLASH_SIZE, &error_fatal);
memory_region_init_alias(&s->flash_alias, OBJECT(dev_soc),
"STM32F205.flash.alias", &s->flash, 0, FLASH_SIZE);
-
- memory_region_add_subregion(system_memory, FLASH_BASE_ADDRESS, &s->flash);
- memory_region_add_subregion(system_memory, 0, &s->flash_alias);
-
- memory_region_init_ram(&s->sram, NULL, "STM32F205.sram", SRAM_SIZE,
- &error_fatal);
- memory_region_add_subregion(system_memory, SRAM_BASE_ADDRESS, &s->sram);
+ memory_region_add_subregion(get_system_memory(), 0, &s->flash_alias);
armv7m = DEVICE(&s->armv7m);
qdev_prop_set_uint32(armv7m, "num-irq", 96);
--
2.21.1
^ permalink raw reply related [flat|nested] 98+ messages in thread* [PATCH-for-5.1 v3 13/24] hw/arm/stm32f205_soc: Move some code from realize() to init()
@ 2020-04-12 22:36 ` Philippe Mathieu-Daudé
0 siblings, 0 replies; 98+ messages in thread
From: Philippe Mathieu-Daudé @ 2020-04-12 22:36 UTC (permalink / raw)
To: qemu-devel
Cc: Joel Stanley, Jean-Christophe Dubois, Subbaraya Sundeep,
Max Reitz, Palmer Dabbelt, qemu-ppc, Sagar Karandikar,
Markus Armbruster, Jeff Cody, Peter Maydell, Xie Changlong,
Fam Zheng, Eduardo Habkost, Alistair Francis, qemu-arm,
Wen Congyang, Philippe Mathieu-Daudé,
Bastian Koppelmann, Edgar E. Iglesias, Kevin Wolf,
Marc-André Lureau, David Gibson, Jason Wang, Peter Chubb,
Beniamino Galvani, Alistair Francis, qemu-riscv,
Cédric Le Goater, qemu-block, Paolo Bonzini, Andrew Jeffery,
Michael S. Tsirkin, Richard Henderson,
Philippe Mathieu-Daudé
Coccinelle reported:
$ spatch ... --timeout 60 --sp-file \
scripts/coccinelle/simplify-init-realize-error_propagate.cocci
HANDLING: ./hw/arm/stm32f205_soc.c
>>> possible moves from stm32f205_soc_initfn() to stm32f205_soc_realize() in ./hw/arm/stm32f205_soc.c:83
Move the calls using &error_fatal which don't depend on input
updated before realize() to init().
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
v3: Typo 'depend of' -> 'depend on' (eblake)
---
hw/arm/stm32f205_soc.c | 20 ++++++++++----------
1 file changed, 10 insertions(+), 10 deletions(-)
diff --git a/hw/arm/stm32f205_soc.c b/hw/arm/stm32f205_soc.c
index 42f4e44134..76b0b0e9be 100644
--- a/hw/arm/stm32f205_soc.c
+++ b/hw/arm/stm32f205_soc.c
@@ -49,6 +49,7 @@ static const int spi_irq[STM_NUM_SPIS] = {35, 36, 51};
static void stm32f205_soc_initfn(Object *obj)
{
STM32F205State *s = STM32F205_SOC(obj);
+ MemoryRegion *system_memory = get_system_memory();
int i;
sysbus_init_child_obj(obj, "armv7m", &s->armv7m, sizeof(s->armv7m),
@@ -78,6 +79,14 @@ static void stm32f205_soc_initfn(Object *obj)
sysbus_init_child_obj(obj, "spi[*]", &s->spi[i], sizeof(s->spi[i]),
TYPE_STM32F2XX_SPI);
}
+
+ memory_region_init_ram(&s->sram, NULL, "STM32F205.sram", SRAM_SIZE,
+ &error_fatal);
+ memory_region_add_subregion(system_memory, SRAM_BASE_ADDRESS, &s->sram);
+
+ memory_region_init_rom(&s->flash, obj, "STM32F205.flash",
+ FLASH_SIZE, &error_fatal);
+ memory_region_add_subregion(system_memory, FLASH_BASE_ADDRESS, &s->flash);
}
static void stm32f205_soc_realize(DeviceState *dev_soc, Error **errp)
@@ -87,19 +96,10 @@ static void stm32f205_soc_realize(DeviceState *dev_soc, Error **errp)
SysBusDevice *busdev;
Error *err = NULL;
int i;
- MemoryRegion *system_memory = get_system_memory();
- memory_region_init_rom(&s->flash, OBJECT(dev_soc), "STM32F205.flash",
- FLASH_SIZE, &error_fatal);
memory_region_init_alias(&s->flash_alias, OBJECT(dev_soc),
"STM32F205.flash.alias", &s->flash, 0, FLASH_SIZE);
-
- memory_region_add_subregion(system_memory, FLASH_BASE_ADDRESS, &s->flash);
- memory_region_add_subregion(system_memory, 0, &s->flash_alias);
-
- memory_region_init_ram(&s->sram, NULL, "STM32F205.sram", SRAM_SIZE,
- &error_fatal);
- memory_region_add_subregion(system_memory, SRAM_BASE_ADDRESS, &s->sram);
+ memory_region_add_subregion(get_system_memory(), 0, &s->flash_alias);
armv7m = DEVICE(&s->armv7m);
qdev_prop_set_uint32(armv7m, "num-irq", 96);
--
2.21.1
^ permalink raw reply related [flat|nested] 98+ messages in thread* Re: [PATCH-for-5.1 v3 13/24] hw/arm/stm32f205_soc: Move some code from realize() to init()
2020-04-12 22:36 ` Philippe Mathieu-Daudé
@ 2020-04-13 22:02 ` Alistair Francis
-1 siblings, 0 replies; 98+ messages in thread
From: Alistair Francis @ 2020-04-13 22:02 UTC (permalink / raw)
To: Philippe Mathieu-Daudé
Cc: Fam Zheng, Peter Maydell, Sagar Karandikar, Michael S. Tsirkin,
Jeff Cody, Jason Wang, qemu-devel@nongnu.org Developers,
Alistair Francis, Edgar E. Iglesias, Max Reitz, Qemu-block,
Markus Armbruster, Joel Stanley, Marc-André Lureau,
David Gibson, Philippe Mathieu-Daudé,
Eduardo Habkost, Jean-Christophe Dubois, Xie Changlong,
Alistair Francis, Beniamino Galvani, qemu-arm, Peter Chubb,
Cédric Le Goater, open list:New World, Richard Henderson,
Kevin Wolf, open list:RISC-V, Andrew Jeffery, Wen Congyang,
Subbaraya Sundeep, Palmer Dabbelt, Bastian Koppelmann,
Paolo Bonzini
On Sun, Apr 12, 2020 at 3:42 PM Philippe Mathieu-Daudé <f4bug@amsat.org> wrote:
>
> Coccinelle reported:
>
> $ spatch ... --timeout 60 --sp-file \
> scripts/coccinelle/simplify-init-realize-error_propagate.cocci
> HANDLING: ./hw/arm/stm32f205_soc.c
> >>> possible moves from stm32f205_soc_initfn() to stm32f205_soc_realize() in ./hw/arm/stm32f205_soc.c:83
>
> Move the calls using &error_fatal which don't depend on input
> updated before realize() to init().
>
> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Alistair
> ---
> v3: Typo 'depend of' -> 'depend on' (eblake)
> ---
> hw/arm/stm32f205_soc.c | 20 ++++++++++----------
> 1 file changed, 10 insertions(+), 10 deletions(-)
>
> diff --git a/hw/arm/stm32f205_soc.c b/hw/arm/stm32f205_soc.c
> index 42f4e44134..76b0b0e9be 100644
> --- a/hw/arm/stm32f205_soc.c
> +++ b/hw/arm/stm32f205_soc.c
> @@ -49,6 +49,7 @@ static const int spi_irq[STM_NUM_SPIS] = {35, 36, 51};
> static void stm32f205_soc_initfn(Object *obj)
> {
> STM32F205State *s = STM32F205_SOC(obj);
> + MemoryRegion *system_memory = get_system_memory();
> int i;
>
> sysbus_init_child_obj(obj, "armv7m", &s->armv7m, sizeof(s->armv7m),
> @@ -78,6 +79,14 @@ static void stm32f205_soc_initfn(Object *obj)
> sysbus_init_child_obj(obj, "spi[*]", &s->spi[i], sizeof(s->spi[i]),
> TYPE_STM32F2XX_SPI);
> }
> +
> + memory_region_init_ram(&s->sram, NULL, "STM32F205.sram", SRAM_SIZE,
> + &error_fatal);
> + memory_region_add_subregion(system_memory, SRAM_BASE_ADDRESS, &s->sram);
> +
> + memory_region_init_rom(&s->flash, obj, "STM32F205.flash",
> + FLASH_SIZE, &error_fatal);
> + memory_region_add_subregion(system_memory, FLASH_BASE_ADDRESS, &s->flash);
> }
>
> static void stm32f205_soc_realize(DeviceState *dev_soc, Error **errp)
> @@ -87,19 +96,10 @@ static void stm32f205_soc_realize(DeviceState *dev_soc, Error **errp)
> SysBusDevice *busdev;
> Error *err = NULL;
> int i;
> - MemoryRegion *system_memory = get_system_memory();
>
> - memory_region_init_rom(&s->flash, OBJECT(dev_soc), "STM32F205.flash",
> - FLASH_SIZE, &error_fatal);
> memory_region_init_alias(&s->flash_alias, OBJECT(dev_soc),
> "STM32F205.flash.alias", &s->flash, 0, FLASH_SIZE);
> -
> - memory_region_add_subregion(system_memory, FLASH_BASE_ADDRESS, &s->flash);
> - memory_region_add_subregion(system_memory, 0, &s->flash_alias);
> -
> - memory_region_init_ram(&s->sram, NULL, "STM32F205.sram", SRAM_SIZE,
> - &error_fatal);
> - memory_region_add_subregion(system_memory, SRAM_BASE_ADDRESS, &s->sram);
> + memory_region_add_subregion(get_system_memory(), 0, &s->flash_alias);
>
> armv7m = DEVICE(&s->armv7m);
> qdev_prop_set_uint32(armv7m, "num-irq", 96);
> --
> 2.21.1
>
>
^ permalink raw reply [flat|nested] 98+ messages in thread* Re: [PATCH-for-5.1 v3 13/24] hw/arm/stm32f205_soc: Move some code from realize() to init()
@ 2020-04-13 22:02 ` Alistair Francis
0 siblings, 0 replies; 98+ messages in thread
From: Alistair Francis @ 2020-04-13 22:02 UTC (permalink / raw)
To: Philippe Mathieu-Daudé
Cc: qemu-devel@nongnu.org Developers, Fam Zheng, Peter Maydell,
Sagar Karandikar, Michael S. Tsirkin, Jeff Cody, Jason Wang,
Alistair Francis, Edgar E. Iglesias, Subbaraya Sundeep,
Qemu-block, Markus Armbruster, Max Reitz, Joel Stanley,
Marc-André Lureau, Richard Henderson,
Philippe Mathieu-Daudé,
Eduardo Habkost, Xie Changlong, Alistair Francis,
Beniamino Galvani, qemu-arm, Peter Chubb, Cédric Le Goater,
Palmer Dabbelt, David Gibson, Kevin Wolf, open list:RISC-V,
Andrew Jeffery, Wen Congyang, Jean-Christophe Dubois,
open list:New World, Bastian Koppelmann, Paolo Bonzini
On Sun, Apr 12, 2020 at 3:42 PM Philippe Mathieu-Daudé <f4bug@amsat.org> wrote:
>
> Coccinelle reported:
>
> $ spatch ... --timeout 60 --sp-file \
> scripts/coccinelle/simplify-init-realize-error_propagate.cocci
> HANDLING: ./hw/arm/stm32f205_soc.c
> >>> possible moves from stm32f205_soc_initfn() to stm32f205_soc_realize() in ./hw/arm/stm32f205_soc.c:83
>
> Move the calls using &error_fatal which don't depend on input
> updated before realize() to init().
>
> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Alistair
> ---
> v3: Typo 'depend of' -> 'depend on' (eblake)
> ---
> hw/arm/stm32f205_soc.c | 20 ++++++++++----------
> 1 file changed, 10 insertions(+), 10 deletions(-)
>
> diff --git a/hw/arm/stm32f205_soc.c b/hw/arm/stm32f205_soc.c
> index 42f4e44134..76b0b0e9be 100644
> --- a/hw/arm/stm32f205_soc.c
> +++ b/hw/arm/stm32f205_soc.c
> @@ -49,6 +49,7 @@ static const int spi_irq[STM_NUM_SPIS] = {35, 36, 51};
> static void stm32f205_soc_initfn(Object *obj)
> {
> STM32F205State *s = STM32F205_SOC(obj);
> + MemoryRegion *system_memory = get_system_memory();
> int i;
>
> sysbus_init_child_obj(obj, "armv7m", &s->armv7m, sizeof(s->armv7m),
> @@ -78,6 +79,14 @@ static void stm32f205_soc_initfn(Object *obj)
> sysbus_init_child_obj(obj, "spi[*]", &s->spi[i], sizeof(s->spi[i]),
> TYPE_STM32F2XX_SPI);
> }
> +
> + memory_region_init_ram(&s->sram, NULL, "STM32F205.sram", SRAM_SIZE,
> + &error_fatal);
> + memory_region_add_subregion(system_memory, SRAM_BASE_ADDRESS, &s->sram);
> +
> + memory_region_init_rom(&s->flash, obj, "STM32F205.flash",
> + FLASH_SIZE, &error_fatal);
> + memory_region_add_subregion(system_memory, FLASH_BASE_ADDRESS, &s->flash);
> }
>
> static void stm32f205_soc_realize(DeviceState *dev_soc, Error **errp)
> @@ -87,19 +96,10 @@ static void stm32f205_soc_realize(DeviceState *dev_soc, Error **errp)
> SysBusDevice *busdev;
> Error *err = NULL;
> int i;
> - MemoryRegion *system_memory = get_system_memory();
>
> - memory_region_init_rom(&s->flash, OBJECT(dev_soc), "STM32F205.flash",
> - FLASH_SIZE, &error_fatal);
> memory_region_init_alias(&s->flash_alias, OBJECT(dev_soc),
> "STM32F205.flash.alias", &s->flash, 0, FLASH_SIZE);
> -
> - memory_region_add_subregion(system_memory, FLASH_BASE_ADDRESS, &s->flash);
> - memory_region_add_subregion(system_memory, 0, &s->flash_alias);
> -
> - memory_region_init_ram(&s->sram, NULL, "STM32F205.sram", SRAM_SIZE,
> - &error_fatal);
> - memory_region_add_subregion(system_memory, SRAM_BASE_ADDRESS, &s->sram);
> + memory_region_add_subregion(get_system_memory(), 0, &s->flash_alias);
>
> armv7m = DEVICE(&s->armv7m);
> qdev_prop_set_uint32(armv7m, "num-irq", 96);
> --
> 2.21.1
>
>
^ permalink raw reply [flat|nested] 98+ messages in thread
* [PATCH-for-5.1 v3 14/24] hw/arm/xlnx-zynqmp: Use single propagate_error() call
2020-04-12 22:35 ` Philippe Mathieu-Daudé
@ 2020-04-12 22:36 ` Philippe Mathieu-Daudé
-1 siblings, 0 replies; 98+ messages in thread
From: Philippe Mathieu-Daudé @ 2020-04-12 22:36 UTC (permalink / raw)
To: qemu-devel
Cc: Fam Zheng, Peter Maydell, Sagar Karandikar, Michael S. Tsirkin,
Jeff Cody, Jason Wang, Alistair Francis, Edgar E. Iglesias,
Subbaraya Sundeep, qemu-block, Markus Armbruster, Max Reitz,
Joel Stanley, Marc-André Lureau, Richard Henderson,
Philippe Mathieu-Daudé,
Eduardo Habkost, Xie Changlong, Alistair Francis,
Beniamino Galvani, qemu-arm, Peter Chubb, Cédric Le Goater,
Palmer Dabbelt, David Gibson, Kevin Wolf, qemu-riscv,
Andrew Jeffery, Wen Congyang, Philippe Mathieu-Daudé,
Jean-Christophe Dubois, qemu-ppc, Bastian Koppelmann,
Paolo Bonzini
Coccinelle failed at processing this file:
$ spatch ... --timeout 60 --sp-file \
scripts/coccinelle/simplify-init-realize-error_propagate.cocci
HANDLING: ./hw/arm/xlnx-zynqmp.c
EXN: Coccinelle_modules.Common.Timeout
We are going to manually add the missing propagate_error() calls.
As there are many Error* calls used, simplify by using an unique
call to propagate_error().
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
hw/arm/xlnx-zynqmp.c | 61 +++++++++++++++++---------------------------
1 file changed, 23 insertions(+), 38 deletions(-)
diff --git a/hw/arm/xlnx-zynqmp.c b/hw/arm/xlnx-zynqmp.c
index b84d153d56..43d57fa7de 100644
--- a/hw/arm/xlnx-zynqmp.c
+++ b/hw/arm/xlnx-zynqmp.c
@@ -385,15 +385,13 @@ static void xlnx_zynqmp_realize(DeviceState *dev, Error **errp)
object_property_set_bool(OBJECT(&s->apu_cpu[i]), true, "realized",
&err);
if (err) {
- error_propagate(errp, err);
- return;
+ goto out_propagate_error;
}
}
object_property_set_bool(OBJECT(&s->gic), true, "realized", &err);
if (err) {
- error_propagate(errp, err);
- return;
+ goto out_propagate_error;
}
assert(ARRAY_SIZE(xlnx_zynqmp_gic_regions) == XLNX_ZYNQMP_GIC_REGIONS);
@@ -462,8 +460,7 @@ static void xlnx_zynqmp_realize(DeviceState *dev, Error **errp)
xlnx_zynqmp_create_rpu(ms, s, boot_cpu, &err);
if (err) {
- error_propagate(errp, err);
- return;
+ goto out_propagate_error;
}
if (!s->boot_cpu_ptr) {
@@ -488,8 +485,7 @@ static void xlnx_zynqmp_realize(DeviceState *dev, Error **errp)
&error_abort);
object_property_set_bool(OBJECT(&s->gem[i]), true, "realized", &err);
if (err) {
- error_propagate(errp, err);
- return;
+ goto out_propagate_error;
}
sysbus_mmio_map(SYS_BUS_DEVICE(&s->gem[i]), 0, gem_addr[i]);
sysbus_connect_irq(SYS_BUS_DEVICE(&s->gem[i]), 0,
@@ -500,8 +496,7 @@ static void xlnx_zynqmp_realize(DeviceState *dev, Error **errp)
qdev_prop_set_chr(DEVICE(&s->uart[i]), "chardev", serial_hd(i));
object_property_set_bool(OBJECT(&s->uart[i]), true, "realized", &err);
if (err) {
- error_propagate(errp, err);
- return;
+ goto out_propagate_error;
}
sysbus_mmio_map(SYS_BUS_DEVICE(&s->uart[i]), 0, uart_addr[i]);
sysbus_connect_irq(SYS_BUS_DEVICE(&s->uart[i]), 0,
@@ -512,8 +507,7 @@ static void xlnx_zynqmp_realize(DeviceState *dev, Error **errp)
&error_abort);
object_property_set_bool(OBJECT(&s->sata), true, "realized", &err);
if (err) {
- error_propagate(errp, err);
- return;
+ goto out_propagate_error;
}
sysbus_mmio_map(SYS_BUS_DEVICE(&s->sata), 0, SATA_ADDR);
@@ -531,23 +525,19 @@ static void xlnx_zynqmp_realize(DeviceState *dev, Error **errp)
*/
object_property_set_uint(sdhci, 3, "sd-spec-version", &err);
if (err) {
- error_propagate(errp, err);
- return;
+ goto out_propagate_error;
}
object_property_set_uint(sdhci, SDHCI_CAPABILITIES, "capareg", &err);
if (err) {
- error_propagate(errp, err);
- return;
+ goto out_propagate_error;
}
object_property_set_uint(sdhci, UHS_I, "uhs", &err);
if (err) {
- error_propagate(errp, err);
- return;
+ goto out_propagate_error;
}
object_property_set_bool(sdhci, true, "realized", &err);
if (err) {
- error_propagate(errp, err);
- return;
+ goto out_propagate_error;
}
sysbus_mmio_map(sbd, 0, sdhci_addr[i]);
sysbus_connect_irq(sbd, 0, gic_spi[sdhci_intr[i]]);
@@ -564,8 +554,7 @@ static void xlnx_zynqmp_realize(DeviceState *dev, Error **errp)
object_property_set_bool(OBJECT(&s->spi[i]), true, "realized", &err);
if (err) {
- error_propagate(errp, err);
- return;
+ goto out_propagate_error;
}
sysbus_mmio_map(SYS_BUS_DEVICE(&s->spi[i]), 0, spi_addr[i]);
@@ -582,8 +571,7 @@ static void xlnx_zynqmp_realize(DeviceState *dev, Error **errp)
object_property_set_bool(OBJECT(&s->qspi), true, "realized", &err);
if (err) {
- error_propagate(errp, err);
- return;
+ goto out_propagate_error;
}
sysbus_mmio_map(SYS_BUS_DEVICE(&s->qspi), 0, QSPI_ADDR);
sysbus_mmio_map(SYS_BUS_DEVICE(&s->qspi), 1, LQSPI_ADDR);
@@ -605,16 +593,14 @@ static void xlnx_zynqmp_realize(DeviceState *dev, Error **errp)
object_property_set_bool(OBJECT(&s->dp), true, "realized", &err);
if (err) {
- error_propagate(errp, err);
- return;
+ goto out_propagate_error;
}
sysbus_mmio_map(SYS_BUS_DEVICE(&s->dp), 0, DP_ADDR);
sysbus_connect_irq(SYS_BUS_DEVICE(&s->dp), 0, gic_spi[DP_IRQ]);
object_property_set_bool(OBJECT(&s->dpdma), true, "realized", &err);
if (err) {
- error_propagate(errp, err);
- return;
+ goto out_propagate_error;
}
object_property_set_link(OBJECT(&s->dp), OBJECT(&s->dpdma), "dpdma",
&error_abort);
@@ -623,16 +609,14 @@ static void xlnx_zynqmp_realize(DeviceState *dev, Error **errp)
object_property_set_bool(OBJECT(&s->ipi), true, "realized", &err);
if (err) {
- error_propagate(errp, err);
- return;
+ goto out_propagate_error;
}
sysbus_mmio_map(SYS_BUS_DEVICE(&s->ipi), 0, IPI_ADDR);
sysbus_connect_irq(SYS_BUS_DEVICE(&s->ipi), 0, gic_spi[IPI_IRQ]);
object_property_set_bool(OBJECT(&s->rtc), true, "realized", &err);
if (err) {
- error_propagate(errp, err);
- return;
+ goto out_propagate_error;
}
sysbus_mmio_map(SYS_BUS_DEVICE(&s->rtc), 0, RTC_ADDR);
sysbus_connect_irq(SYS_BUS_DEVICE(&s->rtc), 0, gic_spi[RTC_IRQ]);
@@ -640,13 +624,11 @@ static void xlnx_zynqmp_realize(DeviceState *dev, Error **errp)
for (i = 0; i < XLNX_ZYNQMP_NUM_GDMA_CH; i++) {
object_property_set_uint(OBJECT(&s->gdma[i]), 128, "bus-width", &err);
if (err) {
- error_propagate(errp, err);
- return;
+ goto out_propagate_error;
}
object_property_set_bool(OBJECT(&s->gdma[i]), true, "realized", &err);
if (err) {
- error_propagate(errp, err);
- return;
+ goto out_propagate_error;
}
sysbus_mmio_map(SYS_BUS_DEVICE(&s->gdma[i]), 0, gdma_ch_addr[i]);
@@ -657,14 +639,17 @@ static void xlnx_zynqmp_realize(DeviceState *dev, Error **errp)
for (i = 0; i < XLNX_ZYNQMP_NUM_ADMA_CH; i++) {
object_property_set_bool(OBJECT(&s->adma[i]), true, "realized", &err);
if (err) {
- error_propagate(errp, err);
- return;
+ goto out_propagate_error;
}
sysbus_mmio_map(SYS_BUS_DEVICE(&s->adma[i]), 0, adma_ch_addr[i]);
sysbus_connect_irq(SYS_BUS_DEVICE(&s->adma[i]), 0,
gic_spi[adma_ch_intr[i]]);
}
+ return;
+
+out_propagate_error:
+ error_propagate(errp, err);
}
static Property xlnx_zynqmp_props[] = {
--
2.21.1
^ permalink raw reply related [flat|nested] 98+ messages in thread* [PATCH-for-5.1 v3 14/24] hw/arm/xlnx-zynqmp: Use single propagate_error() call
@ 2020-04-12 22:36 ` Philippe Mathieu-Daudé
0 siblings, 0 replies; 98+ messages in thread
From: Philippe Mathieu-Daudé @ 2020-04-12 22:36 UTC (permalink / raw)
To: qemu-devel
Cc: Joel Stanley, Jean-Christophe Dubois, Subbaraya Sundeep,
Max Reitz, Palmer Dabbelt, qemu-ppc, Sagar Karandikar,
Markus Armbruster, Jeff Cody, Peter Maydell, Xie Changlong,
Fam Zheng, Eduardo Habkost, Alistair Francis, qemu-arm,
Wen Congyang, Philippe Mathieu-Daudé,
Bastian Koppelmann, Edgar E. Iglesias, Kevin Wolf,
Marc-André Lureau, David Gibson, Jason Wang, Peter Chubb,
Beniamino Galvani, Alistair Francis, qemu-riscv,
Cédric Le Goater, qemu-block, Paolo Bonzini, Andrew Jeffery,
Michael S. Tsirkin, Richard Henderson,
Philippe Mathieu-Daudé
Coccinelle failed at processing this file:
$ spatch ... --timeout 60 --sp-file \
scripts/coccinelle/simplify-init-realize-error_propagate.cocci
HANDLING: ./hw/arm/xlnx-zynqmp.c
EXN: Coccinelle_modules.Common.Timeout
We are going to manually add the missing propagate_error() calls.
As there are many Error* calls used, simplify by using an unique
call to propagate_error().
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
hw/arm/xlnx-zynqmp.c | 61 +++++++++++++++++---------------------------
1 file changed, 23 insertions(+), 38 deletions(-)
diff --git a/hw/arm/xlnx-zynqmp.c b/hw/arm/xlnx-zynqmp.c
index b84d153d56..43d57fa7de 100644
--- a/hw/arm/xlnx-zynqmp.c
+++ b/hw/arm/xlnx-zynqmp.c
@@ -385,15 +385,13 @@ static void xlnx_zynqmp_realize(DeviceState *dev, Error **errp)
object_property_set_bool(OBJECT(&s->apu_cpu[i]), true, "realized",
&err);
if (err) {
- error_propagate(errp, err);
- return;
+ goto out_propagate_error;
}
}
object_property_set_bool(OBJECT(&s->gic), true, "realized", &err);
if (err) {
- error_propagate(errp, err);
- return;
+ goto out_propagate_error;
}
assert(ARRAY_SIZE(xlnx_zynqmp_gic_regions) == XLNX_ZYNQMP_GIC_REGIONS);
@@ -462,8 +460,7 @@ static void xlnx_zynqmp_realize(DeviceState *dev, Error **errp)
xlnx_zynqmp_create_rpu(ms, s, boot_cpu, &err);
if (err) {
- error_propagate(errp, err);
- return;
+ goto out_propagate_error;
}
if (!s->boot_cpu_ptr) {
@@ -488,8 +485,7 @@ static void xlnx_zynqmp_realize(DeviceState *dev, Error **errp)
&error_abort);
object_property_set_bool(OBJECT(&s->gem[i]), true, "realized", &err);
if (err) {
- error_propagate(errp, err);
- return;
+ goto out_propagate_error;
}
sysbus_mmio_map(SYS_BUS_DEVICE(&s->gem[i]), 0, gem_addr[i]);
sysbus_connect_irq(SYS_BUS_DEVICE(&s->gem[i]), 0,
@@ -500,8 +496,7 @@ static void xlnx_zynqmp_realize(DeviceState *dev, Error **errp)
qdev_prop_set_chr(DEVICE(&s->uart[i]), "chardev", serial_hd(i));
object_property_set_bool(OBJECT(&s->uart[i]), true, "realized", &err);
if (err) {
- error_propagate(errp, err);
- return;
+ goto out_propagate_error;
}
sysbus_mmio_map(SYS_BUS_DEVICE(&s->uart[i]), 0, uart_addr[i]);
sysbus_connect_irq(SYS_BUS_DEVICE(&s->uart[i]), 0,
@@ -512,8 +507,7 @@ static void xlnx_zynqmp_realize(DeviceState *dev, Error **errp)
&error_abort);
object_property_set_bool(OBJECT(&s->sata), true, "realized", &err);
if (err) {
- error_propagate(errp, err);
- return;
+ goto out_propagate_error;
}
sysbus_mmio_map(SYS_BUS_DEVICE(&s->sata), 0, SATA_ADDR);
@@ -531,23 +525,19 @@ static void xlnx_zynqmp_realize(DeviceState *dev, Error **errp)
*/
object_property_set_uint(sdhci, 3, "sd-spec-version", &err);
if (err) {
- error_propagate(errp, err);
- return;
+ goto out_propagate_error;
}
object_property_set_uint(sdhci, SDHCI_CAPABILITIES, "capareg", &err);
if (err) {
- error_propagate(errp, err);
- return;
+ goto out_propagate_error;
}
object_property_set_uint(sdhci, UHS_I, "uhs", &err);
if (err) {
- error_propagate(errp, err);
- return;
+ goto out_propagate_error;
}
object_property_set_bool(sdhci, true, "realized", &err);
if (err) {
- error_propagate(errp, err);
- return;
+ goto out_propagate_error;
}
sysbus_mmio_map(sbd, 0, sdhci_addr[i]);
sysbus_connect_irq(sbd, 0, gic_spi[sdhci_intr[i]]);
@@ -564,8 +554,7 @@ static void xlnx_zynqmp_realize(DeviceState *dev, Error **errp)
object_property_set_bool(OBJECT(&s->spi[i]), true, "realized", &err);
if (err) {
- error_propagate(errp, err);
- return;
+ goto out_propagate_error;
}
sysbus_mmio_map(SYS_BUS_DEVICE(&s->spi[i]), 0, spi_addr[i]);
@@ -582,8 +571,7 @@ static void xlnx_zynqmp_realize(DeviceState *dev, Error **errp)
object_property_set_bool(OBJECT(&s->qspi), true, "realized", &err);
if (err) {
- error_propagate(errp, err);
- return;
+ goto out_propagate_error;
}
sysbus_mmio_map(SYS_BUS_DEVICE(&s->qspi), 0, QSPI_ADDR);
sysbus_mmio_map(SYS_BUS_DEVICE(&s->qspi), 1, LQSPI_ADDR);
@@ -605,16 +593,14 @@ static void xlnx_zynqmp_realize(DeviceState *dev, Error **errp)
object_property_set_bool(OBJECT(&s->dp), true, "realized", &err);
if (err) {
- error_propagate(errp, err);
- return;
+ goto out_propagate_error;
}
sysbus_mmio_map(SYS_BUS_DEVICE(&s->dp), 0, DP_ADDR);
sysbus_connect_irq(SYS_BUS_DEVICE(&s->dp), 0, gic_spi[DP_IRQ]);
object_property_set_bool(OBJECT(&s->dpdma), true, "realized", &err);
if (err) {
- error_propagate(errp, err);
- return;
+ goto out_propagate_error;
}
object_property_set_link(OBJECT(&s->dp), OBJECT(&s->dpdma), "dpdma",
&error_abort);
@@ -623,16 +609,14 @@ static void xlnx_zynqmp_realize(DeviceState *dev, Error **errp)
object_property_set_bool(OBJECT(&s->ipi), true, "realized", &err);
if (err) {
- error_propagate(errp, err);
- return;
+ goto out_propagate_error;
}
sysbus_mmio_map(SYS_BUS_DEVICE(&s->ipi), 0, IPI_ADDR);
sysbus_connect_irq(SYS_BUS_DEVICE(&s->ipi), 0, gic_spi[IPI_IRQ]);
object_property_set_bool(OBJECT(&s->rtc), true, "realized", &err);
if (err) {
- error_propagate(errp, err);
- return;
+ goto out_propagate_error;
}
sysbus_mmio_map(SYS_BUS_DEVICE(&s->rtc), 0, RTC_ADDR);
sysbus_connect_irq(SYS_BUS_DEVICE(&s->rtc), 0, gic_spi[RTC_IRQ]);
@@ -640,13 +624,11 @@ static void xlnx_zynqmp_realize(DeviceState *dev, Error **errp)
for (i = 0; i < XLNX_ZYNQMP_NUM_GDMA_CH; i++) {
object_property_set_uint(OBJECT(&s->gdma[i]), 128, "bus-width", &err);
if (err) {
- error_propagate(errp, err);
- return;
+ goto out_propagate_error;
}
object_property_set_bool(OBJECT(&s->gdma[i]), true, "realized", &err);
if (err) {
- error_propagate(errp, err);
- return;
+ goto out_propagate_error;
}
sysbus_mmio_map(SYS_BUS_DEVICE(&s->gdma[i]), 0, gdma_ch_addr[i]);
@@ -657,14 +639,17 @@ static void xlnx_zynqmp_realize(DeviceState *dev, Error **errp)
for (i = 0; i < XLNX_ZYNQMP_NUM_ADMA_CH; i++) {
object_property_set_bool(OBJECT(&s->adma[i]), true, "realized", &err);
if (err) {
- error_propagate(errp, err);
- return;
+ goto out_propagate_error;
}
sysbus_mmio_map(SYS_BUS_DEVICE(&s->adma[i]), 0, adma_ch_addr[i]);
sysbus_connect_irq(SYS_BUS_DEVICE(&s->adma[i]), 0,
gic_spi[adma_ch_intr[i]]);
}
+ return;
+
+out_propagate_error:
+ error_propagate(errp, err);
}
static Property xlnx_zynqmp_props[] = {
--
2.21.1
^ permalink raw reply related [flat|nested] 98+ messages in thread* Re: [PATCH-for-5.1 v3 14/24] hw/arm/xlnx-zynqmp: Use single propagate_error() call
2020-04-12 22:36 ` Philippe Mathieu-Daudé
@ 2020-04-13 22:05 ` Alistair Francis
-1 siblings, 0 replies; 98+ messages in thread
From: Alistair Francis @ 2020-04-13 22:05 UTC (permalink / raw)
To: Philippe Mathieu-Daudé
Cc: Fam Zheng, Peter Maydell, Sagar Karandikar, Michael S. Tsirkin,
Jeff Cody, Jason Wang, qemu-devel@nongnu.org Developers,
Alistair Francis, Edgar E. Iglesias, Max Reitz, Qemu-block,
Markus Armbruster, Joel Stanley, Marc-André Lureau,
David Gibson, Philippe Mathieu-Daudé,
Eduardo Habkost, Jean-Christophe Dubois, Xie Changlong,
Alistair Francis, Beniamino Galvani, qemu-arm, Peter Chubb,
Cédric Le Goater, open list:New World, Richard Henderson,
Kevin Wolf, open list:RISC-V, Andrew Jeffery, Wen Congyang,
Subbaraya Sundeep, Palmer Dabbelt, Bastian Koppelmann,
Paolo Bonzini
On Sun, Apr 12, 2020 at 3:45 PM Philippe Mathieu-Daudé <f4bug@amsat.org> wrote:
>
> Coccinelle failed at processing this file:
>
> $ spatch ... --timeout 60 --sp-file \
> scripts/coccinelle/simplify-init-realize-error_propagate.cocci
> HANDLING: ./hw/arm/xlnx-zynqmp.c
> EXN: Coccinelle_modules.Common.Timeout
>
> We are going to manually add the missing propagate_error() calls.
> As there are many Error* calls used, simplify by using an unique
> call to propagate_error().
I'm not a huge fan of goto's so I'm not sure this is simpler.
Alistair
>
> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
> ---
> hw/arm/xlnx-zynqmp.c | 61 +++++++++++++++++---------------------------
> 1 file changed, 23 insertions(+), 38 deletions(-)
>
> diff --git a/hw/arm/xlnx-zynqmp.c b/hw/arm/xlnx-zynqmp.c
> index b84d153d56..43d57fa7de 100644
> --- a/hw/arm/xlnx-zynqmp.c
> +++ b/hw/arm/xlnx-zynqmp.c
> @@ -385,15 +385,13 @@ static void xlnx_zynqmp_realize(DeviceState *dev, Error **errp)
> object_property_set_bool(OBJECT(&s->apu_cpu[i]), true, "realized",
> &err);
> if (err) {
> - error_propagate(errp, err);
> - return;
> + goto out_propagate_error;
> }
> }
>
> object_property_set_bool(OBJECT(&s->gic), true, "realized", &err);
> if (err) {
> - error_propagate(errp, err);
> - return;
> + goto out_propagate_error;
> }
>
> assert(ARRAY_SIZE(xlnx_zynqmp_gic_regions) == XLNX_ZYNQMP_GIC_REGIONS);
> @@ -462,8 +460,7 @@ static void xlnx_zynqmp_realize(DeviceState *dev, Error **errp)
>
> xlnx_zynqmp_create_rpu(ms, s, boot_cpu, &err);
> if (err) {
> - error_propagate(errp, err);
> - return;
> + goto out_propagate_error;
> }
>
> if (!s->boot_cpu_ptr) {
> @@ -488,8 +485,7 @@ static void xlnx_zynqmp_realize(DeviceState *dev, Error **errp)
> &error_abort);
> object_property_set_bool(OBJECT(&s->gem[i]), true, "realized", &err);
> if (err) {
> - error_propagate(errp, err);
> - return;
> + goto out_propagate_error;
> }
> sysbus_mmio_map(SYS_BUS_DEVICE(&s->gem[i]), 0, gem_addr[i]);
> sysbus_connect_irq(SYS_BUS_DEVICE(&s->gem[i]), 0,
> @@ -500,8 +496,7 @@ static void xlnx_zynqmp_realize(DeviceState *dev, Error **errp)
> qdev_prop_set_chr(DEVICE(&s->uart[i]), "chardev", serial_hd(i));
> object_property_set_bool(OBJECT(&s->uart[i]), true, "realized", &err);
> if (err) {
> - error_propagate(errp, err);
> - return;
> + goto out_propagate_error;
> }
> sysbus_mmio_map(SYS_BUS_DEVICE(&s->uart[i]), 0, uart_addr[i]);
> sysbus_connect_irq(SYS_BUS_DEVICE(&s->uart[i]), 0,
> @@ -512,8 +507,7 @@ static void xlnx_zynqmp_realize(DeviceState *dev, Error **errp)
> &error_abort);
> object_property_set_bool(OBJECT(&s->sata), true, "realized", &err);
> if (err) {
> - error_propagate(errp, err);
> - return;
> + goto out_propagate_error;
> }
>
> sysbus_mmio_map(SYS_BUS_DEVICE(&s->sata), 0, SATA_ADDR);
> @@ -531,23 +525,19 @@ static void xlnx_zynqmp_realize(DeviceState *dev, Error **errp)
> */
> object_property_set_uint(sdhci, 3, "sd-spec-version", &err);
> if (err) {
> - error_propagate(errp, err);
> - return;
> + goto out_propagate_error;
> }
> object_property_set_uint(sdhci, SDHCI_CAPABILITIES, "capareg", &err);
> if (err) {
> - error_propagate(errp, err);
> - return;
> + goto out_propagate_error;
> }
> object_property_set_uint(sdhci, UHS_I, "uhs", &err);
> if (err) {
> - error_propagate(errp, err);
> - return;
> + goto out_propagate_error;
> }
> object_property_set_bool(sdhci, true, "realized", &err);
> if (err) {
> - error_propagate(errp, err);
> - return;
> + goto out_propagate_error;
> }
> sysbus_mmio_map(sbd, 0, sdhci_addr[i]);
> sysbus_connect_irq(sbd, 0, gic_spi[sdhci_intr[i]]);
> @@ -564,8 +554,7 @@ static void xlnx_zynqmp_realize(DeviceState *dev, Error **errp)
>
> object_property_set_bool(OBJECT(&s->spi[i]), true, "realized", &err);
> if (err) {
> - error_propagate(errp, err);
> - return;
> + goto out_propagate_error;
> }
>
> sysbus_mmio_map(SYS_BUS_DEVICE(&s->spi[i]), 0, spi_addr[i]);
> @@ -582,8 +571,7 @@ static void xlnx_zynqmp_realize(DeviceState *dev, Error **errp)
>
> object_property_set_bool(OBJECT(&s->qspi), true, "realized", &err);
> if (err) {
> - error_propagate(errp, err);
> - return;
> + goto out_propagate_error;
> }
> sysbus_mmio_map(SYS_BUS_DEVICE(&s->qspi), 0, QSPI_ADDR);
> sysbus_mmio_map(SYS_BUS_DEVICE(&s->qspi), 1, LQSPI_ADDR);
> @@ -605,16 +593,14 @@ static void xlnx_zynqmp_realize(DeviceState *dev, Error **errp)
>
> object_property_set_bool(OBJECT(&s->dp), true, "realized", &err);
> if (err) {
> - error_propagate(errp, err);
> - return;
> + goto out_propagate_error;
> }
> sysbus_mmio_map(SYS_BUS_DEVICE(&s->dp), 0, DP_ADDR);
> sysbus_connect_irq(SYS_BUS_DEVICE(&s->dp), 0, gic_spi[DP_IRQ]);
>
> object_property_set_bool(OBJECT(&s->dpdma), true, "realized", &err);
> if (err) {
> - error_propagate(errp, err);
> - return;
> + goto out_propagate_error;
> }
> object_property_set_link(OBJECT(&s->dp), OBJECT(&s->dpdma), "dpdma",
> &error_abort);
> @@ -623,16 +609,14 @@ static void xlnx_zynqmp_realize(DeviceState *dev, Error **errp)
>
> object_property_set_bool(OBJECT(&s->ipi), true, "realized", &err);
> if (err) {
> - error_propagate(errp, err);
> - return;
> + goto out_propagate_error;
> }
> sysbus_mmio_map(SYS_BUS_DEVICE(&s->ipi), 0, IPI_ADDR);
> sysbus_connect_irq(SYS_BUS_DEVICE(&s->ipi), 0, gic_spi[IPI_IRQ]);
>
> object_property_set_bool(OBJECT(&s->rtc), true, "realized", &err);
> if (err) {
> - error_propagate(errp, err);
> - return;
> + goto out_propagate_error;
> }
> sysbus_mmio_map(SYS_BUS_DEVICE(&s->rtc), 0, RTC_ADDR);
> sysbus_connect_irq(SYS_BUS_DEVICE(&s->rtc), 0, gic_spi[RTC_IRQ]);
> @@ -640,13 +624,11 @@ static void xlnx_zynqmp_realize(DeviceState *dev, Error **errp)
> for (i = 0; i < XLNX_ZYNQMP_NUM_GDMA_CH; i++) {
> object_property_set_uint(OBJECT(&s->gdma[i]), 128, "bus-width", &err);
> if (err) {
> - error_propagate(errp, err);
> - return;
> + goto out_propagate_error;
> }
> object_property_set_bool(OBJECT(&s->gdma[i]), true, "realized", &err);
> if (err) {
> - error_propagate(errp, err);
> - return;
> + goto out_propagate_error;
> }
>
> sysbus_mmio_map(SYS_BUS_DEVICE(&s->gdma[i]), 0, gdma_ch_addr[i]);
> @@ -657,14 +639,17 @@ static void xlnx_zynqmp_realize(DeviceState *dev, Error **errp)
> for (i = 0; i < XLNX_ZYNQMP_NUM_ADMA_CH; i++) {
> object_property_set_bool(OBJECT(&s->adma[i]), true, "realized", &err);
> if (err) {
> - error_propagate(errp, err);
> - return;
> + goto out_propagate_error;
> }
>
> sysbus_mmio_map(SYS_BUS_DEVICE(&s->adma[i]), 0, adma_ch_addr[i]);
> sysbus_connect_irq(SYS_BUS_DEVICE(&s->adma[i]), 0,
> gic_spi[adma_ch_intr[i]]);
> }
> + return;
> +
> +out_propagate_error:
> + error_propagate(errp, err);
> }
>
> static Property xlnx_zynqmp_props[] = {
> --
> 2.21.1
>
>
^ permalink raw reply [flat|nested] 98+ messages in thread* Re: [PATCH-for-5.1 v3 14/24] hw/arm/xlnx-zynqmp: Use single propagate_error() call
@ 2020-04-13 22:05 ` Alistair Francis
0 siblings, 0 replies; 98+ messages in thread
From: Alistair Francis @ 2020-04-13 22:05 UTC (permalink / raw)
To: Philippe Mathieu-Daudé
Cc: qemu-devel@nongnu.org Developers, Fam Zheng, Peter Maydell,
Sagar Karandikar, Michael S. Tsirkin, Jeff Cody, Jason Wang,
Alistair Francis, Edgar E. Iglesias, Subbaraya Sundeep,
Qemu-block, Markus Armbruster, Max Reitz, Joel Stanley,
Marc-André Lureau, Richard Henderson,
Philippe Mathieu-Daudé,
Eduardo Habkost, Xie Changlong, Alistair Francis,
Beniamino Galvani, qemu-arm, Peter Chubb, Cédric Le Goater,
Palmer Dabbelt, David Gibson, Kevin Wolf, open list:RISC-V,
Andrew Jeffery, Wen Congyang, Jean-Christophe Dubois,
open list:New World, Bastian Koppelmann, Paolo Bonzini
On Sun, Apr 12, 2020 at 3:45 PM Philippe Mathieu-Daudé <f4bug@amsat.org> wrote:
>
> Coccinelle failed at processing this file:
>
> $ spatch ... --timeout 60 --sp-file \
> scripts/coccinelle/simplify-init-realize-error_propagate.cocci
> HANDLING: ./hw/arm/xlnx-zynqmp.c
> EXN: Coccinelle_modules.Common.Timeout
>
> We are going to manually add the missing propagate_error() calls.
> As there are many Error* calls used, simplify by using an unique
> call to propagate_error().
I'm not a huge fan of goto's so I'm not sure this is simpler.
Alistair
>
> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
> ---
> hw/arm/xlnx-zynqmp.c | 61 +++++++++++++++++---------------------------
> 1 file changed, 23 insertions(+), 38 deletions(-)
>
> diff --git a/hw/arm/xlnx-zynqmp.c b/hw/arm/xlnx-zynqmp.c
> index b84d153d56..43d57fa7de 100644
> --- a/hw/arm/xlnx-zynqmp.c
> +++ b/hw/arm/xlnx-zynqmp.c
> @@ -385,15 +385,13 @@ static void xlnx_zynqmp_realize(DeviceState *dev, Error **errp)
> object_property_set_bool(OBJECT(&s->apu_cpu[i]), true, "realized",
> &err);
> if (err) {
> - error_propagate(errp, err);
> - return;
> + goto out_propagate_error;
> }
> }
>
> object_property_set_bool(OBJECT(&s->gic), true, "realized", &err);
> if (err) {
> - error_propagate(errp, err);
> - return;
> + goto out_propagate_error;
> }
>
> assert(ARRAY_SIZE(xlnx_zynqmp_gic_regions) == XLNX_ZYNQMP_GIC_REGIONS);
> @@ -462,8 +460,7 @@ static void xlnx_zynqmp_realize(DeviceState *dev, Error **errp)
>
> xlnx_zynqmp_create_rpu(ms, s, boot_cpu, &err);
> if (err) {
> - error_propagate(errp, err);
> - return;
> + goto out_propagate_error;
> }
>
> if (!s->boot_cpu_ptr) {
> @@ -488,8 +485,7 @@ static void xlnx_zynqmp_realize(DeviceState *dev, Error **errp)
> &error_abort);
> object_property_set_bool(OBJECT(&s->gem[i]), true, "realized", &err);
> if (err) {
> - error_propagate(errp, err);
> - return;
> + goto out_propagate_error;
> }
> sysbus_mmio_map(SYS_BUS_DEVICE(&s->gem[i]), 0, gem_addr[i]);
> sysbus_connect_irq(SYS_BUS_DEVICE(&s->gem[i]), 0,
> @@ -500,8 +496,7 @@ static void xlnx_zynqmp_realize(DeviceState *dev, Error **errp)
> qdev_prop_set_chr(DEVICE(&s->uart[i]), "chardev", serial_hd(i));
> object_property_set_bool(OBJECT(&s->uart[i]), true, "realized", &err);
> if (err) {
> - error_propagate(errp, err);
> - return;
> + goto out_propagate_error;
> }
> sysbus_mmio_map(SYS_BUS_DEVICE(&s->uart[i]), 0, uart_addr[i]);
> sysbus_connect_irq(SYS_BUS_DEVICE(&s->uart[i]), 0,
> @@ -512,8 +507,7 @@ static void xlnx_zynqmp_realize(DeviceState *dev, Error **errp)
> &error_abort);
> object_property_set_bool(OBJECT(&s->sata), true, "realized", &err);
> if (err) {
> - error_propagate(errp, err);
> - return;
> + goto out_propagate_error;
> }
>
> sysbus_mmio_map(SYS_BUS_DEVICE(&s->sata), 0, SATA_ADDR);
> @@ -531,23 +525,19 @@ static void xlnx_zynqmp_realize(DeviceState *dev, Error **errp)
> */
> object_property_set_uint(sdhci, 3, "sd-spec-version", &err);
> if (err) {
> - error_propagate(errp, err);
> - return;
> + goto out_propagate_error;
> }
> object_property_set_uint(sdhci, SDHCI_CAPABILITIES, "capareg", &err);
> if (err) {
> - error_propagate(errp, err);
> - return;
> + goto out_propagate_error;
> }
> object_property_set_uint(sdhci, UHS_I, "uhs", &err);
> if (err) {
> - error_propagate(errp, err);
> - return;
> + goto out_propagate_error;
> }
> object_property_set_bool(sdhci, true, "realized", &err);
> if (err) {
> - error_propagate(errp, err);
> - return;
> + goto out_propagate_error;
> }
> sysbus_mmio_map(sbd, 0, sdhci_addr[i]);
> sysbus_connect_irq(sbd, 0, gic_spi[sdhci_intr[i]]);
> @@ -564,8 +554,7 @@ static void xlnx_zynqmp_realize(DeviceState *dev, Error **errp)
>
> object_property_set_bool(OBJECT(&s->spi[i]), true, "realized", &err);
> if (err) {
> - error_propagate(errp, err);
> - return;
> + goto out_propagate_error;
> }
>
> sysbus_mmio_map(SYS_BUS_DEVICE(&s->spi[i]), 0, spi_addr[i]);
> @@ -582,8 +571,7 @@ static void xlnx_zynqmp_realize(DeviceState *dev, Error **errp)
>
> object_property_set_bool(OBJECT(&s->qspi), true, "realized", &err);
> if (err) {
> - error_propagate(errp, err);
> - return;
> + goto out_propagate_error;
> }
> sysbus_mmio_map(SYS_BUS_DEVICE(&s->qspi), 0, QSPI_ADDR);
> sysbus_mmio_map(SYS_BUS_DEVICE(&s->qspi), 1, LQSPI_ADDR);
> @@ -605,16 +593,14 @@ static void xlnx_zynqmp_realize(DeviceState *dev, Error **errp)
>
> object_property_set_bool(OBJECT(&s->dp), true, "realized", &err);
> if (err) {
> - error_propagate(errp, err);
> - return;
> + goto out_propagate_error;
> }
> sysbus_mmio_map(SYS_BUS_DEVICE(&s->dp), 0, DP_ADDR);
> sysbus_connect_irq(SYS_BUS_DEVICE(&s->dp), 0, gic_spi[DP_IRQ]);
>
> object_property_set_bool(OBJECT(&s->dpdma), true, "realized", &err);
> if (err) {
> - error_propagate(errp, err);
> - return;
> + goto out_propagate_error;
> }
> object_property_set_link(OBJECT(&s->dp), OBJECT(&s->dpdma), "dpdma",
> &error_abort);
> @@ -623,16 +609,14 @@ static void xlnx_zynqmp_realize(DeviceState *dev, Error **errp)
>
> object_property_set_bool(OBJECT(&s->ipi), true, "realized", &err);
> if (err) {
> - error_propagate(errp, err);
> - return;
> + goto out_propagate_error;
> }
> sysbus_mmio_map(SYS_BUS_DEVICE(&s->ipi), 0, IPI_ADDR);
> sysbus_connect_irq(SYS_BUS_DEVICE(&s->ipi), 0, gic_spi[IPI_IRQ]);
>
> object_property_set_bool(OBJECT(&s->rtc), true, "realized", &err);
> if (err) {
> - error_propagate(errp, err);
> - return;
> + goto out_propagate_error;
> }
> sysbus_mmio_map(SYS_BUS_DEVICE(&s->rtc), 0, RTC_ADDR);
> sysbus_connect_irq(SYS_BUS_DEVICE(&s->rtc), 0, gic_spi[RTC_IRQ]);
> @@ -640,13 +624,11 @@ static void xlnx_zynqmp_realize(DeviceState *dev, Error **errp)
> for (i = 0; i < XLNX_ZYNQMP_NUM_GDMA_CH; i++) {
> object_property_set_uint(OBJECT(&s->gdma[i]), 128, "bus-width", &err);
> if (err) {
> - error_propagate(errp, err);
> - return;
> + goto out_propagate_error;
> }
> object_property_set_bool(OBJECT(&s->gdma[i]), true, "realized", &err);
> if (err) {
> - error_propagate(errp, err);
> - return;
> + goto out_propagate_error;
> }
>
> sysbus_mmio_map(SYS_BUS_DEVICE(&s->gdma[i]), 0, gdma_ch_addr[i]);
> @@ -657,14 +639,17 @@ static void xlnx_zynqmp_realize(DeviceState *dev, Error **errp)
> for (i = 0; i < XLNX_ZYNQMP_NUM_ADMA_CH; i++) {
> object_property_set_bool(OBJECT(&s->adma[i]), true, "realized", &err);
> if (err) {
> - error_propagate(errp, err);
> - return;
> + goto out_propagate_error;
> }
>
> sysbus_mmio_map(SYS_BUS_DEVICE(&s->adma[i]), 0, adma_ch_addr[i]);
> sysbus_connect_irq(SYS_BUS_DEVICE(&s->adma[i]), 0,
> gic_spi[adma_ch_intr[i]]);
> }
> + return;
> +
> +out_propagate_error:
> + error_propagate(errp, err);
> }
>
> static Property xlnx_zynqmp_props[] = {
> --
> 2.21.1
>
>
^ permalink raw reply [flat|nested] 98+ messages in thread
* [PATCH-for-5.1 v3 15/24] hw/arm/xlnx-zynqmp: Split xlnx_zynqmp_create_rpu() as init + realize
2020-04-12 22:35 ` Philippe Mathieu-Daudé
@ 2020-04-12 22:36 ` Philippe Mathieu-Daudé
-1 siblings, 0 replies; 98+ messages in thread
From: Philippe Mathieu-Daudé @ 2020-04-12 22:36 UTC (permalink / raw)
To: qemu-devel
Cc: Fam Zheng, Peter Maydell, Sagar Karandikar, Michael S. Tsirkin,
Jeff Cody, Jason Wang, Alistair Francis, Edgar E. Iglesias,
Subbaraya Sundeep, qemu-block, Markus Armbruster, Max Reitz,
Joel Stanley, Marc-André Lureau, Richard Henderson,
Philippe Mathieu-Daudé,
Eduardo Habkost, Xie Changlong, Alistair Francis,
Beniamino Galvani, qemu-arm, Peter Chubb, Cédric Le Goater,
Palmer Dabbelt, David Gibson, Kevin Wolf, qemu-riscv,
Andrew Jeffery, Wen Congyang, Philippe Mathieu-Daudé,
Jean-Christophe Dubois, qemu-ppc, Bastian Koppelmann,
Paolo Bonzini
Coccinelle failed at processing this file:
$ spatch ... --timeout 60 --sp-file \
scripts/coccinelle/simplify-init-realize-error_propagate.cocci
HANDLING: ./hw/arm/xlnx-zynqmp.c
EXN: Coccinelle_modules.Common.Timeout
We are going to manually add the missing propagate_error() calls.
Some functions can be called at init() time, reducing the need
to add extra Error checks at realize() time. Split create_rpu()
in init() and realize().
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
hw/arm/xlnx-zynqmp.c | 45 +++++++++++++++++++++++++++-----------------
1 file changed, 28 insertions(+), 17 deletions(-)
diff --git a/hw/arm/xlnx-zynqmp.c b/hw/arm/xlnx-zynqmp.c
index 43d57fa7de..457057198a 100644
--- a/hw/arm/xlnx-zynqmp.c
+++ b/hw/arm/xlnx-zynqmp.c
@@ -173,18 +173,9 @@ static inline int arm_gic_ppi_index(int cpu_nr, int ppi_index)
return GIC_NUM_SPI_INTR + cpu_nr * GIC_INTERNAL + ppi_index;
}
-static void xlnx_zynqmp_create_rpu(MachineState *ms, XlnxZynqMPState *s,
- const char *boot_cpu, Error **errp)
+static void xlnx_zynqmp_rpu_init(XlnxZynqMPState *s, int num_rpus)
{
- Error *err = NULL;
int i;
- int num_rpus = MIN(ms->smp.cpus - XLNX_ZYNQMP_NUM_APU_CPUS,
- XLNX_ZYNQMP_NUM_RPU_CPUS);
-
- if (num_rpus <= 0) {
- /* Don't create rpu-cluster object if there's nothing to put in it */
- return;
- }
object_initialize_child(OBJECT(s), "rpu-cluster", &s->rpu_cluster,
sizeof(s->rpu_cluster), TYPE_CPU_CLUSTER,
@@ -192,13 +183,25 @@ static void xlnx_zynqmp_create_rpu(MachineState *ms, XlnxZynqMPState *s,
qdev_prop_set_uint32(DEVICE(&s->rpu_cluster), "cluster-id", 1);
for (i = 0; i < num_rpus; i++) {
- char *name;
-
object_initialize_child(OBJECT(&s->rpu_cluster), "rpu-cpu[*]",
&s->rpu_cpu[i], sizeof(s->rpu_cpu[i]),
ARM_CPU_TYPE_NAME("cortex-r5f"),
&error_abort, NULL);
+ object_property_set_bool(OBJECT(&s->rpu_cpu[i]), true, "reset-hivecs",
+ &error_abort);
+ }
+}
+
+static void xlnx_zynqmp_rpu_realize(XlnxZynqMPState *s, int num_rpus,
+ const char *boot_cpu, Error **errp)
+{
+ Error *err = NULL;
+ int i;
+
+ for (i = 0; i < num_rpus; i++) {
+ char *name;
+
name = object_get_canonical_path_component(OBJECT(&s->rpu_cpu[i]));
if (strcmp(name, boot_cpu)) {
/* Secondary CPUs start in PSCI powered-down state */
@@ -209,8 +212,6 @@ static void xlnx_zynqmp_create_rpu(MachineState *ms, XlnxZynqMPState *s,
}
g_free(name);
- object_property_set_bool(OBJECT(&s->rpu_cpu[i]), true, "reset-hivecs",
- &error_abort);
object_property_set_bool(OBJECT(&s->rpu_cpu[i]), true, "realized",
&err);
if (err) {
@@ -228,6 +229,8 @@ static void xlnx_zynqmp_init(Object *obj)
XlnxZynqMPState *s = XLNX_ZYNQMP(obj);
int i;
int num_apus = MIN(ms->smp.cpus, XLNX_ZYNQMP_NUM_APU_CPUS);
+ int num_rpus = MIN(ms->smp.cpus - XLNX_ZYNQMP_NUM_APU_CPUS,
+ XLNX_ZYNQMP_NUM_RPU_CPUS);
object_initialize_child(obj, "apu-cluster", &s->apu_cluster,
sizeof(s->apu_cluster), TYPE_CPU_CLUSTER,
@@ -290,6 +293,10 @@ static void xlnx_zynqmp_init(Object *obj)
sysbus_init_child_obj(obj, "adma[*]", &s->adma[i], sizeof(s->adma[i]),
TYPE_XLNX_ZDMA);
}
+
+ if (num_rpus > 0) {
+ xlnx_zynqmp_rpu_init(s, num_rpus);
+ }
}
static void xlnx_zynqmp_realize(DeviceState *dev, Error **errp)
@@ -300,6 +307,8 @@ static void xlnx_zynqmp_realize(DeviceState *dev, Error **errp)
uint8_t i;
uint64_t ram_size;
int num_apus = MIN(ms->smp.cpus, XLNX_ZYNQMP_NUM_APU_CPUS);
+ int num_rpus = MIN(ms->smp.cpus - XLNX_ZYNQMP_NUM_APU_CPUS,
+ XLNX_ZYNQMP_NUM_RPU_CPUS);
const char *boot_cpu = s->boot_cpu ? s->boot_cpu : "apu-cpu[0]";
ram_addr_t ddr_low_size, ddr_high_size;
qemu_irq gic_spi[GIC_NUM_SPI_INTR];
@@ -458,9 +467,11 @@ static void xlnx_zynqmp_realize(DeviceState *dev, Error **errp)
"RPUs just use -smp 6.");
}
- xlnx_zynqmp_create_rpu(ms, s, boot_cpu, &err);
- if (err) {
- goto out_propagate_error;
+ if (num_rpus > 0) {
+ xlnx_zynqmp_rpu_realize(s, num_rpus, boot_cpu, &err);
+ if (err) {
+ goto out_propagate_error;
+ }
}
if (!s->boot_cpu_ptr) {
--
2.21.1
^ permalink raw reply related [flat|nested] 98+ messages in thread* [PATCH-for-5.1 v3 15/24] hw/arm/xlnx-zynqmp: Split xlnx_zynqmp_create_rpu() as init + realize
@ 2020-04-12 22:36 ` Philippe Mathieu-Daudé
0 siblings, 0 replies; 98+ messages in thread
From: Philippe Mathieu-Daudé @ 2020-04-12 22:36 UTC (permalink / raw)
To: qemu-devel
Cc: Joel Stanley, Jean-Christophe Dubois, Subbaraya Sundeep,
Max Reitz, Palmer Dabbelt, qemu-ppc, Sagar Karandikar,
Markus Armbruster, Jeff Cody, Peter Maydell, Xie Changlong,
Fam Zheng, Eduardo Habkost, Alistair Francis, qemu-arm,
Wen Congyang, Philippe Mathieu-Daudé,
Bastian Koppelmann, Edgar E. Iglesias, Kevin Wolf,
Marc-André Lureau, David Gibson, Jason Wang, Peter Chubb,
Beniamino Galvani, Alistair Francis, qemu-riscv,
Cédric Le Goater, qemu-block, Paolo Bonzini, Andrew Jeffery,
Michael S. Tsirkin, Richard Henderson,
Philippe Mathieu-Daudé
Coccinelle failed at processing this file:
$ spatch ... --timeout 60 --sp-file \
scripts/coccinelle/simplify-init-realize-error_propagate.cocci
HANDLING: ./hw/arm/xlnx-zynqmp.c
EXN: Coccinelle_modules.Common.Timeout
We are going to manually add the missing propagate_error() calls.
Some functions can be called at init() time, reducing the need
to add extra Error checks at realize() time. Split create_rpu()
in init() and realize().
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
hw/arm/xlnx-zynqmp.c | 45 +++++++++++++++++++++++++++-----------------
1 file changed, 28 insertions(+), 17 deletions(-)
diff --git a/hw/arm/xlnx-zynqmp.c b/hw/arm/xlnx-zynqmp.c
index 43d57fa7de..457057198a 100644
--- a/hw/arm/xlnx-zynqmp.c
+++ b/hw/arm/xlnx-zynqmp.c
@@ -173,18 +173,9 @@ static inline int arm_gic_ppi_index(int cpu_nr, int ppi_index)
return GIC_NUM_SPI_INTR + cpu_nr * GIC_INTERNAL + ppi_index;
}
-static void xlnx_zynqmp_create_rpu(MachineState *ms, XlnxZynqMPState *s,
- const char *boot_cpu, Error **errp)
+static void xlnx_zynqmp_rpu_init(XlnxZynqMPState *s, int num_rpus)
{
- Error *err = NULL;
int i;
- int num_rpus = MIN(ms->smp.cpus - XLNX_ZYNQMP_NUM_APU_CPUS,
- XLNX_ZYNQMP_NUM_RPU_CPUS);
-
- if (num_rpus <= 0) {
- /* Don't create rpu-cluster object if there's nothing to put in it */
- return;
- }
object_initialize_child(OBJECT(s), "rpu-cluster", &s->rpu_cluster,
sizeof(s->rpu_cluster), TYPE_CPU_CLUSTER,
@@ -192,13 +183,25 @@ static void xlnx_zynqmp_create_rpu(MachineState *ms, XlnxZynqMPState *s,
qdev_prop_set_uint32(DEVICE(&s->rpu_cluster), "cluster-id", 1);
for (i = 0; i < num_rpus; i++) {
- char *name;
-
object_initialize_child(OBJECT(&s->rpu_cluster), "rpu-cpu[*]",
&s->rpu_cpu[i], sizeof(s->rpu_cpu[i]),
ARM_CPU_TYPE_NAME("cortex-r5f"),
&error_abort, NULL);
+ object_property_set_bool(OBJECT(&s->rpu_cpu[i]), true, "reset-hivecs",
+ &error_abort);
+ }
+}
+
+static void xlnx_zynqmp_rpu_realize(XlnxZynqMPState *s, int num_rpus,
+ const char *boot_cpu, Error **errp)
+{
+ Error *err = NULL;
+ int i;
+
+ for (i = 0; i < num_rpus; i++) {
+ char *name;
+
name = object_get_canonical_path_component(OBJECT(&s->rpu_cpu[i]));
if (strcmp(name, boot_cpu)) {
/* Secondary CPUs start in PSCI powered-down state */
@@ -209,8 +212,6 @@ static void xlnx_zynqmp_create_rpu(MachineState *ms, XlnxZynqMPState *s,
}
g_free(name);
- object_property_set_bool(OBJECT(&s->rpu_cpu[i]), true, "reset-hivecs",
- &error_abort);
object_property_set_bool(OBJECT(&s->rpu_cpu[i]), true, "realized",
&err);
if (err) {
@@ -228,6 +229,8 @@ static void xlnx_zynqmp_init(Object *obj)
XlnxZynqMPState *s = XLNX_ZYNQMP(obj);
int i;
int num_apus = MIN(ms->smp.cpus, XLNX_ZYNQMP_NUM_APU_CPUS);
+ int num_rpus = MIN(ms->smp.cpus - XLNX_ZYNQMP_NUM_APU_CPUS,
+ XLNX_ZYNQMP_NUM_RPU_CPUS);
object_initialize_child(obj, "apu-cluster", &s->apu_cluster,
sizeof(s->apu_cluster), TYPE_CPU_CLUSTER,
@@ -290,6 +293,10 @@ static void xlnx_zynqmp_init(Object *obj)
sysbus_init_child_obj(obj, "adma[*]", &s->adma[i], sizeof(s->adma[i]),
TYPE_XLNX_ZDMA);
}
+
+ if (num_rpus > 0) {
+ xlnx_zynqmp_rpu_init(s, num_rpus);
+ }
}
static void xlnx_zynqmp_realize(DeviceState *dev, Error **errp)
@@ -300,6 +307,8 @@ static void xlnx_zynqmp_realize(DeviceState *dev, Error **errp)
uint8_t i;
uint64_t ram_size;
int num_apus = MIN(ms->smp.cpus, XLNX_ZYNQMP_NUM_APU_CPUS);
+ int num_rpus = MIN(ms->smp.cpus - XLNX_ZYNQMP_NUM_APU_CPUS,
+ XLNX_ZYNQMP_NUM_RPU_CPUS);
const char *boot_cpu = s->boot_cpu ? s->boot_cpu : "apu-cpu[0]";
ram_addr_t ddr_low_size, ddr_high_size;
qemu_irq gic_spi[GIC_NUM_SPI_INTR];
@@ -458,9 +467,11 @@ static void xlnx_zynqmp_realize(DeviceState *dev, Error **errp)
"RPUs just use -smp 6.");
}
- xlnx_zynqmp_create_rpu(ms, s, boot_cpu, &err);
- if (err) {
- goto out_propagate_error;
+ if (num_rpus > 0) {
+ xlnx_zynqmp_rpu_realize(s, num_rpus, boot_cpu, &err);
+ if (err) {
+ goto out_propagate_error;
+ }
}
if (!s->boot_cpu_ptr) {
--
2.21.1
^ permalink raw reply related [flat|nested] 98+ messages in thread
* [PATCH-for-5.1 v3 16/24] hw/arm/xlnx-zynqmp: Move some code from realize() to init()
2020-04-12 22:35 ` Philippe Mathieu-Daudé
@ 2020-04-12 22:36 ` Philippe Mathieu-Daudé
-1 siblings, 0 replies; 98+ messages in thread
From: Philippe Mathieu-Daudé @ 2020-04-12 22:36 UTC (permalink / raw)
To: qemu-devel
Cc: Fam Zheng, Peter Maydell, Sagar Karandikar, Michael S. Tsirkin,
Jeff Cody, Jason Wang, Alistair Francis, Edgar E. Iglesias,
Subbaraya Sundeep, qemu-block, Markus Armbruster, Max Reitz,
Joel Stanley, Marc-André Lureau, Richard Henderson,
Philippe Mathieu-Daudé,
Eduardo Habkost, Xie Changlong, Alistair Francis,
Beniamino Galvani, qemu-arm, Peter Chubb, Cédric Le Goater,
Palmer Dabbelt, David Gibson, Kevin Wolf, qemu-riscv,
Andrew Jeffery, Wen Congyang, Philippe Mathieu-Daudé,
Jean-Christophe Dubois, qemu-ppc, Bastian Koppelmann,
Paolo Bonzini
Coccinelle failed at processing this file:
$ spatch ... --timeout 60 --sp-file \
scripts/coccinelle/simplify-init-realize-error_propagate.cocci
HANDLING: ./hw/arm/xlnx-zynqmp.c
EXN: Coccinelle_modules.Common.Timeout
Move the calls using &error_abort which don't depend on input
updated before realize() to init().
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
v3: Typo 'depend of' -> 'depend on' (eblake)
---
hw/arm/xlnx-zynqmp.c | 22 +++++++++++-----------
1 file changed, 11 insertions(+), 11 deletions(-)
diff --git a/hw/arm/xlnx-zynqmp.c b/hw/arm/xlnx-zynqmp.c
index 457057198a..5ec9c24ee7 100644
--- a/hw/arm/xlnx-zynqmp.c
+++ b/hw/arm/xlnx-zynqmp.c
@@ -242,6 +242,11 @@ static void xlnx_zynqmp_init(Object *obj)
&s->apu_cpu[i], sizeof(s->apu_cpu[i]),
ARM_CPU_TYPE_NAME("cortex-a53"),
&error_abort, NULL);
+
+ object_property_set_int(OBJECT(&s->apu_cpu[i]), QEMU_PSCI_CONDUIT_SMC,
+ "psci-conduit", &error_abort);
+ object_property_set_int(OBJECT(&s->apu_cpu[i]), GIC_BASE_ADDR,
+ "reset-cbar", &error_abort);
}
sysbus_init_child_obj(obj, "gic", &s->gic, sizeof(s->gic),
@@ -250,6 +255,10 @@ static void xlnx_zynqmp_init(Object *obj)
for (i = 0; i < XLNX_ZYNQMP_NUM_GEMS; i++) {
sysbus_init_child_obj(obj, "gem[*]", &s->gem[i], sizeof(s->gem[i]),
TYPE_CADENCE_GEM);
+ object_property_set_int(OBJECT(&s->gem[i]), GEM_REVISION, "revision",
+ &error_abort);
+ object_property_set_int(OBJECT(&s->gem[i]), 2, "num-priority-queues",
+ &error_abort);
}
for (i = 0; i < XLNX_ZYNQMP_NUM_UARTS; i++) {
@@ -259,6 +268,8 @@ static void xlnx_zynqmp_init(Object *obj)
sysbus_init_child_obj(obj, "sata", &s->sata, sizeof(s->sata),
TYPE_SYSBUS_AHCI);
+ object_property_set_int(OBJECT(&s->sata), SATA_NUM_PORTS, "num-ports",
+ &error_abort);
for (i = 0; i < XLNX_ZYNQMP_NUM_SDHCI; i++) {
sysbus_init_child_obj(obj, "sdhci[*]", &s->sdhci[i],
@@ -370,9 +381,6 @@ static void xlnx_zynqmp_realize(DeviceState *dev, Error **errp)
for (i = 0; i < num_apus; i++) {
char *name;
- object_property_set_int(OBJECT(&s->apu_cpu[i]), QEMU_PSCI_CONDUIT_SMC,
- "psci-conduit", &error_abort);
-
name = object_get_canonical_path_component(OBJECT(&s->apu_cpu[i]));
if (strcmp(name, boot_cpu)) {
/* Secondary CPUs start in PSCI powered-down state */
@@ -387,8 +395,6 @@ static void xlnx_zynqmp_realize(DeviceState *dev, Error **errp)
s->secure, "has_el3", NULL);
object_property_set_bool(OBJECT(&s->apu_cpu[i]),
s->virt, "has_el2", NULL);
- object_property_set_int(OBJECT(&s->apu_cpu[i]), GIC_BASE_ADDR,
- "reset-cbar", &error_abort);
object_property_set_int(OBJECT(&s->apu_cpu[i]), num_apus,
"core-count", &error_abort);
object_property_set_bool(OBJECT(&s->apu_cpu[i]), true, "realized",
@@ -490,10 +496,6 @@ static void xlnx_zynqmp_realize(DeviceState *dev, Error **errp)
qemu_check_nic_model(nd, TYPE_CADENCE_GEM);
qdev_set_nic_properties(DEVICE(&s->gem[i]), nd);
}
- object_property_set_int(OBJECT(&s->gem[i]), GEM_REVISION, "revision",
- &error_abort);
- object_property_set_int(OBJECT(&s->gem[i]), 2, "num-priority-queues",
- &error_abort);
object_property_set_bool(OBJECT(&s->gem[i]), true, "realized", &err);
if (err) {
goto out_propagate_error;
@@ -514,8 +516,6 @@ static void xlnx_zynqmp_realize(DeviceState *dev, Error **errp)
gic_spi[uart_intr[i]]);
}
- object_property_set_int(OBJECT(&s->sata), SATA_NUM_PORTS, "num-ports",
- &error_abort);
object_property_set_bool(OBJECT(&s->sata), true, "realized", &err);
if (err) {
goto out_propagate_error;
--
2.21.1
^ permalink raw reply related [flat|nested] 98+ messages in thread* [PATCH-for-5.1 v3 16/24] hw/arm/xlnx-zynqmp: Move some code from realize() to init()
@ 2020-04-12 22:36 ` Philippe Mathieu-Daudé
0 siblings, 0 replies; 98+ messages in thread
From: Philippe Mathieu-Daudé @ 2020-04-12 22:36 UTC (permalink / raw)
To: qemu-devel
Cc: Joel Stanley, Jean-Christophe Dubois, Subbaraya Sundeep,
Max Reitz, Palmer Dabbelt, qemu-ppc, Sagar Karandikar,
Markus Armbruster, Jeff Cody, Peter Maydell, Xie Changlong,
Fam Zheng, Eduardo Habkost, Alistair Francis, qemu-arm,
Wen Congyang, Philippe Mathieu-Daudé,
Bastian Koppelmann, Edgar E. Iglesias, Kevin Wolf,
Marc-André Lureau, David Gibson, Jason Wang, Peter Chubb,
Beniamino Galvani, Alistair Francis, qemu-riscv,
Cédric Le Goater, qemu-block, Paolo Bonzini, Andrew Jeffery,
Michael S. Tsirkin, Richard Henderson,
Philippe Mathieu-Daudé
Coccinelle failed at processing this file:
$ spatch ... --timeout 60 --sp-file \
scripts/coccinelle/simplify-init-realize-error_propagate.cocci
HANDLING: ./hw/arm/xlnx-zynqmp.c
EXN: Coccinelle_modules.Common.Timeout
Move the calls using &error_abort which don't depend on input
updated before realize() to init().
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
v3: Typo 'depend of' -> 'depend on' (eblake)
---
hw/arm/xlnx-zynqmp.c | 22 +++++++++++-----------
1 file changed, 11 insertions(+), 11 deletions(-)
diff --git a/hw/arm/xlnx-zynqmp.c b/hw/arm/xlnx-zynqmp.c
index 457057198a..5ec9c24ee7 100644
--- a/hw/arm/xlnx-zynqmp.c
+++ b/hw/arm/xlnx-zynqmp.c
@@ -242,6 +242,11 @@ static void xlnx_zynqmp_init(Object *obj)
&s->apu_cpu[i], sizeof(s->apu_cpu[i]),
ARM_CPU_TYPE_NAME("cortex-a53"),
&error_abort, NULL);
+
+ object_property_set_int(OBJECT(&s->apu_cpu[i]), QEMU_PSCI_CONDUIT_SMC,
+ "psci-conduit", &error_abort);
+ object_property_set_int(OBJECT(&s->apu_cpu[i]), GIC_BASE_ADDR,
+ "reset-cbar", &error_abort);
}
sysbus_init_child_obj(obj, "gic", &s->gic, sizeof(s->gic),
@@ -250,6 +255,10 @@ static void xlnx_zynqmp_init(Object *obj)
for (i = 0; i < XLNX_ZYNQMP_NUM_GEMS; i++) {
sysbus_init_child_obj(obj, "gem[*]", &s->gem[i], sizeof(s->gem[i]),
TYPE_CADENCE_GEM);
+ object_property_set_int(OBJECT(&s->gem[i]), GEM_REVISION, "revision",
+ &error_abort);
+ object_property_set_int(OBJECT(&s->gem[i]), 2, "num-priority-queues",
+ &error_abort);
}
for (i = 0; i < XLNX_ZYNQMP_NUM_UARTS; i++) {
@@ -259,6 +268,8 @@ static void xlnx_zynqmp_init(Object *obj)
sysbus_init_child_obj(obj, "sata", &s->sata, sizeof(s->sata),
TYPE_SYSBUS_AHCI);
+ object_property_set_int(OBJECT(&s->sata), SATA_NUM_PORTS, "num-ports",
+ &error_abort);
for (i = 0; i < XLNX_ZYNQMP_NUM_SDHCI; i++) {
sysbus_init_child_obj(obj, "sdhci[*]", &s->sdhci[i],
@@ -370,9 +381,6 @@ static void xlnx_zynqmp_realize(DeviceState *dev, Error **errp)
for (i = 0; i < num_apus; i++) {
char *name;
- object_property_set_int(OBJECT(&s->apu_cpu[i]), QEMU_PSCI_CONDUIT_SMC,
- "psci-conduit", &error_abort);
-
name = object_get_canonical_path_component(OBJECT(&s->apu_cpu[i]));
if (strcmp(name, boot_cpu)) {
/* Secondary CPUs start in PSCI powered-down state */
@@ -387,8 +395,6 @@ static void xlnx_zynqmp_realize(DeviceState *dev, Error **errp)
s->secure, "has_el3", NULL);
object_property_set_bool(OBJECT(&s->apu_cpu[i]),
s->virt, "has_el2", NULL);
- object_property_set_int(OBJECT(&s->apu_cpu[i]), GIC_BASE_ADDR,
- "reset-cbar", &error_abort);
object_property_set_int(OBJECT(&s->apu_cpu[i]), num_apus,
"core-count", &error_abort);
object_property_set_bool(OBJECT(&s->apu_cpu[i]), true, "realized",
@@ -490,10 +496,6 @@ static void xlnx_zynqmp_realize(DeviceState *dev, Error **errp)
qemu_check_nic_model(nd, TYPE_CADENCE_GEM);
qdev_set_nic_properties(DEVICE(&s->gem[i]), nd);
}
- object_property_set_int(OBJECT(&s->gem[i]), GEM_REVISION, "revision",
- &error_abort);
- object_property_set_int(OBJECT(&s->gem[i]), 2, "num-priority-queues",
- &error_abort);
object_property_set_bool(OBJECT(&s->gem[i]), true, "realized", &err);
if (err) {
goto out_propagate_error;
@@ -514,8 +516,6 @@ static void xlnx_zynqmp_realize(DeviceState *dev, Error **errp)
gic_spi[uart_intr[i]]);
}
- object_property_set_int(OBJECT(&s->sata), SATA_NUM_PORTS, "num-ports",
- &error_abort);
object_property_set_bool(OBJECT(&s->sata), true, "realized", &err);
if (err) {
goto out_propagate_error;
--
2.21.1
^ permalink raw reply related [flat|nested] 98+ messages in thread* Re: [PATCH-for-5.1 v3 16/24] hw/arm/xlnx-zynqmp: Move some code from realize() to init()
2020-04-12 22:36 ` Philippe Mathieu-Daudé
@ 2020-04-13 22:06 ` Alistair Francis
-1 siblings, 0 replies; 98+ messages in thread
From: Alistair Francis @ 2020-04-13 22:06 UTC (permalink / raw)
To: Philippe Mathieu-Daudé
Cc: Fam Zheng, Peter Maydell, Sagar Karandikar, Michael S. Tsirkin,
Jeff Cody, Jason Wang, qemu-devel@nongnu.org Developers,
Alistair Francis, Edgar E. Iglesias, Max Reitz, Qemu-block,
Markus Armbruster, Joel Stanley, Marc-André Lureau,
David Gibson, Philippe Mathieu-Daudé,
Eduardo Habkost, Jean-Christophe Dubois, Xie Changlong,
Alistair Francis, Beniamino Galvani, qemu-arm, Peter Chubb,
Cédric Le Goater, open list:New World, Richard Henderson,
Kevin Wolf, open list:RISC-V, Andrew Jeffery, Wen Congyang,
Subbaraya Sundeep, Palmer Dabbelt, Bastian Koppelmann,
Paolo Bonzini
On Sun, Apr 12, 2020 at 3:41 PM Philippe Mathieu-Daudé <f4bug@amsat.org> wrote:
>
> Coccinelle failed at processing this file:
>
> $ spatch ... --timeout 60 --sp-file \
> scripts/coccinelle/simplify-init-realize-error_propagate.cocci
> HANDLING: ./hw/arm/xlnx-zynqmp.c
> EXN: Coccinelle_modules.Common.Timeout
>
> Move the calls using &error_abort which don't depend on input
> updated before realize() to init().
>
> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Alistair
> ---
> v3: Typo 'depend of' -> 'depend on' (eblake)
> ---
> hw/arm/xlnx-zynqmp.c | 22 +++++++++++-----------
> 1 file changed, 11 insertions(+), 11 deletions(-)
>
> diff --git a/hw/arm/xlnx-zynqmp.c b/hw/arm/xlnx-zynqmp.c
> index 457057198a..5ec9c24ee7 100644
> --- a/hw/arm/xlnx-zynqmp.c
> +++ b/hw/arm/xlnx-zynqmp.c
> @@ -242,6 +242,11 @@ static void xlnx_zynqmp_init(Object *obj)
> &s->apu_cpu[i], sizeof(s->apu_cpu[i]),
> ARM_CPU_TYPE_NAME("cortex-a53"),
> &error_abort, NULL);
> +
> + object_property_set_int(OBJECT(&s->apu_cpu[i]), QEMU_PSCI_CONDUIT_SMC,
> + "psci-conduit", &error_abort);
> + object_property_set_int(OBJECT(&s->apu_cpu[i]), GIC_BASE_ADDR,
> + "reset-cbar", &error_abort);
> }
>
> sysbus_init_child_obj(obj, "gic", &s->gic, sizeof(s->gic),
> @@ -250,6 +255,10 @@ static void xlnx_zynqmp_init(Object *obj)
> for (i = 0; i < XLNX_ZYNQMP_NUM_GEMS; i++) {
> sysbus_init_child_obj(obj, "gem[*]", &s->gem[i], sizeof(s->gem[i]),
> TYPE_CADENCE_GEM);
> + object_property_set_int(OBJECT(&s->gem[i]), GEM_REVISION, "revision",
> + &error_abort);
> + object_property_set_int(OBJECT(&s->gem[i]), 2, "num-priority-queues",
> + &error_abort);
> }
>
> for (i = 0; i < XLNX_ZYNQMP_NUM_UARTS; i++) {
> @@ -259,6 +268,8 @@ static void xlnx_zynqmp_init(Object *obj)
>
> sysbus_init_child_obj(obj, "sata", &s->sata, sizeof(s->sata),
> TYPE_SYSBUS_AHCI);
> + object_property_set_int(OBJECT(&s->sata), SATA_NUM_PORTS, "num-ports",
> + &error_abort);
>
> for (i = 0; i < XLNX_ZYNQMP_NUM_SDHCI; i++) {
> sysbus_init_child_obj(obj, "sdhci[*]", &s->sdhci[i],
> @@ -370,9 +381,6 @@ static void xlnx_zynqmp_realize(DeviceState *dev, Error **errp)
> for (i = 0; i < num_apus; i++) {
> char *name;
>
> - object_property_set_int(OBJECT(&s->apu_cpu[i]), QEMU_PSCI_CONDUIT_SMC,
> - "psci-conduit", &error_abort);
> -
> name = object_get_canonical_path_component(OBJECT(&s->apu_cpu[i]));
> if (strcmp(name, boot_cpu)) {
> /* Secondary CPUs start in PSCI powered-down state */
> @@ -387,8 +395,6 @@ static void xlnx_zynqmp_realize(DeviceState *dev, Error **errp)
> s->secure, "has_el3", NULL);
> object_property_set_bool(OBJECT(&s->apu_cpu[i]),
> s->virt, "has_el2", NULL);
> - object_property_set_int(OBJECT(&s->apu_cpu[i]), GIC_BASE_ADDR,
> - "reset-cbar", &error_abort);
> object_property_set_int(OBJECT(&s->apu_cpu[i]), num_apus,
> "core-count", &error_abort);
> object_property_set_bool(OBJECT(&s->apu_cpu[i]), true, "realized",
> @@ -490,10 +496,6 @@ static void xlnx_zynqmp_realize(DeviceState *dev, Error **errp)
> qemu_check_nic_model(nd, TYPE_CADENCE_GEM);
> qdev_set_nic_properties(DEVICE(&s->gem[i]), nd);
> }
> - object_property_set_int(OBJECT(&s->gem[i]), GEM_REVISION, "revision",
> - &error_abort);
> - object_property_set_int(OBJECT(&s->gem[i]), 2, "num-priority-queues",
> - &error_abort);
> object_property_set_bool(OBJECT(&s->gem[i]), true, "realized", &err);
> if (err) {
> goto out_propagate_error;
> @@ -514,8 +516,6 @@ static void xlnx_zynqmp_realize(DeviceState *dev, Error **errp)
> gic_spi[uart_intr[i]]);
> }
>
> - object_property_set_int(OBJECT(&s->sata), SATA_NUM_PORTS, "num-ports",
> - &error_abort);
> object_property_set_bool(OBJECT(&s->sata), true, "realized", &err);
> if (err) {
> goto out_propagate_error;
> --
> 2.21.1
>
>
^ permalink raw reply [flat|nested] 98+ messages in thread* Re: [PATCH-for-5.1 v3 16/24] hw/arm/xlnx-zynqmp: Move some code from realize() to init()
@ 2020-04-13 22:06 ` Alistair Francis
0 siblings, 0 replies; 98+ messages in thread
From: Alistair Francis @ 2020-04-13 22:06 UTC (permalink / raw)
To: Philippe Mathieu-Daudé
Cc: qemu-devel@nongnu.org Developers, Fam Zheng, Peter Maydell,
Sagar Karandikar, Michael S. Tsirkin, Jeff Cody, Jason Wang,
Alistair Francis, Edgar E. Iglesias, Subbaraya Sundeep,
Qemu-block, Markus Armbruster, Max Reitz, Joel Stanley,
Marc-André Lureau, Richard Henderson,
Philippe Mathieu-Daudé,
Eduardo Habkost, Xie Changlong, Alistair Francis,
Beniamino Galvani, qemu-arm, Peter Chubb, Cédric Le Goater,
Palmer Dabbelt, David Gibson, Kevin Wolf, open list:RISC-V,
Andrew Jeffery, Wen Congyang, Jean-Christophe Dubois,
open list:New World, Bastian Koppelmann, Paolo Bonzini
On Sun, Apr 12, 2020 at 3:41 PM Philippe Mathieu-Daudé <f4bug@amsat.org> wrote:
>
> Coccinelle failed at processing this file:
>
> $ spatch ... --timeout 60 --sp-file \
> scripts/coccinelle/simplify-init-realize-error_propagate.cocci
> HANDLING: ./hw/arm/xlnx-zynqmp.c
> EXN: Coccinelle_modules.Common.Timeout
>
> Move the calls using &error_abort which don't depend on input
> updated before realize() to init().
>
> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Alistair
> ---
> v3: Typo 'depend of' -> 'depend on' (eblake)
> ---
> hw/arm/xlnx-zynqmp.c | 22 +++++++++++-----------
> 1 file changed, 11 insertions(+), 11 deletions(-)
>
> diff --git a/hw/arm/xlnx-zynqmp.c b/hw/arm/xlnx-zynqmp.c
> index 457057198a..5ec9c24ee7 100644
> --- a/hw/arm/xlnx-zynqmp.c
> +++ b/hw/arm/xlnx-zynqmp.c
> @@ -242,6 +242,11 @@ static void xlnx_zynqmp_init(Object *obj)
> &s->apu_cpu[i], sizeof(s->apu_cpu[i]),
> ARM_CPU_TYPE_NAME("cortex-a53"),
> &error_abort, NULL);
> +
> + object_property_set_int(OBJECT(&s->apu_cpu[i]), QEMU_PSCI_CONDUIT_SMC,
> + "psci-conduit", &error_abort);
> + object_property_set_int(OBJECT(&s->apu_cpu[i]), GIC_BASE_ADDR,
> + "reset-cbar", &error_abort);
> }
>
> sysbus_init_child_obj(obj, "gic", &s->gic, sizeof(s->gic),
> @@ -250,6 +255,10 @@ static void xlnx_zynqmp_init(Object *obj)
> for (i = 0; i < XLNX_ZYNQMP_NUM_GEMS; i++) {
> sysbus_init_child_obj(obj, "gem[*]", &s->gem[i], sizeof(s->gem[i]),
> TYPE_CADENCE_GEM);
> + object_property_set_int(OBJECT(&s->gem[i]), GEM_REVISION, "revision",
> + &error_abort);
> + object_property_set_int(OBJECT(&s->gem[i]), 2, "num-priority-queues",
> + &error_abort);
> }
>
> for (i = 0; i < XLNX_ZYNQMP_NUM_UARTS; i++) {
> @@ -259,6 +268,8 @@ static void xlnx_zynqmp_init(Object *obj)
>
> sysbus_init_child_obj(obj, "sata", &s->sata, sizeof(s->sata),
> TYPE_SYSBUS_AHCI);
> + object_property_set_int(OBJECT(&s->sata), SATA_NUM_PORTS, "num-ports",
> + &error_abort);
>
> for (i = 0; i < XLNX_ZYNQMP_NUM_SDHCI; i++) {
> sysbus_init_child_obj(obj, "sdhci[*]", &s->sdhci[i],
> @@ -370,9 +381,6 @@ static void xlnx_zynqmp_realize(DeviceState *dev, Error **errp)
> for (i = 0; i < num_apus; i++) {
> char *name;
>
> - object_property_set_int(OBJECT(&s->apu_cpu[i]), QEMU_PSCI_CONDUIT_SMC,
> - "psci-conduit", &error_abort);
> -
> name = object_get_canonical_path_component(OBJECT(&s->apu_cpu[i]));
> if (strcmp(name, boot_cpu)) {
> /* Secondary CPUs start in PSCI powered-down state */
> @@ -387,8 +395,6 @@ static void xlnx_zynqmp_realize(DeviceState *dev, Error **errp)
> s->secure, "has_el3", NULL);
> object_property_set_bool(OBJECT(&s->apu_cpu[i]),
> s->virt, "has_el2", NULL);
> - object_property_set_int(OBJECT(&s->apu_cpu[i]), GIC_BASE_ADDR,
> - "reset-cbar", &error_abort);
> object_property_set_int(OBJECT(&s->apu_cpu[i]), num_apus,
> "core-count", &error_abort);
> object_property_set_bool(OBJECT(&s->apu_cpu[i]), true, "realized",
> @@ -490,10 +496,6 @@ static void xlnx_zynqmp_realize(DeviceState *dev, Error **errp)
> qemu_check_nic_model(nd, TYPE_CADENCE_GEM);
> qdev_set_nic_properties(DEVICE(&s->gem[i]), nd);
> }
> - object_property_set_int(OBJECT(&s->gem[i]), GEM_REVISION, "revision",
> - &error_abort);
> - object_property_set_int(OBJECT(&s->gem[i]), 2, "num-priority-queues",
> - &error_abort);
> object_property_set_bool(OBJECT(&s->gem[i]), true, "realized", &err);
> if (err) {
> goto out_propagate_error;
> @@ -514,8 +516,6 @@ static void xlnx_zynqmp_realize(DeviceState *dev, Error **errp)
> gic_spi[uart_intr[i]]);
> }
>
> - object_property_set_int(OBJECT(&s->sata), SATA_NUM_PORTS, "num-ports",
> - &error_abort);
> object_property_set_bool(OBJECT(&s->sata), true, "realized", &err);
> if (err) {
> goto out_propagate_error;
> --
> 2.21.1
>
>
^ permalink raw reply [flat|nested] 98+ messages in thread
* [PATCH-for-5.1 v3 17/24] hw/microblaze/xlnx-zynqmp-pmu: Move some code from realize() to init()
2020-04-12 22:35 ` Philippe Mathieu-Daudé
@ 2020-04-12 22:36 ` Philippe Mathieu-Daudé
-1 siblings, 0 replies; 98+ messages in thread
From: Philippe Mathieu-Daudé @ 2020-04-12 22:36 UTC (permalink / raw)
To: qemu-devel
Cc: Fam Zheng, Peter Maydell, Sagar Karandikar, Michael S. Tsirkin,
Jeff Cody, Jason Wang, Alistair Francis, Edgar E. Iglesias,
Subbaraya Sundeep, qemu-block, Markus Armbruster, Max Reitz,
Joel Stanley, Marc-André Lureau, Richard Henderson,
Philippe Mathieu-Daudé,
Eduardo Habkost, Xie Changlong, Alistair Francis,
Beniamino Galvani, qemu-arm, Peter Chubb, Cédric Le Goater,
Palmer Dabbelt, David Gibson, Kevin Wolf, qemu-riscv,
Andrew Jeffery, Wen Congyang, Philippe Mathieu-Daudé,
Jean-Christophe Dubois, qemu-ppc, Bastian Koppelmann,
Paolo Bonzini
Coccinelle reported:
$ spatch ... --timeout 60 --sp-file \
scripts/coccinelle/simplify-init-realize-error_propagate.cocci
HANDLING: ./hw/microblaze/xlnx-zynqmp-pmu.c
>>> possible moves from xlnx_zynqmp_pmu_soc_init() to xlnx_zynqmp_pmu_soc_realize() in ./hw/microblaze/xlnx-zynqmp-pmu.c:79
Move the calls using &error_abort which don't depend on input
updated before realize() to init().
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
v3: Typo 'depend of' -> 'depend on' (eblake)
---
hw/microblaze/xlnx-zynqmp-pmu.c | 46 ++++++++++++++++-----------------
1 file changed, 23 insertions(+), 23 deletions(-)
diff --git a/hw/microblaze/xlnx-zynqmp-pmu.c b/hw/microblaze/xlnx-zynqmp-pmu.c
index 028f31894d..2aa602cf85 100644
--- a/hw/microblaze/xlnx-zynqmp-pmu.c
+++ b/hw/microblaze/xlnx-zynqmp-pmu.c
@@ -63,24 +63,6 @@ static void xlnx_zynqmp_pmu_soc_init(Object *obj)
object_initialize_child(obj, "pmu-cpu", &s->cpu, sizeof(s->cpu),
TYPE_MICROBLAZE_CPU, &error_abort, NULL);
-
- sysbus_init_child_obj(obj, "intc", &s->intc, sizeof(s->intc),
- TYPE_XLNX_PMU_IO_INTC);
-
- /* Create the IPI device */
- for (int i = 0; i < XLNX_ZYNQMP_PMU_NUM_IPIS; i++) {
- char *name = g_strdup_printf("ipi%d", i);
- sysbus_init_child_obj(obj, name, &s->ipi[i],
- sizeof(XlnxZynqMPIPI), TYPE_XLNX_ZYNQMP_IPI);
- g_free(name);
- }
-}
-
-static void xlnx_zynqmp_pmu_soc_realize(DeviceState *dev, Error **errp)
-{
- XlnxZynqMPPMUSoCState *s = XLNX_ZYNQMP_PMU_SOC(dev);
- Error *err = NULL;
-
object_property_set_uint(OBJECT(&s->cpu), XLNX_ZYNQMP_PMU_ROM_ADDR,
"base-vectors", &error_abort);
object_property_set_bool(OBJECT(&s->cpu), true, "use-stack-protection",
@@ -99,18 +81,36 @@ static void xlnx_zynqmp_pmu_soc_realize(DeviceState *dev, Error **errp)
object_property_set_str(OBJECT(&s->cpu), "8.40.b", "version",
&error_abort);
object_property_set_uint(OBJECT(&s->cpu), 0, "pvr", &error_abort);
- object_property_set_bool(OBJECT(&s->cpu), true, "realized", &err);
- if (err) {
- error_propagate(errp, err);
- return;
- }
+ sysbus_init_child_obj(obj, "intc", &s->intc, sizeof(s->intc),
+ TYPE_XLNX_PMU_IO_INTC);
object_property_set_uint(OBJECT(&s->intc), 0x10, "intc-intr-size",
&error_abort);
object_property_set_uint(OBJECT(&s->intc), 0x0, "intc-level-edge",
&error_abort);
object_property_set_uint(OBJECT(&s->intc), 0xffff, "intc-positive",
&error_abort);
+
+ /* Create the IPI device */
+ for (int i = 0; i < XLNX_ZYNQMP_PMU_NUM_IPIS; i++) {
+ char *name = g_strdup_printf("ipi%d", i);
+ sysbus_init_child_obj(obj, name, &s->ipi[i],
+ sizeof(XlnxZynqMPIPI), TYPE_XLNX_ZYNQMP_IPI);
+ g_free(name);
+ }
+}
+
+static void xlnx_zynqmp_pmu_soc_realize(DeviceState *dev, Error **errp)
+{
+ XlnxZynqMPPMUSoCState *s = XLNX_ZYNQMP_PMU_SOC(dev);
+ Error *err = NULL;
+
+ object_property_set_bool(OBJECT(&s->cpu), true, "realized", &err);
+ if (err) {
+ error_propagate(errp, err);
+ return;
+ }
+
object_property_set_bool(OBJECT(&s->intc), true, "realized", &err);
if (err) {
error_propagate(errp, err);
--
2.21.1
^ permalink raw reply related [flat|nested] 98+ messages in thread* [PATCH-for-5.1 v3 17/24] hw/microblaze/xlnx-zynqmp-pmu: Move some code from realize() to init()
@ 2020-04-12 22:36 ` Philippe Mathieu-Daudé
0 siblings, 0 replies; 98+ messages in thread
From: Philippe Mathieu-Daudé @ 2020-04-12 22:36 UTC (permalink / raw)
To: qemu-devel
Cc: Joel Stanley, Jean-Christophe Dubois, Subbaraya Sundeep,
Max Reitz, Palmer Dabbelt, qemu-ppc, Sagar Karandikar,
Markus Armbruster, Jeff Cody, Peter Maydell, Xie Changlong,
Fam Zheng, Eduardo Habkost, Alistair Francis, qemu-arm,
Wen Congyang, Philippe Mathieu-Daudé,
Bastian Koppelmann, Edgar E. Iglesias, Kevin Wolf,
Marc-André Lureau, David Gibson, Jason Wang, Peter Chubb,
Beniamino Galvani, Alistair Francis, qemu-riscv,
Cédric Le Goater, qemu-block, Paolo Bonzini, Andrew Jeffery,
Michael S. Tsirkin, Richard Henderson,
Philippe Mathieu-Daudé
Coccinelle reported:
$ spatch ... --timeout 60 --sp-file \
scripts/coccinelle/simplify-init-realize-error_propagate.cocci
HANDLING: ./hw/microblaze/xlnx-zynqmp-pmu.c
>>> possible moves from xlnx_zynqmp_pmu_soc_init() to xlnx_zynqmp_pmu_soc_realize() in ./hw/microblaze/xlnx-zynqmp-pmu.c:79
Move the calls using &error_abort which don't depend on input
updated before realize() to init().
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
v3: Typo 'depend of' -> 'depend on' (eblake)
---
hw/microblaze/xlnx-zynqmp-pmu.c | 46 ++++++++++++++++-----------------
1 file changed, 23 insertions(+), 23 deletions(-)
diff --git a/hw/microblaze/xlnx-zynqmp-pmu.c b/hw/microblaze/xlnx-zynqmp-pmu.c
index 028f31894d..2aa602cf85 100644
--- a/hw/microblaze/xlnx-zynqmp-pmu.c
+++ b/hw/microblaze/xlnx-zynqmp-pmu.c
@@ -63,24 +63,6 @@ static void xlnx_zynqmp_pmu_soc_init(Object *obj)
object_initialize_child(obj, "pmu-cpu", &s->cpu, sizeof(s->cpu),
TYPE_MICROBLAZE_CPU, &error_abort, NULL);
-
- sysbus_init_child_obj(obj, "intc", &s->intc, sizeof(s->intc),
- TYPE_XLNX_PMU_IO_INTC);
-
- /* Create the IPI device */
- for (int i = 0; i < XLNX_ZYNQMP_PMU_NUM_IPIS; i++) {
- char *name = g_strdup_printf("ipi%d", i);
- sysbus_init_child_obj(obj, name, &s->ipi[i],
- sizeof(XlnxZynqMPIPI), TYPE_XLNX_ZYNQMP_IPI);
- g_free(name);
- }
-}
-
-static void xlnx_zynqmp_pmu_soc_realize(DeviceState *dev, Error **errp)
-{
- XlnxZynqMPPMUSoCState *s = XLNX_ZYNQMP_PMU_SOC(dev);
- Error *err = NULL;
-
object_property_set_uint(OBJECT(&s->cpu), XLNX_ZYNQMP_PMU_ROM_ADDR,
"base-vectors", &error_abort);
object_property_set_bool(OBJECT(&s->cpu), true, "use-stack-protection",
@@ -99,18 +81,36 @@ static void xlnx_zynqmp_pmu_soc_realize(DeviceState *dev, Error **errp)
object_property_set_str(OBJECT(&s->cpu), "8.40.b", "version",
&error_abort);
object_property_set_uint(OBJECT(&s->cpu), 0, "pvr", &error_abort);
- object_property_set_bool(OBJECT(&s->cpu), true, "realized", &err);
- if (err) {
- error_propagate(errp, err);
- return;
- }
+ sysbus_init_child_obj(obj, "intc", &s->intc, sizeof(s->intc),
+ TYPE_XLNX_PMU_IO_INTC);
object_property_set_uint(OBJECT(&s->intc), 0x10, "intc-intr-size",
&error_abort);
object_property_set_uint(OBJECT(&s->intc), 0x0, "intc-level-edge",
&error_abort);
object_property_set_uint(OBJECT(&s->intc), 0xffff, "intc-positive",
&error_abort);
+
+ /* Create the IPI device */
+ for (int i = 0; i < XLNX_ZYNQMP_PMU_NUM_IPIS; i++) {
+ char *name = g_strdup_printf("ipi%d", i);
+ sysbus_init_child_obj(obj, name, &s->ipi[i],
+ sizeof(XlnxZynqMPIPI), TYPE_XLNX_ZYNQMP_IPI);
+ g_free(name);
+ }
+}
+
+static void xlnx_zynqmp_pmu_soc_realize(DeviceState *dev, Error **errp)
+{
+ XlnxZynqMPPMUSoCState *s = XLNX_ZYNQMP_PMU_SOC(dev);
+ Error *err = NULL;
+
+ object_property_set_bool(OBJECT(&s->cpu), true, "realized", &err);
+ if (err) {
+ error_propagate(errp, err);
+ return;
+ }
+
object_property_set_bool(OBJECT(&s->intc), true, "realized", &err);
if (err) {
error_propagate(errp, err);
--
2.21.1
^ permalink raw reply related [flat|nested] 98+ messages in thread* Re: [PATCH-for-5.1 v3 17/24] hw/microblaze/xlnx-zynqmp-pmu: Move some code from realize() to init()
2020-04-12 22:36 ` Philippe Mathieu-Daudé
@ 2020-04-13 22:19 ` Alistair Francis
-1 siblings, 0 replies; 98+ messages in thread
From: Alistair Francis @ 2020-04-13 22:19 UTC (permalink / raw)
To: Philippe Mathieu-Daudé
Cc: Fam Zheng, Peter Maydell, Sagar Karandikar, Michael S. Tsirkin,
Jeff Cody, Jason Wang, qemu-devel@nongnu.org Developers,
Alistair Francis, Edgar E. Iglesias, Max Reitz, Qemu-block,
Markus Armbruster, Joel Stanley, Marc-André Lureau,
David Gibson, Philippe Mathieu-Daudé,
Eduardo Habkost, Jean-Christophe Dubois, Xie Changlong,
Alistair Francis, Beniamino Galvani, qemu-arm, Peter Chubb,
Cédric Le Goater, open list:New World, Richard Henderson,
Kevin Wolf, open list:RISC-V, Andrew Jeffery, Wen Congyang,
Subbaraya Sundeep, Palmer Dabbelt, Bastian Koppelmann,
Paolo Bonzini
On Sun, Apr 12, 2020 at 3:44 PM Philippe Mathieu-Daudé <f4bug@amsat.org> wrote:
>
> Coccinelle reported:
>
> $ spatch ... --timeout 60 --sp-file \
> scripts/coccinelle/simplify-init-realize-error_propagate.cocci
> HANDLING: ./hw/microblaze/xlnx-zynqmp-pmu.c
> >>> possible moves from xlnx_zynqmp_pmu_soc_init() to xlnx_zynqmp_pmu_soc_realize() in ./hw/microblaze/xlnx-zynqmp-pmu.c:79
>
> Move the calls using &error_abort which don't depend on input
> updated before realize() to init().
>
> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Alistair
> ---
> v3: Typo 'depend of' -> 'depend on' (eblake)
> ---
> hw/microblaze/xlnx-zynqmp-pmu.c | 46 ++++++++++++++++-----------------
> 1 file changed, 23 insertions(+), 23 deletions(-)
>
> diff --git a/hw/microblaze/xlnx-zynqmp-pmu.c b/hw/microblaze/xlnx-zynqmp-pmu.c
> index 028f31894d..2aa602cf85 100644
> --- a/hw/microblaze/xlnx-zynqmp-pmu.c
> +++ b/hw/microblaze/xlnx-zynqmp-pmu.c
> @@ -63,24 +63,6 @@ static void xlnx_zynqmp_pmu_soc_init(Object *obj)
>
> object_initialize_child(obj, "pmu-cpu", &s->cpu, sizeof(s->cpu),
> TYPE_MICROBLAZE_CPU, &error_abort, NULL);
> -
> - sysbus_init_child_obj(obj, "intc", &s->intc, sizeof(s->intc),
> - TYPE_XLNX_PMU_IO_INTC);
> -
> - /* Create the IPI device */
> - for (int i = 0; i < XLNX_ZYNQMP_PMU_NUM_IPIS; i++) {
> - char *name = g_strdup_printf("ipi%d", i);
> - sysbus_init_child_obj(obj, name, &s->ipi[i],
> - sizeof(XlnxZynqMPIPI), TYPE_XLNX_ZYNQMP_IPI);
> - g_free(name);
> - }
> -}
> -
> -static void xlnx_zynqmp_pmu_soc_realize(DeviceState *dev, Error **errp)
> -{
> - XlnxZynqMPPMUSoCState *s = XLNX_ZYNQMP_PMU_SOC(dev);
> - Error *err = NULL;
> -
> object_property_set_uint(OBJECT(&s->cpu), XLNX_ZYNQMP_PMU_ROM_ADDR,
> "base-vectors", &error_abort);
> object_property_set_bool(OBJECT(&s->cpu), true, "use-stack-protection",
> @@ -99,18 +81,36 @@ static void xlnx_zynqmp_pmu_soc_realize(DeviceState *dev, Error **errp)
> object_property_set_str(OBJECT(&s->cpu), "8.40.b", "version",
> &error_abort);
> object_property_set_uint(OBJECT(&s->cpu), 0, "pvr", &error_abort);
> - object_property_set_bool(OBJECT(&s->cpu), true, "realized", &err);
> - if (err) {
> - error_propagate(errp, err);
> - return;
> - }
>
> + sysbus_init_child_obj(obj, "intc", &s->intc, sizeof(s->intc),
> + TYPE_XLNX_PMU_IO_INTC);
> object_property_set_uint(OBJECT(&s->intc), 0x10, "intc-intr-size",
> &error_abort);
> object_property_set_uint(OBJECT(&s->intc), 0x0, "intc-level-edge",
> &error_abort);
> object_property_set_uint(OBJECT(&s->intc), 0xffff, "intc-positive",
> &error_abort);
> +
> + /* Create the IPI device */
> + for (int i = 0; i < XLNX_ZYNQMP_PMU_NUM_IPIS; i++) {
> + char *name = g_strdup_printf("ipi%d", i);
> + sysbus_init_child_obj(obj, name, &s->ipi[i],
> + sizeof(XlnxZynqMPIPI), TYPE_XLNX_ZYNQMP_IPI);
> + g_free(name);
> + }
> +}
> +
> +static void xlnx_zynqmp_pmu_soc_realize(DeviceState *dev, Error **errp)
> +{
> + XlnxZynqMPPMUSoCState *s = XLNX_ZYNQMP_PMU_SOC(dev);
> + Error *err = NULL;
> +
> + object_property_set_bool(OBJECT(&s->cpu), true, "realized", &err);
> + if (err) {
> + error_propagate(errp, err);
> + return;
> + }
> +
> object_property_set_bool(OBJECT(&s->intc), true, "realized", &err);
> if (err) {
> error_propagate(errp, err);
> --
> 2.21.1
>
>
^ permalink raw reply [flat|nested] 98+ messages in thread* Re: [PATCH-for-5.1 v3 17/24] hw/microblaze/xlnx-zynqmp-pmu: Move some code from realize() to init()
@ 2020-04-13 22:19 ` Alistair Francis
0 siblings, 0 replies; 98+ messages in thread
From: Alistair Francis @ 2020-04-13 22:19 UTC (permalink / raw)
To: Philippe Mathieu-Daudé
Cc: qemu-devel@nongnu.org Developers, Fam Zheng, Peter Maydell,
Sagar Karandikar, Michael S. Tsirkin, Jeff Cody, Jason Wang,
Alistair Francis, Edgar E. Iglesias, Subbaraya Sundeep,
Qemu-block, Markus Armbruster, Max Reitz, Joel Stanley,
Marc-André Lureau, Richard Henderson,
Philippe Mathieu-Daudé,
Eduardo Habkost, Xie Changlong, Alistair Francis,
Beniamino Galvani, qemu-arm, Peter Chubb, Cédric Le Goater,
Palmer Dabbelt, David Gibson, Kevin Wolf, open list:RISC-V,
Andrew Jeffery, Wen Congyang, Jean-Christophe Dubois,
open list:New World, Bastian Koppelmann, Paolo Bonzini
On Sun, Apr 12, 2020 at 3:44 PM Philippe Mathieu-Daudé <f4bug@amsat.org> wrote:
>
> Coccinelle reported:
>
> $ spatch ... --timeout 60 --sp-file \
> scripts/coccinelle/simplify-init-realize-error_propagate.cocci
> HANDLING: ./hw/microblaze/xlnx-zynqmp-pmu.c
> >>> possible moves from xlnx_zynqmp_pmu_soc_init() to xlnx_zynqmp_pmu_soc_realize() in ./hw/microblaze/xlnx-zynqmp-pmu.c:79
>
> Move the calls using &error_abort which don't depend on input
> updated before realize() to init().
>
> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Alistair
> ---
> v3: Typo 'depend of' -> 'depend on' (eblake)
> ---
> hw/microblaze/xlnx-zynqmp-pmu.c | 46 ++++++++++++++++-----------------
> 1 file changed, 23 insertions(+), 23 deletions(-)
>
> diff --git a/hw/microblaze/xlnx-zynqmp-pmu.c b/hw/microblaze/xlnx-zynqmp-pmu.c
> index 028f31894d..2aa602cf85 100644
> --- a/hw/microblaze/xlnx-zynqmp-pmu.c
> +++ b/hw/microblaze/xlnx-zynqmp-pmu.c
> @@ -63,24 +63,6 @@ static void xlnx_zynqmp_pmu_soc_init(Object *obj)
>
> object_initialize_child(obj, "pmu-cpu", &s->cpu, sizeof(s->cpu),
> TYPE_MICROBLAZE_CPU, &error_abort, NULL);
> -
> - sysbus_init_child_obj(obj, "intc", &s->intc, sizeof(s->intc),
> - TYPE_XLNX_PMU_IO_INTC);
> -
> - /* Create the IPI device */
> - for (int i = 0; i < XLNX_ZYNQMP_PMU_NUM_IPIS; i++) {
> - char *name = g_strdup_printf("ipi%d", i);
> - sysbus_init_child_obj(obj, name, &s->ipi[i],
> - sizeof(XlnxZynqMPIPI), TYPE_XLNX_ZYNQMP_IPI);
> - g_free(name);
> - }
> -}
> -
> -static void xlnx_zynqmp_pmu_soc_realize(DeviceState *dev, Error **errp)
> -{
> - XlnxZynqMPPMUSoCState *s = XLNX_ZYNQMP_PMU_SOC(dev);
> - Error *err = NULL;
> -
> object_property_set_uint(OBJECT(&s->cpu), XLNX_ZYNQMP_PMU_ROM_ADDR,
> "base-vectors", &error_abort);
> object_property_set_bool(OBJECT(&s->cpu), true, "use-stack-protection",
> @@ -99,18 +81,36 @@ static void xlnx_zynqmp_pmu_soc_realize(DeviceState *dev, Error **errp)
> object_property_set_str(OBJECT(&s->cpu), "8.40.b", "version",
> &error_abort);
> object_property_set_uint(OBJECT(&s->cpu), 0, "pvr", &error_abort);
> - object_property_set_bool(OBJECT(&s->cpu), true, "realized", &err);
> - if (err) {
> - error_propagate(errp, err);
> - return;
> - }
>
> + sysbus_init_child_obj(obj, "intc", &s->intc, sizeof(s->intc),
> + TYPE_XLNX_PMU_IO_INTC);
> object_property_set_uint(OBJECT(&s->intc), 0x10, "intc-intr-size",
> &error_abort);
> object_property_set_uint(OBJECT(&s->intc), 0x0, "intc-level-edge",
> &error_abort);
> object_property_set_uint(OBJECT(&s->intc), 0xffff, "intc-positive",
> &error_abort);
> +
> + /* Create the IPI device */
> + for (int i = 0; i < XLNX_ZYNQMP_PMU_NUM_IPIS; i++) {
> + char *name = g_strdup_printf("ipi%d", i);
> + sysbus_init_child_obj(obj, name, &s->ipi[i],
> + sizeof(XlnxZynqMPIPI), TYPE_XLNX_ZYNQMP_IPI);
> + g_free(name);
> + }
> +}
> +
> +static void xlnx_zynqmp_pmu_soc_realize(DeviceState *dev, Error **errp)
> +{
> + XlnxZynqMPPMUSoCState *s = XLNX_ZYNQMP_PMU_SOC(dev);
> + Error *err = NULL;
> +
> + object_property_set_bool(OBJECT(&s->cpu), true, "realized", &err);
> + if (err) {
> + error_propagate(errp, err);
> + return;
> + }
> +
> object_property_set_bool(OBJECT(&s->intc), true, "realized", &err);
> if (err) {
> error_propagate(errp, err);
> --
> 2.21.1
>
>
^ permalink raw reply [flat|nested] 98+ messages in thread
* [PATCH-for-5.1 v3 18/24] hw/pci-host/pnv_phb3: Move some code from realize() to init()
2020-04-12 22:35 ` Philippe Mathieu-Daudé
@ 2020-04-12 22:36 ` Philippe Mathieu-Daudé
-1 siblings, 0 replies; 98+ messages in thread
From: Philippe Mathieu-Daudé @ 2020-04-12 22:36 UTC (permalink / raw)
To: qemu-devel
Cc: Fam Zheng, Peter Maydell, Sagar Karandikar, Michael S. Tsirkin,
Jeff Cody, Jason Wang, Alistair Francis, Edgar E. Iglesias,
Subbaraya Sundeep, qemu-block, Markus Armbruster, Max Reitz,
Joel Stanley, Marc-André Lureau, Richard Henderson,
Philippe Mathieu-Daudé,
Eduardo Habkost, Xie Changlong, Alistair Francis,
Beniamino Galvani, qemu-arm, Peter Chubb, Cédric Le Goater,
Palmer Dabbelt, David Gibson, Kevin Wolf, qemu-riscv,
Andrew Jeffery, Wen Congyang, Philippe Mathieu-Daudé,
Jean-Christophe Dubois, qemu-ppc, Bastian Koppelmann,
Paolo Bonzini
Coccinelle reported:
$ spatch ... --timeout 60 --sp-file \
scripts/coccinelle/simplify-init-realize-error_propagate.cocci
HANDLING: ./hw/pci-host/pnv_phb3.c
>>> possible moves from pnv_phb3_instance_init() to pnv_phb3_realize() in ./hw/pci-host/pnv_phb3.c:992
Move the calls using &error_abort which don't depend on input
updated before realize() to init().
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
v3: Typo 'depend of' -> 'depend on' (eblake)
---
hw/pci-host/pnv_phb3.c | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/hw/pci-host/pnv_phb3.c b/hw/pci-host/pnv_phb3.c
index 74618fadf0..57d717ed23 100644
--- a/hw/pci-host/pnv_phb3.c
+++ b/hw/pci-host/pnv_phb3.c
@@ -970,6 +970,8 @@ static void pnv_phb3_instance_init(Object *obj)
/* LSI sources */
object_initialize_child(obj, "lsi", &phb->lsis, sizeof(phb->lsis),
TYPE_ICS, &error_abort, NULL);
+ object_property_set_int(OBJECT(&phb->lsis), PNV_PHB3_NUM_LSI, "nr-irqs",
+ &error_abort);
/* Default init ... will be fixed by HW inits */
phb->lsis.offset = 0;
@@ -977,6 +979,8 @@ static void pnv_phb3_instance_init(Object *obj)
/* MSI sources */
object_initialize_child(obj, "msi", &phb->msis, sizeof(phb->msis),
TYPE_PHB3_MSI, &error_abort, NULL);
+ object_property_set_int(OBJECT(&phb->msis), PHB3_MAX_MSI, "nr-irqs",
+ &error_abort);
/* Power Bus Common Queue */
object_initialize_child(obj, "pbcq", &phb->pbcq, sizeof(phb->pbcq),
@@ -1005,8 +1009,6 @@ static void pnv_phb3_realize(DeviceState *dev, Error **errp)
/* LSI sources */
object_property_set_link(OBJECT(&phb->lsis), OBJECT(pnv), "xics",
&error_abort);
- object_property_set_int(OBJECT(&phb->lsis), PNV_PHB3_NUM_LSI, "nr-irqs",
- &error_abort);
object_property_set_bool(OBJECT(&phb->lsis), true, "realized", &local_err);
if (local_err) {
error_propagate(errp, local_err);
@@ -1024,8 +1026,6 @@ static void pnv_phb3_realize(DeviceState *dev, Error **errp)
&error_abort);
object_property_set_link(OBJECT(&phb->msis), OBJECT(pnv), "xics",
&error_abort);
- object_property_set_int(OBJECT(&phb->msis), PHB3_MAX_MSI, "nr-irqs",
- &error_abort);
object_property_set_bool(OBJECT(&phb->msis), true, "realized", &local_err);
if (local_err) {
error_propagate(errp, local_err);
--
2.21.1
^ permalink raw reply related [flat|nested] 98+ messages in thread* [PATCH-for-5.1 v3 18/24] hw/pci-host/pnv_phb3: Move some code from realize() to init()
@ 2020-04-12 22:36 ` Philippe Mathieu-Daudé
0 siblings, 0 replies; 98+ messages in thread
From: Philippe Mathieu-Daudé @ 2020-04-12 22:36 UTC (permalink / raw)
To: qemu-devel
Cc: Joel Stanley, Jean-Christophe Dubois, Subbaraya Sundeep,
Max Reitz, Palmer Dabbelt, qemu-ppc, Sagar Karandikar,
Markus Armbruster, Jeff Cody, Peter Maydell, Xie Changlong,
Fam Zheng, Eduardo Habkost, Alistair Francis, qemu-arm,
Wen Congyang, Philippe Mathieu-Daudé,
Bastian Koppelmann, Edgar E. Iglesias, Kevin Wolf,
Marc-André Lureau, David Gibson, Jason Wang, Peter Chubb,
Beniamino Galvani, Alistair Francis, qemu-riscv,
Cédric Le Goater, qemu-block, Paolo Bonzini, Andrew Jeffery,
Michael S. Tsirkin, Richard Henderson,
Philippe Mathieu-Daudé
Coccinelle reported:
$ spatch ... --timeout 60 --sp-file \
scripts/coccinelle/simplify-init-realize-error_propagate.cocci
HANDLING: ./hw/pci-host/pnv_phb3.c
>>> possible moves from pnv_phb3_instance_init() to pnv_phb3_realize() in ./hw/pci-host/pnv_phb3.c:992
Move the calls using &error_abort which don't depend on input
updated before realize() to init().
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
v3: Typo 'depend of' -> 'depend on' (eblake)
---
hw/pci-host/pnv_phb3.c | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/hw/pci-host/pnv_phb3.c b/hw/pci-host/pnv_phb3.c
index 74618fadf0..57d717ed23 100644
--- a/hw/pci-host/pnv_phb3.c
+++ b/hw/pci-host/pnv_phb3.c
@@ -970,6 +970,8 @@ static void pnv_phb3_instance_init(Object *obj)
/* LSI sources */
object_initialize_child(obj, "lsi", &phb->lsis, sizeof(phb->lsis),
TYPE_ICS, &error_abort, NULL);
+ object_property_set_int(OBJECT(&phb->lsis), PNV_PHB3_NUM_LSI, "nr-irqs",
+ &error_abort);
/* Default init ... will be fixed by HW inits */
phb->lsis.offset = 0;
@@ -977,6 +979,8 @@ static void pnv_phb3_instance_init(Object *obj)
/* MSI sources */
object_initialize_child(obj, "msi", &phb->msis, sizeof(phb->msis),
TYPE_PHB3_MSI, &error_abort, NULL);
+ object_property_set_int(OBJECT(&phb->msis), PHB3_MAX_MSI, "nr-irqs",
+ &error_abort);
/* Power Bus Common Queue */
object_initialize_child(obj, "pbcq", &phb->pbcq, sizeof(phb->pbcq),
@@ -1005,8 +1009,6 @@ static void pnv_phb3_realize(DeviceState *dev, Error **errp)
/* LSI sources */
object_property_set_link(OBJECT(&phb->lsis), OBJECT(pnv), "xics",
&error_abort);
- object_property_set_int(OBJECT(&phb->lsis), PNV_PHB3_NUM_LSI, "nr-irqs",
- &error_abort);
object_property_set_bool(OBJECT(&phb->lsis), true, "realized", &local_err);
if (local_err) {
error_propagate(errp, local_err);
@@ -1024,8 +1026,6 @@ static void pnv_phb3_realize(DeviceState *dev, Error **errp)
&error_abort);
object_property_set_link(OBJECT(&phb->msis), OBJECT(pnv), "xics",
&error_abort);
- object_property_set_int(OBJECT(&phb->msis), PHB3_MAX_MSI, "nr-irqs",
- &error_abort);
object_property_set_bool(OBJECT(&phb->msis), true, "realized", &local_err);
if (local_err) {
error_propagate(errp, local_err);
--
2.21.1
^ permalink raw reply related [flat|nested] 98+ messages in thread* Re: [PATCH-for-5.1 v3 18/24] hw/pci-host/pnv_phb3: Move some code from realize() to init()
2020-04-12 22:36 ` Philippe Mathieu-Daudé
@ 2020-04-14 2:10 ` David Gibson
-1 siblings, 0 replies; 98+ messages in thread
From: David Gibson @ 2020-04-14 2:10 UTC (permalink / raw)
To: Philippe Mathieu-Daudé
Cc: Fam Zheng, Peter Maydell, Sagar Karandikar, Michael S. Tsirkin,
Jeff Cody, Jason Wang, qemu-devel, Alistair Francis,
Edgar E. Iglesias, Max Reitz, qemu-block, Markus Armbruster,
Joel Stanley, qemu-ppc, Philippe Mathieu-Daudé,
Eduardo Habkost, Jean-Christophe Dubois, Xie Changlong,
Alistair Francis, Beniamino Galvani, qemu-arm, Peter Chubb,
Cédric Le Goater, Marc-André Lureau, Richard Henderson,
Kevin Wolf, qemu-riscv, Andrew Jeffery, Wen Congyang,
Subbaraya Sundeep, Palmer Dabbelt, Bastian Koppelmann,
Paolo Bonzini
[-- Attachment #1: Type: text/plain, Size: 3120 bytes --]
On Mon, Apr 13, 2020 at 12:36:13AM +0200, Philippe Mathieu-Daudé wrote:
> Coccinelle reported:
>
> $ spatch ... --timeout 60 --sp-file \
> scripts/coccinelle/simplify-init-realize-error_propagate.cocci
> HANDLING: ./hw/pci-host/pnv_phb3.c
> >>> possible moves from pnv_phb3_instance_init() to pnv_phb3_realize() in ./hw/pci-host/pnv_phb3.c:992
>
> Move the calls using &error_abort which don't depend on input
> updated before realize() to init().
>
> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Acked-by: David Gibson <david@gibson.dropbear.id.au>
> ---
> v3: Typo 'depend of' -> 'depend on' (eblake)
> ---
> hw/pci-host/pnv_phb3.c | 8 ++++----
> 1 file changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/hw/pci-host/pnv_phb3.c b/hw/pci-host/pnv_phb3.c
> index 74618fadf0..57d717ed23 100644
> --- a/hw/pci-host/pnv_phb3.c
> +++ b/hw/pci-host/pnv_phb3.c
> @@ -970,6 +970,8 @@ static void pnv_phb3_instance_init(Object *obj)
> /* LSI sources */
> object_initialize_child(obj, "lsi", &phb->lsis, sizeof(phb->lsis),
> TYPE_ICS, &error_abort, NULL);
> + object_property_set_int(OBJECT(&phb->lsis), PNV_PHB3_NUM_LSI, "nr-irqs",
> + &error_abort);
>
> /* Default init ... will be fixed by HW inits */
> phb->lsis.offset = 0;
> @@ -977,6 +979,8 @@ static void pnv_phb3_instance_init(Object *obj)
> /* MSI sources */
> object_initialize_child(obj, "msi", &phb->msis, sizeof(phb->msis),
> TYPE_PHB3_MSI, &error_abort, NULL);
> + object_property_set_int(OBJECT(&phb->msis), PHB3_MAX_MSI, "nr-irqs",
> + &error_abort);
>
> /* Power Bus Common Queue */
> object_initialize_child(obj, "pbcq", &phb->pbcq, sizeof(phb->pbcq),
> @@ -1005,8 +1009,6 @@ static void pnv_phb3_realize(DeviceState *dev, Error **errp)
> /* LSI sources */
> object_property_set_link(OBJECT(&phb->lsis), OBJECT(pnv), "xics",
> &error_abort);
> - object_property_set_int(OBJECT(&phb->lsis), PNV_PHB3_NUM_LSI, "nr-irqs",
> - &error_abort);
> object_property_set_bool(OBJECT(&phb->lsis), true, "realized", &local_err);
> if (local_err) {
> error_propagate(errp, local_err);
> @@ -1024,8 +1026,6 @@ static void pnv_phb3_realize(DeviceState *dev, Error **errp)
> &error_abort);
> object_property_set_link(OBJECT(&phb->msis), OBJECT(pnv), "xics",
> &error_abort);
> - object_property_set_int(OBJECT(&phb->msis), PHB3_MAX_MSI, "nr-irqs",
> - &error_abort);
> object_property_set_bool(OBJECT(&phb->msis), true, "realized", &local_err);
> if (local_err) {
> error_propagate(errp, local_err);
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 833 bytes --]
^ permalink raw reply [flat|nested] 98+ messages in thread* Re: [PATCH-for-5.1 v3 18/24] hw/pci-host/pnv_phb3: Move some code from realize() to init()
@ 2020-04-14 2:10 ` David Gibson
0 siblings, 0 replies; 98+ messages in thread
From: David Gibson @ 2020-04-14 2:10 UTC (permalink / raw)
To: Philippe Mathieu-Daudé
Cc: qemu-devel, Joel Stanley, Jean-Christophe Dubois,
Subbaraya Sundeep, Max Reitz, Palmer Dabbelt, qemu-ppc,
Sagar Karandikar, Markus Armbruster, Jeff Cody, Peter Maydell,
Xie Changlong, Fam Zheng, Eduardo Habkost, Alistair Francis,
qemu-arm, Wen Congyang, Philippe Mathieu-Daudé,
Bastian Koppelmann, Edgar E. Iglesias, Kevin Wolf,
Marc-André Lureau, Jason Wang, Peter Chubb,
Beniamino Galvani, Alistair Francis, qemu-riscv,
Cédric Le Goater, qemu-block, Paolo Bonzini, Andrew Jeffery,
Michael S. Tsirkin, Richard Henderson
[-- Attachment #1: Type: text/plain, Size: 3120 bytes --]
On Mon, Apr 13, 2020 at 12:36:13AM +0200, Philippe Mathieu-Daudé wrote:
> Coccinelle reported:
>
> $ spatch ... --timeout 60 --sp-file \
> scripts/coccinelle/simplify-init-realize-error_propagate.cocci
> HANDLING: ./hw/pci-host/pnv_phb3.c
> >>> possible moves from pnv_phb3_instance_init() to pnv_phb3_realize() in ./hw/pci-host/pnv_phb3.c:992
>
> Move the calls using &error_abort which don't depend on input
> updated before realize() to init().
>
> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Acked-by: David Gibson <david@gibson.dropbear.id.au>
> ---
> v3: Typo 'depend of' -> 'depend on' (eblake)
> ---
> hw/pci-host/pnv_phb3.c | 8 ++++----
> 1 file changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/hw/pci-host/pnv_phb3.c b/hw/pci-host/pnv_phb3.c
> index 74618fadf0..57d717ed23 100644
> --- a/hw/pci-host/pnv_phb3.c
> +++ b/hw/pci-host/pnv_phb3.c
> @@ -970,6 +970,8 @@ static void pnv_phb3_instance_init(Object *obj)
> /* LSI sources */
> object_initialize_child(obj, "lsi", &phb->lsis, sizeof(phb->lsis),
> TYPE_ICS, &error_abort, NULL);
> + object_property_set_int(OBJECT(&phb->lsis), PNV_PHB3_NUM_LSI, "nr-irqs",
> + &error_abort);
>
> /* Default init ... will be fixed by HW inits */
> phb->lsis.offset = 0;
> @@ -977,6 +979,8 @@ static void pnv_phb3_instance_init(Object *obj)
> /* MSI sources */
> object_initialize_child(obj, "msi", &phb->msis, sizeof(phb->msis),
> TYPE_PHB3_MSI, &error_abort, NULL);
> + object_property_set_int(OBJECT(&phb->msis), PHB3_MAX_MSI, "nr-irqs",
> + &error_abort);
>
> /* Power Bus Common Queue */
> object_initialize_child(obj, "pbcq", &phb->pbcq, sizeof(phb->pbcq),
> @@ -1005,8 +1009,6 @@ static void pnv_phb3_realize(DeviceState *dev, Error **errp)
> /* LSI sources */
> object_property_set_link(OBJECT(&phb->lsis), OBJECT(pnv), "xics",
> &error_abort);
> - object_property_set_int(OBJECT(&phb->lsis), PNV_PHB3_NUM_LSI, "nr-irqs",
> - &error_abort);
> object_property_set_bool(OBJECT(&phb->lsis), true, "realized", &local_err);
> if (local_err) {
> error_propagate(errp, local_err);
> @@ -1024,8 +1026,6 @@ static void pnv_phb3_realize(DeviceState *dev, Error **errp)
> &error_abort);
> object_property_set_link(OBJECT(&phb->msis), OBJECT(pnv), "xics",
> &error_abort);
> - object_property_set_int(OBJECT(&phb->msis), PHB3_MAX_MSI, "nr-irqs",
> - &error_abort);
> object_property_set_bool(OBJECT(&phb->msis), true, "realized", &local_err);
> if (local_err) {
> error_propagate(errp, local_err);
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 833 bytes --]
^ permalink raw reply [flat|nested] 98+ messages in thread
* Re: [PATCH-for-5.1 v3 18/24] hw/pci-host/pnv_phb3: Move some code from realize() to init()
2020-04-12 22:36 ` Philippe Mathieu-Daudé
@ 2020-04-15 7:51 ` Cédric Le Goater
-1 siblings, 0 replies; 98+ messages in thread
From: Cédric Le Goater @ 2020-04-15 7:51 UTC (permalink / raw)
To: Philippe Mathieu-Daudé, qemu-devel
Cc: Fam Zheng, Peter Maydell, Sagar Karandikar, Michael S. Tsirkin,
Jeff Cody, Jason Wang, Alistair Francis, Edgar E. Iglesias,
Subbaraya Sundeep, qemu-block, Markus Armbruster, Max Reitz,
Joel Stanley, Marc-André Lureau, Richard Henderson,
Philippe Mathieu-Daudé,
Eduardo Habkost, Xie Changlong, Alistair Francis,
Beniamino Galvani, qemu-arm, Peter Chubb, Palmer Dabbelt,
David Gibson, Kevin Wolf, qemu-riscv, Andrew Jeffery,
Wen Congyang, Jean-Christophe Dubois, qemu-ppc,
Bastian Koppelmann, Paolo Bonzini
On 4/13/20 12:36 AM, Philippe Mathieu-Daudé wrote:
> Coccinelle reported:
>
> $ spatch ... --timeout 60 --sp-file \
> scripts/coccinelle/simplify-init-realize-error_propagate.cocci
> HANDLING: ./hw/pci-host/pnv_phb3.c
> >>> possible moves from pnv_phb3_instance_init() to pnv_phb3_realize() in ./hw/pci-host/pnv_phb3.c:992
>
> Move the calls using &error_abort which don't depend on input
> updated before realize() to init().
>
> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
> ---
> v3: Typo 'depend of' -> 'depend on' (eblake)
> ---
> hw/pci-host/pnv_phb3.c | 8 ++++----
> 1 file changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/hw/pci-host/pnv_phb3.c b/hw/pci-host/pnv_phb3.c
> index 74618fadf0..57d717ed23 100644
> --- a/hw/pci-host/pnv_phb3.c
> +++ b/hw/pci-host/pnv_phb3.c
> @@ -970,6 +970,8 @@ static void pnv_phb3_instance_init(Object *obj)
> /* LSI sources */
> object_initialize_child(obj, "lsi", &phb->lsis, sizeof(phb->lsis),
> TYPE_ICS, &error_abort, NULL);
> + object_property_set_int(OBJECT(&phb->lsis), PNV_PHB3_NUM_LSI, "nr-irqs",
> + &error_abort);
>
> /* Default init ... will be fixed by HW inits */
> phb->lsis.offset = 0;
> @@ -977,6 +979,8 @@ static void pnv_phb3_instance_init(Object *obj)
> /* MSI sources */
> object_initialize_child(obj, "msi", &phb->msis, sizeof(phb->msis),
> TYPE_PHB3_MSI, &error_abort, NULL);
> + object_property_set_int(OBJECT(&phb->msis), PHB3_MAX_MSI, "nr-irqs",
> + &error_abort);
>
> /* Power Bus Common Queue */
> object_initialize_child(obj, "pbcq", &phb->pbcq, sizeof(phb->pbcq),
> @@ -1005,8 +1009,6 @@ static void pnv_phb3_realize(DeviceState *dev, Error **errp)
> /* LSI sources */
> object_property_set_link(OBJECT(&phb->lsis), OBJECT(pnv), "xics",
> &error_abort);
> - object_property_set_int(OBJECT(&phb->lsis), PNV_PHB3_NUM_LSI, "nr-irqs",
> - &error_abort);
> object_property_set_bool(OBJECT(&phb->lsis), true, "realized", &local_err);
> if (local_err) {
> error_propagate(errp, local_err);
> @@ -1024,8 +1026,6 @@ static void pnv_phb3_realize(DeviceState *dev, Error **errp)
> &error_abort);
> object_property_set_link(OBJECT(&phb->msis), OBJECT(pnv), "xics",
> &error_abort);
> - object_property_set_int(OBJECT(&phb->msis), PHB3_MAX_MSI, "nr-irqs",
> - &error_abort);
> object_property_set_bool(OBJECT(&phb->msis), true, "realized", &local_err);
> if (local_err) {
> error_propagate(errp, local_err);
>
^ permalink raw reply [flat|nested] 98+ messages in thread* Re: [PATCH-for-5.1 v3 18/24] hw/pci-host/pnv_phb3: Move some code from realize() to init()
@ 2020-04-15 7:51 ` Cédric Le Goater
0 siblings, 0 replies; 98+ messages in thread
From: Cédric Le Goater @ 2020-04-15 7:51 UTC (permalink / raw)
To: Philippe Mathieu-Daudé, qemu-devel
Cc: Joel Stanley, Jean-Christophe Dubois, Subbaraya Sundeep,
Max Reitz, Palmer Dabbelt, qemu-ppc, Sagar Karandikar,
Markus Armbruster, Jeff Cody, Peter Maydell, Xie Changlong,
Fam Zheng, Eduardo Habkost, Alistair Francis, qemu-arm,
Wen Congyang, Philippe Mathieu-Daudé,
Bastian Koppelmann, Edgar E. Iglesias, Kevin Wolf,
Marc-André Lureau, David Gibson, Jason Wang, Peter Chubb,
Beniamino Galvani, Alistair Francis, qemu-riscv, qemu-block,
Paolo Bonzini, Andrew Jeffery, Michael S. Tsirkin,
Richard Henderson
On 4/13/20 12:36 AM, Philippe Mathieu-Daudé wrote:
> Coccinelle reported:
>
> $ spatch ... --timeout 60 --sp-file \
> scripts/coccinelle/simplify-init-realize-error_propagate.cocci
> HANDLING: ./hw/pci-host/pnv_phb3.c
> >>> possible moves from pnv_phb3_instance_init() to pnv_phb3_realize() in ./hw/pci-host/pnv_phb3.c:992
>
> Move the calls using &error_abort which don't depend on input
> updated before realize() to init().
>
> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
> ---
> v3: Typo 'depend of' -> 'depend on' (eblake)
> ---
> hw/pci-host/pnv_phb3.c | 8 ++++----
> 1 file changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/hw/pci-host/pnv_phb3.c b/hw/pci-host/pnv_phb3.c
> index 74618fadf0..57d717ed23 100644
> --- a/hw/pci-host/pnv_phb3.c
> +++ b/hw/pci-host/pnv_phb3.c
> @@ -970,6 +970,8 @@ static void pnv_phb3_instance_init(Object *obj)
> /* LSI sources */
> object_initialize_child(obj, "lsi", &phb->lsis, sizeof(phb->lsis),
> TYPE_ICS, &error_abort, NULL);
> + object_property_set_int(OBJECT(&phb->lsis), PNV_PHB3_NUM_LSI, "nr-irqs",
> + &error_abort);
>
> /* Default init ... will be fixed by HW inits */
> phb->lsis.offset = 0;
> @@ -977,6 +979,8 @@ static void pnv_phb3_instance_init(Object *obj)
> /* MSI sources */
> object_initialize_child(obj, "msi", &phb->msis, sizeof(phb->msis),
> TYPE_PHB3_MSI, &error_abort, NULL);
> + object_property_set_int(OBJECT(&phb->msis), PHB3_MAX_MSI, "nr-irqs",
> + &error_abort);
>
> /* Power Bus Common Queue */
> object_initialize_child(obj, "pbcq", &phb->pbcq, sizeof(phb->pbcq),
> @@ -1005,8 +1009,6 @@ static void pnv_phb3_realize(DeviceState *dev, Error **errp)
> /* LSI sources */
> object_property_set_link(OBJECT(&phb->lsis), OBJECT(pnv), "xics",
> &error_abort);
> - object_property_set_int(OBJECT(&phb->lsis), PNV_PHB3_NUM_LSI, "nr-irqs",
> - &error_abort);
> object_property_set_bool(OBJECT(&phb->lsis), true, "realized", &local_err);
> if (local_err) {
> error_propagate(errp, local_err);
> @@ -1024,8 +1026,6 @@ static void pnv_phb3_realize(DeviceState *dev, Error **errp)
> &error_abort);
> object_property_set_link(OBJECT(&phb->msis), OBJECT(pnv), "xics",
> &error_abort);
> - object_property_set_int(OBJECT(&phb->msis), PHB3_MAX_MSI, "nr-irqs",
> - &error_abort);
> object_property_set_bool(OBJECT(&phb->msis), true, "realized", &local_err);
> if (local_err) {
> error_propagate(errp, local_err);
>
^ permalink raw reply [flat|nested] 98+ messages in thread
* [PATCH-for-5.1 v3 19/24] hw/riscv/sifive_e: Move some code from realize() to init()
2020-04-12 22:35 ` Philippe Mathieu-Daudé
@ 2020-04-12 22:36 ` Philippe Mathieu-Daudé
-1 siblings, 0 replies; 98+ messages in thread
From: Philippe Mathieu-Daudé @ 2020-04-12 22:36 UTC (permalink / raw)
To: qemu-devel
Cc: Fam Zheng, Peter Maydell, Sagar Karandikar, Michael S. Tsirkin,
Jeff Cody, Jason Wang, Alistair Francis, Edgar E. Iglesias,
Subbaraya Sundeep, qemu-block, Markus Armbruster, Max Reitz,
Joel Stanley, Marc-André Lureau, Richard Henderson,
Philippe Mathieu-Daudé,
Eduardo Habkost, Xie Changlong, Alistair Francis,
Beniamino Galvani, qemu-arm, Peter Chubb, Cédric Le Goater,
Palmer Dabbelt, David Gibson, Kevin Wolf, qemu-riscv,
Andrew Jeffery, Wen Congyang, Philippe Mathieu-Daudé,
Jean-Christophe Dubois, qemu-ppc, Bastian Koppelmann,
Paolo Bonzini
Coccinelle reported:
$ spatch ... --timeout 60 --sp-file \
scripts/coccinelle/simplify-init-realize-error_propagate.cocci
HANDLING: ./hw/riscv/sifive_e.c
>>> possible moves from riscv_sifive_e_soc_init() to riscv_sifive_e_soc_realize() in ./hw/riscv/sifive_e.c:135
Move the calls using &error_fatal which don't depend on input
updated before realize() to init().
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
v3: Typo 'depend of' -> 'depend on' (eblake)
---
hw/riscv/sifive_e.c | 26 ++++++++++++++------------
1 file changed, 14 insertions(+), 12 deletions(-)
diff --git a/hw/riscv/sifive_e.c b/hw/riscv/sifive_e.c
index 646553a7c3..0be8b52147 100644
--- a/hw/riscv/sifive_e.c
+++ b/hw/riscv/sifive_e.c
@@ -118,7 +118,9 @@ static void riscv_sifive_e_init(MachineState *machine)
static void riscv_sifive_e_soc_init(Object *obj)
{
MachineState *ms = MACHINE(qdev_get_machine());
+ const struct MemmapEntry *memmap = sifive_e_memmap;
SiFiveESoCState *s = RISCV_E_SOC(obj);
+ MemoryRegion *sys_mem = get_system_memory();
object_initialize_child(obj, "cpus", &s->cpus,
sizeof(s->cpus), TYPE_RISCV_HART_ARRAY,
@@ -130,6 +132,18 @@ static void riscv_sifive_e_soc_init(Object *obj)
sysbus_init_child_obj(obj, "riscv.sifive.e.gpio0",
&s->gpio, sizeof(s->gpio),
TYPE_SIFIVE_GPIO);
+
+ /* Mask ROM */
+ memory_region_init_rom(&s->mask_rom, obj, "riscv.sifive.e.mrom",
+ memmap[SIFIVE_E_MROM].size, &error_fatal);
+ memory_region_add_subregion(sys_mem,
+ memmap[SIFIVE_E_MROM].base, &s->mask_rom);
+
+ /* Flash memory */
+ memory_region_init_rom(&s->xip_mem, obj, "riscv.sifive.e.xip",
+ memmap[SIFIVE_E_XIP].size, &error_fatal);
+ memory_region_add_subregion(sys_mem, memmap[SIFIVE_E_XIP].base,
+ &s->xip_mem);
}
static void riscv_sifive_e_soc_realize(DeviceState *dev, Error **errp)
@@ -144,12 +158,6 @@ static void riscv_sifive_e_soc_realize(DeviceState *dev, Error **errp)
object_property_set_bool(OBJECT(&s->cpus), true, "realized",
&error_abort);
- /* Mask ROM */
- memory_region_init_rom(&s->mask_rom, OBJECT(dev), "riscv.sifive.e.mrom",
- memmap[SIFIVE_E_MROM].size, &error_fatal);
- memory_region_add_subregion(sys_mem,
- memmap[SIFIVE_E_MROM].base, &s->mask_rom);
-
/* MMIO */
s->plic = sifive_plic_create(memmap[SIFIVE_E_PLIC].base,
(char *)SIFIVE_E_PLIC_HART_CONFIG,
@@ -206,12 +214,6 @@ static void riscv_sifive_e_soc_realize(DeviceState *dev, Error **errp)
memmap[SIFIVE_E_QSPI2].base, memmap[SIFIVE_E_QSPI2].size);
create_unimplemented_device("riscv.sifive.e.pwm2",
memmap[SIFIVE_E_PWM2].base, memmap[SIFIVE_E_PWM2].size);
-
- /* Flash memory */
- memory_region_init_rom(&s->xip_mem, OBJECT(dev), "riscv.sifive.e.xip",
- memmap[SIFIVE_E_XIP].size, &error_fatal);
- memory_region_add_subregion(sys_mem, memmap[SIFIVE_E_XIP].base,
- &s->xip_mem);
}
static void riscv_sifive_e_machine_init(MachineClass *mc)
--
2.21.1
^ permalink raw reply related [flat|nested] 98+ messages in thread* [PATCH-for-5.1 v3 19/24] hw/riscv/sifive_e: Move some code from realize() to init()
@ 2020-04-12 22:36 ` Philippe Mathieu-Daudé
0 siblings, 0 replies; 98+ messages in thread
From: Philippe Mathieu-Daudé @ 2020-04-12 22:36 UTC (permalink / raw)
To: qemu-devel
Cc: Joel Stanley, Jean-Christophe Dubois, Subbaraya Sundeep,
Max Reitz, Palmer Dabbelt, qemu-ppc, Sagar Karandikar,
Markus Armbruster, Jeff Cody, Peter Maydell, Xie Changlong,
Fam Zheng, Eduardo Habkost, Alistair Francis, qemu-arm,
Wen Congyang, Philippe Mathieu-Daudé,
Bastian Koppelmann, Edgar E. Iglesias, Kevin Wolf,
Marc-André Lureau, David Gibson, Jason Wang, Peter Chubb,
Beniamino Galvani, Alistair Francis, qemu-riscv,
Cédric Le Goater, qemu-block, Paolo Bonzini, Andrew Jeffery,
Michael S. Tsirkin, Richard Henderson,
Philippe Mathieu-Daudé
Coccinelle reported:
$ spatch ... --timeout 60 --sp-file \
scripts/coccinelle/simplify-init-realize-error_propagate.cocci
HANDLING: ./hw/riscv/sifive_e.c
>>> possible moves from riscv_sifive_e_soc_init() to riscv_sifive_e_soc_realize() in ./hw/riscv/sifive_e.c:135
Move the calls using &error_fatal which don't depend on input
updated before realize() to init().
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
v3: Typo 'depend of' -> 'depend on' (eblake)
---
hw/riscv/sifive_e.c | 26 ++++++++++++++------------
1 file changed, 14 insertions(+), 12 deletions(-)
diff --git a/hw/riscv/sifive_e.c b/hw/riscv/sifive_e.c
index 646553a7c3..0be8b52147 100644
--- a/hw/riscv/sifive_e.c
+++ b/hw/riscv/sifive_e.c
@@ -118,7 +118,9 @@ static void riscv_sifive_e_init(MachineState *machine)
static void riscv_sifive_e_soc_init(Object *obj)
{
MachineState *ms = MACHINE(qdev_get_machine());
+ const struct MemmapEntry *memmap = sifive_e_memmap;
SiFiveESoCState *s = RISCV_E_SOC(obj);
+ MemoryRegion *sys_mem = get_system_memory();
object_initialize_child(obj, "cpus", &s->cpus,
sizeof(s->cpus), TYPE_RISCV_HART_ARRAY,
@@ -130,6 +132,18 @@ static void riscv_sifive_e_soc_init(Object *obj)
sysbus_init_child_obj(obj, "riscv.sifive.e.gpio0",
&s->gpio, sizeof(s->gpio),
TYPE_SIFIVE_GPIO);
+
+ /* Mask ROM */
+ memory_region_init_rom(&s->mask_rom, obj, "riscv.sifive.e.mrom",
+ memmap[SIFIVE_E_MROM].size, &error_fatal);
+ memory_region_add_subregion(sys_mem,
+ memmap[SIFIVE_E_MROM].base, &s->mask_rom);
+
+ /* Flash memory */
+ memory_region_init_rom(&s->xip_mem, obj, "riscv.sifive.e.xip",
+ memmap[SIFIVE_E_XIP].size, &error_fatal);
+ memory_region_add_subregion(sys_mem, memmap[SIFIVE_E_XIP].base,
+ &s->xip_mem);
}
static void riscv_sifive_e_soc_realize(DeviceState *dev, Error **errp)
@@ -144,12 +158,6 @@ static void riscv_sifive_e_soc_realize(DeviceState *dev, Error **errp)
object_property_set_bool(OBJECT(&s->cpus), true, "realized",
&error_abort);
- /* Mask ROM */
- memory_region_init_rom(&s->mask_rom, OBJECT(dev), "riscv.sifive.e.mrom",
- memmap[SIFIVE_E_MROM].size, &error_fatal);
- memory_region_add_subregion(sys_mem,
- memmap[SIFIVE_E_MROM].base, &s->mask_rom);
-
/* MMIO */
s->plic = sifive_plic_create(memmap[SIFIVE_E_PLIC].base,
(char *)SIFIVE_E_PLIC_HART_CONFIG,
@@ -206,12 +214,6 @@ static void riscv_sifive_e_soc_realize(DeviceState *dev, Error **errp)
memmap[SIFIVE_E_QSPI2].base, memmap[SIFIVE_E_QSPI2].size);
create_unimplemented_device("riscv.sifive.e.pwm2",
memmap[SIFIVE_E_PWM2].base, memmap[SIFIVE_E_PWM2].size);
-
- /* Flash memory */
- memory_region_init_rom(&s->xip_mem, OBJECT(dev), "riscv.sifive.e.xip",
- memmap[SIFIVE_E_XIP].size, &error_fatal);
- memory_region_add_subregion(sys_mem, memmap[SIFIVE_E_XIP].base,
- &s->xip_mem);
}
static void riscv_sifive_e_machine_init(MachineClass *mc)
--
2.21.1
^ permalink raw reply related [flat|nested] 98+ messages in thread* Re: [PATCH-for-5.1 v3 19/24] hw/riscv/sifive_e: Move some code from realize() to init()
2020-04-12 22:36 ` Philippe Mathieu-Daudé
@ 2020-04-13 22:20 ` Alistair Francis
-1 siblings, 0 replies; 98+ messages in thread
From: Alistair Francis @ 2020-04-13 22:20 UTC (permalink / raw)
To: Philippe Mathieu-Daudé
Cc: Fam Zheng, Peter Maydell, Sagar Karandikar, Michael S. Tsirkin,
Jeff Cody, Jason Wang, qemu-devel@nongnu.org Developers,
Alistair Francis, Edgar E. Iglesias, Max Reitz, Qemu-block,
Markus Armbruster, Joel Stanley, Marc-André Lureau,
David Gibson, Philippe Mathieu-Daudé,
Eduardo Habkost, Jean-Christophe Dubois, Xie Changlong,
Alistair Francis, Beniamino Galvani, qemu-arm, Peter Chubb,
Cédric Le Goater, open list:New World, Richard Henderson,
Kevin Wolf, open list:RISC-V, Andrew Jeffery, Wen Congyang,
Subbaraya Sundeep, Palmer Dabbelt, Bastian Koppelmann,
Paolo Bonzini
On Sun, Apr 12, 2020 at 3:45 PM Philippe Mathieu-Daudé <f4bug@amsat.org> wrote:
>
> Coccinelle reported:
>
> $ spatch ... --timeout 60 --sp-file \
> scripts/coccinelle/simplify-init-realize-error_propagate.cocci
> HANDLING: ./hw/riscv/sifive_e.c
> >>> possible moves from riscv_sifive_e_soc_init() to riscv_sifive_e_soc_realize() in ./hw/riscv/sifive_e.c:135
>
> Move the calls using &error_fatal which don't depend on input
> updated before realize() to init().
>
> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Alistair
> ---
> v3: Typo 'depend of' -> 'depend on' (eblake)
> ---
> hw/riscv/sifive_e.c | 26 ++++++++++++++------------
> 1 file changed, 14 insertions(+), 12 deletions(-)
>
> diff --git a/hw/riscv/sifive_e.c b/hw/riscv/sifive_e.c
> index 646553a7c3..0be8b52147 100644
> --- a/hw/riscv/sifive_e.c
> +++ b/hw/riscv/sifive_e.c
> @@ -118,7 +118,9 @@ static void riscv_sifive_e_init(MachineState *machine)
> static void riscv_sifive_e_soc_init(Object *obj)
> {
> MachineState *ms = MACHINE(qdev_get_machine());
> + const struct MemmapEntry *memmap = sifive_e_memmap;
> SiFiveESoCState *s = RISCV_E_SOC(obj);
> + MemoryRegion *sys_mem = get_system_memory();
>
> object_initialize_child(obj, "cpus", &s->cpus,
> sizeof(s->cpus), TYPE_RISCV_HART_ARRAY,
> @@ -130,6 +132,18 @@ static void riscv_sifive_e_soc_init(Object *obj)
> sysbus_init_child_obj(obj, "riscv.sifive.e.gpio0",
> &s->gpio, sizeof(s->gpio),
> TYPE_SIFIVE_GPIO);
> +
> + /* Mask ROM */
> + memory_region_init_rom(&s->mask_rom, obj, "riscv.sifive.e.mrom",
> + memmap[SIFIVE_E_MROM].size, &error_fatal);
> + memory_region_add_subregion(sys_mem,
> + memmap[SIFIVE_E_MROM].base, &s->mask_rom);
> +
> + /* Flash memory */
> + memory_region_init_rom(&s->xip_mem, obj, "riscv.sifive.e.xip",
> + memmap[SIFIVE_E_XIP].size, &error_fatal);
> + memory_region_add_subregion(sys_mem, memmap[SIFIVE_E_XIP].base,
> + &s->xip_mem);
> }
>
> static void riscv_sifive_e_soc_realize(DeviceState *dev, Error **errp)
> @@ -144,12 +158,6 @@ static void riscv_sifive_e_soc_realize(DeviceState *dev, Error **errp)
> object_property_set_bool(OBJECT(&s->cpus), true, "realized",
> &error_abort);
>
> - /* Mask ROM */
> - memory_region_init_rom(&s->mask_rom, OBJECT(dev), "riscv.sifive.e.mrom",
> - memmap[SIFIVE_E_MROM].size, &error_fatal);
> - memory_region_add_subregion(sys_mem,
> - memmap[SIFIVE_E_MROM].base, &s->mask_rom);
> -
> /* MMIO */
> s->plic = sifive_plic_create(memmap[SIFIVE_E_PLIC].base,
> (char *)SIFIVE_E_PLIC_HART_CONFIG,
> @@ -206,12 +214,6 @@ static void riscv_sifive_e_soc_realize(DeviceState *dev, Error **errp)
> memmap[SIFIVE_E_QSPI2].base, memmap[SIFIVE_E_QSPI2].size);
> create_unimplemented_device("riscv.sifive.e.pwm2",
> memmap[SIFIVE_E_PWM2].base, memmap[SIFIVE_E_PWM2].size);
> -
> - /* Flash memory */
> - memory_region_init_rom(&s->xip_mem, OBJECT(dev), "riscv.sifive.e.xip",
> - memmap[SIFIVE_E_XIP].size, &error_fatal);
> - memory_region_add_subregion(sys_mem, memmap[SIFIVE_E_XIP].base,
> - &s->xip_mem);
> }
>
> static void riscv_sifive_e_machine_init(MachineClass *mc)
> --
> 2.21.1
>
>
^ permalink raw reply [flat|nested] 98+ messages in thread* Re: [PATCH-for-5.1 v3 19/24] hw/riscv/sifive_e: Move some code from realize() to init()
@ 2020-04-13 22:20 ` Alistair Francis
0 siblings, 0 replies; 98+ messages in thread
From: Alistair Francis @ 2020-04-13 22:20 UTC (permalink / raw)
To: Philippe Mathieu-Daudé
Cc: qemu-devel@nongnu.org Developers, Fam Zheng, Peter Maydell,
Sagar Karandikar, Michael S. Tsirkin, Jeff Cody, Jason Wang,
Alistair Francis, Edgar E. Iglesias, Subbaraya Sundeep,
Qemu-block, Markus Armbruster, Max Reitz, Joel Stanley,
Marc-André Lureau, Richard Henderson,
Philippe Mathieu-Daudé,
Eduardo Habkost, Xie Changlong, Alistair Francis,
Beniamino Galvani, qemu-arm, Peter Chubb, Cédric Le Goater,
Palmer Dabbelt, David Gibson, Kevin Wolf, open list:RISC-V,
Andrew Jeffery, Wen Congyang, Jean-Christophe Dubois,
open list:New World, Bastian Koppelmann, Paolo Bonzini
On Sun, Apr 12, 2020 at 3:45 PM Philippe Mathieu-Daudé <f4bug@amsat.org> wrote:
>
> Coccinelle reported:
>
> $ spatch ... --timeout 60 --sp-file \
> scripts/coccinelle/simplify-init-realize-error_propagate.cocci
> HANDLING: ./hw/riscv/sifive_e.c
> >>> possible moves from riscv_sifive_e_soc_init() to riscv_sifive_e_soc_realize() in ./hw/riscv/sifive_e.c:135
>
> Move the calls using &error_fatal which don't depend on input
> updated before realize() to init().
>
> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Alistair
> ---
> v3: Typo 'depend of' -> 'depend on' (eblake)
> ---
> hw/riscv/sifive_e.c | 26 ++++++++++++++------------
> 1 file changed, 14 insertions(+), 12 deletions(-)
>
> diff --git a/hw/riscv/sifive_e.c b/hw/riscv/sifive_e.c
> index 646553a7c3..0be8b52147 100644
> --- a/hw/riscv/sifive_e.c
> +++ b/hw/riscv/sifive_e.c
> @@ -118,7 +118,9 @@ static void riscv_sifive_e_init(MachineState *machine)
> static void riscv_sifive_e_soc_init(Object *obj)
> {
> MachineState *ms = MACHINE(qdev_get_machine());
> + const struct MemmapEntry *memmap = sifive_e_memmap;
> SiFiveESoCState *s = RISCV_E_SOC(obj);
> + MemoryRegion *sys_mem = get_system_memory();
>
> object_initialize_child(obj, "cpus", &s->cpus,
> sizeof(s->cpus), TYPE_RISCV_HART_ARRAY,
> @@ -130,6 +132,18 @@ static void riscv_sifive_e_soc_init(Object *obj)
> sysbus_init_child_obj(obj, "riscv.sifive.e.gpio0",
> &s->gpio, sizeof(s->gpio),
> TYPE_SIFIVE_GPIO);
> +
> + /* Mask ROM */
> + memory_region_init_rom(&s->mask_rom, obj, "riscv.sifive.e.mrom",
> + memmap[SIFIVE_E_MROM].size, &error_fatal);
> + memory_region_add_subregion(sys_mem,
> + memmap[SIFIVE_E_MROM].base, &s->mask_rom);
> +
> + /* Flash memory */
> + memory_region_init_rom(&s->xip_mem, obj, "riscv.sifive.e.xip",
> + memmap[SIFIVE_E_XIP].size, &error_fatal);
> + memory_region_add_subregion(sys_mem, memmap[SIFIVE_E_XIP].base,
> + &s->xip_mem);
> }
>
> static void riscv_sifive_e_soc_realize(DeviceState *dev, Error **errp)
> @@ -144,12 +158,6 @@ static void riscv_sifive_e_soc_realize(DeviceState *dev, Error **errp)
> object_property_set_bool(OBJECT(&s->cpus), true, "realized",
> &error_abort);
>
> - /* Mask ROM */
> - memory_region_init_rom(&s->mask_rom, OBJECT(dev), "riscv.sifive.e.mrom",
> - memmap[SIFIVE_E_MROM].size, &error_fatal);
> - memory_region_add_subregion(sys_mem,
> - memmap[SIFIVE_E_MROM].base, &s->mask_rom);
> -
> /* MMIO */
> s->plic = sifive_plic_create(memmap[SIFIVE_E_PLIC].base,
> (char *)SIFIVE_E_PLIC_HART_CONFIG,
> @@ -206,12 +214,6 @@ static void riscv_sifive_e_soc_realize(DeviceState *dev, Error **errp)
> memmap[SIFIVE_E_QSPI2].base, memmap[SIFIVE_E_QSPI2].size);
> create_unimplemented_device("riscv.sifive.e.pwm2",
> memmap[SIFIVE_E_PWM2].base, memmap[SIFIVE_E_PWM2].size);
> -
> - /* Flash memory */
> - memory_region_init_rom(&s->xip_mem, OBJECT(dev), "riscv.sifive.e.xip",
> - memmap[SIFIVE_E_XIP].size, &error_fatal);
> - memory_region_add_subregion(sys_mem, memmap[SIFIVE_E_XIP].base,
> - &s->xip_mem);
> }
>
> static void riscv_sifive_e_machine_init(MachineClass *mc)
> --
> 2.21.1
>
>
^ permalink raw reply [flat|nested] 98+ messages in thread
* [PATCH-for-5.1 v3 20/24] hw/riscv/sifive_u: Use single type_init()
2020-04-12 22:35 ` Philippe Mathieu-Daudé
@ 2020-04-12 22:36 ` Philippe Mathieu-Daudé
-1 siblings, 0 replies; 98+ messages in thread
From: Philippe Mathieu-Daudé @ 2020-04-12 22:36 UTC (permalink / raw)
To: qemu-devel
Cc: Fam Zheng, Peter Maydell, Sagar Karandikar, Michael S. Tsirkin,
Jeff Cody, Jason Wang, Alistair Francis, Edgar E. Iglesias,
Subbaraya Sundeep, qemu-block, Markus Armbruster, Max Reitz,
Joel Stanley, Marc-André Lureau, Richard Henderson,
Philippe Mathieu-Daudé,
Eduardo Habkost, Xie Changlong, Alistair Francis,
Beniamino Galvani, qemu-arm, Peter Chubb, Cédric Le Goater,
Palmer Dabbelt, David Gibson, Kevin Wolf, qemu-riscv,
Andrew Jeffery, Wen Congyang, Philippe Mathieu-Daudé,
Jean-Christophe Dubois, qemu-ppc, Bastian Koppelmann,
Paolo Bonzini
We can use a single type_init() to call multiple type_register*().
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
hw/riscv/sifive_u.c | 12 +++---------
1 file changed, 3 insertions(+), 9 deletions(-)
diff --git a/hw/riscv/sifive_u.c b/hw/riscv/sifive_u.c
index 998666c91f..9c90c94c33 100644
--- a/hw/riscv/sifive_u.c
+++ b/hw/riscv/sifive_u.c
@@ -601,13 +601,6 @@ static const TypeInfo riscv_sifive_u_soc_type_info = {
.class_init = riscv_sifive_u_soc_class_init,
};
-static void riscv_sifive_u_soc_register_types(void)
-{
- type_register_static(&riscv_sifive_u_soc_type_info);
-}
-
-type_init(riscv_sifive_u_soc_register_types)
-
static void riscv_sifive_u_machine_class_init(ObjectClass *oc, void *data)
{
MachineClass *mc = MACHINE_CLASS(oc);
@@ -627,9 +620,10 @@ static const TypeInfo riscv_sifive_u_machine_typeinfo = {
.instance_size = sizeof(SiFiveUState),
};
-static void riscv_sifive_u_machine_init_register_types(void)
+static void riscv_sifive_u_register_types(void)
{
+ type_register_static(&riscv_sifive_u_soc_type_info);
type_register_static(&riscv_sifive_u_machine_typeinfo);
}
-type_init(riscv_sifive_u_machine_init_register_types)
+type_init(riscv_sifive_u_register_types)
--
2.21.1
^ permalink raw reply related [flat|nested] 98+ messages in thread* [PATCH-for-5.1 v3 20/24] hw/riscv/sifive_u: Use single type_init()
@ 2020-04-12 22:36 ` Philippe Mathieu-Daudé
0 siblings, 0 replies; 98+ messages in thread
From: Philippe Mathieu-Daudé @ 2020-04-12 22:36 UTC (permalink / raw)
To: qemu-devel
Cc: Joel Stanley, Jean-Christophe Dubois, Subbaraya Sundeep,
Max Reitz, Palmer Dabbelt, qemu-ppc, Sagar Karandikar,
Markus Armbruster, Jeff Cody, Peter Maydell, Xie Changlong,
Fam Zheng, Eduardo Habkost, Alistair Francis, qemu-arm,
Wen Congyang, Philippe Mathieu-Daudé,
Bastian Koppelmann, Edgar E. Iglesias, Kevin Wolf,
Marc-André Lureau, David Gibson, Jason Wang, Peter Chubb,
Beniamino Galvani, Alistair Francis, qemu-riscv,
Cédric Le Goater, qemu-block, Paolo Bonzini, Andrew Jeffery,
Michael S. Tsirkin, Richard Henderson,
Philippe Mathieu-Daudé
We can use a single type_init() to call multiple type_register*().
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
hw/riscv/sifive_u.c | 12 +++---------
1 file changed, 3 insertions(+), 9 deletions(-)
diff --git a/hw/riscv/sifive_u.c b/hw/riscv/sifive_u.c
index 998666c91f..9c90c94c33 100644
--- a/hw/riscv/sifive_u.c
+++ b/hw/riscv/sifive_u.c
@@ -601,13 +601,6 @@ static const TypeInfo riscv_sifive_u_soc_type_info = {
.class_init = riscv_sifive_u_soc_class_init,
};
-static void riscv_sifive_u_soc_register_types(void)
-{
- type_register_static(&riscv_sifive_u_soc_type_info);
-}
-
-type_init(riscv_sifive_u_soc_register_types)
-
static void riscv_sifive_u_machine_class_init(ObjectClass *oc, void *data)
{
MachineClass *mc = MACHINE_CLASS(oc);
@@ -627,9 +620,10 @@ static const TypeInfo riscv_sifive_u_machine_typeinfo = {
.instance_size = sizeof(SiFiveUState),
};
-static void riscv_sifive_u_machine_init_register_types(void)
+static void riscv_sifive_u_register_types(void)
{
+ type_register_static(&riscv_sifive_u_soc_type_info);
type_register_static(&riscv_sifive_u_machine_typeinfo);
}
-type_init(riscv_sifive_u_machine_init_register_types)
+type_init(riscv_sifive_u_register_types)
--
2.21.1
^ permalink raw reply related [flat|nested] 98+ messages in thread* Re: [PATCH-for-5.1 v3 20/24] hw/riscv/sifive_u: Use single type_init()
2020-04-12 22:36 ` Philippe Mathieu-Daudé
@ 2020-04-13 22:10 ` Alistair Francis
-1 siblings, 0 replies; 98+ messages in thread
From: Alistair Francis @ 2020-04-13 22:10 UTC (permalink / raw)
To: Philippe Mathieu-Daudé
Cc: Fam Zheng, Peter Maydell, Sagar Karandikar, Michael S. Tsirkin,
Jeff Cody, Jason Wang, qemu-devel@nongnu.org Developers,
Alistair Francis, Edgar E. Iglesias, Max Reitz, Qemu-block,
Markus Armbruster, Joel Stanley, Marc-André Lureau,
David Gibson, Philippe Mathieu-Daudé,
Eduardo Habkost, Jean-Christophe Dubois, Xie Changlong,
Alistair Francis, Beniamino Galvani, qemu-arm, Peter Chubb,
Cédric Le Goater, open list:New World, Richard Henderson,
Kevin Wolf, open list:RISC-V, Andrew Jeffery, Wen Congyang,
Subbaraya Sundeep, Palmer Dabbelt, Bastian Koppelmann,
Paolo Bonzini
On Sun, Apr 12, 2020 at 3:48 PM Philippe Mathieu-Daudé <f4bug@amsat.org> wrote:
>
> We can use a single type_init() to call multiple type_register*().
>
> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Alistair
> ---
> hw/riscv/sifive_u.c | 12 +++---------
> 1 file changed, 3 insertions(+), 9 deletions(-)
>
> diff --git a/hw/riscv/sifive_u.c b/hw/riscv/sifive_u.c
> index 998666c91f..9c90c94c33 100644
> --- a/hw/riscv/sifive_u.c
> +++ b/hw/riscv/sifive_u.c
> @@ -601,13 +601,6 @@ static const TypeInfo riscv_sifive_u_soc_type_info = {
> .class_init = riscv_sifive_u_soc_class_init,
> };
>
> -static void riscv_sifive_u_soc_register_types(void)
> -{
> - type_register_static(&riscv_sifive_u_soc_type_info);
> -}
> -
> -type_init(riscv_sifive_u_soc_register_types)
> -
> static void riscv_sifive_u_machine_class_init(ObjectClass *oc, void *data)
> {
> MachineClass *mc = MACHINE_CLASS(oc);
> @@ -627,9 +620,10 @@ static const TypeInfo riscv_sifive_u_machine_typeinfo = {
> .instance_size = sizeof(SiFiveUState),
> };
>
> -static void riscv_sifive_u_machine_init_register_types(void)
> +static void riscv_sifive_u_register_types(void)
> {
> + type_register_static(&riscv_sifive_u_soc_type_info);
> type_register_static(&riscv_sifive_u_machine_typeinfo);
> }
>
> -type_init(riscv_sifive_u_machine_init_register_types)
> +type_init(riscv_sifive_u_register_types)
> --
> 2.21.1
>
>
^ permalink raw reply [flat|nested] 98+ messages in thread* Re: [PATCH-for-5.1 v3 20/24] hw/riscv/sifive_u: Use single type_init()
@ 2020-04-13 22:10 ` Alistair Francis
0 siblings, 0 replies; 98+ messages in thread
From: Alistair Francis @ 2020-04-13 22:10 UTC (permalink / raw)
To: Philippe Mathieu-Daudé
Cc: qemu-devel@nongnu.org Developers, Fam Zheng, Peter Maydell,
Sagar Karandikar, Michael S. Tsirkin, Jeff Cody, Jason Wang,
Alistair Francis, Edgar E. Iglesias, Subbaraya Sundeep,
Qemu-block, Markus Armbruster, Max Reitz, Joel Stanley,
Marc-André Lureau, Richard Henderson,
Philippe Mathieu-Daudé,
Eduardo Habkost, Xie Changlong, Alistair Francis,
Beniamino Galvani, qemu-arm, Peter Chubb, Cédric Le Goater,
Palmer Dabbelt, David Gibson, Kevin Wolf, open list:RISC-V,
Andrew Jeffery, Wen Congyang, Jean-Christophe Dubois,
open list:New World, Bastian Koppelmann, Paolo Bonzini
On Sun, Apr 12, 2020 at 3:48 PM Philippe Mathieu-Daudé <f4bug@amsat.org> wrote:
>
> We can use a single type_init() to call multiple type_register*().
>
> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Alistair
> ---
> hw/riscv/sifive_u.c | 12 +++---------
> 1 file changed, 3 insertions(+), 9 deletions(-)
>
> diff --git a/hw/riscv/sifive_u.c b/hw/riscv/sifive_u.c
> index 998666c91f..9c90c94c33 100644
> --- a/hw/riscv/sifive_u.c
> +++ b/hw/riscv/sifive_u.c
> @@ -601,13 +601,6 @@ static const TypeInfo riscv_sifive_u_soc_type_info = {
> .class_init = riscv_sifive_u_soc_class_init,
> };
>
> -static void riscv_sifive_u_soc_register_types(void)
> -{
> - type_register_static(&riscv_sifive_u_soc_type_info);
> -}
> -
> -type_init(riscv_sifive_u_soc_register_types)
> -
> static void riscv_sifive_u_machine_class_init(ObjectClass *oc, void *data)
> {
> MachineClass *mc = MACHINE_CLASS(oc);
> @@ -627,9 +620,10 @@ static const TypeInfo riscv_sifive_u_machine_typeinfo = {
> .instance_size = sizeof(SiFiveUState),
> };
>
> -static void riscv_sifive_u_machine_init_register_types(void)
> +static void riscv_sifive_u_register_types(void)
> {
> + type_register_static(&riscv_sifive_u_soc_type_info);
> type_register_static(&riscv_sifive_u_machine_typeinfo);
> }
>
> -type_init(riscv_sifive_u_machine_init_register_types)
> +type_init(riscv_sifive_u_register_types)
> --
> 2.21.1
>
>
^ permalink raw reply [flat|nested] 98+ messages in thread
* [PATCH-for-5.1 v3 21/24] hw/riscv/sifive_u: Move some code from realize() to init()
2020-04-12 22:35 ` Philippe Mathieu-Daudé
@ 2020-04-12 22:36 ` Philippe Mathieu-Daudé
-1 siblings, 0 replies; 98+ messages in thread
From: Philippe Mathieu-Daudé @ 2020-04-12 22:36 UTC (permalink / raw)
To: qemu-devel
Cc: Fam Zheng, Peter Maydell, Sagar Karandikar, Michael S. Tsirkin,
Jeff Cody, Jason Wang, Alistair Francis, Edgar E. Iglesias,
Subbaraya Sundeep, qemu-block, Markus Armbruster, Max Reitz,
Joel Stanley, Marc-André Lureau, Richard Henderson,
Philippe Mathieu-Daudé,
Eduardo Habkost, Xie Changlong, Alistair Francis,
Beniamino Galvani, qemu-arm, Peter Chubb, Cédric Le Goater,
Palmer Dabbelt, David Gibson, Kevin Wolf, qemu-riscv,
Andrew Jeffery, Wen Congyang, Philippe Mathieu-Daudé,
Jean-Christophe Dubois, qemu-ppc, Bastian Koppelmann,
Paolo Bonzini
Coccinelle reported:
$ spatch ... --timeout 60 --sp-file \
scripts/coccinelle/simplify-init-realize-error_propagate.cocci
HANDLING: ./hw/riscv/sifive_u.c
>>> possible moves from riscv_sifive_u_soc_init() to riscv_sifive_u_soc_realize() in ./hw/riscv/sifive_u.c:473
Move the calls using &error_abort which don't depend on input
updated before realize() to init().
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
v3: Typo 'depend of' -> 'depend on' (eblake)
---
hw/riscv/sifive_u.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/hw/riscv/sifive_u.c b/hw/riscv/sifive_u.c
index 9c90c94c33..754af19eef 100644
--- a/hw/riscv/sifive_u.c
+++ b/hw/riscv/sifive_u.c
@@ -441,6 +441,8 @@ static void riscv_sifive_u_soc_init(Object *obj)
qdev_prop_set_uint32(DEVICE(&s->otp), "serial", OTP_SERIAL);
sysbus_init_child_obj(obj, "gem", &s->gem, sizeof(s->gem),
TYPE_CADENCE_GEM);
+ object_property_set_int(OBJECT(&s->gem), GEM_REVISION, "revision",
+ &error_abort);
}
static bool sifive_u_get_start_in_flash(Object *obj, Error **errp)
@@ -569,8 +571,6 @@ static void riscv_sifive_u_soc_realize(DeviceState *dev, Error **errp)
qemu_check_nic_model(nd, TYPE_CADENCE_GEM);
qdev_set_nic_properties(DEVICE(&s->gem), nd);
}
- object_property_set_int(OBJECT(&s->gem), GEM_REVISION, "revision",
- &error_abort);
object_property_set_bool(OBJECT(&s->gem), true, "realized", &err);
if (err) {
error_propagate(errp, err);
--
2.21.1
^ permalink raw reply related [flat|nested] 98+ messages in thread* [PATCH-for-5.1 v3 21/24] hw/riscv/sifive_u: Move some code from realize() to init()
@ 2020-04-12 22:36 ` Philippe Mathieu-Daudé
0 siblings, 0 replies; 98+ messages in thread
From: Philippe Mathieu-Daudé @ 2020-04-12 22:36 UTC (permalink / raw)
To: qemu-devel
Cc: Joel Stanley, Jean-Christophe Dubois, Subbaraya Sundeep,
Max Reitz, Palmer Dabbelt, qemu-ppc, Sagar Karandikar,
Markus Armbruster, Jeff Cody, Peter Maydell, Xie Changlong,
Fam Zheng, Eduardo Habkost, Alistair Francis, qemu-arm,
Wen Congyang, Philippe Mathieu-Daudé,
Bastian Koppelmann, Edgar E. Iglesias, Kevin Wolf,
Marc-André Lureau, David Gibson, Jason Wang, Peter Chubb,
Beniamino Galvani, Alistair Francis, qemu-riscv,
Cédric Le Goater, qemu-block, Paolo Bonzini, Andrew Jeffery,
Michael S. Tsirkin, Richard Henderson,
Philippe Mathieu-Daudé
Coccinelle reported:
$ spatch ... --timeout 60 --sp-file \
scripts/coccinelle/simplify-init-realize-error_propagate.cocci
HANDLING: ./hw/riscv/sifive_u.c
>>> possible moves from riscv_sifive_u_soc_init() to riscv_sifive_u_soc_realize() in ./hw/riscv/sifive_u.c:473
Move the calls using &error_abort which don't depend on input
updated before realize() to init().
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
v3: Typo 'depend of' -> 'depend on' (eblake)
---
hw/riscv/sifive_u.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/hw/riscv/sifive_u.c b/hw/riscv/sifive_u.c
index 9c90c94c33..754af19eef 100644
--- a/hw/riscv/sifive_u.c
+++ b/hw/riscv/sifive_u.c
@@ -441,6 +441,8 @@ static void riscv_sifive_u_soc_init(Object *obj)
qdev_prop_set_uint32(DEVICE(&s->otp), "serial", OTP_SERIAL);
sysbus_init_child_obj(obj, "gem", &s->gem, sizeof(s->gem),
TYPE_CADENCE_GEM);
+ object_property_set_int(OBJECT(&s->gem), GEM_REVISION, "revision",
+ &error_abort);
}
static bool sifive_u_get_start_in_flash(Object *obj, Error **errp)
@@ -569,8 +571,6 @@ static void riscv_sifive_u_soc_realize(DeviceState *dev, Error **errp)
qemu_check_nic_model(nd, TYPE_CADENCE_GEM);
qdev_set_nic_properties(DEVICE(&s->gem), nd);
}
- object_property_set_int(OBJECT(&s->gem), GEM_REVISION, "revision",
- &error_abort);
object_property_set_bool(OBJECT(&s->gem), true, "realized", &err);
if (err) {
error_propagate(errp, err);
--
2.21.1
^ permalink raw reply related [flat|nested] 98+ messages in thread* Re: [PATCH-for-5.1 v3 21/24] hw/riscv/sifive_u: Move some code from realize() to init()
2020-04-12 22:36 ` Philippe Mathieu-Daudé
@ 2020-04-13 22:16 ` Alistair Francis
-1 siblings, 0 replies; 98+ messages in thread
From: Alistair Francis @ 2020-04-13 22:16 UTC (permalink / raw)
To: Philippe Mathieu-Daudé
Cc: Fam Zheng, Peter Maydell, Sagar Karandikar, Michael S. Tsirkin,
Jeff Cody, Jason Wang, qemu-devel@nongnu.org Developers,
Alistair Francis, Edgar E. Iglesias, Max Reitz, Qemu-block,
Markus Armbruster, Joel Stanley, Marc-André Lureau,
David Gibson, Philippe Mathieu-Daudé,
Eduardo Habkost, Jean-Christophe Dubois, Xie Changlong,
Alistair Francis, Beniamino Galvani, qemu-arm, Peter Chubb,
Cédric Le Goater, open list:New World, Richard Henderson,
Kevin Wolf, open list:RISC-V, Andrew Jeffery, Wen Congyang,
Subbaraya Sundeep, Palmer Dabbelt, Bastian Koppelmann,
Paolo Bonzini
On Sun, Apr 12, 2020 at 3:49 PM Philippe Mathieu-Daudé <f4bug@amsat.org> wrote:
>
> Coccinelle reported:
>
> $ spatch ... --timeout 60 --sp-file \
> scripts/coccinelle/simplify-init-realize-error_propagate.cocci
> HANDLING: ./hw/riscv/sifive_u.c
> >>> possible moves from riscv_sifive_u_soc_init() to riscv_sifive_u_soc_realize() in ./hw/riscv/sifive_u.c:473
>
> Move the calls using &error_abort which don't depend on input
> updated before realize() to init().
>
> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Alistair
> ---
> v3: Typo 'depend of' -> 'depend on' (eblake)
> ---
> hw/riscv/sifive_u.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/hw/riscv/sifive_u.c b/hw/riscv/sifive_u.c
> index 9c90c94c33..754af19eef 100644
> --- a/hw/riscv/sifive_u.c
> +++ b/hw/riscv/sifive_u.c
> @@ -441,6 +441,8 @@ static void riscv_sifive_u_soc_init(Object *obj)
> qdev_prop_set_uint32(DEVICE(&s->otp), "serial", OTP_SERIAL);
> sysbus_init_child_obj(obj, "gem", &s->gem, sizeof(s->gem),
> TYPE_CADENCE_GEM);
> + object_property_set_int(OBJECT(&s->gem), GEM_REVISION, "revision",
> + &error_abort);
> }
>
> static bool sifive_u_get_start_in_flash(Object *obj, Error **errp)
> @@ -569,8 +571,6 @@ static void riscv_sifive_u_soc_realize(DeviceState *dev, Error **errp)
> qemu_check_nic_model(nd, TYPE_CADENCE_GEM);
> qdev_set_nic_properties(DEVICE(&s->gem), nd);
> }
> - object_property_set_int(OBJECT(&s->gem), GEM_REVISION, "revision",
> - &error_abort);
> object_property_set_bool(OBJECT(&s->gem), true, "realized", &err);
> if (err) {
> error_propagate(errp, err);
> --
> 2.21.1
>
>
^ permalink raw reply [flat|nested] 98+ messages in thread* Re: [PATCH-for-5.1 v3 21/24] hw/riscv/sifive_u: Move some code from realize() to init()
@ 2020-04-13 22:16 ` Alistair Francis
0 siblings, 0 replies; 98+ messages in thread
From: Alistair Francis @ 2020-04-13 22:16 UTC (permalink / raw)
To: Philippe Mathieu-Daudé
Cc: qemu-devel@nongnu.org Developers, Fam Zheng, Peter Maydell,
Sagar Karandikar, Michael S. Tsirkin, Jeff Cody, Jason Wang,
Alistair Francis, Edgar E. Iglesias, Subbaraya Sundeep,
Qemu-block, Markus Armbruster, Max Reitz, Joel Stanley,
Marc-André Lureau, Richard Henderson,
Philippe Mathieu-Daudé,
Eduardo Habkost, Xie Changlong, Alistair Francis,
Beniamino Galvani, qemu-arm, Peter Chubb, Cédric Le Goater,
Palmer Dabbelt, David Gibson, Kevin Wolf, open list:RISC-V,
Andrew Jeffery, Wen Congyang, Jean-Christophe Dubois,
open list:New World, Bastian Koppelmann, Paolo Bonzini
On Sun, Apr 12, 2020 at 3:49 PM Philippe Mathieu-Daudé <f4bug@amsat.org> wrote:
>
> Coccinelle reported:
>
> $ spatch ... --timeout 60 --sp-file \
> scripts/coccinelle/simplify-init-realize-error_propagate.cocci
> HANDLING: ./hw/riscv/sifive_u.c
> >>> possible moves from riscv_sifive_u_soc_init() to riscv_sifive_u_soc_realize() in ./hw/riscv/sifive_u.c:473
>
> Move the calls using &error_abort which don't depend on input
> updated before realize() to init().
>
> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Alistair
> ---
> v3: Typo 'depend of' -> 'depend on' (eblake)
> ---
> hw/riscv/sifive_u.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/hw/riscv/sifive_u.c b/hw/riscv/sifive_u.c
> index 9c90c94c33..754af19eef 100644
> --- a/hw/riscv/sifive_u.c
> +++ b/hw/riscv/sifive_u.c
> @@ -441,6 +441,8 @@ static void riscv_sifive_u_soc_init(Object *obj)
> qdev_prop_set_uint32(DEVICE(&s->otp), "serial", OTP_SERIAL);
> sysbus_init_child_obj(obj, "gem", &s->gem, sizeof(s->gem),
> TYPE_CADENCE_GEM);
> + object_property_set_int(OBJECT(&s->gem), GEM_REVISION, "revision",
> + &error_abort);
> }
>
> static bool sifive_u_get_start_in_flash(Object *obj, Error **errp)
> @@ -569,8 +571,6 @@ static void riscv_sifive_u_soc_realize(DeviceState *dev, Error **errp)
> qemu_check_nic_model(nd, TYPE_CADENCE_GEM);
> qdev_set_nic_properties(DEVICE(&s->gem), nd);
> }
> - object_property_set_int(OBJECT(&s->gem), GEM_REVISION, "revision",
> - &error_abort);
> object_property_set_bool(OBJECT(&s->gem), true, "realized", &err);
> if (err) {
> error_propagate(errp, err);
> --
> 2.21.1
>
>
^ permalink raw reply [flat|nested] 98+ messages in thread
* [PATCH-for-5.1 v3 22/24] hw/riscv/sifive_u: Store MemoryRegion in SiFiveUSoCState
2020-04-12 22:35 ` Philippe Mathieu-Daudé
@ 2020-04-12 22:36 ` Philippe Mathieu-Daudé
-1 siblings, 0 replies; 98+ messages in thread
From: Philippe Mathieu-Daudé @ 2020-04-12 22:36 UTC (permalink / raw)
To: qemu-devel
Cc: Fam Zheng, Peter Maydell, Sagar Karandikar, Michael S. Tsirkin,
Jeff Cody, Jason Wang, Alistair Francis, Edgar E. Iglesias,
Subbaraya Sundeep, qemu-block, Markus Armbruster, Max Reitz,
Joel Stanley, Marc-André Lureau, Richard Henderson,
Philippe Mathieu-Daudé,
Eduardo Habkost, Xie Changlong, Alistair Francis,
Beniamino Galvani, qemu-arm, Peter Chubb, Cédric Le Goater,
Palmer Dabbelt, David Gibson, Kevin Wolf, qemu-riscv,
Andrew Jeffery, Wen Congyang, Philippe Mathieu-Daudé,
Jean-Christophe Dubois, qemu-ppc, Bastian Koppelmann,
Paolo Bonzini
Coccinelle reported:
$ spatch ... --timeout 60 --sp-file \
scripts/coccinelle/simplify-init-realize-error_propagate.cocci
HANDLING: ./hw/riscv/sifive_u.c
>>> possible moves from riscv_sifive_u_soc_init() to riscv_sifive_u_soc_realize() in ./hw/riscv/sifive_u.c:473
While reviewing we notice storing the MemoryRegion in the device
state, we'll be able to later automatically simplify the error
propagation calls.
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
include/hw/riscv/sifive_u.h | 2 ++
hw/riscv/sifive_u.c | 10 ++++------
2 files changed, 6 insertions(+), 6 deletions(-)
diff --git a/include/hw/riscv/sifive_u.h b/include/hw/riscv/sifive_u.h
index 82667b5746..254c6a64f8 100644
--- a/include/hw/riscv/sifive_u.h
+++ b/include/hw/riscv/sifive_u.h
@@ -42,6 +42,8 @@ typedef struct SiFiveUSoCState {
SiFiveUPRCIState prci;
SiFiveUOTPState otp;
CadenceGEMState gem;
+ MemoryRegion mask_rom;
+ MemoryRegion l2lim_mem;
} SiFiveUSoCState;
#define TYPE_RISCV_U_MACHINE MACHINE_TYPE_NAME("sifive_u")
diff --git a/hw/riscv/sifive_u.c b/hw/riscv/sifive_u.c
index 754af19eef..96177c1977 100644
--- a/hw/riscv/sifive_u.c
+++ b/hw/riscv/sifive_u.c
@@ -478,8 +478,6 @@ static void riscv_sifive_u_soc_realize(DeviceState *dev, Error **errp)
SiFiveUSoCState *s = RISCV_U_SOC(dev);
const struct MemmapEntry *memmap = sifive_u_memmap;
MemoryRegion *system_memory = get_system_memory();
- MemoryRegion *mask_rom = g_new(MemoryRegion, 1);
- MemoryRegion *l2lim_mem = g_new(MemoryRegion, 1);
qemu_irq plic_gpios[SIFIVE_U_PLIC_NUM_SOURCES];
char *plic_hart_config;
size_t plic_hart_config_len;
@@ -503,10 +501,10 @@ static void riscv_sifive_u_soc_realize(DeviceState *dev, Error **errp)
&error_abort);
/* boot rom */
- memory_region_init_rom(mask_rom, OBJECT(dev), "riscv.sifive.u.mrom",
+ memory_region_init_rom(&s->mask_rom, OBJECT(dev), "riscv.sifive.u.mrom",
memmap[SIFIVE_U_MROM].size, &error_fatal);
memory_region_add_subregion(system_memory, memmap[SIFIVE_U_MROM].base,
- mask_rom);
+ &s->mask_rom);
/*
* Add L2-LIM at reset size.
@@ -517,10 +515,10 @@ static void riscv_sifive_u_soc_realize(DeviceState *dev, Error **errp)
* leave it enabled all the time. This won't break anything, but will be
* too generous to misbehaving guests.
*/
- memory_region_init_ram(l2lim_mem, NULL, "riscv.sifive.u.l2lim",
+ memory_region_init_ram(&s->l2lim_mem, NULL, "riscv.sifive.u.l2lim",
memmap[SIFIVE_U_L2LIM].size, &error_fatal);
memory_region_add_subregion(system_memory, memmap[SIFIVE_U_L2LIM].base,
- l2lim_mem);
+ &s->l2lim_mem);
/* create PLIC hart topology configuration string */
plic_hart_config_len = (strlen(SIFIVE_U_PLIC_HART_CONFIG) + 1) *
--
2.21.1
^ permalink raw reply related [flat|nested] 98+ messages in thread* [PATCH-for-5.1 v3 22/24] hw/riscv/sifive_u: Store MemoryRegion in SiFiveUSoCState
@ 2020-04-12 22:36 ` Philippe Mathieu-Daudé
0 siblings, 0 replies; 98+ messages in thread
From: Philippe Mathieu-Daudé @ 2020-04-12 22:36 UTC (permalink / raw)
To: qemu-devel
Cc: Joel Stanley, Jean-Christophe Dubois, Subbaraya Sundeep,
Max Reitz, Palmer Dabbelt, qemu-ppc, Sagar Karandikar,
Markus Armbruster, Jeff Cody, Peter Maydell, Xie Changlong,
Fam Zheng, Eduardo Habkost, Alistair Francis, qemu-arm,
Wen Congyang, Philippe Mathieu-Daudé,
Bastian Koppelmann, Edgar E. Iglesias, Kevin Wolf,
Marc-André Lureau, David Gibson, Jason Wang, Peter Chubb,
Beniamino Galvani, Alistair Francis, qemu-riscv,
Cédric Le Goater, qemu-block, Paolo Bonzini, Andrew Jeffery,
Michael S. Tsirkin, Richard Henderson,
Philippe Mathieu-Daudé
Coccinelle reported:
$ spatch ... --timeout 60 --sp-file \
scripts/coccinelle/simplify-init-realize-error_propagate.cocci
HANDLING: ./hw/riscv/sifive_u.c
>>> possible moves from riscv_sifive_u_soc_init() to riscv_sifive_u_soc_realize() in ./hw/riscv/sifive_u.c:473
While reviewing we notice storing the MemoryRegion in the device
state, we'll be able to later automatically simplify the error
propagation calls.
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
include/hw/riscv/sifive_u.h | 2 ++
hw/riscv/sifive_u.c | 10 ++++------
2 files changed, 6 insertions(+), 6 deletions(-)
diff --git a/include/hw/riscv/sifive_u.h b/include/hw/riscv/sifive_u.h
index 82667b5746..254c6a64f8 100644
--- a/include/hw/riscv/sifive_u.h
+++ b/include/hw/riscv/sifive_u.h
@@ -42,6 +42,8 @@ typedef struct SiFiveUSoCState {
SiFiveUPRCIState prci;
SiFiveUOTPState otp;
CadenceGEMState gem;
+ MemoryRegion mask_rom;
+ MemoryRegion l2lim_mem;
} SiFiveUSoCState;
#define TYPE_RISCV_U_MACHINE MACHINE_TYPE_NAME("sifive_u")
diff --git a/hw/riscv/sifive_u.c b/hw/riscv/sifive_u.c
index 754af19eef..96177c1977 100644
--- a/hw/riscv/sifive_u.c
+++ b/hw/riscv/sifive_u.c
@@ -478,8 +478,6 @@ static void riscv_sifive_u_soc_realize(DeviceState *dev, Error **errp)
SiFiveUSoCState *s = RISCV_U_SOC(dev);
const struct MemmapEntry *memmap = sifive_u_memmap;
MemoryRegion *system_memory = get_system_memory();
- MemoryRegion *mask_rom = g_new(MemoryRegion, 1);
- MemoryRegion *l2lim_mem = g_new(MemoryRegion, 1);
qemu_irq plic_gpios[SIFIVE_U_PLIC_NUM_SOURCES];
char *plic_hart_config;
size_t plic_hart_config_len;
@@ -503,10 +501,10 @@ static void riscv_sifive_u_soc_realize(DeviceState *dev, Error **errp)
&error_abort);
/* boot rom */
- memory_region_init_rom(mask_rom, OBJECT(dev), "riscv.sifive.u.mrom",
+ memory_region_init_rom(&s->mask_rom, OBJECT(dev), "riscv.sifive.u.mrom",
memmap[SIFIVE_U_MROM].size, &error_fatal);
memory_region_add_subregion(system_memory, memmap[SIFIVE_U_MROM].base,
- mask_rom);
+ &s->mask_rom);
/*
* Add L2-LIM at reset size.
@@ -517,10 +515,10 @@ static void riscv_sifive_u_soc_realize(DeviceState *dev, Error **errp)
* leave it enabled all the time. This won't break anything, but will be
* too generous to misbehaving guests.
*/
- memory_region_init_ram(l2lim_mem, NULL, "riscv.sifive.u.l2lim",
+ memory_region_init_ram(&s->l2lim_mem, NULL, "riscv.sifive.u.l2lim",
memmap[SIFIVE_U_L2LIM].size, &error_fatal);
memory_region_add_subregion(system_memory, memmap[SIFIVE_U_L2LIM].base,
- l2lim_mem);
+ &s->l2lim_mem);
/* create PLIC hart topology configuration string */
plic_hart_config_len = (strlen(SIFIVE_U_PLIC_HART_CONFIG) + 1) *
--
2.21.1
^ permalink raw reply related [flat|nested] 98+ messages in thread* Re: [PATCH-for-5.1 v3 22/24] hw/riscv/sifive_u: Store MemoryRegion in SiFiveUSoCState
2020-04-12 22:36 ` Philippe Mathieu-Daudé
@ 2020-04-13 22:14 ` Alistair Francis
-1 siblings, 0 replies; 98+ messages in thread
From: Alistair Francis @ 2020-04-13 22:14 UTC (permalink / raw)
To: Philippe Mathieu-Daudé
Cc: Fam Zheng, Peter Maydell, Sagar Karandikar, Michael S. Tsirkin,
Jeff Cody, Jason Wang, qemu-devel@nongnu.org Developers,
Alistair Francis, Edgar E. Iglesias, Max Reitz, Qemu-block,
Markus Armbruster, Joel Stanley, Marc-André Lureau,
David Gibson, Philippe Mathieu-Daudé,
Eduardo Habkost, Jean-Christophe Dubois, Xie Changlong,
Alistair Francis, Beniamino Galvani, qemu-arm, Peter Chubb,
Cédric Le Goater, open list:New World, Richard Henderson,
Kevin Wolf, open list:RISC-V, Andrew Jeffery, Wen Congyang,
Subbaraya Sundeep, Palmer Dabbelt, Bastian Koppelmann,
Paolo Bonzini
On Sun, Apr 12, 2020 at 3:52 PM Philippe Mathieu-Daudé <f4bug@amsat.org> wrote:
>
> Coccinelle reported:
>
> $ spatch ... --timeout 60 --sp-file \
> scripts/coccinelle/simplify-init-realize-error_propagate.cocci
> HANDLING: ./hw/riscv/sifive_u.c
> >>> possible moves from riscv_sifive_u_soc_init() to riscv_sifive_u_soc_realize() in ./hw/riscv/sifive_u.c:473
>
> While reviewing we notice storing the MemoryRegion in the device
> state, we'll be able to later automatically simplify the error
> propagation calls.
>
> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Alistair
> ---
> include/hw/riscv/sifive_u.h | 2 ++
> hw/riscv/sifive_u.c | 10 ++++------
> 2 files changed, 6 insertions(+), 6 deletions(-)
>
> diff --git a/include/hw/riscv/sifive_u.h b/include/hw/riscv/sifive_u.h
> index 82667b5746..254c6a64f8 100644
> --- a/include/hw/riscv/sifive_u.h
> +++ b/include/hw/riscv/sifive_u.h
> @@ -42,6 +42,8 @@ typedef struct SiFiveUSoCState {
> SiFiveUPRCIState prci;
> SiFiveUOTPState otp;
> CadenceGEMState gem;
> + MemoryRegion mask_rom;
> + MemoryRegion l2lim_mem;
> } SiFiveUSoCState;
>
> #define TYPE_RISCV_U_MACHINE MACHINE_TYPE_NAME("sifive_u")
> diff --git a/hw/riscv/sifive_u.c b/hw/riscv/sifive_u.c
> index 754af19eef..96177c1977 100644
> --- a/hw/riscv/sifive_u.c
> +++ b/hw/riscv/sifive_u.c
> @@ -478,8 +478,6 @@ static void riscv_sifive_u_soc_realize(DeviceState *dev, Error **errp)
> SiFiveUSoCState *s = RISCV_U_SOC(dev);
> const struct MemmapEntry *memmap = sifive_u_memmap;
> MemoryRegion *system_memory = get_system_memory();
> - MemoryRegion *mask_rom = g_new(MemoryRegion, 1);
> - MemoryRegion *l2lim_mem = g_new(MemoryRegion, 1);
> qemu_irq plic_gpios[SIFIVE_U_PLIC_NUM_SOURCES];
> char *plic_hart_config;
> size_t plic_hart_config_len;
> @@ -503,10 +501,10 @@ static void riscv_sifive_u_soc_realize(DeviceState *dev, Error **errp)
> &error_abort);
>
> /* boot rom */
> - memory_region_init_rom(mask_rom, OBJECT(dev), "riscv.sifive.u.mrom",
> + memory_region_init_rom(&s->mask_rom, OBJECT(dev), "riscv.sifive.u.mrom",
> memmap[SIFIVE_U_MROM].size, &error_fatal);
> memory_region_add_subregion(system_memory, memmap[SIFIVE_U_MROM].base,
> - mask_rom);
> + &s->mask_rom);
>
> /*
> * Add L2-LIM at reset size.
> @@ -517,10 +515,10 @@ static void riscv_sifive_u_soc_realize(DeviceState *dev, Error **errp)
> * leave it enabled all the time. This won't break anything, but will be
> * too generous to misbehaving guests.
> */
> - memory_region_init_ram(l2lim_mem, NULL, "riscv.sifive.u.l2lim",
> + memory_region_init_ram(&s->l2lim_mem, NULL, "riscv.sifive.u.l2lim",
> memmap[SIFIVE_U_L2LIM].size, &error_fatal);
> memory_region_add_subregion(system_memory, memmap[SIFIVE_U_L2LIM].base,
> - l2lim_mem);
> + &s->l2lim_mem);
>
> /* create PLIC hart topology configuration string */
> plic_hart_config_len = (strlen(SIFIVE_U_PLIC_HART_CONFIG) + 1) *
> --
> 2.21.1
>
>
^ permalink raw reply [flat|nested] 98+ messages in thread* Re: [PATCH-for-5.1 v3 22/24] hw/riscv/sifive_u: Store MemoryRegion in SiFiveUSoCState
@ 2020-04-13 22:14 ` Alistair Francis
0 siblings, 0 replies; 98+ messages in thread
From: Alistair Francis @ 2020-04-13 22:14 UTC (permalink / raw)
To: Philippe Mathieu-Daudé
Cc: qemu-devel@nongnu.org Developers, Fam Zheng, Peter Maydell,
Sagar Karandikar, Michael S. Tsirkin, Jeff Cody, Jason Wang,
Alistair Francis, Edgar E. Iglesias, Subbaraya Sundeep,
Qemu-block, Markus Armbruster, Max Reitz, Joel Stanley,
Marc-André Lureau, Richard Henderson,
Philippe Mathieu-Daudé,
Eduardo Habkost, Xie Changlong, Alistair Francis,
Beniamino Galvani, qemu-arm, Peter Chubb, Cédric Le Goater,
Palmer Dabbelt, David Gibson, Kevin Wolf, open list:RISC-V,
Andrew Jeffery, Wen Congyang, Jean-Christophe Dubois,
open list:New World, Bastian Koppelmann, Paolo Bonzini
On Sun, Apr 12, 2020 at 3:52 PM Philippe Mathieu-Daudé <f4bug@amsat.org> wrote:
>
> Coccinelle reported:
>
> $ spatch ... --timeout 60 --sp-file \
> scripts/coccinelle/simplify-init-realize-error_propagate.cocci
> HANDLING: ./hw/riscv/sifive_u.c
> >>> possible moves from riscv_sifive_u_soc_init() to riscv_sifive_u_soc_realize() in ./hw/riscv/sifive_u.c:473
>
> While reviewing we notice storing the MemoryRegion in the device
> state, we'll be able to later automatically simplify the error
> propagation calls.
>
> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Alistair
> ---
> include/hw/riscv/sifive_u.h | 2 ++
> hw/riscv/sifive_u.c | 10 ++++------
> 2 files changed, 6 insertions(+), 6 deletions(-)
>
> diff --git a/include/hw/riscv/sifive_u.h b/include/hw/riscv/sifive_u.h
> index 82667b5746..254c6a64f8 100644
> --- a/include/hw/riscv/sifive_u.h
> +++ b/include/hw/riscv/sifive_u.h
> @@ -42,6 +42,8 @@ typedef struct SiFiveUSoCState {
> SiFiveUPRCIState prci;
> SiFiveUOTPState otp;
> CadenceGEMState gem;
> + MemoryRegion mask_rom;
> + MemoryRegion l2lim_mem;
> } SiFiveUSoCState;
>
> #define TYPE_RISCV_U_MACHINE MACHINE_TYPE_NAME("sifive_u")
> diff --git a/hw/riscv/sifive_u.c b/hw/riscv/sifive_u.c
> index 754af19eef..96177c1977 100644
> --- a/hw/riscv/sifive_u.c
> +++ b/hw/riscv/sifive_u.c
> @@ -478,8 +478,6 @@ static void riscv_sifive_u_soc_realize(DeviceState *dev, Error **errp)
> SiFiveUSoCState *s = RISCV_U_SOC(dev);
> const struct MemmapEntry *memmap = sifive_u_memmap;
> MemoryRegion *system_memory = get_system_memory();
> - MemoryRegion *mask_rom = g_new(MemoryRegion, 1);
> - MemoryRegion *l2lim_mem = g_new(MemoryRegion, 1);
> qemu_irq plic_gpios[SIFIVE_U_PLIC_NUM_SOURCES];
> char *plic_hart_config;
> size_t plic_hart_config_len;
> @@ -503,10 +501,10 @@ static void riscv_sifive_u_soc_realize(DeviceState *dev, Error **errp)
> &error_abort);
>
> /* boot rom */
> - memory_region_init_rom(mask_rom, OBJECT(dev), "riscv.sifive.u.mrom",
> + memory_region_init_rom(&s->mask_rom, OBJECT(dev), "riscv.sifive.u.mrom",
> memmap[SIFIVE_U_MROM].size, &error_fatal);
> memory_region_add_subregion(system_memory, memmap[SIFIVE_U_MROM].base,
> - mask_rom);
> + &s->mask_rom);
>
> /*
> * Add L2-LIM at reset size.
> @@ -517,10 +515,10 @@ static void riscv_sifive_u_soc_realize(DeviceState *dev, Error **errp)
> * leave it enabled all the time. This won't break anything, but will be
> * too generous to misbehaving guests.
> */
> - memory_region_init_ram(l2lim_mem, NULL, "riscv.sifive.u.l2lim",
> + memory_region_init_ram(&s->l2lim_mem, NULL, "riscv.sifive.u.l2lim",
> memmap[SIFIVE_U_L2LIM].size, &error_fatal);
> memory_region_add_subregion(system_memory, memmap[SIFIVE_U_L2LIM].base,
> - l2lim_mem);
> + &s->l2lim_mem);
>
> /* create PLIC hart topology configuration string */
> plic_hart_config_len = (strlen(SIFIVE_U_PLIC_HART_CONFIG) + 1) *
> --
> 2.21.1
>
>
^ permalink raw reply [flat|nested] 98+ messages in thread
* [PATCH-for-5.1 v3 23/24] hw/riscv/sifive_u: Move some code from realize() to init()
2020-04-12 22:35 ` Philippe Mathieu-Daudé
@ 2020-04-12 22:36 ` Philippe Mathieu-Daudé
-1 siblings, 0 replies; 98+ messages in thread
From: Philippe Mathieu-Daudé @ 2020-04-12 22:36 UTC (permalink / raw)
To: qemu-devel
Cc: Fam Zheng, Peter Maydell, Sagar Karandikar, Michael S. Tsirkin,
Jeff Cody, Jason Wang, Alistair Francis, Edgar E. Iglesias,
Subbaraya Sundeep, qemu-block, Markus Armbruster, Max Reitz,
Joel Stanley, Marc-André Lureau, Richard Henderson,
Philippe Mathieu-Daudé,
Eduardo Habkost, Xie Changlong, Alistair Francis,
Beniamino Galvani, qemu-arm, Peter Chubb, Cédric Le Goater,
Palmer Dabbelt, David Gibson, Kevin Wolf, qemu-riscv,
Andrew Jeffery, Wen Congyang, Philippe Mathieu-Daudé,
Jean-Christophe Dubois, qemu-ppc, Bastian Koppelmann,
Paolo Bonzini
Coccinelle reported:
$ spatch ... --timeout 60 --sp-file \
scripts/coccinelle/simplify-init-realize-error_propagate.cocci
HANDLING: ./hw/riscv/sifive_u.c
>>> possible moves from riscv_sifive_u_soc_init() to riscv_sifive_u_soc_realize() in ./hw/riscv/sifive_u.c:473
Move the calls using &error_abort which don't depend on input
updated before realize() to init().
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
v3: Typo 'depend of' -> 'depend on' (eblake)
---
hw/riscv/sifive_u.c | 42 ++++++++++++++++++++++--------------------
1 file changed, 22 insertions(+), 20 deletions(-)
diff --git a/hw/riscv/sifive_u.c b/hw/riscv/sifive_u.c
index 96177c1977..7bf1f30a35 100644
--- a/hw/riscv/sifive_u.c
+++ b/hw/riscv/sifive_u.c
@@ -406,6 +406,8 @@ static void riscv_sifive_u_init(MachineState *machine)
static void riscv_sifive_u_soc_init(Object *obj)
{
MachineState *ms = MACHINE(qdev_get_machine());
+ const struct MemmapEntry *memmap = sifive_u_memmap;
+ MemoryRegion *system_memory = get_system_memory();
SiFiveUSoCState *s = RISCV_U_SOC(obj);
object_initialize_child(obj, "e-cluster", &s->e_cluster,
@@ -443,6 +445,26 @@ static void riscv_sifive_u_soc_init(Object *obj)
TYPE_CADENCE_GEM);
object_property_set_int(OBJECT(&s->gem), GEM_REVISION, "revision",
&error_abort);
+
+ /* boot rom */
+ memory_region_init_rom(&s->mask_rom, obj, "riscv.sifive.u.mrom",
+ memmap[SIFIVE_U_MROM].size, &error_fatal);
+ memory_region_add_subregion(system_memory, memmap[SIFIVE_U_MROM].base,
+ &s->mask_rom);
+
+ /*
+ * Add L2-LIM at reset size.
+ * This should be reduced in size as the L2 Cache Controller WayEnable
+ * register is incremented. Unfortunately I don't see a nice (or any) way
+ * to handle reducing or blocking out the L2 LIM while still allowing it
+ * be re returned to all enabled after a reset. For the time being, just
+ * leave it enabled all the time. This won't break anything, but will be
+ * too generous to misbehaving guests.
+ */
+ memory_region_init_ram(&s->l2lim_mem, NULL, "riscv.sifive.u.l2lim",
+ memmap[SIFIVE_U_L2LIM].size, &error_fatal);
+ memory_region_add_subregion(system_memory, memmap[SIFIVE_U_L2LIM].base,
+ &s->l2lim_mem);
}
static bool sifive_u_get_start_in_flash(Object *obj, Error **errp)
@@ -500,26 +522,6 @@ static void riscv_sifive_u_soc_realize(DeviceState *dev, Error **errp)
object_property_set_bool(OBJECT(&s->u_cluster), true, "realized",
&error_abort);
- /* boot rom */
- memory_region_init_rom(&s->mask_rom, OBJECT(dev), "riscv.sifive.u.mrom",
- memmap[SIFIVE_U_MROM].size, &error_fatal);
- memory_region_add_subregion(system_memory, memmap[SIFIVE_U_MROM].base,
- &s->mask_rom);
-
- /*
- * Add L2-LIM at reset size.
- * This should be reduced in size as the L2 Cache Controller WayEnable
- * register is incremented. Unfortunately I don't see a nice (or any) way
- * to handle reducing or blocking out the L2 LIM while still allowing it
- * be re returned to all enabled after a reset. For the time being, just
- * leave it enabled all the time. This won't break anything, but will be
- * too generous to misbehaving guests.
- */
- memory_region_init_ram(&s->l2lim_mem, NULL, "riscv.sifive.u.l2lim",
- memmap[SIFIVE_U_L2LIM].size, &error_fatal);
- memory_region_add_subregion(system_memory, memmap[SIFIVE_U_L2LIM].base,
- &s->l2lim_mem);
-
/* create PLIC hart topology configuration string */
plic_hart_config_len = (strlen(SIFIVE_U_PLIC_HART_CONFIG) + 1) *
ms->smp.cpus;
--
2.21.1
^ permalink raw reply related [flat|nested] 98+ messages in thread* [PATCH-for-5.1 v3 23/24] hw/riscv/sifive_u: Move some code from realize() to init()
@ 2020-04-12 22:36 ` Philippe Mathieu-Daudé
0 siblings, 0 replies; 98+ messages in thread
From: Philippe Mathieu-Daudé @ 2020-04-12 22:36 UTC (permalink / raw)
To: qemu-devel
Cc: Joel Stanley, Jean-Christophe Dubois, Subbaraya Sundeep,
Max Reitz, Palmer Dabbelt, qemu-ppc, Sagar Karandikar,
Markus Armbruster, Jeff Cody, Peter Maydell, Xie Changlong,
Fam Zheng, Eduardo Habkost, Alistair Francis, qemu-arm,
Wen Congyang, Philippe Mathieu-Daudé,
Bastian Koppelmann, Edgar E. Iglesias, Kevin Wolf,
Marc-André Lureau, David Gibson, Jason Wang, Peter Chubb,
Beniamino Galvani, Alistair Francis, qemu-riscv,
Cédric Le Goater, qemu-block, Paolo Bonzini, Andrew Jeffery,
Michael S. Tsirkin, Richard Henderson,
Philippe Mathieu-Daudé
Coccinelle reported:
$ spatch ... --timeout 60 --sp-file \
scripts/coccinelle/simplify-init-realize-error_propagate.cocci
HANDLING: ./hw/riscv/sifive_u.c
>>> possible moves from riscv_sifive_u_soc_init() to riscv_sifive_u_soc_realize() in ./hw/riscv/sifive_u.c:473
Move the calls using &error_abort which don't depend on input
updated before realize() to init().
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
v3: Typo 'depend of' -> 'depend on' (eblake)
---
hw/riscv/sifive_u.c | 42 ++++++++++++++++++++++--------------------
1 file changed, 22 insertions(+), 20 deletions(-)
diff --git a/hw/riscv/sifive_u.c b/hw/riscv/sifive_u.c
index 96177c1977..7bf1f30a35 100644
--- a/hw/riscv/sifive_u.c
+++ b/hw/riscv/sifive_u.c
@@ -406,6 +406,8 @@ static void riscv_sifive_u_init(MachineState *machine)
static void riscv_sifive_u_soc_init(Object *obj)
{
MachineState *ms = MACHINE(qdev_get_machine());
+ const struct MemmapEntry *memmap = sifive_u_memmap;
+ MemoryRegion *system_memory = get_system_memory();
SiFiveUSoCState *s = RISCV_U_SOC(obj);
object_initialize_child(obj, "e-cluster", &s->e_cluster,
@@ -443,6 +445,26 @@ static void riscv_sifive_u_soc_init(Object *obj)
TYPE_CADENCE_GEM);
object_property_set_int(OBJECT(&s->gem), GEM_REVISION, "revision",
&error_abort);
+
+ /* boot rom */
+ memory_region_init_rom(&s->mask_rom, obj, "riscv.sifive.u.mrom",
+ memmap[SIFIVE_U_MROM].size, &error_fatal);
+ memory_region_add_subregion(system_memory, memmap[SIFIVE_U_MROM].base,
+ &s->mask_rom);
+
+ /*
+ * Add L2-LIM at reset size.
+ * This should be reduced in size as the L2 Cache Controller WayEnable
+ * register is incremented. Unfortunately I don't see a nice (or any) way
+ * to handle reducing or blocking out the L2 LIM while still allowing it
+ * be re returned to all enabled after a reset. For the time being, just
+ * leave it enabled all the time. This won't break anything, but will be
+ * too generous to misbehaving guests.
+ */
+ memory_region_init_ram(&s->l2lim_mem, NULL, "riscv.sifive.u.l2lim",
+ memmap[SIFIVE_U_L2LIM].size, &error_fatal);
+ memory_region_add_subregion(system_memory, memmap[SIFIVE_U_L2LIM].base,
+ &s->l2lim_mem);
}
static bool sifive_u_get_start_in_flash(Object *obj, Error **errp)
@@ -500,26 +522,6 @@ static void riscv_sifive_u_soc_realize(DeviceState *dev, Error **errp)
object_property_set_bool(OBJECT(&s->u_cluster), true, "realized",
&error_abort);
- /* boot rom */
- memory_region_init_rom(&s->mask_rom, OBJECT(dev), "riscv.sifive.u.mrom",
- memmap[SIFIVE_U_MROM].size, &error_fatal);
- memory_region_add_subregion(system_memory, memmap[SIFIVE_U_MROM].base,
- &s->mask_rom);
-
- /*
- * Add L2-LIM at reset size.
- * This should be reduced in size as the L2 Cache Controller WayEnable
- * register is incremented. Unfortunately I don't see a nice (or any) way
- * to handle reducing or blocking out the L2 LIM while still allowing it
- * be re returned to all enabled after a reset. For the time being, just
- * leave it enabled all the time. This won't break anything, but will be
- * too generous to misbehaving guests.
- */
- memory_region_init_ram(&s->l2lim_mem, NULL, "riscv.sifive.u.l2lim",
- memmap[SIFIVE_U_L2LIM].size, &error_fatal);
- memory_region_add_subregion(system_memory, memmap[SIFIVE_U_L2LIM].base,
- &s->l2lim_mem);
-
/* create PLIC hart topology configuration string */
plic_hart_config_len = (strlen(SIFIVE_U_PLIC_HART_CONFIG) + 1) *
ms->smp.cpus;
--
2.21.1
^ permalink raw reply related [flat|nested] 98+ messages in thread* Re: [PATCH-for-5.1 v3 23/24] hw/riscv/sifive_u: Move some code from realize() to init()
2020-04-12 22:36 ` Philippe Mathieu-Daudé
@ 2020-04-13 22:15 ` Alistair Francis
-1 siblings, 0 replies; 98+ messages in thread
From: Alistair Francis @ 2020-04-13 22:15 UTC (permalink / raw)
To: Philippe Mathieu-Daudé
Cc: Fam Zheng, Peter Maydell, Sagar Karandikar, Michael S. Tsirkin,
Jeff Cody, Jason Wang, qemu-devel@nongnu.org Developers,
Alistair Francis, Edgar E. Iglesias, Max Reitz, Qemu-block,
Markus Armbruster, Joel Stanley, Marc-André Lureau,
David Gibson, Philippe Mathieu-Daudé,
Eduardo Habkost, Jean-Christophe Dubois, Xie Changlong,
Alistair Francis, Beniamino Galvani, qemu-arm, Peter Chubb,
Cédric Le Goater, open list:New World, Richard Henderson,
Kevin Wolf, open list:RISC-V, Andrew Jeffery, Wen Congyang,
Subbaraya Sundeep, Palmer Dabbelt, Bastian Koppelmann,
Paolo Bonzini
On Sun, Apr 12, 2020 at 3:48 PM Philippe Mathieu-Daudé <f4bug@amsat.org> wrote:
>
> Coccinelle reported:
>
> $ spatch ... --timeout 60 --sp-file \
> scripts/coccinelle/simplify-init-realize-error_propagate.cocci
> HANDLING: ./hw/riscv/sifive_u.c
> >>> possible moves from riscv_sifive_u_soc_init() to riscv_sifive_u_soc_realize() in ./hw/riscv/sifive_u.c:473
>
> Move the calls using &error_abort which don't depend on input
> updated before realize() to init().
>
> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Alistair
> ---
> v3: Typo 'depend of' -> 'depend on' (eblake)
> ---
> hw/riscv/sifive_u.c | 42 ++++++++++++++++++++++--------------------
> 1 file changed, 22 insertions(+), 20 deletions(-)
>
> diff --git a/hw/riscv/sifive_u.c b/hw/riscv/sifive_u.c
> index 96177c1977..7bf1f30a35 100644
> --- a/hw/riscv/sifive_u.c
> +++ b/hw/riscv/sifive_u.c
> @@ -406,6 +406,8 @@ static void riscv_sifive_u_init(MachineState *machine)
> static void riscv_sifive_u_soc_init(Object *obj)
> {
> MachineState *ms = MACHINE(qdev_get_machine());
> + const struct MemmapEntry *memmap = sifive_u_memmap;
> + MemoryRegion *system_memory = get_system_memory();
> SiFiveUSoCState *s = RISCV_U_SOC(obj);
>
> object_initialize_child(obj, "e-cluster", &s->e_cluster,
> @@ -443,6 +445,26 @@ static void riscv_sifive_u_soc_init(Object *obj)
> TYPE_CADENCE_GEM);
> object_property_set_int(OBJECT(&s->gem), GEM_REVISION, "revision",
> &error_abort);
> +
> + /* boot rom */
> + memory_region_init_rom(&s->mask_rom, obj, "riscv.sifive.u.mrom",
> + memmap[SIFIVE_U_MROM].size, &error_fatal);
> + memory_region_add_subregion(system_memory, memmap[SIFIVE_U_MROM].base,
> + &s->mask_rom);
> +
> + /*
> + * Add L2-LIM at reset size.
> + * This should be reduced in size as the L2 Cache Controller WayEnable
> + * register is incremented. Unfortunately I don't see a nice (or any) way
> + * to handle reducing or blocking out the L2 LIM while still allowing it
> + * be re returned to all enabled after a reset. For the time being, just
> + * leave it enabled all the time. This won't break anything, but will be
> + * too generous to misbehaving guests.
> + */
> + memory_region_init_ram(&s->l2lim_mem, NULL, "riscv.sifive.u.l2lim",
> + memmap[SIFIVE_U_L2LIM].size, &error_fatal);
> + memory_region_add_subregion(system_memory, memmap[SIFIVE_U_L2LIM].base,
> + &s->l2lim_mem);
> }
>
> static bool sifive_u_get_start_in_flash(Object *obj, Error **errp)
> @@ -500,26 +522,6 @@ static void riscv_sifive_u_soc_realize(DeviceState *dev, Error **errp)
> object_property_set_bool(OBJECT(&s->u_cluster), true, "realized",
> &error_abort);
>
> - /* boot rom */
> - memory_region_init_rom(&s->mask_rom, OBJECT(dev), "riscv.sifive.u.mrom",
> - memmap[SIFIVE_U_MROM].size, &error_fatal);
> - memory_region_add_subregion(system_memory, memmap[SIFIVE_U_MROM].base,
> - &s->mask_rom);
> -
> - /*
> - * Add L2-LIM at reset size.
> - * This should be reduced in size as the L2 Cache Controller WayEnable
> - * register is incremented. Unfortunately I don't see a nice (or any) way
> - * to handle reducing or blocking out the L2 LIM while still allowing it
> - * be re returned to all enabled after a reset. For the time being, just
> - * leave it enabled all the time. This won't break anything, but will be
> - * too generous to misbehaving guests.
> - */
> - memory_region_init_ram(&s->l2lim_mem, NULL, "riscv.sifive.u.l2lim",
> - memmap[SIFIVE_U_L2LIM].size, &error_fatal);
> - memory_region_add_subregion(system_memory, memmap[SIFIVE_U_L2LIM].base,
> - &s->l2lim_mem);
> -
> /* create PLIC hart topology configuration string */
> plic_hart_config_len = (strlen(SIFIVE_U_PLIC_HART_CONFIG) + 1) *
> ms->smp.cpus;
> --
> 2.21.1
>
>
^ permalink raw reply [flat|nested] 98+ messages in thread* Re: [PATCH-for-5.1 v3 23/24] hw/riscv/sifive_u: Move some code from realize() to init()
@ 2020-04-13 22:15 ` Alistair Francis
0 siblings, 0 replies; 98+ messages in thread
From: Alistair Francis @ 2020-04-13 22:15 UTC (permalink / raw)
To: Philippe Mathieu-Daudé
Cc: qemu-devel@nongnu.org Developers, Fam Zheng, Peter Maydell,
Sagar Karandikar, Michael S. Tsirkin, Jeff Cody, Jason Wang,
Alistair Francis, Edgar E. Iglesias, Subbaraya Sundeep,
Qemu-block, Markus Armbruster, Max Reitz, Joel Stanley,
Marc-André Lureau, Richard Henderson,
Philippe Mathieu-Daudé,
Eduardo Habkost, Xie Changlong, Alistair Francis,
Beniamino Galvani, qemu-arm, Peter Chubb, Cédric Le Goater,
Palmer Dabbelt, David Gibson, Kevin Wolf, open list:RISC-V,
Andrew Jeffery, Wen Congyang, Jean-Christophe Dubois,
open list:New World, Bastian Koppelmann, Paolo Bonzini
On Sun, Apr 12, 2020 at 3:48 PM Philippe Mathieu-Daudé <f4bug@amsat.org> wrote:
>
> Coccinelle reported:
>
> $ spatch ... --timeout 60 --sp-file \
> scripts/coccinelle/simplify-init-realize-error_propagate.cocci
> HANDLING: ./hw/riscv/sifive_u.c
> >>> possible moves from riscv_sifive_u_soc_init() to riscv_sifive_u_soc_realize() in ./hw/riscv/sifive_u.c:473
>
> Move the calls using &error_abort which don't depend on input
> updated before realize() to init().
>
> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Alistair
> ---
> v3: Typo 'depend of' -> 'depend on' (eblake)
> ---
> hw/riscv/sifive_u.c | 42 ++++++++++++++++++++++--------------------
> 1 file changed, 22 insertions(+), 20 deletions(-)
>
> diff --git a/hw/riscv/sifive_u.c b/hw/riscv/sifive_u.c
> index 96177c1977..7bf1f30a35 100644
> --- a/hw/riscv/sifive_u.c
> +++ b/hw/riscv/sifive_u.c
> @@ -406,6 +406,8 @@ static void riscv_sifive_u_init(MachineState *machine)
> static void riscv_sifive_u_soc_init(Object *obj)
> {
> MachineState *ms = MACHINE(qdev_get_machine());
> + const struct MemmapEntry *memmap = sifive_u_memmap;
> + MemoryRegion *system_memory = get_system_memory();
> SiFiveUSoCState *s = RISCV_U_SOC(obj);
>
> object_initialize_child(obj, "e-cluster", &s->e_cluster,
> @@ -443,6 +445,26 @@ static void riscv_sifive_u_soc_init(Object *obj)
> TYPE_CADENCE_GEM);
> object_property_set_int(OBJECT(&s->gem), GEM_REVISION, "revision",
> &error_abort);
> +
> + /* boot rom */
> + memory_region_init_rom(&s->mask_rom, obj, "riscv.sifive.u.mrom",
> + memmap[SIFIVE_U_MROM].size, &error_fatal);
> + memory_region_add_subregion(system_memory, memmap[SIFIVE_U_MROM].base,
> + &s->mask_rom);
> +
> + /*
> + * Add L2-LIM at reset size.
> + * This should be reduced in size as the L2 Cache Controller WayEnable
> + * register is incremented. Unfortunately I don't see a nice (or any) way
> + * to handle reducing or blocking out the L2 LIM while still allowing it
> + * be re returned to all enabled after a reset. For the time being, just
> + * leave it enabled all the time. This won't break anything, but will be
> + * too generous to misbehaving guests.
> + */
> + memory_region_init_ram(&s->l2lim_mem, NULL, "riscv.sifive.u.l2lim",
> + memmap[SIFIVE_U_L2LIM].size, &error_fatal);
> + memory_region_add_subregion(system_memory, memmap[SIFIVE_U_L2LIM].base,
> + &s->l2lim_mem);
> }
>
> static bool sifive_u_get_start_in_flash(Object *obj, Error **errp)
> @@ -500,26 +522,6 @@ static void riscv_sifive_u_soc_realize(DeviceState *dev, Error **errp)
> object_property_set_bool(OBJECT(&s->u_cluster), true, "realized",
> &error_abort);
>
> - /* boot rom */
> - memory_region_init_rom(&s->mask_rom, OBJECT(dev), "riscv.sifive.u.mrom",
> - memmap[SIFIVE_U_MROM].size, &error_fatal);
> - memory_region_add_subregion(system_memory, memmap[SIFIVE_U_MROM].base,
> - &s->mask_rom);
> -
> - /*
> - * Add L2-LIM at reset size.
> - * This should be reduced in size as the L2 Cache Controller WayEnable
> - * register is incremented. Unfortunately I don't see a nice (or any) way
> - * to handle reducing or blocking out the L2 LIM while still allowing it
> - * be re returned to all enabled after a reset. For the time being, just
> - * leave it enabled all the time. This won't break anything, but will be
> - * too generous to misbehaving guests.
> - */
> - memory_region_init_ram(&s->l2lim_mem, NULL, "riscv.sifive.u.l2lim",
> - memmap[SIFIVE_U_L2LIM].size, &error_fatal);
> - memory_region_add_subregion(system_memory, memmap[SIFIVE_U_L2LIM].base,
> - &s->l2lim_mem);
> -
> /* create PLIC hart topology configuration string */
> plic_hart_config_len = (strlen(SIFIVE_U_PLIC_HART_CONFIG) + 1) *
> ms->smp.cpus;
> --
> 2.21.1
>
>
^ permalink raw reply [flat|nested] 98+ messages in thread
* [PATCH-for-5.1 v3 24/24] hw/riscv/sifive_u: Rename MachineClass::init()
2020-04-12 22:35 ` Philippe Mathieu-Daudé
@ 2020-04-12 22:36 ` Philippe Mathieu-Daudé
-1 siblings, 0 replies; 98+ messages in thread
From: Philippe Mathieu-Daudé @ 2020-04-12 22:36 UTC (permalink / raw)
To: qemu-devel
Cc: Fam Zheng, Peter Maydell, Sagar Karandikar, Michael S. Tsirkin,
Jeff Cody, Jason Wang, Alistair Francis, Edgar E. Iglesias,
Subbaraya Sundeep, qemu-block, Markus Armbruster, Max Reitz,
Joel Stanley, Marc-André Lureau, Richard Henderson,
Philippe Mathieu-Daudé,
Eduardo Habkost, Xie Changlong, Alistair Francis,
Beniamino Galvani, qemu-arm, Peter Chubb, Cédric Le Goater,
Palmer Dabbelt, David Gibson, Kevin Wolf, qemu-riscv,
Andrew Jeffery, Wen Congyang, Philippe Mathieu-Daudé,
Jean-Christophe Dubois, qemu-ppc, Bastian Koppelmann,
Paolo Bonzini
As there already is the riscv_sifive_u_soc_init() method,
rename riscv_sifive_u_init() as riscv_sifive_u_machine_init().
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
hw/riscv/sifive_u.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/hw/riscv/sifive_u.c b/hw/riscv/sifive_u.c
index 7bf1f30a35..e13ab34de4 100644
--- a/hw/riscv/sifive_u.c
+++ b/hw/riscv/sifive_u.c
@@ -312,7 +312,7 @@ static void create_fdt(SiFiveUState *s, const struct MemmapEntry *memmap,
g_free(nodename);
}
-static void riscv_sifive_u_init(MachineState *machine)
+static void riscv_sifive_u_machine_init(MachineState *machine)
{
const struct MemmapEntry *memmap = sifive_u_memmap;
SiFiveUState *s = RISCV_U_MACHINE(machine);
@@ -606,7 +606,7 @@ static void riscv_sifive_u_machine_class_init(ObjectClass *oc, void *data)
MachineClass *mc = MACHINE_CLASS(oc);
mc->desc = "RISC-V Board compatible with SiFive U SDK";
- mc->init = riscv_sifive_u_init;
+ mc->init = riscv_sifive_u_machine_init;
mc->max_cpus = SIFIVE_U_MANAGEMENT_CPU_COUNT + SIFIVE_U_COMPUTE_CPU_COUNT;
mc->min_cpus = SIFIVE_U_MANAGEMENT_CPU_COUNT + 1;
mc->default_cpus = mc->min_cpus;
--
2.21.1
^ permalink raw reply related [flat|nested] 98+ messages in thread* [PATCH-for-5.1 v3 24/24] hw/riscv/sifive_u: Rename MachineClass::init()
@ 2020-04-12 22:36 ` Philippe Mathieu-Daudé
0 siblings, 0 replies; 98+ messages in thread
From: Philippe Mathieu-Daudé @ 2020-04-12 22:36 UTC (permalink / raw)
To: qemu-devel
Cc: Joel Stanley, Jean-Christophe Dubois, Subbaraya Sundeep,
Max Reitz, Palmer Dabbelt, qemu-ppc, Sagar Karandikar,
Markus Armbruster, Jeff Cody, Peter Maydell, Xie Changlong,
Fam Zheng, Eduardo Habkost, Alistair Francis, qemu-arm,
Wen Congyang, Philippe Mathieu-Daudé,
Bastian Koppelmann, Edgar E. Iglesias, Kevin Wolf,
Marc-André Lureau, David Gibson, Jason Wang, Peter Chubb,
Beniamino Galvani, Alistair Francis, qemu-riscv,
Cédric Le Goater, qemu-block, Paolo Bonzini, Andrew Jeffery,
Michael S. Tsirkin, Richard Henderson,
Philippe Mathieu-Daudé
As there already is the riscv_sifive_u_soc_init() method,
rename riscv_sifive_u_init() as riscv_sifive_u_machine_init().
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
hw/riscv/sifive_u.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/hw/riscv/sifive_u.c b/hw/riscv/sifive_u.c
index 7bf1f30a35..e13ab34de4 100644
--- a/hw/riscv/sifive_u.c
+++ b/hw/riscv/sifive_u.c
@@ -312,7 +312,7 @@ static void create_fdt(SiFiveUState *s, const struct MemmapEntry *memmap,
g_free(nodename);
}
-static void riscv_sifive_u_init(MachineState *machine)
+static void riscv_sifive_u_machine_init(MachineState *machine)
{
const struct MemmapEntry *memmap = sifive_u_memmap;
SiFiveUState *s = RISCV_U_MACHINE(machine);
@@ -606,7 +606,7 @@ static void riscv_sifive_u_machine_class_init(ObjectClass *oc, void *data)
MachineClass *mc = MACHINE_CLASS(oc);
mc->desc = "RISC-V Board compatible with SiFive U SDK";
- mc->init = riscv_sifive_u_init;
+ mc->init = riscv_sifive_u_machine_init;
mc->max_cpus = SIFIVE_U_MANAGEMENT_CPU_COUNT + SIFIVE_U_COMPUTE_CPU_COUNT;
mc->min_cpus = SIFIVE_U_MANAGEMENT_CPU_COUNT + 1;
mc->default_cpus = mc->min_cpus;
--
2.21.1
^ permalink raw reply related [flat|nested] 98+ messages in thread* Re: [PATCH-for-5.1 v3 24/24] hw/riscv/sifive_u: Rename MachineClass::init()
2020-04-12 22:36 ` Philippe Mathieu-Daudé
@ 2020-04-13 22:14 ` Alistair Francis
-1 siblings, 0 replies; 98+ messages in thread
From: Alistair Francis @ 2020-04-13 22:14 UTC (permalink / raw)
To: Philippe Mathieu-Daudé
Cc: Fam Zheng, Peter Maydell, Sagar Karandikar, Michael S. Tsirkin,
Jeff Cody, Jason Wang, qemu-devel@nongnu.org Developers,
Alistair Francis, Edgar E. Iglesias, Max Reitz, Qemu-block,
Markus Armbruster, Joel Stanley, Marc-André Lureau,
David Gibson, Philippe Mathieu-Daudé,
Eduardo Habkost, Jean-Christophe Dubois, Xie Changlong,
Alistair Francis, Beniamino Galvani, qemu-arm, Peter Chubb,
Cédric Le Goater, open list:New World, Richard Henderson,
Kevin Wolf, open list:RISC-V, Andrew Jeffery, Wen Congyang,
Subbaraya Sundeep, Palmer Dabbelt, Bastian Koppelmann,
Paolo Bonzini
On Sun, Apr 12, 2020 at 3:54 PM Philippe Mathieu-Daudé <f4bug@amsat.org> wrote:
>
> As there already is the riscv_sifive_u_soc_init() method,
> rename riscv_sifive_u_init() as riscv_sifive_u_machine_init().
>
> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Alistair
> ---
> hw/riscv/sifive_u.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/hw/riscv/sifive_u.c b/hw/riscv/sifive_u.c
> index 7bf1f30a35..e13ab34de4 100644
> --- a/hw/riscv/sifive_u.c
> +++ b/hw/riscv/sifive_u.c
> @@ -312,7 +312,7 @@ static void create_fdt(SiFiveUState *s, const struct MemmapEntry *memmap,
> g_free(nodename);
> }
>
> -static void riscv_sifive_u_init(MachineState *machine)
> +static void riscv_sifive_u_machine_init(MachineState *machine)
> {
> const struct MemmapEntry *memmap = sifive_u_memmap;
> SiFiveUState *s = RISCV_U_MACHINE(machine);
> @@ -606,7 +606,7 @@ static void riscv_sifive_u_machine_class_init(ObjectClass *oc, void *data)
> MachineClass *mc = MACHINE_CLASS(oc);
>
> mc->desc = "RISC-V Board compatible with SiFive U SDK";
> - mc->init = riscv_sifive_u_init;
> + mc->init = riscv_sifive_u_machine_init;
> mc->max_cpus = SIFIVE_U_MANAGEMENT_CPU_COUNT + SIFIVE_U_COMPUTE_CPU_COUNT;
> mc->min_cpus = SIFIVE_U_MANAGEMENT_CPU_COUNT + 1;
> mc->default_cpus = mc->min_cpus;
> --
> 2.21.1
>
>
^ permalink raw reply [flat|nested] 98+ messages in thread* Re: [PATCH-for-5.1 v3 24/24] hw/riscv/sifive_u: Rename MachineClass::init()
@ 2020-04-13 22:14 ` Alistair Francis
0 siblings, 0 replies; 98+ messages in thread
From: Alistair Francis @ 2020-04-13 22:14 UTC (permalink / raw)
To: Philippe Mathieu-Daudé
Cc: qemu-devel@nongnu.org Developers, Fam Zheng, Peter Maydell,
Sagar Karandikar, Michael S. Tsirkin, Jeff Cody, Jason Wang,
Alistair Francis, Edgar E. Iglesias, Subbaraya Sundeep,
Qemu-block, Markus Armbruster, Max Reitz, Joel Stanley,
Marc-André Lureau, Richard Henderson,
Philippe Mathieu-Daudé,
Eduardo Habkost, Xie Changlong, Alistair Francis,
Beniamino Galvani, qemu-arm, Peter Chubb, Cédric Le Goater,
Palmer Dabbelt, David Gibson, Kevin Wolf, open list:RISC-V,
Andrew Jeffery, Wen Congyang, Jean-Christophe Dubois,
open list:New World, Bastian Koppelmann, Paolo Bonzini
On Sun, Apr 12, 2020 at 3:54 PM Philippe Mathieu-Daudé <f4bug@amsat.org> wrote:
>
> As there already is the riscv_sifive_u_soc_init() method,
> rename riscv_sifive_u_init() as riscv_sifive_u_machine_init().
>
> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Alistair
> ---
> hw/riscv/sifive_u.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/hw/riscv/sifive_u.c b/hw/riscv/sifive_u.c
> index 7bf1f30a35..e13ab34de4 100644
> --- a/hw/riscv/sifive_u.c
> +++ b/hw/riscv/sifive_u.c
> @@ -312,7 +312,7 @@ static void create_fdt(SiFiveUState *s, const struct MemmapEntry *memmap,
> g_free(nodename);
> }
>
> -static void riscv_sifive_u_init(MachineState *machine)
> +static void riscv_sifive_u_machine_init(MachineState *machine)
> {
> const struct MemmapEntry *memmap = sifive_u_memmap;
> SiFiveUState *s = RISCV_U_MACHINE(machine);
> @@ -606,7 +606,7 @@ static void riscv_sifive_u_machine_class_init(ObjectClass *oc, void *data)
> MachineClass *mc = MACHINE_CLASS(oc);
>
> mc->desc = "RISC-V Board compatible with SiFive U SDK";
> - mc->init = riscv_sifive_u_init;
> + mc->init = riscv_sifive_u_machine_init;
> mc->max_cpus = SIFIVE_U_MANAGEMENT_CPU_COUNT + SIFIVE_U_COMPUTE_CPU_COUNT;
> mc->min_cpus = SIFIVE_U_MANAGEMENT_CPU_COUNT + 1;
> mc->default_cpus = mc->min_cpus;
> --
> 2.21.1
>
>
^ permalink raw reply [flat|nested] 98+ messages in thread
* Re: [PATCH-for-5.1 v3 00/24] various: Fix error-propagation with Coccinelle scripts (part 1)
2020-04-12 22:35 ` Philippe Mathieu-Daudé
@ 2020-04-13 0:39 ` no-reply
-1 siblings, 0 replies; 98+ messages in thread
From: no-reply @ 2020-04-13 0:39 UTC (permalink / raw)
To: f4bug
Cc: fam, peter.maydell, sagark, mst, codyprime, jasowang, qemu-devel,
Alistair.Francis, edgar.iglesias, mreitz, qemu-block, armbru,
joel, marcandre.lureau, david, philmd, ehabkost, jcd,
xiechanglong.d, alistair, b.galvani, qemu-arm, peter.chubb, clg,
qemu-ppc, rth, kwolf, qemu-riscv, andrew, wencongyang2, f4bug,
sundeep.lkml, palmer, kbastian, pbonzini
Patchew URL: https://patchew.org/QEMU/20200412223619.11284-1-f4bug@amsat.org/
Hi,
This series failed the docker-quick@centos7 build test. Please find the testing commands and
their output below. If you have Docker installed, you can probably reproduce it
locally.
=== TEST SCRIPT BEGIN ===
#!/bin/bash
make docker-image-centos7 V=1 NETWORK=1
time make docker-test-quick@centos7 SHOW_ENV=1 J=14 NETWORK=1
=== TEST SCRIPT END ===
RAMBlock "sram A" already registered, abort!
Broken pipe
/tmp/qemu-test/src/tests/qtest/libqtest.c:175: kill_qemu() detected QEMU death from signal 6 (Aborted) (core dumped)
ERROR - too few tests run (expected 6, got 5)
make: *** [check-qtest-aarch64] Error 1
make: *** Waiting for unfinished jobs....
TEST iotest-qcow2: 179
TEST iotest-qcow2: 181
---
raise CalledProcessError(retcode, cmd)
subprocess.CalledProcessError: Command '['sudo', '-n', 'docker', 'run', '--label', 'com.qemu.instance.uuid=abc4f09082a8440eb816686d7f9d7a98', '-u', '1001', '--security-opt', 'seccomp=unconfined', '--rm', '-e', 'TARGET_LIST=', '-e', 'EXTRA_CONFIGURE_OPTS=', '-e', 'V=', '-e', 'J=14', '-e', 'DEBUG=', '-e', 'SHOW_ENV=1', '-e', 'CCACHE_DIR=/var/tmp/ccache', '-v', '/home/patchew/.cache/qemu-docker-ccache:/var/tmp/ccache:z', '-v', '/var/tmp/patchew-tester-tmp-99kbwerb/src/docker-src.2020-04-12-20.27.23.7092:/var/tmp/qemu:z,ro', 'qemu:centos7', '/var/tmp/qemu/run', 'test-quick']' returned non-zero exit status 2.
filter=--filter=label=com.qemu.instance.uuid=abc4f09082a8440eb816686d7f9d7a98
make[1]: *** [docker-run] Error 1
make[1]: Leaving directory `/var/tmp/patchew-tester-tmp-99kbwerb/src'
make: *** [docker-run-test-quick@centos7] Error 2
real 12m32.887s
user 0m9.441s
The full log is available at
http://patchew.org/logs/20200412223619.11284-1-f4bug@amsat.org/testing.docker-quick@centos7/?type=message.
---
Email generated automatically by Patchew [https://patchew.org/].
Please send your feedback to patchew-devel@redhat.com
^ permalink raw reply [flat|nested] 98+ messages in thread* Re: [PATCH-for-5.1 v3 00/24] various: Fix error-propagation with Coccinelle scripts (part 1)
@ 2020-04-13 0:39 ` no-reply
0 siblings, 0 replies; 98+ messages in thread
From: no-reply @ 2020-04-13 0:39 UTC (permalink / raw)
To: f4bug
Cc: qemu-devel, fam, peter.maydell, sagark, mst, codyprime, jasowang,
Alistair.Francis, edgar.iglesias, sundeep.lkml, qemu-block,
armbru, mreitz, joel, marcandre.lureau, rth, philmd, ehabkost,
xiechanglong.d, alistair, b.galvani, qemu-arm, peter.chubb, clg,
palmer, david, kwolf, qemu-riscv, andrew, wencongyang2, f4bug,
jcd, qemu-ppc, kbastian, pbonzini
Patchew URL: https://patchew.org/QEMU/20200412223619.11284-1-f4bug@amsat.org/
Hi,
This series failed the docker-quick@centos7 build test. Please find the testing commands and
their output below. If you have Docker installed, you can probably reproduce it
locally.
=== TEST SCRIPT BEGIN ===
#!/bin/bash
make docker-image-centos7 V=1 NETWORK=1
time make docker-test-quick@centos7 SHOW_ENV=1 J=14 NETWORK=1
=== TEST SCRIPT END ===
RAMBlock "sram A" already registered, abort!
Broken pipe
/tmp/qemu-test/src/tests/qtest/libqtest.c:175: kill_qemu() detected QEMU death from signal 6 (Aborted) (core dumped)
ERROR - too few tests run (expected 6, got 5)
make: *** [check-qtest-aarch64] Error 1
make: *** Waiting for unfinished jobs....
TEST iotest-qcow2: 179
TEST iotest-qcow2: 181
---
raise CalledProcessError(retcode, cmd)
subprocess.CalledProcessError: Command '['sudo', '-n', 'docker', 'run', '--label', 'com.qemu.instance.uuid=abc4f09082a8440eb816686d7f9d7a98', '-u', '1001', '--security-opt', 'seccomp=unconfined', '--rm', '-e', 'TARGET_LIST=', '-e', 'EXTRA_CONFIGURE_OPTS=', '-e', 'V=', '-e', 'J=14', '-e', 'DEBUG=', '-e', 'SHOW_ENV=1', '-e', 'CCACHE_DIR=/var/tmp/ccache', '-v', '/home/patchew/.cache/qemu-docker-ccache:/var/tmp/ccache:z', '-v', '/var/tmp/patchew-tester-tmp-99kbwerb/src/docker-src.2020-04-12-20.27.23.7092:/var/tmp/qemu:z,ro', 'qemu:centos7', '/var/tmp/qemu/run', 'test-quick']' returned non-zero exit status 2.
filter=--filter=label=com.qemu.instance.uuid=abc4f09082a8440eb816686d7f9d7a98
make[1]: *** [docker-run] Error 1
make[1]: Leaving directory `/var/tmp/patchew-tester-tmp-99kbwerb/src'
make: *** [docker-run-test-quick@centos7] Error 2
real 12m32.887s
user 0m9.441s
The full log is available at
http://patchew.org/logs/20200412223619.11284-1-f4bug@amsat.org/testing.docker-quick@centos7/?type=message.
---
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