* [PATCH v1 1/2] pinctrl: intel: Update description in struct intel_community
@ 2020-04-21 19:00 Andy Shevchenko
2020-04-21 19:00 ` [PATCH v1 2/2] pinctrl: intel: Move npins closer to pin_base " Andy Shevchenko
2020-04-22 8:49 ` [PATCH v1 1/2] pinctrl: intel: Update description " Mika Westerberg
0 siblings, 2 replies; 6+ messages in thread
From: Andy Shevchenko @ 2020-04-21 19:00 UTC (permalink / raw)
To: Mika Westerberg, linux-gpio, Linus Walleij; +Cc: Andy Shevchenko
It appears that most of the drivers, that are using struct intel_community,
utilize gpps rather than gpp_size. Update comment accordingly.
While here, correct the description of gpp_size, i.e. remove double space
and drop redundant 'etc.' part.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
---
drivers/pinctrl/intel/pinctrl-intel.h | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/pinctrl/intel/pinctrl-intel.h b/drivers/pinctrl/intel/pinctrl-intel.h
index 87fc0555ef90e..058bf2b6d9f0e 100644
--- a/drivers/pinctrl/intel/pinctrl-intel.h
+++ b/drivers/pinctrl/intel/pinctrl-intel.h
@@ -94,8 +94,8 @@ enum {
* @ie_offset: Register offset of GPI_IE from @regs.
* @features: Additional features supported by the hardware
* @pin_base: Starting pin of pins in this community
- * @gpp_size: Maximum number of pads in each group, such as PADCFGLOCK,
- * HOSTSW_OWN, GPI_IS, GPI_IE, etc. Used when @gpps is %NULL.
+ * @gpp_size: Maximum number of pads in each group, such as GPI_IS, GPI_IE,
+ * PADCFGLOCK, HOSTSW_OWN. Used when @gpps is %NULL.
* @gpp_num_padown_regs: Number of pad registers each pad group consumes at
* minimum. Use %0 if the number of registers can be
* determined by the size of the group.
@@ -106,8 +106,8 @@ enum {
* @regs: Community specific common registers (reserved for core driver)
* @pad_regs: Community specific pad registers (reserved for core driver)
*
- * Most Intel GPIO host controllers this driver supports each pad group is
- * of equal size (except the last one). In that case the driver can just
+ * In some of Intel GPIO host controllers this driver supports each pad group
+ * is of equal size (except the last one). In that case the driver can just
* fill in @gpp_size field and let the core driver to handle the rest. If
* the controller has pad groups of variable size the client driver can
* pass custom @gpps and @ngpps instead.
--
2.26.1
^ permalink raw reply related [flat|nested] 6+ messages in thread
* [PATCH v1 2/2] pinctrl: intel: Move npins closer to pin_base in struct intel_community
2020-04-21 19:00 [PATCH v1 1/2] pinctrl: intel: Update description in struct intel_community Andy Shevchenko
@ 2020-04-21 19:00 ` Andy Shevchenko
2020-04-22 8:50 ` Mika Westerberg
2020-04-22 8:49 ` [PATCH v1 1/2] pinctrl: intel: Update description " Mika Westerberg
1 sibling, 1 reply; 6+ messages in thread
From: Andy Shevchenko @ 2020-04-21 19:00 UTC (permalink / raw)
To: Mika Westerberg, linux-gpio, Linus Walleij; +Cc: Andy Shevchenko
It's common across the drivers to use the (pin_base, npins) pair to describe
community characteristics. Thus, move them in the struct intel_community
to be closer to each other.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
---
drivers/pinctrl/intel/pinctrl-intel.h | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/drivers/pinctrl/intel/pinctrl-intel.h b/drivers/pinctrl/intel/pinctrl-intel.h
index 058bf2b6d9f0e..bd653f2a07382 100644
--- a/drivers/pinctrl/intel/pinctrl-intel.h
+++ b/drivers/pinctrl/intel/pinctrl-intel.h
@@ -94,12 +94,12 @@ enum {
* @ie_offset: Register offset of GPI_IE from @regs.
* @features: Additional features supported by the hardware
* @pin_base: Starting pin of pins in this community
+ * @npins: Number of pins in this community
* @gpp_size: Maximum number of pads in each group, such as GPI_IS, GPI_IE,
* PADCFGLOCK, HOSTSW_OWN. Used when @gpps is %NULL.
* @gpp_num_padown_regs: Number of pad registers each pad group consumes at
* minimum. Use %0 if the number of registers can be
* determined by the size of the group.
- * @npins: Number of pins in this community
* @gpps: Pad groups if the controller has variable size pad groups
* @ngpps: Number of pad groups in this community
* @pad_map: Optional non-linear mapping of the pads
@@ -121,12 +121,13 @@ struct intel_community {
unsigned int ie_offset;
unsigned int features;
unsigned int pin_base;
+ size_t npins;
unsigned int gpp_size;
unsigned int gpp_num_padown_regs;
- size_t npins;
const struct intel_padgroup *gpps;
size_t ngpps;
const unsigned int *pad_map;
+
/* Reserved for the core driver */
void __iomem *regs;
void __iomem *pad_regs;
--
2.26.1
^ permalink raw reply related [flat|nested] 6+ messages in thread
* Re: [PATCH v1 1/2] pinctrl: intel: Update description in struct intel_community
2020-04-21 19:00 [PATCH v1 1/2] pinctrl: intel: Update description in struct intel_community Andy Shevchenko
2020-04-21 19:00 ` [PATCH v1 2/2] pinctrl: intel: Move npins closer to pin_base " Andy Shevchenko
@ 2020-04-22 8:49 ` Mika Westerberg
1 sibling, 0 replies; 6+ messages in thread
From: Mika Westerberg @ 2020-04-22 8:49 UTC (permalink / raw)
To: Andy Shevchenko; +Cc: linux-gpio, Linus Walleij
On Tue, Apr 21, 2020 at 10:00:48PM +0300, Andy Shevchenko wrote:
> It appears that most of the drivers, that are using struct intel_community,
> utilize gpps rather than gpp_size. Update comment accordingly.
>
> While here, correct the description of gpp_size, i.e. remove double space
> and drop redundant 'etc.' part.
>
> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH v1 2/2] pinctrl: intel: Move npins closer to pin_base in struct intel_community
2020-04-21 19:00 ` [PATCH v1 2/2] pinctrl: intel: Move npins closer to pin_base " Andy Shevchenko
@ 2020-04-22 8:50 ` Mika Westerberg
2020-04-22 9:45 ` Andy Shevchenko
0 siblings, 1 reply; 6+ messages in thread
From: Mika Westerberg @ 2020-04-22 8:50 UTC (permalink / raw)
To: Andy Shevchenko; +Cc: linux-gpio, Linus Walleij
On Tue, Apr 21, 2020 at 10:00:49PM +0300, Andy Shevchenko wrote:
> It's common across the drivers to use the (pin_base, npins) pair to describe
> community characteristics. Thus, move them in the struct intel_community
> to be closer to each other.
>
> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
> ---
> drivers/pinctrl/intel/pinctrl-intel.h | 5 +++--
> 1 file changed, 3 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/pinctrl/intel/pinctrl-intel.h b/drivers/pinctrl/intel/pinctrl-intel.h
> index 058bf2b6d9f0e..bd653f2a07382 100644
> --- a/drivers/pinctrl/intel/pinctrl-intel.h
> +++ b/drivers/pinctrl/intel/pinctrl-intel.h
> @@ -94,12 +94,12 @@ enum {
> * @ie_offset: Register offset of GPI_IE from @regs.
> * @features: Additional features supported by the hardware
> * @pin_base: Starting pin of pins in this community
> + * @npins: Number of pins in this community
> * @gpp_size: Maximum number of pads in each group, such as GPI_IS, GPI_IE,
> * PADCFGLOCK, HOSTSW_OWN. Used when @gpps is %NULL.
> * @gpp_num_padown_regs: Number of pad registers each pad group consumes at
> * minimum. Use %0 if the number of registers can be
> * determined by the size of the group.
> - * @npins: Number of pins in this community
> * @gpps: Pad groups if the controller has variable size pad groups
> * @ngpps: Number of pad groups in this community
> * @pad_map: Optional non-linear mapping of the pads
> @@ -121,12 +121,13 @@ struct intel_community {
> unsigned int ie_offset;
> unsigned int features;
> unsigned int pin_base;
> + size_t npins;
> unsigned int gpp_size;
> unsigned int gpp_num_padown_regs;
> - size_t npins;
> const struct intel_padgroup *gpps;
> size_t ngpps;
> const unsigned int *pad_map;
> +
Unrelated whitespace change?
In any case,
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH v1 2/2] pinctrl: intel: Move npins closer to pin_base in struct intel_community
2020-04-22 8:50 ` Mika Westerberg
@ 2020-04-22 9:45 ` Andy Shevchenko
2020-04-22 11:13 ` Andy Shevchenko
0 siblings, 1 reply; 6+ messages in thread
From: Andy Shevchenko @ 2020-04-22 9:45 UTC (permalink / raw)
To: Mika Westerberg; +Cc: linux-gpio, Linus Walleij
On Wed, Apr 22, 2020 at 11:50:56AM +0300, Mika Westerberg wrote:
> On Tue, Apr 21, 2020 at 10:00:49PM +0300, Andy Shevchenko wrote:
> > It's common across the drivers to use the (pin_base, npins) pair to describe
> > community characteristics. Thus, move them in the struct intel_community
> > to be closer to each other.
> >
> > Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
> > ---
> > drivers/pinctrl/intel/pinctrl-intel.h | 5 +++--
> > 1 file changed, 3 insertions(+), 2 deletions(-)
> >
> > diff --git a/drivers/pinctrl/intel/pinctrl-intel.h b/drivers/pinctrl/intel/pinctrl-intel.h
> > index 058bf2b6d9f0e..bd653f2a07382 100644
> > --- a/drivers/pinctrl/intel/pinctrl-intel.h
> > +++ b/drivers/pinctrl/intel/pinctrl-intel.h
> > @@ -94,12 +94,12 @@ enum {
> > * @ie_offset: Register offset of GPI_IE from @regs.
> > * @features: Additional features supported by the hardware
> > * @pin_base: Starting pin of pins in this community
> > + * @npins: Number of pins in this community
> > * @gpp_size: Maximum number of pads in each group, such as GPI_IS, GPI_IE,
> > * PADCFGLOCK, HOSTSW_OWN. Used when @gpps is %NULL.
> > * @gpp_num_padown_regs: Number of pad registers each pad group consumes at
> > * minimum. Use %0 if the number of registers can be
> > * determined by the size of the group.
> > - * @npins: Number of pins in this community
> > * @gpps: Pad groups if the controller has variable size pad groups
> > * @ngpps: Number of pad groups in this community
> > * @pad_map: Optional non-linear mapping of the pads
> > @@ -121,12 +121,13 @@ struct intel_community {
> > unsigned int ie_offset;
> > unsigned int features;
> > unsigned int pin_base;
> > + size_t npins;
> > unsigned int gpp_size;
> > unsigned int gpp_num_padown_regs;
> > - size_t npins;
> > const struct intel_padgroup *gpps;
> > size_t ngpps;
> > const unsigned int *pad_map;
> > +
>
> Unrelated whitespace change?
Not so. I can add justification to commit message.
> In any case,
>
> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Thanks.
--
With Best Regards,
Andy Shevchenko
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH v1 2/2] pinctrl: intel: Move npins closer to pin_base in struct intel_community
2020-04-22 9:45 ` Andy Shevchenko
@ 2020-04-22 11:13 ` Andy Shevchenko
0 siblings, 0 replies; 6+ messages in thread
From: Andy Shevchenko @ 2020-04-22 11:13 UTC (permalink / raw)
To: Mika Westerberg; +Cc: linux-gpio, Linus Walleij
On Wed, Apr 22, 2020 at 12:45:26PM +0300, Andy Shevchenko wrote:
> On Wed, Apr 22, 2020 at 11:50:56AM +0300, Mika Westerberg wrote:
> > On Tue, Apr 21, 2020 at 10:00:49PM +0300, Andy Shevchenko wrote:
> > > It's common across the drivers to use the (pin_base, npins) pair to describe
> > > community characteristics. Thus, move them in the struct intel_community
> > > to be closer to each other.
> > >
> > > Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
> > > ---
> > > drivers/pinctrl/intel/pinctrl-intel.h | 5 +++--
> > > 1 file changed, 3 insertions(+), 2 deletions(-)
> > >
> > > diff --git a/drivers/pinctrl/intel/pinctrl-intel.h b/drivers/pinctrl/intel/pinctrl-intel.h
> > > index 058bf2b6d9f0e..bd653f2a07382 100644
> > > --- a/drivers/pinctrl/intel/pinctrl-intel.h
> > > +++ b/drivers/pinctrl/intel/pinctrl-intel.h
> > > @@ -94,12 +94,12 @@ enum {
> > > * @ie_offset: Register offset of GPI_IE from @regs.
> > > * @features: Additional features supported by the hardware
> > > * @pin_base: Starting pin of pins in this community
> > > + * @npins: Number of pins in this community
> > > * @gpp_size: Maximum number of pads in each group, such as GPI_IS, GPI_IE,
> > > * PADCFGLOCK, HOSTSW_OWN. Used when @gpps is %NULL.
> > > * @gpp_num_padown_regs: Number of pad registers each pad group consumes at
> > > * minimum. Use %0 if the number of registers can be
> > > * determined by the size of the group.
> > > - * @npins: Number of pins in this community
> > > * @gpps: Pad groups if the controller has variable size pad groups
> > > * @ngpps: Number of pad groups in this community
> > > * @pad_map: Optional non-linear mapping of the pads
> > > @@ -121,12 +121,13 @@ struct intel_community {
> > > unsigned int ie_offset;
> > > unsigned int features;
> > > unsigned int pin_base;
> > > + size_t npins;
> > > unsigned int gpp_size;
> > > unsigned int gpp_num_padown_regs;
> > > - size_t npins;
> > > const struct intel_padgroup *gpps;
> > > size_t ngpps;
> > > const unsigned int *pad_map;
> > > +
> >
> > Unrelated whitespace change?
>
> Not so. I can add justification to commit message.
>
> > In any case,
> >
> > Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
>
> Thanks.
Both pushed to my review and testing queue, thanks!
Second one with slightly updated commit message to reflect blank line change.
--
With Best Regards,
Andy Shevchenko
^ permalink raw reply [flat|nested] 6+ messages in thread
end of thread, other threads:[~2020-04-22 11:13 UTC | newest]
Thread overview: 6+ messages (download: mbox.gz / follow: Atom feed)
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2020-04-21 19:00 [PATCH v1 1/2] pinctrl: intel: Update description in struct intel_community Andy Shevchenko
2020-04-21 19:00 ` [PATCH v1 2/2] pinctrl: intel: Move npins closer to pin_base " Andy Shevchenko
2020-04-22 8:50 ` Mika Westerberg
2020-04-22 9:45 ` Andy Shevchenko
2020-04-22 11:13 ` Andy Shevchenko
2020-04-22 8:49 ` [PATCH v1 1/2] pinctrl: intel: Update description " Mika Westerberg
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