* [Intel-gfx] [PATCH v3 1/6] drm/i915: Fix skl+ non-scaled pfit modes
@ 2020-04-22 16:19 Ville Syrjala
2020-04-22 16:19 ` [Intel-gfx] [PATCH v3 2/6] drm/i915: Flatten a bunch of the pfit functions Ville Syrjala
` (7 more replies)
0 siblings, 8 replies; 15+ messages in thread
From: Ville Syrjala @ 2020-04-22 16:19 UTC (permalink / raw)
To: intel-gfx
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
Fix skl_update_scaler_crtc() to deal with different scaling
modes correctly. The current implementation assumes
DRM_MODE_SCALE_FULLSCREEN. Fortunately we don't expose any
border properties currently so the code does actually end
up doing the right thing (assigning a scaler for pfit).
The code does need to be fixed before any borders are
exposed.
Also we have redundant calls to skl_update_scaler_crtc() in
dp/hdmi .compute_config() which can be nuked. They were anyway
called before we had even computed the pfit state so were
basically nonsense. The real call we need to keep is in
intel_crtc_atomic_check().
v2: Deal witrh skl_update_scaler_crtc() in intel_dp_ycbcr420_config()
Reviewed-by: Manasi Navare <manasi.d.navare@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/display/intel_display.c | 40 ++++++++++----------
drivers/gpu/drm/i915/display/intel_display.h | 1 -
drivers/gpu/drm/i915/display/intel_dp.c | 17 ---------
drivers/gpu/drm/i915/display/intel_hdmi.c | 7 ----
4 files changed, 19 insertions(+), 46 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index adb08a00bb57..375f3ff1642f 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -6089,30 +6089,28 @@ skl_update_scaler(struct intel_crtc_state *crtc_state, bool force_detach,
return 0;
}
-/**
- * skl_update_scaler_crtc - Stages update to scaler state for a given crtc.
- *
- * @state: crtc's scaler state
- *
- * Return
- * 0 - scaler_usage updated successfully
- * error - requested scaling cannot be supported or other error condition
- */
-int skl_update_scaler_crtc(struct intel_crtc_state *state)
+static int skl_update_scaler_crtc(struct intel_crtc_state *crtc_state)
{
- const struct drm_display_mode *adjusted_mode = &state->hw.adjusted_mode;
- bool need_scaler = false;
+ const struct drm_display_mode *adjusted_mode =
+ &crtc_state->hw.adjusted_mode;
+ int width, height;
- if (state->output_format == INTEL_OUTPUT_FORMAT_YCBCR420 ||
- state->pch_pfit.enabled)
- need_scaler = true;
+ if (crtc_state->pch_pfit.enabled) {
+ u32 pfit_size = crtc_state->pch_pfit.size;
- return skl_update_scaler(state, !state->hw.active, SKL_CRTC_INDEX,
- &state->scaler_state.scaler_id,
- state->pipe_src_w, state->pipe_src_h,
- adjusted_mode->crtc_hdisplay,
- adjusted_mode->crtc_vdisplay, NULL, 0,
- need_scaler);
+ width = pfit_size >> 16;
+ height = pfit_size & 0xffff;
+ } else {
+ width = adjusted_mode->crtc_hdisplay;
+ height = adjusted_mode->crtc_vdisplay;
+ }
+
+ return skl_update_scaler(crtc_state, !crtc_state->hw.active,
+ SKL_CRTC_INDEX,
+ &crtc_state->scaler_state.scaler_id,
+ crtc_state->pipe_src_w, crtc_state->pipe_src_h,
+ width, height, NULL, 0,
+ crtc_state->pch_pfit.enabled);
}
/**
diff --git a/drivers/gpu/drm/i915/display/intel_display.h b/drivers/gpu/drm/i915/display/intel_display.h
index 8d872ed0de36..efb4da205ea2 100644
--- a/drivers/gpu/drm/i915/display/intel_display.h
+++ b/drivers/gpu/drm/i915/display/intel_display.h
@@ -591,7 +591,6 @@ void intel_crtc_arm_fifo_underrun(struct intel_crtc *crtc,
struct intel_crtc_state *crtc_state);
u16 skl_scaler_calc_phase(int sub, int scale, bool chroma_center);
-int skl_update_scaler_crtc(struct intel_crtc_state *crtc_state);
void skl_scaler_disable(const struct intel_crtc_state *old_crtc_state);
void ilk_pfit_disable(const struct intel_crtc_state *old_crtc_state);
u32 glk_plane_color_ctl(const struct intel_crtc_state *crtc_state,
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index 66f8a9d1503d..9312be686413 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -2342,12 +2342,10 @@ intel_dp_ycbcr420_config(struct intel_dp *intel_dp,
struct drm_connector *connector,
struct intel_crtc_state *crtc_state)
{
- struct drm_i915_private *i915 = dp_to_i915(intel_dp);
const struct drm_display_info *info = &connector->display_info;
const struct drm_display_mode *adjusted_mode =
&crtc_state->hw.adjusted_mode;
struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
- int ret;
if (!drm_mode_is_420_only(info, adjusted_mode) ||
!intel_dp_get_colorimetry_status(intel_dp) ||
@@ -2356,14 +2354,6 @@ intel_dp_ycbcr420_config(struct intel_dp *intel_dp,
crtc_state->output_format = INTEL_OUTPUT_FORMAT_YCBCR420;
- /* YCBCR 420 output conversion needs a scaler */
- ret = skl_update_scaler_crtc(crtc_state);
- if (ret) {
- drm_dbg_kms(&i915->drm,
- "Scaler allocation for output failed\n");
- return ret;
- }
-
intel_pch_panel_fitting(crtc, crtc_state, DRM_MODE_SCALE_FULLSCREEN);
return 0;
@@ -2563,7 +2553,6 @@ intel_dp_compute_config(struct intel_encoder *encoder,
else
ret = intel_dp_ycbcr420_config(intel_dp, &intel_connector->base,
pipe_config);
-
if (ret)
return ret;
@@ -2579,12 +2568,6 @@ intel_dp_compute_config(struct intel_encoder *encoder,
intel_fixed_panel_mode(intel_connector->panel.fixed_mode,
adjusted_mode);
- if (INTEL_GEN(dev_priv) >= 9) {
- ret = skl_update_scaler_crtc(pipe_config);
- if (ret)
- return ret;
- }
-
if (HAS_GMCH(dev_priv))
intel_gmch_panel_fitting(intel_crtc, pipe_config,
conn_state->scaling_mode);
diff --git a/drivers/gpu/drm/i915/display/intel_hdmi.c b/drivers/gpu/drm/i915/display/intel_hdmi.c
index cdf9dedca36b..000ac0fc4edc 100644
--- a/drivers/gpu/drm/i915/display/intel_hdmi.c
+++ b/drivers/gpu/drm/i915/display/intel_hdmi.c
@@ -2336,13 +2336,6 @@ intel_hdmi_ycbcr420_config(struct drm_connector *connector,
config->output_format = INTEL_OUTPUT_FORMAT_YCBCR420;
- /* YCBCR 420 output conversion needs a scaler */
- if (skl_update_scaler_crtc(config)) {
- drm_dbg_kms(&i915->drm,
- "Scaler allocation for output failed\n");
- return false;
- }
-
intel_pch_panel_fitting(intel_crtc, config,
DRM_MODE_SCALE_FULLSCREEN);
--
2.24.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 15+ messages in thread
* [Intel-gfx] [PATCH v3 2/6] drm/i915: Flatten a bunch of the pfit functions
2020-04-22 16:19 [Intel-gfx] [PATCH v3 1/6] drm/i915: Fix skl+ non-scaled pfit modes Ville Syrjala
@ 2020-04-22 16:19 ` Ville Syrjala
2020-04-22 16:19 ` [Intel-gfx] [PATCH v3 3/6] drm/i915: Use drm_rect to store the pfit window pos/size Ville Syrjala
` (6 subsequent siblings)
7 siblings, 0 replies; 15+ messages in thread
From: Ville Syrjala @ 2020-04-22 16:19 UTC (permalink / raw)
To: intel-gfx
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
Most of the pfit functions are of the form:
func()
{
if (pfit_enabled) {
...
}
}
Flip the pfit_enabled check around to flatten the functions.
And while we're touching all this let's do the usual
s/pipe_config/crtc_state/ replacement.
Reviewed-by: Manasi Navare <manasi.d.navare@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/display/intel_display.c | 235 +++++++++----------
1 file changed, 116 insertions(+), 119 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 375f3ff1642f..96d0768ecf5d 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -6222,43 +6222,43 @@ static void skl_pfit_enable(const struct intel_crtc_state *crtc_state)
enum pipe pipe = crtc->pipe;
const struct intel_crtc_scaler_state *scaler_state =
&crtc_state->scaler_state;
+ u16 uv_rgb_hphase, uv_rgb_vphase;
+ int pfit_w, pfit_h, hscale, vscale;
+ unsigned long irqflags;
+ int id;
- if (crtc_state->pch_pfit.enabled) {
- u16 uv_rgb_hphase, uv_rgb_vphase;
- int pfit_w, pfit_h, hscale, vscale;
- unsigned long irqflags;
- int id;
+ if (!crtc_state->pch_pfit.enabled)
+ return;
- if (drm_WARN_ON(&dev_priv->drm,
- crtc_state->scaler_state.scaler_id < 0))
- return;
+ if (drm_WARN_ON(&dev_priv->drm,
+ crtc_state->scaler_state.scaler_id < 0))
+ return;
- pfit_w = (crtc_state->pch_pfit.size >> 16) & 0xFFFF;
- pfit_h = crtc_state->pch_pfit.size & 0xFFFF;
+ pfit_w = (crtc_state->pch_pfit.size >> 16) & 0xFFFF;
+ pfit_h = crtc_state->pch_pfit.size & 0xFFFF;
- hscale = (crtc_state->pipe_src_w << 16) / pfit_w;
- vscale = (crtc_state->pipe_src_h << 16) / pfit_h;
+ hscale = (crtc_state->pipe_src_w << 16) / pfit_w;
+ vscale = (crtc_state->pipe_src_h << 16) / pfit_h;
- uv_rgb_hphase = skl_scaler_calc_phase(1, hscale, false);
- uv_rgb_vphase = skl_scaler_calc_phase(1, vscale, false);
+ uv_rgb_hphase = skl_scaler_calc_phase(1, hscale, false);
+ uv_rgb_vphase = skl_scaler_calc_phase(1, vscale, false);
- id = scaler_state->scaler_id;
+ id = scaler_state->scaler_id;
- spin_lock_irqsave(&dev_priv->uncore.lock, irqflags);
+ spin_lock_irqsave(&dev_priv->uncore.lock, irqflags);
- intel_de_write_fw(dev_priv, SKL_PS_CTRL(pipe, id), PS_SCALER_EN |
- PS_FILTER_MEDIUM | scaler_state->scalers[id].mode);
- intel_de_write_fw(dev_priv, SKL_PS_VPHASE(pipe, id),
- PS_Y_PHASE(0) | PS_UV_RGB_PHASE(uv_rgb_vphase));
- intel_de_write_fw(dev_priv, SKL_PS_HPHASE(pipe, id),
- PS_Y_PHASE(0) | PS_UV_RGB_PHASE(uv_rgb_hphase));
- intel_de_write_fw(dev_priv, SKL_PS_WIN_POS(pipe, id),
- crtc_state->pch_pfit.pos);
- intel_de_write_fw(dev_priv, SKL_PS_WIN_SZ(pipe, id),
- crtc_state->pch_pfit.size);
+ intel_de_write_fw(dev_priv, SKL_PS_CTRL(pipe, id), PS_SCALER_EN |
+ PS_FILTER_MEDIUM | scaler_state->scalers[id].mode);
+ intel_de_write_fw(dev_priv, SKL_PS_VPHASE(pipe, id),
+ PS_Y_PHASE(0) | PS_UV_RGB_PHASE(uv_rgb_vphase));
+ intel_de_write_fw(dev_priv, SKL_PS_HPHASE(pipe, id),
+ PS_Y_PHASE(0) | PS_UV_RGB_PHASE(uv_rgb_hphase));
+ intel_de_write_fw(dev_priv, SKL_PS_WIN_POS(pipe, id),
+ crtc_state->pch_pfit.pos);
+ intel_de_write_fw(dev_priv, SKL_PS_WIN_SZ(pipe, id),
+ crtc_state->pch_pfit.size);
- spin_unlock_irqrestore(&dev_priv->uncore.lock, irqflags);
- }
+ spin_unlock_irqrestore(&dev_priv->uncore.lock, irqflags);
}
static void ilk_pfit_enable(const struct intel_crtc_state *crtc_state)
@@ -6267,22 +6267,23 @@ static void ilk_pfit_enable(const struct intel_crtc_state *crtc_state)
struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
enum pipe pipe = crtc->pipe;
- if (crtc_state->pch_pfit.enabled) {
- /* Force use of hard-coded filter coefficients
- * as some pre-programmed values are broken,
- * e.g. x201.
- */
- if (IS_IVYBRIDGE(dev_priv) || IS_HASWELL(dev_priv))
- intel_de_write(dev_priv, PF_CTL(pipe),
- PF_ENABLE | PF_FILTER_MED_3x3 | PF_PIPE_SEL_IVB(pipe));
- else
- intel_de_write(dev_priv, PF_CTL(pipe),
- PF_ENABLE | PF_FILTER_MED_3x3);
- intel_de_write(dev_priv, PF_WIN_POS(pipe),
- crtc_state->pch_pfit.pos);
- intel_de_write(dev_priv, PF_WIN_SZ(pipe),
- crtc_state->pch_pfit.size);
- }
+ if (!crtc_state->pch_pfit.enabled)
+ return;
+
+ /* Force use of hard-coded filter coefficients
+ * as some pre-programmed values are broken,
+ * e.g. x201.
+ */
+ if (IS_IVYBRIDGE(dev_priv) || IS_HASWELL(dev_priv))
+ intel_de_write(dev_priv, PF_CTL(pipe), PF_ENABLE |
+ PF_FILTER_MED_3x3 | PF_PIPE_SEL_IVB(pipe));
+ else
+ intel_de_write(dev_priv, PF_CTL(pipe), PF_ENABLE |
+ PF_FILTER_MED_3x3);
+ intel_de_write(dev_priv, PF_WIN_POS(pipe),
+ crtc_state->pch_pfit.pos);
+ intel_de_write(dev_priv, PF_WIN_SZ(pipe),
+ crtc_state->pch_pfit.size);
}
void hsw_enable_ips(const struct intel_crtc_state *crtc_state)
@@ -7099,11 +7100,12 @@ void ilk_pfit_disable(const struct intel_crtc_state *old_crtc_state)
/* To avoid upsetting the power well on haswell only disable the pfit if
* it's in use. The hw state code will make sure we get this right. */
- if (old_crtc_state->pch_pfit.enabled) {
- intel_de_write(dev_priv, PF_CTL(pipe), 0);
- intel_de_write(dev_priv, PF_WIN_POS(pipe), 0);
- intel_de_write(dev_priv, PF_WIN_SZ(pipe), 0);
- }
+ if (!old_crtc_state->pch_pfit.enabled)
+ return;
+
+ intel_de_write(dev_priv, PF_CTL(pipe), 0);
+ intel_de_write(dev_priv, PF_WIN_POS(pipe), 0);
+ intel_de_write(dev_priv, PF_WIN_SZ(pipe), 0);
}
static void ilk_crtc_disable(struct intel_atomic_state *state,
@@ -7931,40 +7933,36 @@ static bool intel_crtc_supports_double_wide(const struct intel_crtc *crtc)
(crtc->pipe == PIPE_A || IS_I915G(dev_priv));
}
-static u32 ilk_pipe_pixel_rate(const struct intel_crtc_state *pipe_config)
+static u32 ilk_pipe_pixel_rate(const struct intel_crtc_state *crtc_state)
{
- u32 pixel_rate;
-
- pixel_rate = pipe_config->hw.adjusted_mode.crtc_clock;
+ u32 pixel_rate = crtc_state->hw.adjusted_mode.crtc_clock;
+ u32 pfit_size = crtc_state->pch_pfit.size;
+ u64 pipe_w, pipe_h, pfit_w, pfit_h;
/*
* We only use IF-ID interlacing. If we ever use
* PF-ID we'll need to adjust the pixel_rate here.
*/
- if (pipe_config->pch_pfit.enabled) {
- u64 pipe_w, pipe_h, pfit_w, pfit_h;
- u32 pfit_size = pipe_config->pch_pfit.size;
+ if (!crtc_state->pch_pfit.enabled)
+ return pixel_rate;
- pipe_w = pipe_config->pipe_src_w;
- pipe_h = pipe_config->pipe_src_h;
+ pipe_w = crtc_state->pipe_src_w;
+ pipe_h = crtc_state->pipe_src_h;
- pfit_w = (pfit_size >> 16) & 0xFFFF;
- pfit_h = pfit_size & 0xFFFF;
- if (pipe_w < pfit_w)
- pipe_w = pfit_w;
- if (pipe_h < pfit_h)
- pipe_h = pfit_h;
+ pfit_w = (pfit_size >> 16) & 0xFFFF;
+ pfit_h = pfit_size & 0xFFFF;
+ if (pipe_w < pfit_w)
+ pipe_w = pfit_w;
+ if (pipe_h < pfit_h)
+ pipe_h = pfit_h;
- if (drm_WARN_ON(pipe_config->uapi.crtc->dev,
- !pfit_w || !pfit_h))
- return pixel_rate;
+ if (drm_WARN_ON(crtc_state->uapi.crtc->dev,
+ !pfit_w || !pfit_h))
+ return pixel_rate;
- pixel_rate = div_u64(mul_u32_u32(pixel_rate, pipe_w * pipe_h),
- pfit_w * pfit_h);
- }
-
- return pixel_rate;
+ return div_u64(mul_u32_u32(pixel_rate, pipe_w * pipe_h),
+ pfit_w * pfit_h);
}
static void intel_crtc_compute_pixel_rate(struct intel_crtc_state *crtc_state)
@@ -9158,9 +9156,9 @@ static bool i9xx_has_pfit(struct drm_i915_private *dev_priv)
IS_PINEVIEW(dev_priv) || IS_MOBILE(dev_priv);
}
-static void i9xx_get_pfit_config(struct intel_crtc *crtc,
- struct intel_crtc_state *pipe_config)
+static void i9xx_get_pfit_config(struct intel_crtc_state *crtc_state)
{
+ struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
u32 tmp;
@@ -9180,9 +9178,9 @@ static void i9xx_get_pfit_config(struct intel_crtc *crtc,
return;
}
- pipe_config->gmch_pfit.control = tmp;
- pipe_config->gmch_pfit.pgm_ratios = intel_de_read(dev_priv,
- PFIT_PGM_RATIOS);
+ crtc_state->gmch_pfit.control = tmp;
+ crtc_state->gmch_pfit.pgm_ratios =
+ intel_de_read(dev_priv, PFIT_PGM_RATIOS);
}
static void vlv_crtc_clock_get(struct intel_crtc *crtc,
@@ -9432,7 +9430,7 @@ static bool i9xx_get_pipe_config(struct intel_crtc *crtc,
intel_get_pipe_timings(crtc, pipe_config);
intel_get_pipe_src_size(crtc, pipe_config);
- i9xx_get_pfit_config(crtc, pipe_config);
+ i9xx_get_pfit_config(pipe_config);
if (INTEL_GEN(dev_priv) >= 4) {
/* No way to read it out on pipes B and C */
@@ -10402,37 +10400,37 @@ static void ilk_get_fdi_m_n_config(struct intel_crtc *crtc,
&pipe_config->fdi_m_n, NULL);
}
-static void skl_get_pfit_config(struct intel_crtc *crtc,
- struct intel_crtc_state *pipe_config)
+static void skl_get_pfit_config(struct intel_crtc_state *crtc_state)
{
- struct drm_device *dev = crtc->base.dev;
- struct drm_i915_private *dev_priv = to_i915(dev);
- struct intel_crtc_scaler_state *scaler_state = &pipe_config->scaler_state;
- u32 ps_ctrl = 0;
+ struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
+ struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
+ struct intel_crtc_scaler_state *scaler_state = &crtc_state->scaler_state;
int id = -1;
int i;
/* find scaler attached to this pipe */
for (i = 0; i < crtc->num_scalers; i++) {
- ps_ctrl = intel_de_read(dev_priv, SKL_PS_CTRL(crtc->pipe, i));
- if (ps_ctrl & PS_SCALER_EN && !(ps_ctrl & PS_PLANE_SEL_MASK)) {
- id = i;
- pipe_config->pch_pfit.enabled = true;
- pipe_config->pch_pfit.pos = intel_de_read(dev_priv,
- SKL_PS_WIN_POS(crtc->pipe, i));
- pipe_config->pch_pfit.size = intel_de_read(dev_priv,
- SKL_PS_WIN_SZ(crtc->pipe, i));
- scaler_state->scalers[i].in_use = true;
- break;
- }
+ u32 tmp;
+
+ tmp = intel_de_read(dev_priv, SKL_PS_CTRL(crtc->pipe, i));
+ if ((tmp & (PS_SCALER_EN | PS_PLANE_SEL_MASK)) != PS_SCALER_EN)
+ continue;
+
+ id = i;
+ crtc_state->pch_pfit.enabled = true;
+ crtc_state->pch_pfit.pos =
+ intel_de_read(dev_priv, SKL_PS_WIN_POS(crtc->pipe, i));
+ crtc_state->pch_pfit.size =
+ intel_de_read(dev_priv, SKL_PS_WIN_SZ(crtc->pipe, i));
+ scaler_state->scalers[i].in_use = true;
+ break;
}
scaler_state->scaler_id = id;
- if (id >= 0) {
+ if (id >= 0)
scaler_state->scaler_users |= (1 << SKL_CRTC_INDEX);
- } else {
+ else
scaler_state->scaler_users &= ~(1 << SKL_CRTC_INDEX);
- }
}
static void
@@ -10568,30 +10566,29 @@ skl_get_initial_plane_config(struct intel_crtc *crtc,
kfree(intel_fb);
}
-static void ilk_get_pfit_config(struct intel_crtc *crtc,
- struct intel_crtc_state *pipe_config)
+static void ilk_get_pfit_config(struct intel_crtc_state *crtc_state)
{
- struct drm_device *dev = crtc->base.dev;
- struct drm_i915_private *dev_priv = to_i915(dev);
+ struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
+ struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
u32 tmp;
tmp = intel_de_read(dev_priv, PF_CTL(crtc->pipe));
+ if ((tmp & PF_ENABLE) == 0)
+ return;
- if (tmp & PF_ENABLE) {
- pipe_config->pch_pfit.enabled = true;
- pipe_config->pch_pfit.pos = intel_de_read(dev_priv,
- PF_WIN_POS(crtc->pipe));
- pipe_config->pch_pfit.size = intel_de_read(dev_priv,
- PF_WIN_SZ(crtc->pipe));
+ crtc_state->pch_pfit.enabled = true;
+ crtc_state->pch_pfit.pos =
+ intel_de_read(dev_priv, PF_WIN_POS(crtc->pipe));
+ crtc_state->pch_pfit.size =
+ intel_de_read(dev_priv, PF_WIN_SZ(crtc->pipe));
- /* We currently do not free assignements of panel fitters on
- * ivb/hsw (since we don't use the higher upscaling modes which
- * differentiates them) so just WARN about this case for now. */
- if (IS_GEN(dev_priv, 7)) {
- drm_WARN_ON(dev, (tmp & PF_PIPE_SEL_MASK_IVB) !=
- PF_PIPE_SEL_IVB(crtc->pipe));
- }
- }
+ /*
+ * We currently do not free assignements of panel fitters on
+ * ivb/hsw (since we don't use the higher upscaling modes which
+ * differentiates them) so just WARN about this case for now.
+ */
+ drm_WARN_ON(&dev_priv->drm, IS_GEN(dev_priv, 7) &&
+ (tmp & PF_PIPE_SEL_MASK_IVB) != PF_PIPE_SEL_IVB(crtc->pipe));
}
static bool ilk_get_pipe_config(struct intel_crtc *crtc,
@@ -10702,7 +10699,7 @@ static bool ilk_get_pipe_config(struct intel_crtc *crtc,
intel_get_pipe_timings(crtc, pipe_config);
intel_get_pipe_src_size(crtc, pipe_config);
- ilk_get_pfit_config(crtc, pipe_config);
+ ilk_get_pfit_config(pipe_config);
ret = true;
@@ -11176,9 +11173,9 @@ static bool hsw_get_pipe_config(struct intel_crtc *crtc,
power_domain_mask |= BIT_ULL(power_domain);
if (INTEL_GEN(dev_priv) >= 9)
- skl_get_pfit_config(crtc, pipe_config);
+ skl_get_pfit_config(pipe_config);
else
- ilk_get_pfit_config(crtc, pipe_config);
+ ilk_get_pfit_config(pipe_config);
}
if (hsw_crtc_supports_ips(crtc)) {
--
2.24.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 15+ messages in thread
* [Intel-gfx] [PATCH v3 3/6] drm/i915: Use drm_rect to store the pfit window pos/size
2020-04-22 16:19 [Intel-gfx] [PATCH v3 1/6] drm/i915: Fix skl+ non-scaled pfit modes Ville Syrjala
2020-04-22 16:19 ` [Intel-gfx] [PATCH v3 2/6] drm/i915: Flatten a bunch of the pfit functions Ville Syrjala
@ 2020-04-22 16:19 ` Ville Syrjala
2020-04-22 19:20 ` Manasi Navare
2020-04-22 16:19 ` [Intel-gfx] [PATCH v3 4/6] drm/i915: s/pipe_config/crtc_state/ in pfit functions Ville Syrjala
` (5 subsequent siblings)
7 siblings, 1 reply; 15+ messages in thread
From: Ville Syrjala @ 2020-04-22 16:19 UTC (permalink / raw)
To: intel-gfx
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
Make things a bit more abstract by replacing the pch_pfit.pos/size
raw register values with a drm_rect. Makes it slighly more convenient
to eg. compute the scaling factors.
v2: Use drm_rect_init()
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/display/intel_display.c | 101 +++++++++++-------
.../drm/i915/display/intel_display_types.h | 3 +-
drivers/gpu/drm/i915/display/intel_panel.c | 13 ++-
3 files changed, 67 insertions(+), 50 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 96d0768ecf5d..6bb87965801e 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -6096,10 +6096,8 @@ static int skl_update_scaler_crtc(struct intel_crtc_state *crtc_state)
int width, height;
if (crtc_state->pch_pfit.enabled) {
- u32 pfit_size = crtc_state->pch_pfit.size;
-
- width = pfit_size >> 16;
- height = pfit_size & 0xffff;
+ width = drm_rect_width(&crtc_state->pch_pfit.dst);
+ height = drm_rect_height(&crtc_state->pch_pfit.dst);
} else {
width = adjusted_mode->crtc_hdisplay;
height = adjusted_mode->crtc_vdisplay;
@@ -6219,11 +6217,20 @@ static void skl_pfit_enable(const struct intel_crtc_state *crtc_state)
{
struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
- enum pipe pipe = crtc->pipe;
const struct intel_crtc_scaler_state *scaler_state =
&crtc_state->scaler_state;
+ struct drm_rect src = {
+ .x2 = crtc_state->pipe_src_w << 16,
+ .y2 = crtc_state->pipe_src_h << 16,
+ };
+ const struct drm_rect *dst = &crtc_state->pch_pfit.dst;
u16 uv_rgb_hphase, uv_rgb_vphase;
- int pfit_w, pfit_h, hscale, vscale;
+ enum pipe pipe = crtc->pipe;
+ int width = drm_rect_width(dst);
+ int height = drm_rect_height(dst);
+ int x = dst->x1;
+ int y = dst->y1;
+ int hscale, vscale;
unsigned long irqflags;
int id;
@@ -6234,11 +6241,8 @@ static void skl_pfit_enable(const struct intel_crtc_state *crtc_state)
crtc_state->scaler_state.scaler_id < 0))
return;
- pfit_w = (crtc_state->pch_pfit.size >> 16) & 0xFFFF;
- pfit_h = crtc_state->pch_pfit.size & 0xFFFF;
-
- hscale = (crtc_state->pipe_src_w << 16) / pfit_w;
- vscale = (crtc_state->pipe_src_h << 16) / pfit_h;
+ hscale = drm_rect_calc_hscale(&src, dst, 0, INT_MAX);
+ vscale = drm_rect_calc_vscale(&src, dst, 0, INT_MAX);
uv_rgb_hphase = skl_scaler_calc_phase(1, hscale, false);
uv_rgb_vphase = skl_scaler_calc_phase(1, vscale, false);
@@ -6254,9 +6258,9 @@ static void skl_pfit_enable(const struct intel_crtc_state *crtc_state)
intel_de_write_fw(dev_priv, SKL_PS_HPHASE(pipe, id),
PS_Y_PHASE(0) | PS_UV_RGB_PHASE(uv_rgb_hphase));
intel_de_write_fw(dev_priv, SKL_PS_WIN_POS(pipe, id),
- crtc_state->pch_pfit.pos);
+ x << 16 | y);
intel_de_write_fw(dev_priv, SKL_PS_WIN_SZ(pipe, id),
- crtc_state->pch_pfit.size);
+ width << 16 | height);
spin_unlock_irqrestore(&dev_priv->uncore.lock, irqflags);
}
@@ -6265,7 +6269,12 @@ static void ilk_pfit_enable(const struct intel_crtc_state *crtc_state)
{
struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
+ const struct drm_rect *dst = &crtc_state->pch_pfit.dst;
enum pipe pipe = crtc->pipe;
+ int width = drm_rect_width(dst);
+ int height = drm_rect_height(dst);
+ int x = dst->x1;
+ int y = dst->y1;
if (!crtc_state->pch_pfit.enabled)
return;
@@ -6280,10 +6289,8 @@ static void ilk_pfit_enable(const struct intel_crtc_state *crtc_state)
else
intel_de_write(dev_priv, PF_CTL(pipe), PF_ENABLE |
PF_FILTER_MED_3x3);
- intel_de_write(dev_priv, PF_WIN_POS(pipe),
- crtc_state->pch_pfit.pos);
- intel_de_write(dev_priv, PF_WIN_SZ(pipe),
- crtc_state->pch_pfit.size);
+ intel_de_write(dev_priv, PF_WIN_POS(pipe), x << 16 | y);
+ intel_de_write(dev_priv, PF_WIN_SZ(pipe), width << 16 | height);
}
void hsw_enable_ips(const struct intel_crtc_state *crtc_state)
@@ -7936,8 +7943,7 @@ static bool intel_crtc_supports_double_wide(const struct intel_crtc *crtc)
static u32 ilk_pipe_pixel_rate(const struct intel_crtc_state *crtc_state)
{
u32 pixel_rate = crtc_state->hw.adjusted_mode.crtc_clock;
- u32 pfit_size = crtc_state->pch_pfit.size;
- u64 pipe_w, pipe_h, pfit_w, pfit_h;
+ unsigned int pipe_w, pipe_h, pfit_w, pfit_h;
/*
* We only use IF-ID interlacing. If we ever use
@@ -7950,8 +7956,9 @@ static u32 ilk_pipe_pixel_rate(const struct intel_crtc_state *crtc_state)
pipe_w = crtc_state->pipe_src_w;
pipe_h = crtc_state->pipe_src_h;
- pfit_w = (pfit_size >> 16) & 0xFFFF;
- pfit_h = pfit_size & 0xFFFF;
+ pfit_w = drm_rect_width(&crtc_state->pch_pfit.dst);
+ pfit_h = drm_rect_height(&crtc_state->pch_pfit.dst);
+
if (pipe_w < pfit_w)
pipe_w = pfit_w;
if (pipe_h < pfit_h)
@@ -10400,6 +10407,14 @@ static void ilk_get_fdi_m_n_config(struct intel_crtc *crtc,
&pipe_config->fdi_m_n, NULL);
}
+static void ilk_get_pfit_pos_size(struct intel_crtc_state *crtc_state,
+ u32 pos, u32 size)
+{
+ drm_rect_init(&crtc_state->pch_pfit.dst,
+ pos >> 16, pos & 0xffff,
+ size >> 16, size & 0xffff);
+}
+
static void skl_get_pfit_config(struct intel_crtc_state *crtc_state)
{
struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
@@ -10410,18 +10425,20 @@ static void skl_get_pfit_config(struct intel_crtc_state *crtc_state)
/* find scaler attached to this pipe */
for (i = 0; i < crtc->num_scalers; i++) {
- u32 tmp;
+ u32 ctl, pos, size;
- tmp = intel_de_read(dev_priv, SKL_PS_CTRL(crtc->pipe, i));
- if ((tmp & (PS_SCALER_EN | PS_PLANE_SEL_MASK)) != PS_SCALER_EN)
+ ctl = intel_de_read(dev_priv, SKL_PS_CTRL(crtc->pipe, i));
+ if ((ctl & (PS_SCALER_EN | PS_PLANE_SEL_MASK)) != PS_SCALER_EN)
continue;
id = i;
crtc_state->pch_pfit.enabled = true;
- crtc_state->pch_pfit.pos =
- intel_de_read(dev_priv, SKL_PS_WIN_POS(crtc->pipe, i));
- crtc_state->pch_pfit.size =
- intel_de_read(dev_priv, SKL_PS_WIN_SZ(crtc->pipe, i));
+
+ pos = intel_de_read(dev_priv, SKL_PS_WIN_POS(crtc->pipe, i));
+ size = intel_de_read(dev_priv, SKL_PS_WIN_SZ(crtc->pipe, i));
+
+ ilk_get_pfit_pos_size(crtc_state, pos, size);
+
scaler_state->scalers[i].in_use = true;
break;
}
@@ -10570,17 +10587,18 @@ static void ilk_get_pfit_config(struct intel_crtc_state *crtc_state)
{
struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
- u32 tmp;
+ u32 ctl, pos, size;
- tmp = intel_de_read(dev_priv, PF_CTL(crtc->pipe));
- if ((tmp & PF_ENABLE) == 0)
+ ctl = intel_de_read(dev_priv, PF_CTL(crtc->pipe));
+ if ((ctl & PF_ENABLE) == 0)
return;
crtc_state->pch_pfit.enabled = true;
- crtc_state->pch_pfit.pos =
- intel_de_read(dev_priv, PF_WIN_POS(crtc->pipe));
- crtc_state->pch_pfit.size =
- intel_de_read(dev_priv, PF_WIN_SZ(crtc->pipe));
+
+ pos = intel_de_read(dev_priv, PF_WIN_POS(crtc->pipe));
+ size = intel_de_read(dev_priv, PF_WIN_SZ(crtc->pipe));
+
+ ilk_get_pfit_pos_size(crtc_state, pos, size);
/*
* We currently do not free assignements of panel fitters on
@@ -10588,7 +10606,7 @@ static void ilk_get_pfit_config(struct intel_crtc_state *crtc_state)
* differentiates them) so just WARN about this case for now.
*/
drm_WARN_ON(&dev_priv->drm, IS_GEN(dev_priv, 7) &&
- (tmp & PF_PIPE_SEL_MASK_IVB) != PF_PIPE_SEL_IVB(crtc->pipe));
+ (ctl & PF_PIPE_SEL_MASK_IVB) != PF_PIPE_SEL_IVB(crtc->pipe));
}
static bool ilk_get_pipe_config(struct intel_crtc *crtc,
@@ -13036,9 +13054,8 @@ static void intel_dump_pipe_config(const struct intel_crtc_state *pipe_config,
pipe_config->gmch_pfit.lvds_border_bits);
else
drm_dbg_kms(&dev_priv->drm,
- "pch pfit: pos: 0x%08x, size: 0x%08x, %s, force thru: %s\n",
- pipe_config->pch_pfit.pos,
- pipe_config->pch_pfit.size,
+ "pch pfit: " DRM_RECT_FMT ", %s, force thru: %s\n",
+ DRM_RECT_ARG(&pipe_config->pch_pfit.dst),
enableddisabled(pipe_config->pch_pfit.enabled),
yesno(pipe_config->pch_pfit.force_thru));
@@ -13780,8 +13797,10 @@ intel_pipe_config_compare(const struct intel_crtc_state *current_config,
PIPE_CONF_CHECK_BOOL(pch_pfit.enabled);
if (current_config->pch_pfit.enabled) {
- PIPE_CONF_CHECK_X(pch_pfit.pos);
- PIPE_CONF_CHECK_X(pch_pfit.size);
+ PIPE_CONF_CHECK_I(pch_pfit.dst.x1);
+ PIPE_CONF_CHECK_I(pch_pfit.dst.y1);
+ PIPE_CONF_CHECK_I(pch_pfit.dst.x2);
+ PIPE_CONF_CHECK_I(pch_pfit.dst.y2);
}
PIPE_CONF_CHECK_I(scaler_state.scaler_id);
diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
index ba8c08145c88..dc75f26f60de 100644
--- a/drivers/gpu/drm/i915/display/intel_display_types.h
+++ b/drivers/gpu/drm/i915/display/intel_display_types.h
@@ -974,8 +974,7 @@ struct intel_crtc_state {
/* Panel fitter placement and size for Ironlake+ */
struct {
- u32 pos;
- u32 size;
+ struct drm_rect dst;
bool enabled;
bool force_thru;
} pch_pfit;
diff --git a/drivers/gpu/drm/i915/display/intel_panel.c b/drivers/gpu/drm/i915/display/intel_panel.c
index bcd2cc1aba90..3e370888ecef 100644
--- a/drivers/gpu/drm/i915/display/intel_panel.c
+++ b/drivers/gpu/drm/i915/display/intel_panel.c
@@ -182,13 +182,13 @@ intel_pch_panel_fitting(struct intel_crtc *intel_crtc,
int fitting_mode)
{
const struct drm_display_mode *adjusted_mode = &pipe_config->hw.adjusted_mode;
- int x = 0, y = 0, width = 0, height = 0;
+ int x, y, width, height;
/* Native modes don't need fitting */
if (adjusted_mode->crtc_hdisplay == pipe_config->pipe_src_w &&
adjusted_mode->crtc_vdisplay == pipe_config->pipe_src_h &&
pipe_config->output_format != INTEL_OUTPUT_FORMAT_YCBCR420)
- goto done;
+ return;
switch (fitting_mode) {
case DRM_MODE_SCALE_CENTER:
@@ -234,14 +234,13 @@ intel_pch_panel_fitting(struct intel_crtc *intel_crtc,
break;
default:
- WARN(1, "bad panel fit mode: %d\n", fitting_mode);
+ MISSING_CASE(fitting_mode);
return;
}
-done:
- pipe_config->pch_pfit.pos = (x << 16) | y;
- pipe_config->pch_pfit.size = (width << 16) | height;
- pipe_config->pch_pfit.enabled = pipe_config->pch_pfit.size != 0;
+ drm_rect_init(&pipe_config->pch_pfit.dst,
+ x, y, width, height);
+ pipe_config->pch_pfit.enabled = true;
}
static void
--
2.24.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 15+ messages in thread
* [Intel-gfx] [PATCH v3 4/6] drm/i915: s/pipe_config/crtc_state/ in pfit functions
2020-04-22 16:19 [Intel-gfx] [PATCH v3 1/6] drm/i915: Fix skl+ non-scaled pfit modes Ville Syrjala
2020-04-22 16:19 ` [Intel-gfx] [PATCH v3 2/6] drm/i915: Flatten a bunch of the pfit functions Ville Syrjala
2020-04-22 16:19 ` [Intel-gfx] [PATCH v3 3/6] drm/i915: Use drm_rect to store the pfit window pos/size Ville Syrjala
@ 2020-04-22 16:19 ` Ville Syrjala
2020-04-22 19:26 ` Manasi Navare
2020-04-22 16:19 ` [Intel-gfx] [PATCH v3 5/6] drm/i915: Pass connector state to pfit calculations Ville Syrjala
` (4 subsequent siblings)
7 siblings, 1 reply; 15+ messages in thread
From: Ville Syrjala @ 2020-04-22 16:19 UTC (permalink / raw)
To: intel-gfx
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
Follow the new naming convention and call the crtc state
"crtc_state", and while at it drop the redundant crtc argument.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/display/icl_dsi.c | 3 +-
drivers/gpu/drm/i915/display/intel_dp.c | 8 +-
drivers/gpu/drm/i915/display/intel_hdmi.c | 4 +-
drivers/gpu/drm/i915/display/intel_lvds.c | 4 +-
drivers/gpu/drm/i915/display/intel_panel.c | 93 +++++++++++-----------
drivers/gpu/drm/i915/display/intel_panel.h | 6 +-
drivers/gpu/drm/i915/display/vlv_dsi.c | 5 +-
7 files changed, 58 insertions(+), 65 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/icl_dsi.c b/drivers/gpu/drm/i915/display/icl_dsi.c
index 73ebd387f549..fb9291de55d0 100644
--- a/drivers/gpu/drm/i915/display/icl_dsi.c
+++ b/drivers/gpu/drm/i915/display/icl_dsi.c
@@ -1525,7 +1525,6 @@ static int gen11_dsi_compute_config(struct intel_encoder *encoder,
struct intel_dsi *intel_dsi = container_of(encoder, struct intel_dsi,
base);
struct intel_connector *intel_connector = intel_dsi->attached_connector;
- struct intel_crtc *crtc = to_intel_crtc(pipe_config->uapi.crtc);
const struct drm_display_mode *fixed_mode =
intel_connector->panel.fixed_mode;
struct drm_display_mode *adjusted_mode =
@@ -1533,7 +1532,7 @@ static int gen11_dsi_compute_config(struct intel_encoder *encoder,
pipe_config->output_format = INTEL_OUTPUT_FORMAT_RGB;
intel_fixed_panel_mode(fixed_mode, adjusted_mode);
- intel_pch_panel_fitting(crtc, pipe_config, conn_state->scaling_mode);
+ intel_pch_panel_fitting(pipe_config, conn_state->scaling_mode);
adjusted_mode->flags = 0;
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index 9312be686413..b9a760012b3f 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -2345,7 +2345,6 @@ intel_dp_ycbcr420_config(struct intel_dp *intel_dp,
const struct drm_display_info *info = &connector->display_info;
const struct drm_display_mode *adjusted_mode =
&crtc_state->hw.adjusted_mode;
- struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
if (!drm_mode_is_420_only(info, adjusted_mode) ||
!intel_dp_get_colorimetry_status(intel_dp) ||
@@ -2354,7 +2353,7 @@ intel_dp_ycbcr420_config(struct intel_dp *intel_dp,
crtc_state->output_format = INTEL_OUTPUT_FORMAT_YCBCR420;
- intel_pch_panel_fitting(crtc, crtc_state, DRM_MODE_SCALE_FULLSCREEN);
+ intel_pch_panel_fitting(crtc_state, DRM_MODE_SCALE_FULLSCREEN);
return 0;
}
@@ -2535,7 +2534,6 @@ intel_dp_compute_config(struct intel_encoder *encoder,
struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
struct intel_lspcon *lspcon = enc_to_intel_lspcon(encoder);
enum port port = encoder->port;
- struct intel_crtc *intel_crtc = to_intel_crtc(pipe_config->uapi.crtc);
struct intel_connector *intel_connector = intel_dp->attached_connector;
struct intel_digital_connector_state *intel_conn_state =
to_intel_digital_connector_state(conn_state);
@@ -2569,10 +2567,10 @@ intel_dp_compute_config(struct intel_encoder *encoder,
adjusted_mode);
if (HAS_GMCH(dev_priv))
- intel_gmch_panel_fitting(intel_crtc, pipe_config,
+ intel_gmch_panel_fitting(pipe_config,
conn_state->scaling_mode);
else
- intel_pch_panel_fitting(intel_crtc, pipe_config,
+ intel_pch_panel_fitting(pipe_config,
conn_state->scaling_mode);
}
diff --git a/drivers/gpu/drm/i915/display/intel_hdmi.c b/drivers/gpu/drm/i915/display/intel_hdmi.c
index 000ac0fc4edc..275a676c7b08 100644
--- a/drivers/gpu/drm/i915/display/intel_hdmi.c
+++ b/drivers/gpu/drm/i915/display/intel_hdmi.c
@@ -2326,7 +2326,6 @@ intel_hdmi_ycbcr420_config(struct drm_connector *connector,
struct intel_crtc_state *config)
{
struct drm_i915_private *i915 = to_i915(connector->dev);
- struct intel_crtc *intel_crtc = to_intel_crtc(config->uapi.crtc);
if (!connector->ycbcr_420_allowed) {
drm_err(&i915->drm,
@@ -2336,8 +2335,7 @@ intel_hdmi_ycbcr420_config(struct drm_connector *connector,
config->output_format = INTEL_OUTPUT_FORMAT_YCBCR420;
- intel_pch_panel_fitting(intel_crtc, config,
- DRM_MODE_SCALE_FULLSCREEN);
+ intel_pch_panel_fitting(config, DRM_MODE_SCALE_FULLSCREEN);
return true;
}
diff --git a/drivers/gpu/drm/i915/display/intel_lvds.c b/drivers/gpu/drm/i915/display/intel_lvds.c
index fe591f82163e..276db41b95ef 100644
--- a/drivers/gpu/drm/i915/display/intel_lvds.c
+++ b/drivers/gpu/drm/i915/display/intel_lvds.c
@@ -439,10 +439,10 @@ static int intel_lvds_compute_config(struct intel_encoder *intel_encoder,
if (HAS_PCH_SPLIT(dev_priv)) {
pipe_config->has_pch_encoder = true;
- intel_pch_panel_fitting(intel_crtc, pipe_config,
+ intel_pch_panel_fitting(pipe_config,
conn_state->scaling_mode);
} else {
- intel_gmch_panel_fitting(intel_crtc, pipe_config,
+ intel_gmch_panel_fitting(pipe_config,
conn_state->scaling_mode);
}
diff --git a/drivers/gpu/drm/i915/display/intel_panel.c b/drivers/gpu/drm/i915/display/intel_panel.c
index 3e370888ecef..3ea1704277a8 100644
--- a/drivers/gpu/drm/i915/display/intel_panel.c
+++ b/drivers/gpu/drm/i915/display/intel_panel.c
@@ -177,23 +177,23 @@ intel_panel_vbt_fixed_mode(struct intel_connector *connector)
/* adjusted_mode has been preset to be the panel's fixed mode */
void
-intel_pch_panel_fitting(struct intel_crtc *intel_crtc,
- struct intel_crtc_state *pipe_config,
+intel_pch_panel_fitting(struct intel_crtc_state *crtc_state,
int fitting_mode)
{
- const struct drm_display_mode *adjusted_mode = &pipe_config->hw.adjusted_mode;
+ const struct drm_display_mode *adjusted_mode =
+ &crtc_state->hw.adjusted_mode;
int x, y, width, height;
/* Native modes don't need fitting */
- if (adjusted_mode->crtc_hdisplay == pipe_config->pipe_src_w &&
- adjusted_mode->crtc_vdisplay == pipe_config->pipe_src_h &&
- pipe_config->output_format != INTEL_OUTPUT_FORMAT_YCBCR420)
+ if (adjusted_mode->crtc_hdisplay == crtc_state->pipe_src_w &&
+ adjusted_mode->crtc_vdisplay == crtc_state->pipe_src_h &&
+ crtc_state->output_format != INTEL_OUTPUT_FORMAT_YCBCR420)
return;
switch (fitting_mode) {
case DRM_MODE_SCALE_CENTER:
- width = pipe_config->pipe_src_w;
- height = pipe_config->pipe_src_h;
+ width = crtc_state->pipe_src_w;
+ height = crtc_state->pipe_src_h;
x = (adjusted_mode->crtc_hdisplay - width + 1)/2;
y = (adjusted_mode->crtc_vdisplay - height + 1)/2;
break;
@@ -202,18 +202,18 @@ intel_pch_panel_fitting(struct intel_crtc *intel_crtc,
/* Scale but preserve the aspect ratio */
{
u32 scaled_width = adjusted_mode->crtc_hdisplay
- * pipe_config->pipe_src_h;
- u32 scaled_height = pipe_config->pipe_src_w
+ * crtc_state->pipe_src_h;
+ u32 scaled_height = crtc_state->pipe_src_w
* adjusted_mode->crtc_vdisplay;
if (scaled_width > scaled_height) { /* pillar */
- width = scaled_height / pipe_config->pipe_src_h;
+ width = scaled_height / crtc_state->pipe_src_h;
if (width & 1)
width++;
x = (adjusted_mode->crtc_hdisplay - width + 1) / 2;
y = 0;
height = adjusted_mode->crtc_vdisplay;
} else if (scaled_width < scaled_height) { /* letter */
- height = scaled_width / pipe_config->pipe_src_w;
+ height = scaled_width / crtc_state->pipe_src_w;
if (height & 1)
height++;
y = (adjusted_mode->crtc_vdisplay - height + 1) / 2;
@@ -238,9 +238,9 @@ intel_pch_panel_fitting(struct intel_crtc *intel_crtc,
return;
}
- drm_rect_init(&pipe_config->pch_pfit.dst,
+ drm_rect_init(&crtc_state->pch_pfit.dst,
x, y, width, height);
- pipe_config->pch_pfit.enabled = true;
+ crtc_state->pch_pfit.enabled = true;
}
static void
@@ -299,13 +299,14 @@ static u32 panel_fitter_scaling(u32 source, u32 target)
return (FACTOR * ratio + FACTOR/2) / FACTOR;
}
-static void i965_scale_aspect(struct intel_crtc_state *pipe_config,
+static void i965_scale_aspect(struct intel_crtc_state *crtc_state,
u32 *pfit_control)
{
- const struct drm_display_mode *adjusted_mode = &pipe_config->hw.adjusted_mode;
+ const struct drm_display_mode *adjusted_mode =
+ &crtc_state->hw.adjusted_mode;
u32 scaled_width = adjusted_mode->crtc_hdisplay *
- pipe_config->pipe_src_h;
- u32 scaled_height = pipe_config->pipe_src_w *
+ crtc_state->pipe_src_h;
+ u32 scaled_height = crtc_state->pipe_src_w *
adjusted_mode->crtc_vdisplay;
/* 965+ is easy, it does everything in hw */
@@ -315,18 +316,18 @@ static void i965_scale_aspect(struct intel_crtc_state *pipe_config,
else if (scaled_width < scaled_height)
*pfit_control |= PFIT_ENABLE |
PFIT_SCALING_LETTER;
- else if (adjusted_mode->crtc_hdisplay != pipe_config->pipe_src_w)
+ else if (adjusted_mode->crtc_hdisplay != crtc_state->pipe_src_w)
*pfit_control |= PFIT_ENABLE | PFIT_SCALING_AUTO;
}
-static void i9xx_scale_aspect(struct intel_crtc_state *pipe_config,
+static void i9xx_scale_aspect(struct intel_crtc_state *crtc_state,
u32 *pfit_control, u32 *pfit_pgm_ratios,
u32 *border)
{
- struct drm_display_mode *adjusted_mode = &pipe_config->hw.adjusted_mode;
+ struct drm_display_mode *adjusted_mode = &crtc_state->hw.adjusted_mode;
u32 scaled_width = adjusted_mode->crtc_hdisplay *
- pipe_config->pipe_src_h;
- u32 scaled_height = pipe_config->pipe_src_w *
+ crtc_state->pipe_src_h;
+ u32 scaled_height = crtc_state->pipe_src_w *
adjusted_mode->crtc_vdisplay;
u32 bits;
@@ -338,11 +339,11 @@ static void i9xx_scale_aspect(struct intel_crtc_state *pipe_config,
if (scaled_width > scaled_height) { /* pillar */
centre_horizontally(adjusted_mode,
scaled_height /
- pipe_config->pipe_src_h);
+ crtc_state->pipe_src_h);
*border = LVDS_BORDER_ENABLE;
- if (pipe_config->pipe_src_h != adjusted_mode->crtc_vdisplay) {
- bits = panel_fitter_scaling(pipe_config->pipe_src_h,
+ if (crtc_state->pipe_src_h != adjusted_mode->crtc_vdisplay) {
+ bits = panel_fitter_scaling(crtc_state->pipe_src_h,
adjusted_mode->crtc_vdisplay);
*pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT |
@@ -354,11 +355,11 @@ static void i9xx_scale_aspect(struct intel_crtc_state *pipe_config,
} else if (scaled_width < scaled_height) { /* letter */
centre_vertically(adjusted_mode,
scaled_width /
- pipe_config->pipe_src_w);
+ crtc_state->pipe_src_w);
*border = LVDS_BORDER_ENABLE;
- if (pipe_config->pipe_src_w != adjusted_mode->crtc_hdisplay) {
- bits = panel_fitter_scaling(pipe_config->pipe_src_w,
+ if (crtc_state->pipe_src_w != adjusted_mode->crtc_hdisplay) {
+ bits = panel_fitter_scaling(crtc_state->pipe_src_w,
adjusted_mode->crtc_hdisplay);
*pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT |
@@ -376,17 +377,17 @@ static void i9xx_scale_aspect(struct intel_crtc_state *pipe_config,
}
}
-void intel_gmch_panel_fitting(struct intel_crtc *intel_crtc,
- struct intel_crtc_state *pipe_config,
+void intel_gmch_panel_fitting(struct intel_crtc_state *crtc_state,
int fitting_mode)
{
- struct drm_i915_private *dev_priv = to_i915(intel_crtc->base.dev);
+ struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
+ struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
u32 pfit_control = 0, pfit_pgm_ratios = 0, border = 0;
- struct drm_display_mode *adjusted_mode = &pipe_config->hw.adjusted_mode;
+ struct drm_display_mode *adjusted_mode = &crtc_state->hw.adjusted_mode;
/* Native modes don't need fitting */
- if (adjusted_mode->crtc_hdisplay == pipe_config->pipe_src_w &&
- adjusted_mode->crtc_vdisplay == pipe_config->pipe_src_h)
+ if (adjusted_mode->crtc_hdisplay == crtc_state->pipe_src_w &&
+ adjusted_mode->crtc_vdisplay == crtc_state->pipe_src_h)
goto out;
switch (fitting_mode) {
@@ -395,16 +396,16 @@ void intel_gmch_panel_fitting(struct intel_crtc *intel_crtc,
* For centered modes, we have to calculate border widths &
* heights and modify the values programmed into the CRTC.
*/
- centre_horizontally(adjusted_mode, pipe_config->pipe_src_w);
- centre_vertically(adjusted_mode, pipe_config->pipe_src_h);
+ centre_horizontally(adjusted_mode, crtc_state->pipe_src_w);
+ centre_vertically(adjusted_mode, crtc_state->pipe_src_h);
border = LVDS_BORDER_ENABLE;
break;
case DRM_MODE_SCALE_ASPECT:
/* Scale but preserve the aspect ratio */
if (INTEL_GEN(dev_priv) >= 4)
- i965_scale_aspect(pipe_config, &pfit_control);
+ i965_scale_aspect(crtc_state, &pfit_control);
else
- i9xx_scale_aspect(pipe_config, &pfit_control,
+ i9xx_scale_aspect(crtc_state, &pfit_control,
&pfit_pgm_ratios, &border);
break;
case DRM_MODE_SCALE_FULLSCREEN:
@@ -412,8 +413,8 @@ void intel_gmch_panel_fitting(struct intel_crtc *intel_crtc,
* Full scaling, even if it changes the aspect ratio.
* Fortunately this is all done for us in hw.
*/
- if (pipe_config->pipe_src_h != adjusted_mode->crtc_vdisplay ||
- pipe_config->pipe_src_w != adjusted_mode->crtc_hdisplay) {
+ if (crtc_state->pipe_src_h != adjusted_mode->crtc_vdisplay ||
+ crtc_state->pipe_src_w != adjusted_mode->crtc_hdisplay) {
pfit_control |= PFIT_ENABLE;
if (INTEL_GEN(dev_priv) >= 4)
pfit_control |= PFIT_SCALING_AUTO;
@@ -433,7 +434,7 @@ void intel_gmch_panel_fitting(struct intel_crtc *intel_crtc,
/* 965+ wants fuzzy fitting */
/* FIXME: handle multiple panels by failing gracefully */
if (INTEL_GEN(dev_priv) >= 4)
- pfit_control |= PFIT_PIPE(intel_crtc->pipe) | PFIT_FILTER_FUZZY;
+ pfit_control |= PFIT_PIPE(crtc->pipe) | PFIT_FILTER_FUZZY;
out:
if ((pfit_control & PFIT_ENABLE) == 0) {
@@ -442,12 +443,12 @@ void intel_gmch_panel_fitting(struct intel_crtc *intel_crtc,
}
/* Make sure pre-965 set dither correctly for 18bpp panels. */
- if (INTEL_GEN(dev_priv) < 4 && pipe_config->pipe_bpp == 18)
+ if (INTEL_GEN(dev_priv) < 4 && crtc_state->pipe_bpp == 18)
pfit_control |= PANEL_8TO6_DITHER_ENABLE;
- pipe_config->gmch_pfit.control = pfit_control;
- pipe_config->gmch_pfit.pgm_ratios = pfit_pgm_ratios;
- pipe_config->gmch_pfit.lvds_border_bits = border;
+ crtc_state->gmch_pfit.control = pfit_control;
+ crtc_state->gmch_pfit.pgm_ratios = pfit_pgm_ratios;
+ crtc_state->gmch_pfit.lvds_border_bits = border;
}
/**
diff --git a/drivers/gpu/drm/i915/display/intel_panel.h b/drivers/gpu/drm/i915/display/intel_panel.h
index 11f2f6b628d8..92dcb773763c 100644
--- a/drivers/gpu/drm/i915/display/intel_panel.h
+++ b/drivers/gpu/drm/i915/display/intel_panel.h
@@ -25,11 +25,9 @@ int intel_panel_init(struct intel_panel *panel,
void intel_panel_fini(struct intel_panel *panel);
void intel_fixed_panel_mode(const struct drm_display_mode *fixed_mode,
struct drm_display_mode *adjusted_mode);
-void intel_pch_panel_fitting(struct intel_crtc *crtc,
- struct intel_crtc_state *pipe_config,
+void intel_pch_panel_fitting(struct intel_crtc_state *crtc_state,
int fitting_mode);
-void intel_gmch_panel_fitting(struct intel_crtc *crtc,
- struct intel_crtc_state *pipe_config,
+void intel_gmch_panel_fitting(struct intel_crtc_state *crtc_state,
int fitting_mode);
void intel_panel_set_backlight_acpi(const struct drm_connector_state *conn_state,
u32 level, u32 max);
diff --git a/drivers/gpu/drm/i915/display/vlv_dsi.c b/drivers/gpu/drm/i915/display/vlv_dsi.c
index 46e2895d916d..fe7c9d3ec418 100644
--- a/drivers/gpu/drm/i915/display/vlv_dsi.c
+++ b/drivers/gpu/drm/i915/display/vlv_dsi.c
@@ -267,7 +267,6 @@ static int intel_dsi_compute_config(struct intel_encoder *encoder,
struct intel_dsi *intel_dsi = container_of(encoder, struct intel_dsi,
base);
struct intel_connector *intel_connector = intel_dsi->attached_connector;
- struct intel_crtc *crtc = to_intel_crtc(pipe_config->uapi.crtc);
const struct drm_display_mode *fixed_mode = intel_connector->panel.fixed_mode;
struct drm_display_mode *adjusted_mode = &pipe_config->hw.adjusted_mode;
int ret;
@@ -279,10 +278,10 @@ static int intel_dsi_compute_config(struct intel_encoder *encoder,
intel_fixed_panel_mode(fixed_mode, adjusted_mode);
if (HAS_GMCH(dev_priv))
- intel_gmch_panel_fitting(crtc, pipe_config,
+ intel_gmch_panel_fitting(pipe_config,
conn_state->scaling_mode);
else
- intel_pch_panel_fitting(crtc, pipe_config,
+ intel_pch_panel_fitting(pipe_config,
conn_state->scaling_mode);
}
--
2.24.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 15+ messages in thread
* [Intel-gfx] [PATCH v3 5/6] drm/i915: Pass connector state to pfit calculations
2020-04-22 16:19 [Intel-gfx] [PATCH v3 1/6] drm/i915: Fix skl+ non-scaled pfit modes Ville Syrjala
` (2 preceding siblings ...)
2020-04-22 16:19 ` [Intel-gfx] [PATCH v3 4/6] drm/i915: s/pipe_config/crtc_state/ in pfit functions Ville Syrjala
@ 2020-04-22 16:19 ` Ville Syrjala
2020-04-22 21:35 ` Manasi Navare
2020-04-22 16:19 ` [Intel-gfx] [PATCH v3 6/6] drm/i915: Have pfit calculations return an error code Ville Syrjala
` (3 subsequent siblings)
7 siblings, 1 reply; 15+ messages in thread
From: Ville Syrjala @ 2020-04-22 16:19 UTC (permalink / raw)
To: intel-gfx
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
Pass the entire connector state to intel_{gmch,pch}_panel_fitting().
For now we just need to get at .scaling_mode but in the future we'll
want access to the margin properties as well.
v2: Deal with intel_dp_ycbcr420_config()
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/display/icl_dsi.c | 2 +-
drivers/gpu/drm/i915/display/intel_dp.c | 17 ++++++++---------
drivers/gpu/drm/i915/display/intel_hdmi.c | 11 ++++++-----
drivers/gpu/drm/i915/display/intel_lvds.c | 7 ++-----
drivers/gpu/drm/i915/display/intel_panel.c | 17 ++++++++++-------
drivers/gpu/drm/i915/display/intel_panel.h | 4 ++--
drivers/gpu/drm/i915/display/vlv_dsi.c | 6 ++----
7 files changed, 31 insertions(+), 33 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/icl_dsi.c b/drivers/gpu/drm/i915/display/icl_dsi.c
index fb9291de55d0..6650590f18fd 100644
--- a/drivers/gpu/drm/i915/display/icl_dsi.c
+++ b/drivers/gpu/drm/i915/display/icl_dsi.c
@@ -1532,7 +1532,7 @@ static int gen11_dsi_compute_config(struct intel_encoder *encoder,
pipe_config->output_format = INTEL_OUTPUT_FORMAT_RGB;
intel_fixed_panel_mode(fixed_mode, adjusted_mode);
- intel_pch_panel_fitting(pipe_config, conn_state->scaling_mode);
+ intel_pch_panel_fitting(pipe_config, conn_state);
adjusted_mode->flags = 0;
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index b9a760012b3f..7c4c9a4f4238 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -2339,9 +2339,10 @@ intel_dp_compute_link_config(struct intel_encoder *encoder,
static int
intel_dp_ycbcr420_config(struct intel_dp *intel_dp,
- struct drm_connector *connector,
- struct intel_crtc_state *crtc_state)
+ struct intel_crtc_state *crtc_state,
+ const struct drm_connector_state *conn_state)
{
+ struct drm_connector *connector = conn_state->connector;
const struct drm_display_info *info = &connector->display_info;
const struct drm_display_mode *adjusted_mode =
&crtc_state->hw.adjusted_mode;
@@ -2353,7 +2354,7 @@ intel_dp_ycbcr420_config(struct intel_dp *intel_dp,
crtc_state->output_format = INTEL_OUTPUT_FORMAT_YCBCR420;
- intel_pch_panel_fitting(crtc_state, DRM_MODE_SCALE_FULLSCREEN);
+ intel_pch_panel_fitting(crtc_state, conn_state);
return 0;
}
@@ -2549,8 +2550,8 @@ intel_dp_compute_config(struct intel_encoder *encoder,
if (lspcon->active)
lspcon_ycbcr420_config(&intel_connector->base, pipe_config);
else
- ret = intel_dp_ycbcr420_config(intel_dp, &intel_connector->base,
- pipe_config);
+ ret = intel_dp_ycbcr420_config(intel_dp, pipe_config,
+ conn_state);
if (ret)
return ret;
@@ -2567,11 +2568,9 @@ intel_dp_compute_config(struct intel_encoder *encoder,
adjusted_mode);
if (HAS_GMCH(dev_priv))
- intel_gmch_panel_fitting(pipe_config,
- conn_state->scaling_mode);
+ intel_gmch_panel_fitting(pipe_config, conn_state);
else
- intel_pch_panel_fitting(pipe_config,
- conn_state->scaling_mode);
+ intel_pch_panel_fitting(pipe_config, conn_state);
}
if (adjusted_mode->flags & DRM_MODE_FLAG_DBLSCAN)
diff --git a/drivers/gpu/drm/i915/display/intel_hdmi.c b/drivers/gpu/drm/i915/display/intel_hdmi.c
index 275a676c7b08..0edbdd39f462 100644
--- a/drivers/gpu/drm/i915/display/intel_hdmi.c
+++ b/drivers/gpu/drm/i915/display/intel_hdmi.c
@@ -2322,9 +2322,10 @@ static bool hdmi_deep_color_possible(const struct intel_crtc_state *crtc_state,
}
static bool
-intel_hdmi_ycbcr420_config(struct drm_connector *connector,
- struct intel_crtc_state *config)
+intel_hdmi_ycbcr420_config(struct intel_crtc_state *crtc_state,
+ const struct drm_connector_state *conn_state)
{
+ struct drm_connector *connector = conn_state->connector;
struct drm_i915_private *i915 = to_i915(connector->dev);
if (!connector->ycbcr_420_allowed) {
@@ -2333,9 +2334,9 @@ intel_hdmi_ycbcr420_config(struct drm_connector *connector,
return false;
}
- config->output_format = INTEL_OUTPUT_FORMAT_YCBCR420;
+ crtc_state->output_format = INTEL_OUTPUT_FORMAT_YCBCR420;
- intel_pch_panel_fitting(config, DRM_MODE_SCALE_FULLSCREEN);
+ intel_pch_panel_fitting(crtc_state, conn_state);
return true;
}
@@ -2466,7 +2467,7 @@ int intel_hdmi_compute_config(struct intel_encoder *encoder,
pipe_config->pixel_multiplier = 2;
if (drm_mode_is_420_only(&connector->display_info, adjusted_mode)) {
- if (!intel_hdmi_ycbcr420_config(connector, pipe_config)) {
+ if (!intel_hdmi_ycbcr420_config(pipe_config, conn_state)) {
drm_err(&dev_priv->drm,
"Can't support YCBCR420 output\n");
return -EINVAL;
diff --git a/drivers/gpu/drm/i915/display/intel_lvds.c b/drivers/gpu/drm/i915/display/intel_lvds.c
index 276db41b95ef..ae658d9354b7 100644
--- a/drivers/gpu/drm/i915/display/intel_lvds.c
+++ b/drivers/gpu/drm/i915/display/intel_lvds.c
@@ -439,12 +439,9 @@ static int intel_lvds_compute_config(struct intel_encoder *intel_encoder,
if (HAS_PCH_SPLIT(dev_priv)) {
pipe_config->has_pch_encoder = true;
- intel_pch_panel_fitting(pipe_config,
- conn_state->scaling_mode);
+ intel_pch_panel_fitting(pipe_config, conn_state);
} else {
- intel_gmch_panel_fitting(pipe_config,
- conn_state->scaling_mode);
-
+ intel_gmch_panel_fitting(pipe_config, conn_state);
}
/*
diff --git a/drivers/gpu/drm/i915/display/intel_panel.c b/drivers/gpu/drm/i915/display/intel_panel.c
index 3ea1704277a8..b4bb1cfc54a9 100644
--- a/drivers/gpu/drm/i915/display/intel_panel.c
+++ b/drivers/gpu/drm/i915/display/intel_panel.c
@@ -178,7 +178,7 @@ intel_panel_vbt_fixed_mode(struct intel_connector *connector)
/* adjusted_mode has been preset to be the panel's fixed mode */
void
intel_pch_panel_fitting(struct intel_crtc_state *crtc_state,
- int fitting_mode)
+ const struct drm_connector_state *conn_state)
{
const struct drm_display_mode *adjusted_mode =
&crtc_state->hw.adjusted_mode;
@@ -190,7 +190,7 @@ intel_pch_panel_fitting(struct intel_crtc_state *crtc_state,
crtc_state->output_format != INTEL_OUTPUT_FORMAT_YCBCR420)
return;
- switch (fitting_mode) {
+ switch (conn_state->scaling_mode) {
case DRM_MODE_SCALE_CENTER:
width = crtc_state->pipe_src_w;
height = crtc_state->pipe_src_h;
@@ -227,6 +227,10 @@ intel_pch_panel_fitting(struct intel_crtc_state *crtc_state,
}
break;
+ case DRM_MODE_SCALE_NONE:
+ WARN_ON(adjusted_mode->crtc_hdisplay != crtc_state->pipe_src_w);
+ WARN_ON(adjusted_mode->crtc_vdisplay != crtc_state->pipe_src_h);
+ /* fall through */
case DRM_MODE_SCALE_FULLSCREEN:
x = y = 0;
width = adjusted_mode->crtc_hdisplay;
@@ -234,7 +238,7 @@ intel_pch_panel_fitting(struct intel_crtc_state *crtc_state,
break;
default:
- MISSING_CASE(fitting_mode);
+ MISSING_CASE(conn_state->scaling_mode);
return;
}
@@ -378,7 +382,7 @@ static void i9xx_scale_aspect(struct intel_crtc_state *crtc_state,
}
void intel_gmch_panel_fitting(struct intel_crtc_state *crtc_state,
- int fitting_mode)
+ const struct drm_connector_state *conn_state)
{
struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
@@ -390,7 +394,7 @@ void intel_gmch_panel_fitting(struct intel_crtc_state *crtc_state,
adjusted_mode->crtc_vdisplay == crtc_state->pipe_src_h)
goto out;
- switch (fitting_mode) {
+ switch (conn_state->scaling_mode) {
case DRM_MODE_SCALE_CENTER:
/*
* For centered modes, we have to calculate border widths &
@@ -426,8 +430,7 @@ void intel_gmch_panel_fitting(struct intel_crtc_state *crtc_state,
}
break;
default:
- drm_WARN(&dev_priv->drm, 1, "bad panel fit mode: %d\n",
- fitting_mode);
+ MISSING_CASE(conn_state->scaling_mode);
return;
}
diff --git a/drivers/gpu/drm/i915/display/intel_panel.h b/drivers/gpu/drm/i915/display/intel_panel.h
index 92dcb773763c..a26db895038e 100644
--- a/drivers/gpu/drm/i915/display/intel_panel.h
+++ b/drivers/gpu/drm/i915/display/intel_panel.h
@@ -26,9 +26,9 @@ void intel_panel_fini(struct intel_panel *panel);
void intel_fixed_panel_mode(const struct drm_display_mode *fixed_mode,
struct drm_display_mode *adjusted_mode);
void intel_pch_panel_fitting(struct intel_crtc_state *crtc_state,
- int fitting_mode);
+ const struct drm_connector_state *conn_state);
void intel_gmch_panel_fitting(struct intel_crtc_state *crtc_state,
- int fitting_mode);
+ const struct drm_connector_state *conn_state);
void intel_panel_set_backlight_acpi(const struct drm_connector_state *conn_state,
u32 level, u32 max);
int intel_panel_setup_backlight(struct drm_connector *connector,
diff --git a/drivers/gpu/drm/i915/display/vlv_dsi.c b/drivers/gpu/drm/i915/display/vlv_dsi.c
index fe7c9d3ec418..9c9ea89d2107 100644
--- a/drivers/gpu/drm/i915/display/vlv_dsi.c
+++ b/drivers/gpu/drm/i915/display/vlv_dsi.c
@@ -278,11 +278,9 @@ static int intel_dsi_compute_config(struct intel_encoder *encoder,
intel_fixed_panel_mode(fixed_mode, adjusted_mode);
if (HAS_GMCH(dev_priv))
- intel_gmch_panel_fitting(pipe_config,
- conn_state->scaling_mode);
+ intel_gmch_panel_fitting(pipe_config, conn_state);
else
- intel_pch_panel_fitting(pipe_config,
- conn_state->scaling_mode);
+ intel_pch_panel_fitting(pipe_config, conn_state);
}
if (adjusted_mode->flags & DRM_MODE_FLAG_DBLSCAN)
--
2.24.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 15+ messages in thread
* [Intel-gfx] [PATCH v3 6/6] drm/i915: Have pfit calculations return an error code
2020-04-22 16:19 [Intel-gfx] [PATCH v3 1/6] drm/i915: Fix skl+ non-scaled pfit modes Ville Syrjala
` (3 preceding siblings ...)
2020-04-22 16:19 ` [Intel-gfx] [PATCH v3 5/6] drm/i915: Pass connector state to pfit calculations Ville Syrjala
@ 2020-04-22 16:19 ` Ville Syrjala
2020-04-22 21:42 ` Manasi Navare
2020-04-22 18:21 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [v3,1/6] drm/i915: Fix skl+ non-scaled pfit modes Patchwork
` (2 subsequent siblings)
7 siblings, 1 reply; 15+ messages in thread
From: Ville Syrjala @ 2020-04-22 16:19 UTC (permalink / raw)
To: intel-gfx
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
Change intel_{gmch,pch}_panel_fitting() to return a normal
error vs. success int. We'll need this later to validate that
the margin properties aren't misconfigured.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/display/icl_dsi.c | 10 +++++++---
drivers/gpu/drm/i915/display/intel_dp.c | 10 +++++-----
drivers/gpu/drm/i915/display/intel_hdmi.c | 23 +++++++++++-----------
drivers/gpu/drm/i915/display/intel_lvds.c | 13 +++++++-----
drivers/gpu/drm/i915/display/intel_panel.c | 19 ++++++++++--------
drivers/gpu/drm/i915/display/intel_panel.h | 6 +++---
drivers/gpu/drm/i915/display/vlv_dsi.c | 6 ++++--
7 files changed, 49 insertions(+), 38 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/icl_dsi.c b/drivers/gpu/drm/i915/display/icl_dsi.c
index 6650590f18fd..4fec5bd64920 100644
--- a/drivers/gpu/drm/i915/display/icl_dsi.c
+++ b/drivers/gpu/drm/i915/display/icl_dsi.c
@@ -1526,13 +1526,17 @@ static int gen11_dsi_compute_config(struct intel_encoder *encoder,
base);
struct intel_connector *intel_connector = intel_dsi->attached_connector;
const struct drm_display_mode *fixed_mode =
- intel_connector->panel.fixed_mode;
+ intel_connector->panel.fixed_mode;
struct drm_display_mode *adjusted_mode =
- &pipe_config->hw.adjusted_mode;
+ &pipe_config->hw.adjusted_mode;
+ int ret;
pipe_config->output_format = INTEL_OUTPUT_FORMAT_RGB;
intel_fixed_panel_mode(fixed_mode, adjusted_mode);
- intel_pch_panel_fitting(pipe_config, conn_state);
+
+ ret = intel_pch_panel_fitting(pipe_config, conn_state);
+ if (ret)
+ return ret;
adjusted_mode->flags = 0;
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index 7c4c9a4f4238..5c7009b74c24 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -2354,9 +2354,7 @@ intel_dp_ycbcr420_config(struct intel_dp *intel_dp,
crtc_state->output_format = INTEL_OUTPUT_FORMAT_YCBCR420;
- intel_pch_panel_fitting(crtc_state, conn_state);
-
- return 0;
+ return intel_pch_panel_fitting(crtc_state, conn_state);
}
bool intel_dp_limited_color_range(const struct intel_crtc_state *crtc_state,
@@ -2568,9 +2566,11 @@ intel_dp_compute_config(struct intel_encoder *encoder,
adjusted_mode);
if (HAS_GMCH(dev_priv))
- intel_gmch_panel_fitting(pipe_config, conn_state);
+ ret = intel_gmch_panel_fitting(pipe_config, conn_state);
else
- intel_pch_panel_fitting(pipe_config, conn_state);
+ ret = intel_pch_panel_fitting(pipe_config, conn_state);
+ if (ret)
+ return ret;
}
if (adjusted_mode->flags & DRM_MODE_FLAG_DBLSCAN)
diff --git a/drivers/gpu/drm/i915/display/intel_hdmi.c b/drivers/gpu/drm/i915/display/intel_hdmi.c
index 0edbdd39f462..010f37240710 100644
--- a/drivers/gpu/drm/i915/display/intel_hdmi.c
+++ b/drivers/gpu/drm/i915/display/intel_hdmi.c
@@ -2321,24 +2321,27 @@ static bool hdmi_deep_color_possible(const struct intel_crtc_state *crtc_state,
return true;
}
-static bool
+static int
intel_hdmi_ycbcr420_config(struct intel_crtc_state *crtc_state,
const struct drm_connector_state *conn_state)
{
struct drm_connector *connector = conn_state->connector;
struct drm_i915_private *i915 = to_i915(connector->dev);
+ const struct drm_display_mode *adjusted_mode =
+ &crtc_state->hw.adjusted_mode;
+
+ if (!drm_mode_is_420_only(&connector->display_info, adjusted_mode))
+ return 0;
if (!connector->ycbcr_420_allowed) {
drm_err(&i915->drm,
"Platform doesn't support YCBCR420 output\n");
- return false;
+ return -EINVAL;
}
crtc_state->output_format = INTEL_OUTPUT_FORMAT_YCBCR420;
- intel_pch_panel_fitting(crtc_state, conn_state);
-
- return true;
+ return intel_pch_panel_fitting(crtc_state, conn_state);
}
static int intel_hdmi_port_clock(int clock, int bpc)
@@ -2466,13 +2469,9 @@ int intel_hdmi_compute_config(struct intel_encoder *encoder,
if (adjusted_mode->flags & DRM_MODE_FLAG_DBLCLK)
pipe_config->pixel_multiplier = 2;
- if (drm_mode_is_420_only(&connector->display_info, adjusted_mode)) {
- if (!intel_hdmi_ycbcr420_config(pipe_config, conn_state)) {
- drm_err(&dev_priv->drm,
- "Can't support YCBCR420 output\n");
- return -EINVAL;
- }
- }
+ ret = intel_hdmi_ycbcr420_config(pipe_config, conn_state);
+ if (ret)
+ return ret;
pipe_config->limited_color_range =
intel_hdmi_limited_color_range(pipe_config, conn_state);
diff --git a/drivers/gpu/drm/i915/display/intel_lvds.c b/drivers/gpu/drm/i915/display/intel_lvds.c
index ae658d9354b7..872f2a489339 100644
--- a/drivers/gpu/drm/i915/display/intel_lvds.c
+++ b/drivers/gpu/drm/i915/display/intel_lvds.c
@@ -403,6 +403,7 @@ static int intel_lvds_compute_config(struct intel_encoder *intel_encoder,
struct drm_display_mode *adjusted_mode = &pipe_config->hw.adjusted_mode;
struct intel_crtc *intel_crtc = to_intel_crtc(pipe_config->uapi.crtc);
unsigned int lvds_bpp;
+ int ret;
/* Should never happen!! */
if (INTEL_GEN(dev_priv) < 4 && intel_crtc->pipe == 0) {
@@ -436,13 +437,15 @@ static int intel_lvds_compute_config(struct intel_encoder *intel_encoder,
if (adjusted_mode->flags & DRM_MODE_FLAG_DBLSCAN)
return -EINVAL;
- if (HAS_PCH_SPLIT(dev_priv)) {
+ if (HAS_PCH_SPLIT(dev_priv))
pipe_config->has_pch_encoder = true;
- intel_pch_panel_fitting(pipe_config, conn_state);
- } else {
- intel_gmch_panel_fitting(pipe_config, conn_state);
- }
+ if (HAS_GMCH(dev_priv))
+ ret = intel_gmch_panel_fitting(pipe_config, conn_state);
+ else
+ ret = intel_pch_panel_fitting(pipe_config, conn_state);
+ if (ret)
+ return ret;
/*
* XXX: It would be nice to support lower refresh rates on the
diff --git a/drivers/gpu/drm/i915/display/intel_panel.c b/drivers/gpu/drm/i915/display/intel_panel.c
index b4bb1cfc54a9..aa931f9f0d6a 100644
--- a/drivers/gpu/drm/i915/display/intel_panel.c
+++ b/drivers/gpu/drm/i915/display/intel_panel.c
@@ -176,9 +176,8 @@ intel_panel_vbt_fixed_mode(struct intel_connector *connector)
}
/* adjusted_mode has been preset to be the panel's fixed mode */
-void
-intel_pch_panel_fitting(struct intel_crtc_state *crtc_state,
- const struct drm_connector_state *conn_state)
+int intel_pch_panel_fitting(struct intel_crtc_state *crtc_state,
+ const struct drm_connector_state *conn_state)
{
const struct drm_display_mode *adjusted_mode =
&crtc_state->hw.adjusted_mode;
@@ -188,7 +187,7 @@ intel_pch_panel_fitting(struct intel_crtc_state *crtc_state,
if (adjusted_mode->crtc_hdisplay == crtc_state->pipe_src_w &&
adjusted_mode->crtc_vdisplay == crtc_state->pipe_src_h &&
crtc_state->output_format != INTEL_OUTPUT_FORMAT_YCBCR420)
- return;
+ return 0;
switch (conn_state->scaling_mode) {
case DRM_MODE_SCALE_CENTER:
@@ -239,12 +238,14 @@ intel_pch_panel_fitting(struct intel_crtc_state *crtc_state,
default:
MISSING_CASE(conn_state->scaling_mode);
- return;
+ return -EINVAL;
}
drm_rect_init(&crtc_state->pch_pfit.dst,
x, y, width, height);
crtc_state->pch_pfit.enabled = true;
+
+ return 0;
}
static void
@@ -381,8 +382,8 @@ static void i9xx_scale_aspect(struct intel_crtc_state *crtc_state,
}
}
-void intel_gmch_panel_fitting(struct intel_crtc_state *crtc_state,
- const struct drm_connector_state *conn_state)
+int intel_gmch_panel_fitting(struct intel_crtc_state *crtc_state,
+ const struct drm_connector_state *conn_state)
{
struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
@@ -431,7 +432,7 @@ void intel_gmch_panel_fitting(struct intel_crtc_state *crtc_state,
break;
default:
MISSING_CASE(conn_state->scaling_mode);
- return;
+ return -EINVAL;
}
/* 965+ wants fuzzy fitting */
@@ -452,6 +453,8 @@ void intel_gmch_panel_fitting(struct intel_crtc_state *crtc_state,
crtc_state->gmch_pfit.control = pfit_control;
crtc_state->gmch_pfit.pgm_ratios = pfit_pgm_ratios;
crtc_state->gmch_pfit.lvds_border_bits = border;
+
+ return 0;
}
/**
diff --git a/drivers/gpu/drm/i915/display/intel_panel.h b/drivers/gpu/drm/i915/display/intel_panel.h
index a26db895038e..968b95281cb4 100644
--- a/drivers/gpu/drm/i915/display/intel_panel.h
+++ b/drivers/gpu/drm/i915/display/intel_panel.h
@@ -25,10 +25,10 @@ int intel_panel_init(struct intel_panel *panel,
void intel_panel_fini(struct intel_panel *panel);
void intel_fixed_panel_mode(const struct drm_display_mode *fixed_mode,
struct drm_display_mode *adjusted_mode);
-void intel_pch_panel_fitting(struct intel_crtc_state *crtc_state,
+int intel_pch_panel_fitting(struct intel_crtc_state *crtc_state,
+ const struct drm_connector_state *conn_state);
+int intel_gmch_panel_fitting(struct intel_crtc_state *crtc_state,
const struct drm_connector_state *conn_state);
-void intel_gmch_panel_fitting(struct intel_crtc_state *crtc_state,
- const struct drm_connector_state *conn_state);
void intel_panel_set_backlight_acpi(const struct drm_connector_state *conn_state,
u32 level, u32 max);
int intel_panel_setup_backlight(struct drm_connector *connector,
diff --git a/drivers/gpu/drm/i915/display/vlv_dsi.c b/drivers/gpu/drm/i915/display/vlv_dsi.c
index 9c9ea89d2107..f582ab52f0b0 100644
--- a/drivers/gpu/drm/i915/display/vlv_dsi.c
+++ b/drivers/gpu/drm/i915/display/vlv_dsi.c
@@ -278,9 +278,11 @@ static int intel_dsi_compute_config(struct intel_encoder *encoder,
intel_fixed_panel_mode(fixed_mode, adjusted_mode);
if (HAS_GMCH(dev_priv))
- intel_gmch_panel_fitting(pipe_config, conn_state);
+ ret = intel_gmch_panel_fitting(pipe_config, conn_state);
else
- intel_pch_panel_fitting(pipe_config, conn_state);
+ ret = intel_pch_panel_fitting(pipe_config, conn_state);
+ if (ret)
+ return ret;
}
if (adjusted_mode->flags & DRM_MODE_FLAG_DBLSCAN)
--
2.24.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 15+ messages in thread
* [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [v3,1/6] drm/i915: Fix skl+ non-scaled pfit modes
2020-04-22 16:19 [Intel-gfx] [PATCH v3 1/6] drm/i915: Fix skl+ non-scaled pfit modes Ville Syrjala
` (4 preceding siblings ...)
2020-04-22 16:19 ` [Intel-gfx] [PATCH v3 6/6] drm/i915: Have pfit calculations return an error code Ville Syrjala
@ 2020-04-22 18:21 ` Patchwork
2020-04-22 18:45 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2020-04-22 22:44 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
7 siblings, 0 replies; 15+ messages in thread
From: Patchwork @ 2020-04-22 18:21 UTC (permalink / raw)
To: Ville Syrjälä; +Cc: intel-gfx
== Series Details ==
Series: series starting with [v3,1/6] drm/i915: Fix skl+ non-scaled pfit modes
URL : https://patchwork.freedesktop.org/series/76346/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
9faaa25c52d4 drm/i915: Fix skl+ non-scaled pfit modes
a744ba6aef89 drm/i915: Flatten a bunch of the pfit functions
f3c77a86b851 drm/i915: Use drm_rect to store the pfit window pos/size
7d771ff21ac6 drm/i915: s/pipe_config/crtc_state/ in pfit functions
0c5d1dc7d1cb drm/i915: Pass connector state to pfit calculations
-:167: WARNING:PREFER_FALLTHROUGH: Prefer 'fallthrough;' over fallthrough comment
#167: FILE: drivers/gpu/drm/i915/display/intel_panel.c:233:
+ /* fall through */
total: 0 errors, 1 warnings, 0 checks, 179 lines checked
422ff0ac891b drm/i915: Have pfit calculations return an error code
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 15+ messages in thread
* [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [v3,1/6] drm/i915: Fix skl+ non-scaled pfit modes
2020-04-22 16:19 [Intel-gfx] [PATCH v3 1/6] drm/i915: Fix skl+ non-scaled pfit modes Ville Syrjala
` (5 preceding siblings ...)
2020-04-22 18:21 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [v3,1/6] drm/i915: Fix skl+ non-scaled pfit modes Patchwork
@ 2020-04-22 18:45 ` Patchwork
2020-04-22 22:44 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
7 siblings, 0 replies; 15+ messages in thread
From: Patchwork @ 2020-04-22 18:45 UTC (permalink / raw)
To: Ville Syrjälä; +Cc: intel-gfx
== Series Details ==
Series: series starting with [v3,1/6] drm/i915: Fix skl+ non-scaled pfit modes
URL : https://patchwork.freedesktop.org/series/76346/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_8350 -> Patchwork_17426
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17426/index.html
Known issues
------------
Here are the changes found in Patchwork_17426 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@i915_selftest@live@blt:
- fi-ivb-3770: [PASS][1] -> [FAIL][2] ([i915#1763])
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8350/fi-ivb-3770/igt@i915_selftest@live@blt.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17426/fi-ivb-3770/igt@i915_selftest@live@blt.html
#### Warnings ####
* igt@i915_pm_rpm@module-reload:
- fi-kbl-x1275: [FAIL][3] ([i915#62]) -> [SKIP][4] ([fdo#109271])
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8350/fi-kbl-x1275/igt@i915_pm_rpm@module-reload.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17426/fi-kbl-x1275/igt@i915_pm_rpm@module-reload.html
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[i915#1763]: https://gitlab.freedesktop.org/drm/intel/issues/1763
[i915#62]: https://gitlab.freedesktop.org/drm/intel/issues/62
Participating hosts (48 -> 41)
------------------------------
Additional (1): fi-icl-dsi
Missing (8): fi-cml-u2 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-kbl-7500u fi-kbl-7560u fi-byt-clapper fi-bdw-samus
Build changes
-------------
* CI: CI-20190529 -> None
* Linux: CI_DRM_8350 -> Patchwork_17426
CI-20190529: 20190529
CI_DRM_8350: 018bab6d1c4ac37bff9306384383fab59750e140 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_5606: 678afb3954bec6227c8762756a0ad6d9946d49b2 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_17426: 422ff0ac891b0a528b74487d23fb280317bf1831 @ git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
422ff0ac891b drm/i915: Have pfit calculations return an error code
0c5d1dc7d1cb drm/i915: Pass connector state to pfit calculations
7d771ff21ac6 drm/i915: s/pipe_config/crtc_state/ in pfit functions
f3c77a86b851 drm/i915: Use drm_rect to store the pfit window pos/size
a744ba6aef89 drm/i915: Flatten a bunch of the pfit functions
9faaa25c52d4 drm/i915: Fix skl+ non-scaled pfit modes
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17426/index.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 15+ messages in thread
* Re: [Intel-gfx] [PATCH v3 3/6] drm/i915: Use drm_rect to store the pfit window pos/size
2020-04-22 16:19 ` [Intel-gfx] [PATCH v3 3/6] drm/i915: Use drm_rect to store the pfit window pos/size Ville Syrjala
@ 2020-04-22 19:20 ` Manasi Navare
2020-04-23 15:38 ` Ville Syrjälä
0 siblings, 1 reply; 15+ messages in thread
From: Manasi Navare @ 2020-04-22 19:20 UTC (permalink / raw)
To: Ville Syrjala; +Cc: intel-gfx
On Wed, Apr 22, 2020 at 07:19:14PM +0300, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> Make things a bit more abstract by replacing the pch_pfit.pos/size
> raw register values with a drm_rect. Makes it slighly more convenient
> to eg. compute the scaling factors.
>
> v2: Use drm_rect_init()
>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_display.c | 101 +++++++++++-------
> .../drm/i915/display/intel_display_types.h | 3 +-
> drivers/gpu/drm/i915/display/intel_panel.c | 13 ++-
> 3 files changed, 67 insertions(+), 50 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> index 96d0768ecf5d..6bb87965801e 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -6096,10 +6096,8 @@ static int skl_update_scaler_crtc(struct intel_crtc_state *crtc_state)
> int width, height;
>
> if (crtc_state->pch_pfit.enabled) {
> - u32 pfit_size = crtc_state->pch_pfit.size;
> -
> - width = pfit_size >> 16;
> - height = pfit_size & 0xffff;
> + width = drm_rect_width(&crtc_state->pch_pfit.dst);
> + height = drm_rect_height(&crtc_state->pch_pfit.dst);
> } else {
> width = adjusted_mode->crtc_hdisplay;
> height = adjusted_mode->crtc_vdisplay;
> @@ -6219,11 +6217,20 @@ static void skl_pfit_enable(const struct intel_crtc_state *crtc_state)
> {
> struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
> struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
> - enum pipe pipe = crtc->pipe;
> const struct intel_crtc_scaler_state *scaler_state =
> &crtc_state->scaler_state;
> + struct drm_rect src = {
> + .x2 = crtc_state->pipe_src_w << 16,
> + .y2 = crtc_state->pipe_src_h << 16,
Its not clear to me why we left shift by 16 for both src_w and src_h? Where can I find the format of
how this is stored?
Other than that everything else looks good in terms of replacing with drm_rect()
Manasi
> + };
> + const struct drm_rect *dst = &crtc_state->pch_pfit.dst;
> u16 uv_rgb_hphase, uv_rgb_vphase;
> - int pfit_w, pfit_h, hscale, vscale;
> + enum pipe pipe = crtc->pipe;
> + int width = drm_rect_width(dst);
> + int height = drm_rect_height(dst);
> + int x = dst->x1;
> + int y = dst->y1;
> + int hscale, vscale;
> unsigned long irqflags;
> int id;
>
> @@ -6234,11 +6241,8 @@ static void skl_pfit_enable(const struct intel_crtc_state *crtc_state)
> crtc_state->scaler_state.scaler_id < 0))
> return;
>
> - pfit_w = (crtc_state->pch_pfit.size >> 16) & 0xFFFF;
> - pfit_h = crtc_state->pch_pfit.size & 0xFFFF;
> -
> - hscale = (crtc_state->pipe_src_w << 16) / pfit_w;
> - vscale = (crtc_state->pipe_src_h << 16) / pfit_h;
> + hscale = drm_rect_calc_hscale(&src, dst, 0, INT_MAX);
> + vscale = drm_rect_calc_vscale(&src, dst, 0, INT_MAX);
>
> uv_rgb_hphase = skl_scaler_calc_phase(1, hscale, false);
> uv_rgb_vphase = skl_scaler_calc_phase(1, vscale, false);
> @@ -6254,9 +6258,9 @@ static void skl_pfit_enable(const struct intel_crtc_state *crtc_state)
> intel_de_write_fw(dev_priv, SKL_PS_HPHASE(pipe, id),
> PS_Y_PHASE(0) | PS_UV_RGB_PHASE(uv_rgb_hphase));
> intel_de_write_fw(dev_priv, SKL_PS_WIN_POS(pipe, id),
> - crtc_state->pch_pfit.pos);
> + x << 16 | y);
> intel_de_write_fw(dev_priv, SKL_PS_WIN_SZ(pipe, id),
> - crtc_state->pch_pfit.size);
> + width << 16 | height);
>
> spin_unlock_irqrestore(&dev_priv->uncore.lock, irqflags);
> }
> @@ -6265,7 +6269,12 @@ static void ilk_pfit_enable(const struct intel_crtc_state *crtc_state)
> {
> struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
> struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
> + const struct drm_rect *dst = &crtc_state->pch_pfit.dst;
> enum pipe pipe = crtc->pipe;
> + int width = drm_rect_width(dst);
> + int height = drm_rect_height(dst);
> + int x = dst->x1;
> + int y = dst->y1;
>
> if (!crtc_state->pch_pfit.enabled)
> return;
> @@ -6280,10 +6289,8 @@ static void ilk_pfit_enable(const struct intel_crtc_state *crtc_state)
> else
> intel_de_write(dev_priv, PF_CTL(pipe), PF_ENABLE |
> PF_FILTER_MED_3x3);
> - intel_de_write(dev_priv, PF_WIN_POS(pipe),
> - crtc_state->pch_pfit.pos);
> - intel_de_write(dev_priv, PF_WIN_SZ(pipe),
> - crtc_state->pch_pfit.size);
> + intel_de_write(dev_priv, PF_WIN_POS(pipe), x << 16 | y);
> + intel_de_write(dev_priv, PF_WIN_SZ(pipe), width << 16 | height);
> }
>
> void hsw_enable_ips(const struct intel_crtc_state *crtc_state)
> @@ -7936,8 +7943,7 @@ static bool intel_crtc_supports_double_wide(const struct intel_crtc *crtc)
> static u32 ilk_pipe_pixel_rate(const struct intel_crtc_state *crtc_state)
> {
> u32 pixel_rate = crtc_state->hw.adjusted_mode.crtc_clock;
> - u32 pfit_size = crtc_state->pch_pfit.size;
> - u64 pipe_w, pipe_h, pfit_w, pfit_h;
> + unsigned int pipe_w, pipe_h, pfit_w, pfit_h;
>
> /*
> * We only use IF-ID interlacing. If we ever use
> @@ -7950,8 +7956,9 @@ static u32 ilk_pipe_pixel_rate(const struct intel_crtc_state *crtc_state)
> pipe_w = crtc_state->pipe_src_w;
> pipe_h = crtc_state->pipe_src_h;
>
> - pfit_w = (pfit_size >> 16) & 0xFFFF;
> - pfit_h = pfit_size & 0xFFFF;
> + pfit_w = drm_rect_width(&crtc_state->pch_pfit.dst);
> + pfit_h = drm_rect_height(&crtc_state->pch_pfit.dst);
> +
> if (pipe_w < pfit_w)
> pipe_w = pfit_w;
> if (pipe_h < pfit_h)
> @@ -10400,6 +10407,14 @@ static void ilk_get_fdi_m_n_config(struct intel_crtc *crtc,
> &pipe_config->fdi_m_n, NULL);
> }
>
> +static void ilk_get_pfit_pos_size(struct intel_crtc_state *crtc_state,
> + u32 pos, u32 size)
> +{
> + drm_rect_init(&crtc_state->pch_pfit.dst,
> + pos >> 16, pos & 0xffff,
> + size >> 16, size & 0xffff);
> +}
> +
> static void skl_get_pfit_config(struct intel_crtc_state *crtc_state)
> {
> struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
> @@ -10410,18 +10425,20 @@ static void skl_get_pfit_config(struct intel_crtc_state *crtc_state)
>
> /* find scaler attached to this pipe */
> for (i = 0; i < crtc->num_scalers; i++) {
> - u32 tmp;
> + u32 ctl, pos, size;
>
> - tmp = intel_de_read(dev_priv, SKL_PS_CTRL(crtc->pipe, i));
> - if ((tmp & (PS_SCALER_EN | PS_PLANE_SEL_MASK)) != PS_SCALER_EN)
> + ctl = intel_de_read(dev_priv, SKL_PS_CTRL(crtc->pipe, i));
> + if ((ctl & (PS_SCALER_EN | PS_PLANE_SEL_MASK)) != PS_SCALER_EN)
> continue;
>
> id = i;
> crtc_state->pch_pfit.enabled = true;
> - crtc_state->pch_pfit.pos =
> - intel_de_read(dev_priv, SKL_PS_WIN_POS(crtc->pipe, i));
> - crtc_state->pch_pfit.size =
> - intel_de_read(dev_priv, SKL_PS_WIN_SZ(crtc->pipe, i));
> +
> + pos = intel_de_read(dev_priv, SKL_PS_WIN_POS(crtc->pipe, i));
> + size = intel_de_read(dev_priv, SKL_PS_WIN_SZ(crtc->pipe, i));
> +
> + ilk_get_pfit_pos_size(crtc_state, pos, size);
> +
> scaler_state->scalers[i].in_use = true;
> break;
> }
> @@ -10570,17 +10587,18 @@ static void ilk_get_pfit_config(struct intel_crtc_state *crtc_state)
> {
> struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
> struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
> - u32 tmp;
> + u32 ctl, pos, size;
>
> - tmp = intel_de_read(dev_priv, PF_CTL(crtc->pipe));
> - if ((tmp & PF_ENABLE) == 0)
> + ctl = intel_de_read(dev_priv, PF_CTL(crtc->pipe));
> + if ((ctl & PF_ENABLE) == 0)
> return;
>
> crtc_state->pch_pfit.enabled = true;
> - crtc_state->pch_pfit.pos =
> - intel_de_read(dev_priv, PF_WIN_POS(crtc->pipe));
> - crtc_state->pch_pfit.size =
> - intel_de_read(dev_priv, PF_WIN_SZ(crtc->pipe));
> +
> + pos = intel_de_read(dev_priv, PF_WIN_POS(crtc->pipe));
> + size = intel_de_read(dev_priv, PF_WIN_SZ(crtc->pipe));
> +
> + ilk_get_pfit_pos_size(crtc_state, pos, size);
>
> /*
> * We currently do not free assignements of panel fitters on
> @@ -10588,7 +10606,7 @@ static void ilk_get_pfit_config(struct intel_crtc_state *crtc_state)
> * differentiates them) so just WARN about this case for now.
> */
> drm_WARN_ON(&dev_priv->drm, IS_GEN(dev_priv, 7) &&
> - (tmp & PF_PIPE_SEL_MASK_IVB) != PF_PIPE_SEL_IVB(crtc->pipe));
> + (ctl & PF_PIPE_SEL_MASK_IVB) != PF_PIPE_SEL_IVB(crtc->pipe));
> }
>
> static bool ilk_get_pipe_config(struct intel_crtc *crtc,
> @@ -13036,9 +13054,8 @@ static void intel_dump_pipe_config(const struct intel_crtc_state *pipe_config,
> pipe_config->gmch_pfit.lvds_border_bits);
> else
> drm_dbg_kms(&dev_priv->drm,
> - "pch pfit: pos: 0x%08x, size: 0x%08x, %s, force thru: %s\n",
> - pipe_config->pch_pfit.pos,
> - pipe_config->pch_pfit.size,
> + "pch pfit: " DRM_RECT_FMT ", %s, force thru: %s\n",
> + DRM_RECT_ARG(&pipe_config->pch_pfit.dst),
> enableddisabled(pipe_config->pch_pfit.enabled),
> yesno(pipe_config->pch_pfit.force_thru));
>
> @@ -13780,8 +13797,10 @@ intel_pipe_config_compare(const struct intel_crtc_state *current_config,
>
> PIPE_CONF_CHECK_BOOL(pch_pfit.enabled);
> if (current_config->pch_pfit.enabled) {
> - PIPE_CONF_CHECK_X(pch_pfit.pos);
> - PIPE_CONF_CHECK_X(pch_pfit.size);
> + PIPE_CONF_CHECK_I(pch_pfit.dst.x1);
> + PIPE_CONF_CHECK_I(pch_pfit.dst.y1);
> + PIPE_CONF_CHECK_I(pch_pfit.dst.x2);
> + PIPE_CONF_CHECK_I(pch_pfit.dst.y2);
> }
>
> PIPE_CONF_CHECK_I(scaler_state.scaler_id);
> diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
> index ba8c08145c88..dc75f26f60de 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_types.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_types.h
> @@ -974,8 +974,7 @@ struct intel_crtc_state {
>
> /* Panel fitter placement and size for Ironlake+ */
> struct {
> - u32 pos;
> - u32 size;
> + struct drm_rect dst;
> bool enabled;
> bool force_thru;
> } pch_pfit;
> diff --git a/drivers/gpu/drm/i915/display/intel_panel.c b/drivers/gpu/drm/i915/display/intel_panel.c
> index bcd2cc1aba90..3e370888ecef 100644
> --- a/drivers/gpu/drm/i915/display/intel_panel.c
> +++ b/drivers/gpu/drm/i915/display/intel_panel.c
> @@ -182,13 +182,13 @@ intel_pch_panel_fitting(struct intel_crtc *intel_crtc,
> int fitting_mode)
> {
> const struct drm_display_mode *adjusted_mode = &pipe_config->hw.adjusted_mode;
> - int x = 0, y = 0, width = 0, height = 0;
> + int x, y, width, height;
>
> /* Native modes don't need fitting */
> if (adjusted_mode->crtc_hdisplay == pipe_config->pipe_src_w &&
> adjusted_mode->crtc_vdisplay == pipe_config->pipe_src_h &&
> pipe_config->output_format != INTEL_OUTPUT_FORMAT_YCBCR420)
> - goto done;
> + return;
>
> switch (fitting_mode) {
> case DRM_MODE_SCALE_CENTER:
> @@ -234,14 +234,13 @@ intel_pch_panel_fitting(struct intel_crtc *intel_crtc,
> break;
>
> default:
> - WARN(1, "bad panel fit mode: %d\n", fitting_mode);
> + MISSING_CASE(fitting_mode);
> return;
> }
>
> -done:
> - pipe_config->pch_pfit.pos = (x << 16) | y;
> - pipe_config->pch_pfit.size = (width << 16) | height;
> - pipe_config->pch_pfit.enabled = pipe_config->pch_pfit.size != 0;
> + drm_rect_init(&pipe_config->pch_pfit.dst,
> + x, y, width, height);
> + pipe_config->pch_pfit.enabled = true;
> }
>
> static void
> --
> 2.24.1
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 15+ messages in thread
* Re: [Intel-gfx] [PATCH v3 4/6] drm/i915: s/pipe_config/crtc_state/ in pfit functions
2020-04-22 16:19 ` [Intel-gfx] [PATCH v3 4/6] drm/i915: s/pipe_config/crtc_state/ in pfit functions Ville Syrjala
@ 2020-04-22 19:26 ` Manasi Navare
0 siblings, 0 replies; 15+ messages in thread
From: Manasi Navare @ 2020-04-22 19:26 UTC (permalink / raw)
To: Ville Syrjala; +Cc: intel-gfx
On Wed, Apr 22, 2020 at 07:19:15PM +0300, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> Follow the new naming convention and call the crtc state
> "crtc_state", and while at it drop the redundant crtc argument.
>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Manasi Navare <manasi.d.navare@intel.com>
Manasi
> ---
> drivers/gpu/drm/i915/display/icl_dsi.c | 3 +-
> drivers/gpu/drm/i915/display/intel_dp.c | 8 +-
> drivers/gpu/drm/i915/display/intel_hdmi.c | 4 +-
> drivers/gpu/drm/i915/display/intel_lvds.c | 4 +-
> drivers/gpu/drm/i915/display/intel_panel.c | 93 +++++++++++-----------
> drivers/gpu/drm/i915/display/intel_panel.h | 6 +-
> drivers/gpu/drm/i915/display/vlv_dsi.c | 5 +-
> 7 files changed, 58 insertions(+), 65 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/icl_dsi.c b/drivers/gpu/drm/i915/display/icl_dsi.c
> index 73ebd387f549..fb9291de55d0 100644
> --- a/drivers/gpu/drm/i915/display/icl_dsi.c
> +++ b/drivers/gpu/drm/i915/display/icl_dsi.c
> @@ -1525,7 +1525,6 @@ static int gen11_dsi_compute_config(struct intel_encoder *encoder,
> struct intel_dsi *intel_dsi = container_of(encoder, struct intel_dsi,
> base);
> struct intel_connector *intel_connector = intel_dsi->attached_connector;
> - struct intel_crtc *crtc = to_intel_crtc(pipe_config->uapi.crtc);
> const struct drm_display_mode *fixed_mode =
> intel_connector->panel.fixed_mode;
> struct drm_display_mode *adjusted_mode =
> @@ -1533,7 +1532,7 @@ static int gen11_dsi_compute_config(struct intel_encoder *encoder,
>
> pipe_config->output_format = INTEL_OUTPUT_FORMAT_RGB;
> intel_fixed_panel_mode(fixed_mode, adjusted_mode);
> - intel_pch_panel_fitting(crtc, pipe_config, conn_state->scaling_mode);
> + intel_pch_panel_fitting(pipe_config, conn_state->scaling_mode);
>
> adjusted_mode->flags = 0;
>
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
> index 9312be686413..b9a760012b3f 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -2345,7 +2345,6 @@ intel_dp_ycbcr420_config(struct intel_dp *intel_dp,
> const struct drm_display_info *info = &connector->display_info;
> const struct drm_display_mode *adjusted_mode =
> &crtc_state->hw.adjusted_mode;
> - struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
>
> if (!drm_mode_is_420_only(info, adjusted_mode) ||
> !intel_dp_get_colorimetry_status(intel_dp) ||
> @@ -2354,7 +2353,7 @@ intel_dp_ycbcr420_config(struct intel_dp *intel_dp,
>
> crtc_state->output_format = INTEL_OUTPUT_FORMAT_YCBCR420;
>
> - intel_pch_panel_fitting(crtc, crtc_state, DRM_MODE_SCALE_FULLSCREEN);
> + intel_pch_panel_fitting(crtc_state, DRM_MODE_SCALE_FULLSCREEN);
>
> return 0;
> }
> @@ -2535,7 +2534,6 @@ intel_dp_compute_config(struct intel_encoder *encoder,
> struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
> struct intel_lspcon *lspcon = enc_to_intel_lspcon(encoder);
> enum port port = encoder->port;
> - struct intel_crtc *intel_crtc = to_intel_crtc(pipe_config->uapi.crtc);
> struct intel_connector *intel_connector = intel_dp->attached_connector;
> struct intel_digital_connector_state *intel_conn_state =
> to_intel_digital_connector_state(conn_state);
> @@ -2569,10 +2567,10 @@ intel_dp_compute_config(struct intel_encoder *encoder,
> adjusted_mode);
>
> if (HAS_GMCH(dev_priv))
> - intel_gmch_panel_fitting(intel_crtc, pipe_config,
> + intel_gmch_panel_fitting(pipe_config,
> conn_state->scaling_mode);
> else
> - intel_pch_panel_fitting(intel_crtc, pipe_config,
> + intel_pch_panel_fitting(pipe_config,
> conn_state->scaling_mode);
> }
>
> diff --git a/drivers/gpu/drm/i915/display/intel_hdmi.c b/drivers/gpu/drm/i915/display/intel_hdmi.c
> index 000ac0fc4edc..275a676c7b08 100644
> --- a/drivers/gpu/drm/i915/display/intel_hdmi.c
> +++ b/drivers/gpu/drm/i915/display/intel_hdmi.c
> @@ -2326,7 +2326,6 @@ intel_hdmi_ycbcr420_config(struct drm_connector *connector,
> struct intel_crtc_state *config)
> {
> struct drm_i915_private *i915 = to_i915(connector->dev);
> - struct intel_crtc *intel_crtc = to_intel_crtc(config->uapi.crtc);
>
> if (!connector->ycbcr_420_allowed) {
> drm_err(&i915->drm,
> @@ -2336,8 +2335,7 @@ intel_hdmi_ycbcr420_config(struct drm_connector *connector,
>
> config->output_format = INTEL_OUTPUT_FORMAT_YCBCR420;
>
> - intel_pch_panel_fitting(intel_crtc, config,
> - DRM_MODE_SCALE_FULLSCREEN);
> + intel_pch_panel_fitting(config, DRM_MODE_SCALE_FULLSCREEN);
>
> return true;
> }
> diff --git a/drivers/gpu/drm/i915/display/intel_lvds.c b/drivers/gpu/drm/i915/display/intel_lvds.c
> index fe591f82163e..276db41b95ef 100644
> --- a/drivers/gpu/drm/i915/display/intel_lvds.c
> +++ b/drivers/gpu/drm/i915/display/intel_lvds.c
> @@ -439,10 +439,10 @@ static int intel_lvds_compute_config(struct intel_encoder *intel_encoder,
> if (HAS_PCH_SPLIT(dev_priv)) {
> pipe_config->has_pch_encoder = true;
>
> - intel_pch_panel_fitting(intel_crtc, pipe_config,
> + intel_pch_panel_fitting(pipe_config,
> conn_state->scaling_mode);
> } else {
> - intel_gmch_panel_fitting(intel_crtc, pipe_config,
> + intel_gmch_panel_fitting(pipe_config,
> conn_state->scaling_mode);
>
> }
> diff --git a/drivers/gpu/drm/i915/display/intel_panel.c b/drivers/gpu/drm/i915/display/intel_panel.c
> index 3e370888ecef..3ea1704277a8 100644
> --- a/drivers/gpu/drm/i915/display/intel_panel.c
> +++ b/drivers/gpu/drm/i915/display/intel_panel.c
> @@ -177,23 +177,23 @@ intel_panel_vbt_fixed_mode(struct intel_connector *connector)
>
> /* adjusted_mode has been preset to be the panel's fixed mode */
> void
> -intel_pch_panel_fitting(struct intel_crtc *intel_crtc,
> - struct intel_crtc_state *pipe_config,
> +intel_pch_panel_fitting(struct intel_crtc_state *crtc_state,
> int fitting_mode)
> {
> - const struct drm_display_mode *adjusted_mode = &pipe_config->hw.adjusted_mode;
> + const struct drm_display_mode *adjusted_mode =
> + &crtc_state->hw.adjusted_mode;
> int x, y, width, height;
>
> /* Native modes don't need fitting */
> - if (adjusted_mode->crtc_hdisplay == pipe_config->pipe_src_w &&
> - adjusted_mode->crtc_vdisplay == pipe_config->pipe_src_h &&
> - pipe_config->output_format != INTEL_OUTPUT_FORMAT_YCBCR420)
> + if (adjusted_mode->crtc_hdisplay == crtc_state->pipe_src_w &&
> + adjusted_mode->crtc_vdisplay == crtc_state->pipe_src_h &&
> + crtc_state->output_format != INTEL_OUTPUT_FORMAT_YCBCR420)
> return;
>
> switch (fitting_mode) {
> case DRM_MODE_SCALE_CENTER:
> - width = pipe_config->pipe_src_w;
> - height = pipe_config->pipe_src_h;
> + width = crtc_state->pipe_src_w;
> + height = crtc_state->pipe_src_h;
> x = (adjusted_mode->crtc_hdisplay - width + 1)/2;
> y = (adjusted_mode->crtc_vdisplay - height + 1)/2;
> break;
> @@ -202,18 +202,18 @@ intel_pch_panel_fitting(struct intel_crtc *intel_crtc,
> /* Scale but preserve the aspect ratio */
> {
> u32 scaled_width = adjusted_mode->crtc_hdisplay
> - * pipe_config->pipe_src_h;
> - u32 scaled_height = pipe_config->pipe_src_w
> + * crtc_state->pipe_src_h;
> + u32 scaled_height = crtc_state->pipe_src_w
> * adjusted_mode->crtc_vdisplay;
> if (scaled_width > scaled_height) { /* pillar */
> - width = scaled_height / pipe_config->pipe_src_h;
> + width = scaled_height / crtc_state->pipe_src_h;
> if (width & 1)
> width++;
> x = (adjusted_mode->crtc_hdisplay - width + 1) / 2;
> y = 0;
> height = adjusted_mode->crtc_vdisplay;
> } else if (scaled_width < scaled_height) { /* letter */
> - height = scaled_width / pipe_config->pipe_src_w;
> + height = scaled_width / crtc_state->pipe_src_w;
> if (height & 1)
> height++;
> y = (adjusted_mode->crtc_vdisplay - height + 1) / 2;
> @@ -238,9 +238,9 @@ intel_pch_panel_fitting(struct intel_crtc *intel_crtc,
> return;
> }
>
> - drm_rect_init(&pipe_config->pch_pfit.dst,
> + drm_rect_init(&crtc_state->pch_pfit.dst,
> x, y, width, height);
> - pipe_config->pch_pfit.enabled = true;
> + crtc_state->pch_pfit.enabled = true;
> }
>
> static void
> @@ -299,13 +299,14 @@ static u32 panel_fitter_scaling(u32 source, u32 target)
> return (FACTOR * ratio + FACTOR/2) / FACTOR;
> }
>
> -static void i965_scale_aspect(struct intel_crtc_state *pipe_config,
> +static void i965_scale_aspect(struct intel_crtc_state *crtc_state,
> u32 *pfit_control)
> {
> - const struct drm_display_mode *adjusted_mode = &pipe_config->hw.adjusted_mode;
> + const struct drm_display_mode *adjusted_mode =
> + &crtc_state->hw.adjusted_mode;
> u32 scaled_width = adjusted_mode->crtc_hdisplay *
> - pipe_config->pipe_src_h;
> - u32 scaled_height = pipe_config->pipe_src_w *
> + crtc_state->pipe_src_h;
> + u32 scaled_height = crtc_state->pipe_src_w *
> adjusted_mode->crtc_vdisplay;
>
> /* 965+ is easy, it does everything in hw */
> @@ -315,18 +316,18 @@ static void i965_scale_aspect(struct intel_crtc_state *pipe_config,
> else if (scaled_width < scaled_height)
> *pfit_control |= PFIT_ENABLE |
> PFIT_SCALING_LETTER;
> - else if (adjusted_mode->crtc_hdisplay != pipe_config->pipe_src_w)
> + else if (adjusted_mode->crtc_hdisplay != crtc_state->pipe_src_w)
> *pfit_control |= PFIT_ENABLE | PFIT_SCALING_AUTO;
> }
>
> -static void i9xx_scale_aspect(struct intel_crtc_state *pipe_config,
> +static void i9xx_scale_aspect(struct intel_crtc_state *crtc_state,
> u32 *pfit_control, u32 *pfit_pgm_ratios,
> u32 *border)
> {
> - struct drm_display_mode *adjusted_mode = &pipe_config->hw.adjusted_mode;
> + struct drm_display_mode *adjusted_mode = &crtc_state->hw.adjusted_mode;
> u32 scaled_width = adjusted_mode->crtc_hdisplay *
> - pipe_config->pipe_src_h;
> - u32 scaled_height = pipe_config->pipe_src_w *
> + crtc_state->pipe_src_h;
> + u32 scaled_height = crtc_state->pipe_src_w *
> adjusted_mode->crtc_vdisplay;
> u32 bits;
>
> @@ -338,11 +339,11 @@ static void i9xx_scale_aspect(struct intel_crtc_state *pipe_config,
> if (scaled_width > scaled_height) { /* pillar */
> centre_horizontally(adjusted_mode,
> scaled_height /
> - pipe_config->pipe_src_h);
> + crtc_state->pipe_src_h);
>
> *border = LVDS_BORDER_ENABLE;
> - if (pipe_config->pipe_src_h != adjusted_mode->crtc_vdisplay) {
> - bits = panel_fitter_scaling(pipe_config->pipe_src_h,
> + if (crtc_state->pipe_src_h != adjusted_mode->crtc_vdisplay) {
> + bits = panel_fitter_scaling(crtc_state->pipe_src_h,
> adjusted_mode->crtc_vdisplay);
>
> *pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT |
> @@ -354,11 +355,11 @@ static void i9xx_scale_aspect(struct intel_crtc_state *pipe_config,
> } else if (scaled_width < scaled_height) { /* letter */
> centre_vertically(adjusted_mode,
> scaled_width /
> - pipe_config->pipe_src_w);
> + crtc_state->pipe_src_w);
>
> *border = LVDS_BORDER_ENABLE;
> - if (pipe_config->pipe_src_w != adjusted_mode->crtc_hdisplay) {
> - bits = panel_fitter_scaling(pipe_config->pipe_src_w,
> + if (crtc_state->pipe_src_w != adjusted_mode->crtc_hdisplay) {
> + bits = panel_fitter_scaling(crtc_state->pipe_src_w,
> adjusted_mode->crtc_hdisplay);
>
> *pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT |
> @@ -376,17 +377,17 @@ static void i9xx_scale_aspect(struct intel_crtc_state *pipe_config,
> }
> }
>
> -void intel_gmch_panel_fitting(struct intel_crtc *intel_crtc,
> - struct intel_crtc_state *pipe_config,
> +void intel_gmch_panel_fitting(struct intel_crtc_state *crtc_state,
> int fitting_mode)
> {
> - struct drm_i915_private *dev_priv = to_i915(intel_crtc->base.dev);
> + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
> + struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
> u32 pfit_control = 0, pfit_pgm_ratios = 0, border = 0;
> - struct drm_display_mode *adjusted_mode = &pipe_config->hw.adjusted_mode;
> + struct drm_display_mode *adjusted_mode = &crtc_state->hw.adjusted_mode;
>
> /* Native modes don't need fitting */
> - if (adjusted_mode->crtc_hdisplay == pipe_config->pipe_src_w &&
> - adjusted_mode->crtc_vdisplay == pipe_config->pipe_src_h)
> + if (adjusted_mode->crtc_hdisplay == crtc_state->pipe_src_w &&
> + adjusted_mode->crtc_vdisplay == crtc_state->pipe_src_h)
> goto out;
>
> switch (fitting_mode) {
> @@ -395,16 +396,16 @@ void intel_gmch_panel_fitting(struct intel_crtc *intel_crtc,
> * For centered modes, we have to calculate border widths &
> * heights and modify the values programmed into the CRTC.
> */
> - centre_horizontally(adjusted_mode, pipe_config->pipe_src_w);
> - centre_vertically(adjusted_mode, pipe_config->pipe_src_h);
> + centre_horizontally(adjusted_mode, crtc_state->pipe_src_w);
> + centre_vertically(adjusted_mode, crtc_state->pipe_src_h);
> border = LVDS_BORDER_ENABLE;
> break;
> case DRM_MODE_SCALE_ASPECT:
> /* Scale but preserve the aspect ratio */
> if (INTEL_GEN(dev_priv) >= 4)
> - i965_scale_aspect(pipe_config, &pfit_control);
> + i965_scale_aspect(crtc_state, &pfit_control);
> else
> - i9xx_scale_aspect(pipe_config, &pfit_control,
> + i9xx_scale_aspect(crtc_state, &pfit_control,
> &pfit_pgm_ratios, &border);
> break;
> case DRM_MODE_SCALE_FULLSCREEN:
> @@ -412,8 +413,8 @@ void intel_gmch_panel_fitting(struct intel_crtc *intel_crtc,
> * Full scaling, even if it changes the aspect ratio.
> * Fortunately this is all done for us in hw.
> */
> - if (pipe_config->pipe_src_h != adjusted_mode->crtc_vdisplay ||
> - pipe_config->pipe_src_w != adjusted_mode->crtc_hdisplay) {
> + if (crtc_state->pipe_src_h != adjusted_mode->crtc_vdisplay ||
> + crtc_state->pipe_src_w != adjusted_mode->crtc_hdisplay) {
> pfit_control |= PFIT_ENABLE;
> if (INTEL_GEN(dev_priv) >= 4)
> pfit_control |= PFIT_SCALING_AUTO;
> @@ -433,7 +434,7 @@ void intel_gmch_panel_fitting(struct intel_crtc *intel_crtc,
> /* 965+ wants fuzzy fitting */
> /* FIXME: handle multiple panels by failing gracefully */
> if (INTEL_GEN(dev_priv) >= 4)
> - pfit_control |= PFIT_PIPE(intel_crtc->pipe) | PFIT_FILTER_FUZZY;
> + pfit_control |= PFIT_PIPE(crtc->pipe) | PFIT_FILTER_FUZZY;
>
> out:
> if ((pfit_control & PFIT_ENABLE) == 0) {
> @@ -442,12 +443,12 @@ void intel_gmch_panel_fitting(struct intel_crtc *intel_crtc,
> }
>
> /* Make sure pre-965 set dither correctly for 18bpp panels. */
> - if (INTEL_GEN(dev_priv) < 4 && pipe_config->pipe_bpp == 18)
> + if (INTEL_GEN(dev_priv) < 4 && crtc_state->pipe_bpp == 18)
> pfit_control |= PANEL_8TO6_DITHER_ENABLE;
>
> - pipe_config->gmch_pfit.control = pfit_control;
> - pipe_config->gmch_pfit.pgm_ratios = pfit_pgm_ratios;
> - pipe_config->gmch_pfit.lvds_border_bits = border;
> + crtc_state->gmch_pfit.control = pfit_control;
> + crtc_state->gmch_pfit.pgm_ratios = pfit_pgm_ratios;
> + crtc_state->gmch_pfit.lvds_border_bits = border;
> }
>
> /**
> diff --git a/drivers/gpu/drm/i915/display/intel_panel.h b/drivers/gpu/drm/i915/display/intel_panel.h
> index 11f2f6b628d8..92dcb773763c 100644
> --- a/drivers/gpu/drm/i915/display/intel_panel.h
> +++ b/drivers/gpu/drm/i915/display/intel_panel.h
> @@ -25,11 +25,9 @@ int intel_panel_init(struct intel_panel *panel,
> void intel_panel_fini(struct intel_panel *panel);
> void intel_fixed_panel_mode(const struct drm_display_mode *fixed_mode,
> struct drm_display_mode *adjusted_mode);
> -void intel_pch_panel_fitting(struct intel_crtc *crtc,
> - struct intel_crtc_state *pipe_config,
> +void intel_pch_panel_fitting(struct intel_crtc_state *crtc_state,
> int fitting_mode);
> -void intel_gmch_panel_fitting(struct intel_crtc *crtc,
> - struct intel_crtc_state *pipe_config,
> +void intel_gmch_panel_fitting(struct intel_crtc_state *crtc_state,
> int fitting_mode);
> void intel_panel_set_backlight_acpi(const struct drm_connector_state *conn_state,
> u32 level, u32 max);
> diff --git a/drivers/gpu/drm/i915/display/vlv_dsi.c b/drivers/gpu/drm/i915/display/vlv_dsi.c
> index 46e2895d916d..fe7c9d3ec418 100644
> --- a/drivers/gpu/drm/i915/display/vlv_dsi.c
> +++ b/drivers/gpu/drm/i915/display/vlv_dsi.c
> @@ -267,7 +267,6 @@ static int intel_dsi_compute_config(struct intel_encoder *encoder,
> struct intel_dsi *intel_dsi = container_of(encoder, struct intel_dsi,
> base);
> struct intel_connector *intel_connector = intel_dsi->attached_connector;
> - struct intel_crtc *crtc = to_intel_crtc(pipe_config->uapi.crtc);
> const struct drm_display_mode *fixed_mode = intel_connector->panel.fixed_mode;
> struct drm_display_mode *adjusted_mode = &pipe_config->hw.adjusted_mode;
> int ret;
> @@ -279,10 +278,10 @@ static int intel_dsi_compute_config(struct intel_encoder *encoder,
> intel_fixed_panel_mode(fixed_mode, adjusted_mode);
>
> if (HAS_GMCH(dev_priv))
> - intel_gmch_panel_fitting(crtc, pipe_config,
> + intel_gmch_panel_fitting(pipe_config,
> conn_state->scaling_mode);
> else
> - intel_pch_panel_fitting(crtc, pipe_config,
> + intel_pch_panel_fitting(pipe_config,
> conn_state->scaling_mode);
> }
>
> --
> 2.24.1
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 15+ messages in thread
* Re: [Intel-gfx] [PATCH v3 5/6] drm/i915: Pass connector state to pfit calculations
2020-04-22 16:19 ` [Intel-gfx] [PATCH v3 5/6] drm/i915: Pass connector state to pfit calculations Ville Syrjala
@ 2020-04-22 21:35 ` Manasi Navare
0 siblings, 0 replies; 15+ messages in thread
From: Manasi Navare @ 2020-04-22 21:35 UTC (permalink / raw)
To: Ville Syrjala; +Cc: intel-gfx
On Wed, Apr 22, 2020 at 07:19:16PM +0300, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> Pass the entire connector state to intel_{gmch,pch}_panel_fitting().
> For now we just need to get at .scaling_mode but in the future we'll
> want access to the margin properties as well.
>
> v2: Deal with intel_dp_ycbcr420_config()
>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Looks good to me,
Reviewed-by: Manasi Navare <manasi.d.navare@intel.com>
Manasi
> ---
> drivers/gpu/drm/i915/display/icl_dsi.c | 2 +-
> drivers/gpu/drm/i915/display/intel_dp.c | 17 ++++++++---------
> drivers/gpu/drm/i915/display/intel_hdmi.c | 11 ++++++-----
> drivers/gpu/drm/i915/display/intel_lvds.c | 7 ++-----
> drivers/gpu/drm/i915/display/intel_panel.c | 17 ++++++++++-------
> drivers/gpu/drm/i915/display/intel_panel.h | 4 ++--
> drivers/gpu/drm/i915/display/vlv_dsi.c | 6 ++----
> 7 files changed, 31 insertions(+), 33 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/icl_dsi.c b/drivers/gpu/drm/i915/display/icl_dsi.c
> index fb9291de55d0..6650590f18fd 100644
> --- a/drivers/gpu/drm/i915/display/icl_dsi.c
> +++ b/drivers/gpu/drm/i915/display/icl_dsi.c
> @@ -1532,7 +1532,7 @@ static int gen11_dsi_compute_config(struct intel_encoder *encoder,
>
> pipe_config->output_format = INTEL_OUTPUT_FORMAT_RGB;
> intel_fixed_panel_mode(fixed_mode, adjusted_mode);
> - intel_pch_panel_fitting(pipe_config, conn_state->scaling_mode);
> + intel_pch_panel_fitting(pipe_config, conn_state);
>
> adjusted_mode->flags = 0;
>
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
> index b9a760012b3f..7c4c9a4f4238 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -2339,9 +2339,10 @@ intel_dp_compute_link_config(struct intel_encoder *encoder,
>
> static int
> intel_dp_ycbcr420_config(struct intel_dp *intel_dp,
> - struct drm_connector *connector,
> - struct intel_crtc_state *crtc_state)
> + struct intel_crtc_state *crtc_state,
> + const struct drm_connector_state *conn_state)
> {
> + struct drm_connector *connector = conn_state->connector;
> const struct drm_display_info *info = &connector->display_info;
> const struct drm_display_mode *adjusted_mode =
> &crtc_state->hw.adjusted_mode;
> @@ -2353,7 +2354,7 @@ intel_dp_ycbcr420_config(struct intel_dp *intel_dp,
>
> crtc_state->output_format = INTEL_OUTPUT_FORMAT_YCBCR420;
>
> - intel_pch_panel_fitting(crtc_state, DRM_MODE_SCALE_FULLSCREEN);
> + intel_pch_panel_fitting(crtc_state, conn_state);
>
> return 0;
> }
> @@ -2549,8 +2550,8 @@ intel_dp_compute_config(struct intel_encoder *encoder,
> if (lspcon->active)
> lspcon_ycbcr420_config(&intel_connector->base, pipe_config);
> else
> - ret = intel_dp_ycbcr420_config(intel_dp, &intel_connector->base,
> - pipe_config);
> + ret = intel_dp_ycbcr420_config(intel_dp, pipe_config,
> + conn_state);
> if (ret)
> return ret;
>
> @@ -2567,11 +2568,9 @@ intel_dp_compute_config(struct intel_encoder *encoder,
> adjusted_mode);
>
> if (HAS_GMCH(dev_priv))
> - intel_gmch_panel_fitting(pipe_config,
> - conn_state->scaling_mode);
> + intel_gmch_panel_fitting(pipe_config, conn_state);
> else
> - intel_pch_panel_fitting(pipe_config,
> - conn_state->scaling_mode);
> + intel_pch_panel_fitting(pipe_config, conn_state);
> }
>
> if (adjusted_mode->flags & DRM_MODE_FLAG_DBLSCAN)
> diff --git a/drivers/gpu/drm/i915/display/intel_hdmi.c b/drivers/gpu/drm/i915/display/intel_hdmi.c
> index 275a676c7b08..0edbdd39f462 100644
> --- a/drivers/gpu/drm/i915/display/intel_hdmi.c
> +++ b/drivers/gpu/drm/i915/display/intel_hdmi.c
> @@ -2322,9 +2322,10 @@ static bool hdmi_deep_color_possible(const struct intel_crtc_state *crtc_state,
> }
>
> static bool
> -intel_hdmi_ycbcr420_config(struct drm_connector *connector,
> - struct intel_crtc_state *config)
> +intel_hdmi_ycbcr420_config(struct intel_crtc_state *crtc_state,
> + const struct drm_connector_state *conn_state)
> {
> + struct drm_connector *connector = conn_state->connector;
> struct drm_i915_private *i915 = to_i915(connector->dev);
>
> if (!connector->ycbcr_420_allowed) {
> @@ -2333,9 +2334,9 @@ intel_hdmi_ycbcr420_config(struct drm_connector *connector,
> return false;
> }
>
> - config->output_format = INTEL_OUTPUT_FORMAT_YCBCR420;
> + crtc_state->output_format = INTEL_OUTPUT_FORMAT_YCBCR420;
>
> - intel_pch_panel_fitting(config, DRM_MODE_SCALE_FULLSCREEN);
> + intel_pch_panel_fitting(crtc_state, conn_state);
>
> return true;
> }
> @@ -2466,7 +2467,7 @@ int intel_hdmi_compute_config(struct intel_encoder *encoder,
> pipe_config->pixel_multiplier = 2;
>
> if (drm_mode_is_420_only(&connector->display_info, adjusted_mode)) {
> - if (!intel_hdmi_ycbcr420_config(connector, pipe_config)) {
> + if (!intel_hdmi_ycbcr420_config(pipe_config, conn_state)) {
> drm_err(&dev_priv->drm,
> "Can't support YCBCR420 output\n");
> return -EINVAL;
> diff --git a/drivers/gpu/drm/i915/display/intel_lvds.c b/drivers/gpu/drm/i915/display/intel_lvds.c
> index 276db41b95ef..ae658d9354b7 100644
> --- a/drivers/gpu/drm/i915/display/intel_lvds.c
> +++ b/drivers/gpu/drm/i915/display/intel_lvds.c
> @@ -439,12 +439,9 @@ static int intel_lvds_compute_config(struct intel_encoder *intel_encoder,
> if (HAS_PCH_SPLIT(dev_priv)) {
> pipe_config->has_pch_encoder = true;
>
> - intel_pch_panel_fitting(pipe_config,
> - conn_state->scaling_mode);
> + intel_pch_panel_fitting(pipe_config, conn_state);
> } else {
> - intel_gmch_panel_fitting(pipe_config,
> - conn_state->scaling_mode);
> -
> + intel_gmch_panel_fitting(pipe_config, conn_state);
> }
>
> /*
> diff --git a/drivers/gpu/drm/i915/display/intel_panel.c b/drivers/gpu/drm/i915/display/intel_panel.c
> index 3ea1704277a8..b4bb1cfc54a9 100644
> --- a/drivers/gpu/drm/i915/display/intel_panel.c
> +++ b/drivers/gpu/drm/i915/display/intel_panel.c
> @@ -178,7 +178,7 @@ intel_panel_vbt_fixed_mode(struct intel_connector *connector)
> /* adjusted_mode has been preset to be the panel's fixed mode */
> void
> intel_pch_panel_fitting(struct intel_crtc_state *crtc_state,
> - int fitting_mode)
> + const struct drm_connector_state *conn_state)
> {
> const struct drm_display_mode *adjusted_mode =
> &crtc_state->hw.adjusted_mode;
> @@ -190,7 +190,7 @@ intel_pch_panel_fitting(struct intel_crtc_state *crtc_state,
> crtc_state->output_format != INTEL_OUTPUT_FORMAT_YCBCR420)
> return;
>
> - switch (fitting_mode) {
> + switch (conn_state->scaling_mode) {
> case DRM_MODE_SCALE_CENTER:
> width = crtc_state->pipe_src_w;
> height = crtc_state->pipe_src_h;
> @@ -227,6 +227,10 @@ intel_pch_panel_fitting(struct intel_crtc_state *crtc_state,
> }
> break;
>
> + case DRM_MODE_SCALE_NONE:
> + WARN_ON(adjusted_mode->crtc_hdisplay != crtc_state->pipe_src_w);
> + WARN_ON(adjusted_mode->crtc_vdisplay != crtc_state->pipe_src_h);
> + /* fall through */
> case DRM_MODE_SCALE_FULLSCREEN:
> x = y = 0;
> width = adjusted_mode->crtc_hdisplay;
> @@ -234,7 +238,7 @@ intel_pch_panel_fitting(struct intel_crtc_state *crtc_state,
> break;
>
> default:
> - MISSING_CASE(fitting_mode);
> + MISSING_CASE(conn_state->scaling_mode);
> return;
> }
>
> @@ -378,7 +382,7 @@ static void i9xx_scale_aspect(struct intel_crtc_state *crtc_state,
> }
>
> void intel_gmch_panel_fitting(struct intel_crtc_state *crtc_state,
> - int fitting_mode)
> + const struct drm_connector_state *conn_state)
> {
> struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
> struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
> @@ -390,7 +394,7 @@ void intel_gmch_panel_fitting(struct intel_crtc_state *crtc_state,
> adjusted_mode->crtc_vdisplay == crtc_state->pipe_src_h)
> goto out;
>
> - switch (fitting_mode) {
> + switch (conn_state->scaling_mode) {
> case DRM_MODE_SCALE_CENTER:
> /*
> * For centered modes, we have to calculate border widths &
> @@ -426,8 +430,7 @@ void intel_gmch_panel_fitting(struct intel_crtc_state *crtc_state,
> }
> break;
> default:
> - drm_WARN(&dev_priv->drm, 1, "bad panel fit mode: %d\n",
> - fitting_mode);
> + MISSING_CASE(conn_state->scaling_mode);
> return;
> }
>
> diff --git a/drivers/gpu/drm/i915/display/intel_panel.h b/drivers/gpu/drm/i915/display/intel_panel.h
> index 92dcb773763c..a26db895038e 100644
> --- a/drivers/gpu/drm/i915/display/intel_panel.h
> +++ b/drivers/gpu/drm/i915/display/intel_panel.h
> @@ -26,9 +26,9 @@ void intel_panel_fini(struct intel_panel *panel);
> void intel_fixed_panel_mode(const struct drm_display_mode *fixed_mode,
> struct drm_display_mode *adjusted_mode);
> void intel_pch_panel_fitting(struct intel_crtc_state *crtc_state,
> - int fitting_mode);
> + const struct drm_connector_state *conn_state);
> void intel_gmch_panel_fitting(struct intel_crtc_state *crtc_state,
> - int fitting_mode);
> + const struct drm_connector_state *conn_state);
> void intel_panel_set_backlight_acpi(const struct drm_connector_state *conn_state,
> u32 level, u32 max);
> int intel_panel_setup_backlight(struct drm_connector *connector,
> diff --git a/drivers/gpu/drm/i915/display/vlv_dsi.c b/drivers/gpu/drm/i915/display/vlv_dsi.c
> index fe7c9d3ec418..9c9ea89d2107 100644
> --- a/drivers/gpu/drm/i915/display/vlv_dsi.c
> +++ b/drivers/gpu/drm/i915/display/vlv_dsi.c
> @@ -278,11 +278,9 @@ static int intel_dsi_compute_config(struct intel_encoder *encoder,
> intel_fixed_panel_mode(fixed_mode, adjusted_mode);
>
> if (HAS_GMCH(dev_priv))
> - intel_gmch_panel_fitting(pipe_config,
> - conn_state->scaling_mode);
> + intel_gmch_panel_fitting(pipe_config, conn_state);
> else
> - intel_pch_panel_fitting(pipe_config,
> - conn_state->scaling_mode);
> + intel_pch_panel_fitting(pipe_config, conn_state);
> }
>
> if (adjusted_mode->flags & DRM_MODE_FLAG_DBLSCAN)
> --
> 2.24.1
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 15+ messages in thread
* Re: [Intel-gfx] [PATCH v3 6/6] drm/i915: Have pfit calculations return an error code
2020-04-22 16:19 ` [Intel-gfx] [PATCH v3 6/6] drm/i915: Have pfit calculations return an error code Ville Syrjala
@ 2020-04-22 21:42 ` Manasi Navare
0 siblings, 0 replies; 15+ messages in thread
From: Manasi Navare @ 2020-04-22 21:42 UTC (permalink / raw)
To: Ville Syrjala; +Cc: intel-gfx
On Wed, Apr 22, 2020 at 07:19:17PM +0300, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> Change intel_{gmch,pch}_panel_fitting() to return a normal
> error vs. success int. We'll need this later to validate that
> the margin properties aren't misconfigured.
>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Yes makes total sense to return an ERR Value
Reviewed-by: Manasi Navare <manasi.d.navare@intel.com>
Manasi
> ---
> drivers/gpu/drm/i915/display/icl_dsi.c | 10 +++++++---
> drivers/gpu/drm/i915/display/intel_dp.c | 10 +++++-----
> drivers/gpu/drm/i915/display/intel_hdmi.c | 23 +++++++++++-----------
> drivers/gpu/drm/i915/display/intel_lvds.c | 13 +++++++-----
> drivers/gpu/drm/i915/display/intel_panel.c | 19 ++++++++++--------
> drivers/gpu/drm/i915/display/intel_panel.h | 6 +++---
> drivers/gpu/drm/i915/display/vlv_dsi.c | 6 ++++--
> 7 files changed, 49 insertions(+), 38 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/icl_dsi.c b/drivers/gpu/drm/i915/display/icl_dsi.c
> index 6650590f18fd..4fec5bd64920 100644
> --- a/drivers/gpu/drm/i915/display/icl_dsi.c
> +++ b/drivers/gpu/drm/i915/display/icl_dsi.c
> @@ -1526,13 +1526,17 @@ static int gen11_dsi_compute_config(struct intel_encoder *encoder,
> base);
> struct intel_connector *intel_connector = intel_dsi->attached_connector;
> const struct drm_display_mode *fixed_mode =
> - intel_connector->panel.fixed_mode;
> + intel_connector->panel.fixed_mode;
> struct drm_display_mode *adjusted_mode =
> - &pipe_config->hw.adjusted_mode;
> + &pipe_config->hw.adjusted_mode;
> + int ret;
>
> pipe_config->output_format = INTEL_OUTPUT_FORMAT_RGB;
> intel_fixed_panel_mode(fixed_mode, adjusted_mode);
> - intel_pch_panel_fitting(pipe_config, conn_state);
> +
> + ret = intel_pch_panel_fitting(pipe_config, conn_state);
> + if (ret)
> + return ret;
>
> adjusted_mode->flags = 0;
>
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
> index 7c4c9a4f4238..5c7009b74c24 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -2354,9 +2354,7 @@ intel_dp_ycbcr420_config(struct intel_dp *intel_dp,
>
> crtc_state->output_format = INTEL_OUTPUT_FORMAT_YCBCR420;
>
> - intel_pch_panel_fitting(crtc_state, conn_state);
> -
> - return 0;
> + return intel_pch_panel_fitting(crtc_state, conn_state);
> }
>
> bool intel_dp_limited_color_range(const struct intel_crtc_state *crtc_state,
> @@ -2568,9 +2566,11 @@ intel_dp_compute_config(struct intel_encoder *encoder,
> adjusted_mode);
>
> if (HAS_GMCH(dev_priv))
> - intel_gmch_panel_fitting(pipe_config, conn_state);
> + ret = intel_gmch_panel_fitting(pipe_config, conn_state);
> else
> - intel_pch_panel_fitting(pipe_config, conn_state);
> + ret = intel_pch_panel_fitting(pipe_config, conn_state);
> + if (ret)
> + return ret;
> }
>
> if (adjusted_mode->flags & DRM_MODE_FLAG_DBLSCAN)
> diff --git a/drivers/gpu/drm/i915/display/intel_hdmi.c b/drivers/gpu/drm/i915/display/intel_hdmi.c
> index 0edbdd39f462..010f37240710 100644
> --- a/drivers/gpu/drm/i915/display/intel_hdmi.c
> +++ b/drivers/gpu/drm/i915/display/intel_hdmi.c
> @@ -2321,24 +2321,27 @@ static bool hdmi_deep_color_possible(const struct intel_crtc_state *crtc_state,
> return true;
> }
>
> -static bool
> +static int
> intel_hdmi_ycbcr420_config(struct intel_crtc_state *crtc_state,
> const struct drm_connector_state *conn_state)
> {
> struct drm_connector *connector = conn_state->connector;
> struct drm_i915_private *i915 = to_i915(connector->dev);
> + const struct drm_display_mode *adjusted_mode =
> + &crtc_state->hw.adjusted_mode;
> +
> + if (!drm_mode_is_420_only(&connector->display_info, adjusted_mode))
> + return 0;
>
> if (!connector->ycbcr_420_allowed) {
> drm_err(&i915->drm,
> "Platform doesn't support YCBCR420 output\n");
> - return false;
> + return -EINVAL;
> }
>
> crtc_state->output_format = INTEL_OUTPUT_FORMAT_YCBCR420;
>
> - intel_pch_panel_fitting(crtc_state, conn_state);
> -
> - return true;
> + return intel_pch_panel_fitting(crtc_state, conn_state);
> }
>
> static int intel_hdmi_port_clock(int clock, int bpc)
> @@ -2466,13 +2469,9 @@ int intel_hdmi_compute_config(struct intel_encoder *encoder,
> if (adjusted_mode->flags & DRM_MODE_FLAG_DBLCLK)
> pipe_config->pixel_multiplier = 2;
>
> - if (drm_mode_is_420_only(&connector->display_info, adjusted_mode)) {
> - if (!intel_hdmi_ycbcr420_config(pipe_config, conn_state)) {
> - drm_err(&dev_priv->drm,
> - "Can't support YCBCR420 output\n");
> - return -EINVAL;
> - }
> - }
> + ret = intel_hdmi_ycbcr420_config(pipe_config, conn_state);
> + if (ret)
> + return ret;
>
> pipe_config->limited_color_range =
> intel_hdmi_limited_color_range(pipe_config, conn_state);
> diff --git a/drivers/gpu/drm/i915/display/intel_lvds.c b/drivers/gpu/drm/i915/display/intel_lvds.c
> index ae658d9354b7..872f2a489339 100644
> --- a/drivers/gpu/drm/i915/display/intel_lvds.c
> +++ b/drivers/gpu/drm/i915/display/intel_lvds.c
> @@ -403,6 +403,7 @@ static int intel_lvds_compute_config(struct intel_encoder *intel_encoder,
> struct drm_display_mode *adjusted_mode = &pipe_config->hw.adjusted_mode;
> struct intel_crtc *intel_crtc = to_intel_crtc(pipe_config->uapi.crtc);
> unsigned int lvds_bpp;
> + int ret;
>
> /* Should never happen!! */
> if (INTEL_GEN(dev_priv) < 4 && intel_crtc->pipe == 0) {
> @@ -436,13 +437,15 @@ static int intel_lvds_compute_config(struct intel_encoder *intel_encoder,
> if (adjusted_mode->flags & DRM_MODE_FLAG_DBLSCAN)
> return -EINVAL;
>
> - if (HAS_PCH_SPLIT(dev_priv)) {
> + if (HAS_PCH_SPLIT(dev_priv))
> pipe_config->has_pch_encoder = true;
>
> - intel_pch_panel_fitting(pipe_config, conn_state);
> - } else {
> - intel_gmch_panel_fitting(pipe_config, conn_state);
> - }
> + if (HAS_GMCH(dev_priv))
> + ret = intel_gmch_panel_fitting(pipe_config, conn_state);
> + else
> + ret = intel_pch_panel_fitting(pipe_config, conn_state);
> + if (ret)
> + return ret;
>
> /*
> * XXX: It would be nice to support lower refresh rates on the
> diff --git a/drivers/gpu/drm/i915/display/intel_panel.c b/drivers/gpu/drm/i915/display/intel_panel.c
> index b4bb1cfc54a9..aa931f9f0d6a 100644
> --- a/drivers/gpu/drm/i915/display/intel_panel.c
> +++ b/drivers/gpu/drm/i915/display/intel_panel.c
> @@ -176,9 +176,8 @@ intel_panel_vbt_fixed_mode(struct intel_connector *connector)
> }
>
> /* adjusted_mode has been preset to be the panel's fixed mode */
> -void
> -intel_pch_panel_fitting(struct intel_crtc_state *crtc_state,
> - const struct drm_connector_state *conn_state)
> +int intel_pch_panel_fitting(struct intel_crtc_state *crtc_state,
> + const struct drm_connector_state *conn_state)
> {
> const struct drm_display_mode *adjusted_mode =
> &crtc_state->hw.adjusted_mode;
> @@ -188,7 +187,7 @@ intel_pch_panel_fitting(struct intel_crtc_state *crtc_state,
> if (adjusted_mode->crtc_hdisplay == crtc_state->pipe_src_w &&
> adjusted_mode->crtc_vdisplay == crtc_state->pipe_src_h &&
> crtc_state->output_format != INTEL_OUTPUT_FORMAT_YCBCR420)
> - return;
> + return 0;
>
> switch (conn_state->scaling_mode) {
> case DRM_MODE_SCALE_CENTER:
> @@ -239,12 +238,14 @@ intel_pch_panel_fitting(struct intel_crtc_state *crtc_state,
>
> default:
> MISSING_CASE(conn_state->scaling_mode);
> - return;
> + return -EINVAL;
> }
>
> drm_rect_init(&crtc_state->pch_pfit.dst,
> x, y, width, height);
> crtc_state->pch_pfit.enabled = true;
> +
> + return 0;
> }
>
> static void
> @@ -381,8 +382,8 @@ static void i9xx_scale_aspect(struct intel_crtc_state *crtc_state,
> }
> }
>
> -void intel_gmch_panel_fitting(struct intel_crtc_state *crtc_state,
> - const struct drm_connector_state *conn_state)
> +int intel_gmch_panel_fitting(struct intel_crtc_state *crtc_state,
> + const struct drm_connector_state *conn_state)
> {
> struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
> struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
> @@ -431,7 +432,7 @@ void intel_gmch_panel_fitting(struct intel_crtc_state *crtc_state,
> break;
> default:
> MISSING_CASE(conn_state->scaling_mode);
> - return;
> + return -EINVAL;
> }
>
> /* 965+ wants fuzzy fitting */
> @@ -452,6 +453,8 @@ void intel_gmch_panel_fitting(struct intel_crtc_state *crtc_state,
> crtc_state->gmch_pfit.control = pfit_control;
> crtc_state->gmch_pfit.pgm_ratios = pfit_pgm_ratios;
> crtc_state->gmch_pfit.lvds_border_bits = border;
> +
> + return 0;
> }
>
> /**
> diff --git a/drivers/gpu/drm/i915/display/intel_panel.h b/drivers/gpu/drm/i915/display/intel_panel.h
> index a26db895038e..968b95281cb4 100644
> --- a/drivers/gpu/drm/i915/display/intel_panel.h
> +++ b/drivers/gpu/drm/i915/display/intel_panel.h
> @@ -25,10 +25,10 @@ int intel_panel_init(struct intel_panel *panel,
> void intel_panel_fini(struct intel_panel *panel);
> void intel_fixed_panel_mode(const struct drm_display_mode *fixed_mode,
> struct drm_display_mode *adjusted_mode);
> -void intel_pch_panel_fitting(struct intel_crtc_state *crtc_state,
> +int intel_pch_panel_fitting(struct intel_crtc_state *crtc_state,
> + const struct drm_connector_state *conn_state);
> +int intel_gmch_panel_fitting(struct intel_crtc_state *crtc_state,
> const struct drm_connector_state *conn_state);
> -void intel_gmch_panel_fitting(struct intel_crtc_state *crtc_state,
> - const struct drm_connector_state *conn_state);
> void intel_panel_set_backlight_acpi(const struct drm_connector_state *conn_state,
> u32 level, u32 max);
> int intel_panel_setup_backlight(struct drm_connector *connector,
> diff --git a/drivers/gpu/drm/i915/display/vlv_dsi.c b/drivers/gpu/drm/i915/display/vlv_dsi.c
> index 9c9ea89d2107..f582ab52f0b0 100644
> --- a/drivers/gpu/drm/i915/display/vlv_dsi.c
> +++ b/drivers/gpu/drm/i915/display/vlv_dsi.c
> @@ -278,9 +278,11 @@ static int intel_dsi_compute_config(struct intel_encoder *encoder,
> intel_fixed_panel_mode(fixed_mode, adjusted_mode);
>
> if (HAS_GMCH(dev_priv))
> - intel_gmch_panel_fitting(pipe_config, conn_state);
> + ret = intel_gmch_panel_fitting(pipe_config, conn_state);
> else
> - intel_pch_panel_fitting(pipe_config, conn_state);
> + ret = intel_pch_panel_fitting(pipe_config, conn_state);
> + if (ret)
> + return ret;
> }
>
> if (adjusted_mode->flags & DRM_MODE_FLAG_DBLSCAN)
> --
> 2.24.1
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 15+ messages in thread
* [Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [v3,1/6] drm/i915: Fix skl+ non-scaled pfit modes
2020-04-22 16:19 [Intel-gfx] [PATCH v3 1/6] drm/i915: Fix skl+ non-scaled pfit modes Ville Syrjala
` (6 preceding siblings ...)
2020-04-22 18:45 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
@ 2020-04-22 22:44 ` Patchwork
7 siblings, 0 replies; 15+ messages in thread
From: Patchwork @ 2020-04-22 22:44 UTC (permalink / raw)
To: Ville Syrjälä; +Cc: intel-gfx
== Series Details ==
Series: series starting with [v3,1/6] drm/i915: Fix skl+ non-scaled pfit modes
URL : https://patchwork.freedesktop.org/series/76346/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_8350_full -> Patchwork_17426_full
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Known issues
------------
Here are the changes found in Patchwork_17426_full that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@gem_exec_whisper@basic-queues-forked:
- shard-kbl: [PASS][1] -> [FAIL][2] ([i915#1479] / [i915#1772])
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8350/shard-kbl1/igt@gem_exec_whisper@basic-queues-forked.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17426/shard-kbl4/igt@gem_exec_whisper@basic-queues-forked.html
* igt@i915_selftest@live@execlists:
- shard-snb: [PASS][3] -> [FAIL][4] ([i915#1763])
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8350/shard-snb1/igt@i915_selftest@live@execlists.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17426/shard-snb1/igt@i915_selftest@live@execlists.html
* igt@kms_plane@plane-panning-bottom-right-suspend-pipe-a-planes:
- shard-kbl: [PASS][5] -> [DMESG-WARN][6] ([i915#180]) +2 similar issues
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8350/shard-kbl4/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-a-planes.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17426/shard-kbl3/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-a-planes.html
* igt@kms_plane@plane-panning-bottom-right-suspend-pipe-b-planes:
- shard-apl: [PASS][7] -> [DMESG-WARN][8] ([i915#180]) +1 similar issue
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8350/shard-apl1/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-b-planes.html
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17426/shard-apl6/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-b-planes.html
* igt@kms_plane_alpha_blend@pipe-c-constant-alpha-min:
- shard-skl: [PASS][9] -> [FAIL][10] ([fdo#108145] / [i915#265]) +2 similar issues
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8350/shard-skl5/igt@kms_plane_alpha_blend@pipe-c-constant-alpha-min.html
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17426/shard-skl9/igt@kms_plane_alpha_blend@pipe-c-constant-alpha-min.html
* igt@kms_psr2_su@frontbuffer:
- shard-iclb: [PASS][11] -> [SKIP][12] ([fdo#109642] / [fdo#111068])
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8350/shard-iclb2/igt@kms_psr2_su@frontbuffer.html
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17426/shard-iclb1/igt@kms_psr2_su@frontbuffer.html
* igt@kms_psr@no_drrs:
- shard-iclb: [PASS][13] -> [FAIL][14] ([i915#173])
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8350/shard-iclb2/igt@kms_psr@no_drrs.html
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17426/shard-iclb1/igt@kms_psr@no_drrs.html
* igt@kms_psr@psr2_primary_mmap_cpu:
- shard-iclb: [PASS][15] -> [SKIP][16] ([fdo#109441])
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8350/shard-iclb2/igt@kms_psr@psr2_primary_mmap_cpu.html
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17426/shard-iclb1/igt@kms_psr@psr2_primary_mmap_cpu.html
#### Possible fixes ####
* igt@i915_pm_rpm@system-suspend:
- shard-skl: [INCOMPLETE][17] ([i915#151] / [i915#69]) -> [PASS][18]
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8350/shard-skl10/igt@i915_pm_rpm@system-suspend.html
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17426/shard-skl9/igt@i915_pm_rpm@system-suspend.html
* {igt@kms_flip@flip-vs-expired-vblank-interruptible@a-edp1}:
- shard-skl: [FAIL][19] ([i915#46]) -> [PASS][20]
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8350/shard-skl1/igt@kms_flip@flip-vs-expired-vblank-interruptible@a-edp1.html
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17426/shard-skl10/igt@kms_flip@flip-vs-expired-vblank-interruptible@a-edp1.html
* {igt@kms_flip@flip-vs-expired-vblank-interruptible@c-edp1}:
- shard-skl: [FAIL][21] ([i915#79]) -> [PASS][22]
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8350/shard-skl1/igt@kms_flip@flip-vs-expired-vblank-interruptible@c-edp1.html
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17426/shard-skl10/igt@kms_flip@flip-vs-expired-vblank-interruptible@c-edp1.html
* {igt@kms_flip@flip-vs-suspend-interruptible@a-dp1}:
- shard-kbl: [DMESG-WARN][23] ([i915#180]) -> [PASS][24] +6 similar issues
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8350/shard-kbl6/igt@kms_flip@flip-vs-suspend-interruptible@a-dp1.html
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17426/shard-kbl7/igt@kms_flip@flip-vs-suspend-interruptible@a-dp1.html
* {igt@kms_flip@flip-vs-suspend-interruptible@b-edp1}:
- shard-skl: [INCOMPLETE][25] ([i915#198]) -> [PASS][26]
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8350/shard-skl3/igt@kms_flip@flip-vs-suspend-interruptible@b-edp1.html
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17426/shard-skl5/igt@kms_flip@flip-vs-suspend-interruptible@b-edp1.html
* igt@kms_hdr@bpc-switch:
- shard-skl: [FAIL][27] ([i915#1188]) -> [PASS][28]
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8350/shard-skl6/igt@kms_hdr@bpc-switch.html
[28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17426/shard-skl4/igt@kms_hdr@bpc-switch.html
* igt@kms_plane_alpha_blend@pipe-b-coverage-7efc:
- shard-skl: [FAIL][29] ([fdo#108145] / [i915#265]) -> [PASS][30]
[29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8350/shard-skl10/igt@kms_plane_alpha_blend@pipe-b-coverage-7efc.html
[30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17426/shard-skl9/igt@kms_plane_alpha_blend@pipe-b-coverage-7efc.html
* igt@kms_psr@psr2_sprite_mmap_gtt:
- shard-iclb: [SKIP][31] ([fdo#109441]) -> [PASS][32] +2 similar issues
[31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8350/shard-iclb5/igt@kms_psr@psr2_sprite_mmap_gtt.html
[32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17426/shard-iclb2/igt@kms_psr@psr2_sprite_mmap_gtt.html
* igt@kms_setmode@basic:
- shard-apl: [FAIL][33] ([i915#31]) -> [PASS][34]
[33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8350/shard-apl6/igt@kms_setmode@basic.html
[34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17426/shard-apl2/igt@kms_setmode@basic.html
* {igt@perf@polling-small-buf}:
- shard-iclb: [FAIL][35] ([i915#1722]) -> [PASS][36]
[35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8350/shard-iclb2/igt@perf@polling-small-buf.html
[36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17426/shard-iclb1/igt@perf@polling-small-buf.html
#### Warnings ####
* igt@gem_workarounds@suspend-resume-context:
- shard-kbl: [INCOMPLETE][37] ([i915#155] / [i915#1687]) -> [INCOMPLETE][38] ([i915#155] / [i915#1687] / [i915#180])
[37]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8350/shard-kbl7/igt@gem_workarounds@suspend-resume-context.html
[38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17426/shard-kbl2/igt@gem_workarounds@suspend-resume-context.html
* igt@kms_psr2_su@page_flip:
- shard-iclb: [SKIP][39] ([fdo#109642] / [fdo#111068]) -> [FAIL][40] ([i915#608])
[39]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8350/shard-iclb5/igt@kms_psr2_su@page_flip.html
[40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17426/shard-iclb2/igt@kms_psr2_su@page_flip.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#108145]: https://bugs.freedesktop.org/show_bug.cgi?id=108145
[fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441
[fdo#109642]: https://bugs.freedesktop.org/show_bug.cgi?id=109642
[fdo#111068]: https://bugs.freedesktop.org/show_bug.cgi?id=111068
[i915#1188]: https://gitlab.freedesktop.org/drm/intel/issues/1188
[i915#1479]: https://gitlab.freedesktop.org/drm/intel/issues/1479
[i915#151]: https://gitlab.freedesktop.org/drm/intel/issues/151
[i915#155]: https://gitlab.freedesktop.org/drm/intel/issues/155
[i915#1687]: https://gitlab.freedesktop.org/drm/intel/issues/1687
[i915#1722]: https://gitlab.freedesktop.org/drm/intel/issues/1722
[i915#173]: https://gitlab.freedesktop.org/drm/intel/issues/173
[i915#1763]: https://gitlab.freedesktop.org/drm/intel/issues/1763
[i915#1772]: https://gitlab.freedesktop.org/drm/intel/issues/1772
[i915#180]: https://gitlab.freedesktop.org/drm/intel/issues/180
[i915#198]: https://gitlab.freedesktop.org/drm/intel/issues/198
[i915#265]: https://gitlab.freedesktop.org/drm/intel/issues/265
[i915#31]: https://gitlab.freedesktop.org/drm/intel/issues/31
[i915#46]: https://gitlab.freedesktop.org/drm/intel/issues/46
[i915#608]: https://gitlab.freedesktop.org/drm/intel/issues/608
[i915#69]: https://gitlab.freedesktop.org/drm/intel/issues/69
[i915#79]: https://gitlab.freedesktop.org/drm/intel/issues/79
Participating hosts (10 -> 10)
------------------------------
No changes in participating hosts
Build changes
-------------
* CI: CI-20190529 -> None
* Linux: CI_DRM_8350 -> Patchwork_17426
CI-20190529: 20190529
CI_DRM_8350: 018bab6d1c4ac37bff9306384383fab59750e140 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_5606: 678afb3954bec6227c8762756a0ad6d9946d49b2 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_17426: 422ff0ac891b0a528b74487d23fb280317bf1831 @ git://anongit.freedesktop.org/gfx-ci/linux
piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17426/index.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 15+ messages in thread
* Re: [Intel-gfx] [PATCH v3 3/6] drm/i915: Use drm_rect to store the pfit window pos/size
2020-04-22 19:20 ` Manasi Navare
@ 2020-04-23 15:38 ` Ville Syrjälä
2020-04-23 18:51 ` Manasi Navare
0 siblings, 1 reply; 15+ messages in thread
From: Ville Syrjälä @ 2020-04-23 15:38 UTC (permalink / raw)
To: Manasi Navare; +Cc: intel-gfx
On Wed, Apr 22, 2020 at 12:20:06PM -0700, Manasi Navare wrote:
> On Wed, Apr 22, 2020 at 07:19:14PM +0300, Ville Syrjala wrote:
> > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> >
> > Make things a bit more abstract by replacing the pch_pfit.pos/size
> > raw register values with a drm_rect. Makes it slighly more convenient
> > to eg. compute the scaling factors.
> >
> > v2: Use drm_rect_init()
> >
> > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > ---
> > drivers/gpu/drm/i915/display/intel_display.c | 101 +++++++++++-------
> > .../drm/i915/display/intel_display_types.h | 3 +-
> > drivers/gpu/drm/i915/display/intel_panel.c | 13 ++-
> > 3 files changed, 67 insertions(+), 50 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> > index 96d0768ecf5d..6bb87965801e 100644
> > --- a/drivers/gpu/drm/i915/display/intel_display.c
> > +++ b/drivers/gpu/drm/i915/display/intel_display.c
> > @@ -6096,10 +6096,8 @@ static int skl_update_scaler_crtc(struct intel_crtc_state *crtc_state)
> > int width, height;
> >
> > if (crtc_state->pch_pfit.enabled) {
> > - u32 pfit_size = crtc_state->pch_pfit.size;
> > -
> > - width = pfit_size >> 16;
> > - height = pfit_size & 0xffff;
> > + width = drm_rect_width(&crtc_state->pch_pfit.dst);
> > + height = drm_rect_height(&crtc_state->pch_pfit.dst);
> > } else {
> > width = adjusted_mode->crtc_hdisplay;
> > height = adjusted_mode->crtc_vdisplay;
> > @@ -6219,11 +6217,20 @@ static void skl_pfit_enable(const struct intel_crtc_state *crtc_state)
> > {
> > struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
> > struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
> > - enum pipe pipe = crtc->pipe;
> > const struct intel_crtc_scaler_state *scaler_state =
> > &crtc_state->scaler_state;
> > + struct drm_rect src = {
> > + .x2 = crtc_state->pipe_src_w << 16,
> > + .y2 = crtc_state->pipe_src_h << 16,
>
> Its not clear to me why we left shift by 16 for both src_w and src_h? Where can I find the format of
> how this is stored?
>
> Other than that everything else looks good in terms of replacing with drm_rect()
>
> Manasi
>
<snip>
> > - hscale = (crtc_state->pipe_src_w << 16) / pfit_w;
> > - vscale = (crtc_state->pipe_src_h << 16) / pfit_h;
Same <<16 was here already. skl_scaler_calc_phase() wants
the scaling factor in .16 binary fixed point. Also
drm_rect_calc_{h,v}scale() assumes the src coordinates
to be .16 and returns the result in .16 as well.
> > + hscale = drm_rect_calc_hscale(&src, dst, 0, INT_MAX);
> > + vscale = drm_rect_calc_vscale(&src, dst, 0, INT_MAX);
> >
> > uv_rgb_hphase = skl_scaler_calc_phase(1, hscale, false);
> > uv_rgb_vphase = skl_scaler_calc_phase(1, vscale, false);
--
Ville Syrjälä
Intel
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 15+ messages in thread
* Re: [Intel-gfx] [PATCH v3 3/6] drm/i915: Use drm_rect to store the pfit window pos/size
2020-04-23 15:38 ` Ville Syrjälä
@ 2020-04-23 18:51 ` Manasi Navare
0 siblings, 0 replies; 15+ messages in thread
From: Manasi Navare @ 2020-04-23 18:51 UTC (permalink / raw)
To: Ville Syrjälä; +Cc: intel-gfx
On Thu, Apr 23, 2020 at 06:38:46PM +0300, Ville Syrjälä wrote:
> On Wed, Apr 22, 2020 at 12:20:06PM -0700, Manasi Navare wrote:
> > On Wed, Apr 22, 2020 at 07:19:14PM +0300, Ville Syrjala wrote:
> > > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > >
> > > Make things a bit more abstract by replacing the pch_pfit.pos/size
> > > raw register values with a drm_rect. Makes it slighly more convenient
> > > to eg. compute the scaling factors.
> > >
> > > v2: Use drm_rect_init()
> > >
> > > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > > ---
> > > drivers/gpu/drm/i915/display/intel_display.c | 101 +++++++++++-------
> > > .../drm/i915/display/intel_display_types.h | 3 +-
> > > drivers/gpu/drm/i915/display/intel_panel.c | 13 ++-
> > > 3 files changed, 67 insertions(+), 50 deletions(-)
> > >
> > > diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> > > index 96d0768ecf5d..6bb87965801e 100644
> > > --- a/drivers/gpu/drm/i915/display/intel_display.c
> > > +++ b/drivers/gpu/drm/i915/display/intel_display.c
> > > @@ -6096,10 +6096,8 @@ static int skl_update_scaler_crtc(struct intel_crtc_state *crtc_state)
> > > int width, height;
> > >
> > > if (crtc_state->pch_pfit.enabled) {
> > > - u32 pfit_size = crtc_state->pch_pfit.size;
> > > -
> > > - width = pfit_size >> 16;
> > > - height = pfit_size & 0xffff;
> > > + width = drm_rect_width(&crtc_state->pch_pfit.dst);
> > > + height = drm_rect_height(&crtc_state->pch_pfit.dst);
> > > } else {
> > > width = adjusted_mode->crtc_hdisplay;
> > > height = adjusted_mode->crtc_vdisplay;
> > > @@ -6219,11 +6217,20 @@ static void skl_pfit_enable(const struct intel_crtc_state *crtc_state)
> > > {
> > > struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
> > > struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
> > > - enum pipe pipe = crtc->pipe;
> > > const struct intel_crtc_scaler_state *scaler_state =
> > > &crtc_state->scaler_state;
> > > + struct drm_rect src = {
> > > + .x2 = crtc_state->pipe_src_w << 16,
> > > + .y2 = crtc_state->pipe_src_h << 16,
> >
> > Its not clear to me why we left shift by 16 for both src_w and src_h? Where can I find the format of
> > how this is stored?
> >
> > Other than that everything else looks good in terms of replacing with drm_rect()
> >
> > Manasi
> >
> <snip>
> > > - hscale = (crtc_state->pipe_src_w << 16) / pfit_w;
> > > - vscale = (crtc_state->pipe_src_h << 16) / pfit_h;
>
> Same <<16 was here already. skl_scaler_calc_phase() wants
> the scaling factor in .16 binary fixed point. Also
> drm_rect_calc_{h,v}scale() assumes the src coordinates
> to be .16 and returns the result in .16 as well.
Ah okay, thanks for the clarification, is it perhaps a good idea to add this
in the comment somewhere?
In either case though,
Reviewed-by: Manasi Navare <manasi.d.navare@intel.com>
Manasi
>
> > > + hscale = drm_rect_calc_hscale(&src, dst, 0, INT_MAX);
> > > + vscale = drm_rect_calc_vscale(&src, dst, 0, INT_MAX);
> > >
> > > uv_rgb_hphase = skl_scaler_calc_phase(1, hscale, false);
> > > uv_rgb_vphase = skl_scaler_calc_phase(1, vscale, false);
> --
> Ville Syrjälä
> Intel
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 15+ messages in thread
end of thread, other threads:[~2020-04-23 18:50 UTC | newest]
Thread overview: 15+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2020-04-22 16:19 [Intel-gfx] [PATCH v3 1/6] drm/i915: Fix skl+ non-scaled pfit modes Ville Syrjala
2020-04-22 16:19 ` [Intel-gfx] [PATCH v3 2/6] drm/i915: Flatten a bunch of the pfit functions Ville Syrjala
2020-04-22 16:19 ` [Intel-gfx] [PATCH v3 3/6] drm/i915: Use drm_rect to store the pfit window pos/size Ville Syrjala
2020-04-22 19:20 ` Manasi Navare
2020-04-23 15:38 ` Ville Syrjälä
2020-04-23 18:51 ` Manasi Navare
2020-04-22 16:19 ` [Intel-gfx] [PATCH v3 4/6] drm/i915: s/pipe_config/crtc_state/ in pfit functions Ville Syrjala
2020-04-22 19:26 ` Manasi Navare
2020-04-22 16:19 ` [Intel-gfx] [PATCH v3 5/6] drm/i915: Pass connector state to pfit calculations Ville Syrjala
2020-04-22 21:35 ` Manasi Navare
2020-04-22 16:19 ` [Intel-gfx] [PATCH v3 6/6] drm/i915: Have pfit calculations return an error code Ville Syrjala
2020-04-22 21:42 ` Manasi Navare
2020-04-22 18:21 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [v3,1/6] drm/i915: Fix skl+ non-scaled pfit modes Patchwork
2020-04-22 18:45 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2020-04-22 22:44 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.