[PATCH v1 00/49] add support for broadcom NS3 soc

[PATCH v1 00/49] add support for broadcom NS3 soc

[Rayagonda Kokatanur]

This patch series adds support for Broadcom Northstar 3 SoC.
NS3 is a octo-core 64-bit ARMv8 Cortex-A72 processors
targeting a broad range of networking applications.

Abhishek Shah (1):
  board: ns3: add api to save boot parameters passed from BL31

Bharat Gooty (2):
  include/configs: ns3: add env variables for Linux boot
  include/configs: ns3: add support for flashing images

Bharat Kumar Reddy Gooty (3):
  board: ns3: program GIC LPI tables
  board: ns3: limit U-boot relocation within 16MB memory
  cmd: bcm: add command for chimp hand shake

Corneliu Doban (1):
  cmd: gpt: add eMMC and GPT support

Pramod Kumar (4):
  arm: dts: ns3: add emmc node
  arm: dts: ns3: add sp805 watchdog node
  board: ns3: add FIT image its file
  board: ns3: add development keys used in FIT

Rajesh Ravi (1):
  board: ns3: default reset type to L3

Ray Jui (1):
  board: ns3: define ddr memory layout

Rayagonda Kokatanur (27):
  board: ns3: add support for Broadcom Northstar 3
  arm: cpu: armv8: add L3 memory flush support
  configs: ns3: enable clock subsystem
  arm: dts: ns3: add clock dt node
  configs: ns3: enable pinctrl driver
  dt-bindings: pinctrl: add ns3 pads definition
  arm: dts: ns3: add pinctrl node
  arm: dts: ns3: add gpio node
  gpio: do not include <asm/arch/gpio.h> on TARGET_BCMNS3
  configs: ns3: enable BCM IPROC mmc driver
  configs: ns3: enable mmc commands
  arm: dts: ns3: add qspi node
  dt-bindings: memory: ns3: add memory definitions
  arm: dts: ns3: add i2c node
  configs: ns3: enable gpt commands
  configs: ns3: enable EXT4 and FAT fs support
  configs: ns3: enable sp805 watchdog driver
  board: ns3: start sp805 watchdog service
  dt-bindings: memory: ns3: update GIC LPI address
  configs: ns3: enable GIC ITS LPI table programing
  dt-bindings: memory: ns3: add ddr memory definition
  configs: ns3: enable FIT config
  configs: ns3: enable PXE boot command
  configs: ns3: enable RPMB
  configs: ns3: enable tee and optee driver
  configs: ns3: env in mmc
  board: ns3: check chimp handshake status

Sheetal Tigadoli (1):
  common: ns3: add error logging support

Srinath Mannam (1):
  arm: dts: ns3: add PAXB PCIe host and phy node

Trac Hoang (2):
  board: ns3: add generic MCU IPC command send API
  cmd: bcm: add nitro boot command

Vikas Gupta (3):
  board: ns3: add optee based bnxt fw load driver
  arm: dts: ns3: add optee node
  cmd: bcm: add nitro image load commands

Vladimir Olovyannikov (2):
  board: ns3: kconfig: extend board kconfig with specific commands
  cmd: bcm: add broadcom error log setup command

 arch/arm/Kconfig                              |  10 +
 arch/arm/cpu/armv8/Makefile                   |   1 +
 arch/arm/cpu/armv8/bcmns3/Makefile            |   5 +
 arch/arm/cpu/armv8/bcmns3/lowlevel.S          |  99 ++
 arch/arm/dts/Makefile                         |   2 +
 arch/arm/dts/ns3-board.dts                    | 105 ++
 arch/arm/dts/ns3-clock.dtsi                   |  34 +
 arch/arm/dts/ns3-pinctrl.dtsi                 | 321 +++++++
 arch/arm/dts/ns3.dtsi                         | 265 ++++++
 arch/arm/include/asm/arch-bcmns3/bl33_info.h  |  26 +
 arch/arm/include/asm/gpio.h                   |   2 +-
 board/broadcom/bcmns3/Kconfig                 |  25 +
 board/broadcom/bcmns3/Makefile                |   7 +
 board/broadcom/bcmns3/chimp_optee.c           | 154 +++
 board/broadcom/bcmns3/fit/keys/dev.crt        |  21 +
 board/broadcom/bcmns3/fit/keys/dev.key        |  28 +
 board/broadcom/bcmns3/fit/multi.its           |  59 ++
 board/broadcom/bcmns3/mcu_cmd.c               |  49 +
 board/broadcom/bcmns3/mcu_cmd.h               |  13 +
 board/broadcom/bcmns3/ns3.c                   | 263 +++++
 cmd/Kconfig                                   |   2 +
 cmd/Makefile                                  |   2 +
 cmd/bcm/Kconfig                               |  12 +
 cmd/bcm/Makefile                              |   7 +
 cmd/bcm/chimp_boot.c                          |  36 +
 cmd/bcm/chimp_handshake.c                     |  32 +
 cmd/bcm/elog.h                                |  64 ++
 cmd/bcm/logsetup.c                            | 432 +++++++++
 cmd/bcm/nitro_image_load.c                    |  99 ++
 cmd/gpt.c                                     |  95 ++
 common/Kconfig                                |   8 +
 common/Makefile                               |   1 +
 common/bcm_elog.c                             |  49 +
 common/console.c                              |  22 +
 configs/bcm_ns3_defconfig                     |  57 ++
 include/bcm_elog.h                            |  37 +
 include/brcm/chimp.h                          |  48 +
 include/configs/bcm_ns3.h                     | 901 ++++++++++++++++++
 include/dt-bindings/memory/bcm-ns3-mc.h       |  65 ++
 .../dt-bindings/pinctrl/brcm,pinctrl-ns3.h    |  41 +
 40 files changed, 3498 insertions(+), 1 deletion(-)
 create mode 100644 arch/arm/cpu/armv8/bcmns3/Makefile
 create mode 100644 arch/arm/cpu/armv8/bcmns3/lowlevel.S
 create mode 100644 arch/arm/dts/ns3-board.dts
 create mode 100644 arch/arm/dts/ns3-clock.dtsi
 create mode 100644 arch/arm/dts/ns3-pinctrl.dtsi
 create mode 100644 arch/arm/dts/ns3.dtsi
 create mode 100644 arch/arm/include/asm/arch-bcmns3/bl33_info.h
 create mode 100644 board/broadcom/bcmns3/Kconfig
 create mode 100644 board/broadcom/bcmns3/Makefile
 create mode 100644 board/broadcom/bcmns3/chimp_optee.c
 create mode 100644 board/broadcom/bcmns3/fit/keys/dev.crt
 create mode 100644 board/broadcom/bcmns3/fit/keys/dev.key
 create mode 100644 board/broadcom/bcmns3/fit/multi.its
 create mode 100644 board/broadcom/bcmns3/mcu_cmd.c
 create mode 100644 board/broadcom/bcmns3/mcu_cmd.h
 create mode 100644 board/broadcom/bcmns3/ns3.c
 create mode 100644 cmd/bcm/Kconfig
 create mode 100644 cmd/bcm/Makefile
 create mode 100644 cmd/bcm/chimp_boot.c
 create mode 100644 cmd/bcm/chimp_handshake.c
 create mode 100644 cmd/bcm/elog.h
 create mode 100644 cmd/bcm/logsetup.c
 create mode 100644 cmd/bcm/nitro_image_load.c
 create mode 100644 common/bcm_elog.c
 create mode 100644 configs/bcm_ns3_defconfig
 create mode 100644 include/bcm_elog.h
 create mode 100644 include/brcm/chimp.h
 create mode 100644 include/configs/bcm_ns3.h
 create mode 100644 include/dt-bindings/memory/bcm-ns3-mc.h
 create mode 100644 include/dt-bindings/pinctrl/brcm,pinctrl-ns3.h

-- 
2.17.1

[PATCH v1 01/49] board: ns3: add support for Broadcom Northstar 3

[Rayagonda Kokatanur]

Add support for Broadcom Northstar 3 SoC.
NS3 is a octo-core 64-bit ARMv8 Cortex-A72 processors
targeting a broad range of networking applications.

Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com>
---
 arch/arm/Kconfig               | 10 ++++++
 arch/arm/dts/Makefile          |  2 ++
 arch/arm/dts/ns3-board.dts     | 24 +++++++++++++
 arch/arm/dts/ns3.dtsi          | 34 ++++++++++++++++++
 board/broadcom/bcmns3/Kconfig  | 15 ++++++++
 board/broadcom/bcmns3/Makefile |  5 +++
 board/broadcom/bcmns3/ns3.c    | 65 ++++++++++++++++++++++++++++++++++
 configs/bcm_ns3_defconfig      | 20 +++++++++++
 include/configs/bcm_ns3.h      | 40 +++++++++++++++++++++
 9 files changed, 215 insertions(+)
 create mode 100644 arch/arm/dts/ns3-board.dts
 create mode 100644 arch/arm/dts/ns3.dtsi
 create mode 100644 board/broadcom/bcmns3/Kconfig
 create mode 100644 board/broadcom/bcmns3/Makefile
 create mode 100644 board/broadcom/bcmns3/ns3.c
 create mode 100644 configs/bcm_ns3_defconfig
 create mode 100644 include/configs/bcm_ns3.h

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 1bcf345028..53dd8228b4 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -699,6 +699,15 @@ config TARGET_BCMNS2
 	  ARMv8 Cortex-A57 processors targeting a broad range of networking
 	  applications.
 
+config TARGET_BCMNS3
+	bool "Support Broadcom NS3"
+	select ARM64
+	select BOARD_LATE_INIT
+	help
+	  Support for Broadcom Northstar 3 SoCs. NS3 is a octo-core 64-bit
+	  ARMv8 Cortex-A72 processors targeting a broad range of networking
+	  applications.
+
 config ARCH_EXYNOS
 	bool "Samsung EXYNOS"
 	select DM
@@ -1834,6 +1843,7 @@ source "board/broadcom/bcm968580xref/Kconfig"
 source "board/broadcom/bcmcygnus/Kconfig"
 source "board/broadcom/bcmnsp/Kconfig"
 source "board/broadcom/bcmns2/Kconfig"
+source "board/broadcom/bcmns3/Kconfig"
 source "board/cavium/thunderx/Kconfig"
 source "board/cirrus/edb93xx/Kconfig"
 source "board/eets/pdu001/Kconfig"
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index af7d804b66..0c7c8e95e0 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -885,6 +885,8 @@ dtb-$(CONFIG_ARCH_BCM68360) += \
 dtb-$(CONFIG_ARCH_BCM6858) += \
 	bcm968580xref.dtb
 
+dtb-$(CONFIG_TARGET_BCMNS3) += ns3-board.dtb
+
 dtb-$(CONFIG_ARCH_ASPEED) += ast2500-evb.dtb
 
 dtb-$(CONFIG_ARCH_STI) += stih410-b2260.dtb
diff --git a/arch/arm/dts/ns3-board.dts b/arch/arm/dts/ns3-board.dts
new file mode 100644
index 0000000000..54e56879a5
--- /dev/null
+++ b/arch/arm/dts/ns3-board.dts
@@ -0,0 +1,24 @@
+// SPDX-License-Identifier:      GPL-2.0+
+/*
+ * Copyright (C) 2020 Broadcom
+ */
+
+/dts-v1/;
+
+#include "ns3.dtsi"
+
+/ {
+	model = "NS3 model";
+
+	aliases {
+		serial0 = &uart1;
+	};
+
+	chosen {
+		stdout-path = "serial0:115200n8";
+	};
+};
+
+&uart1 {
+	status = "okay";
+};
diff --git a/arch/arm/dts/ns3.dtsi b/arch/arm/dts/ns3.dtsi
new file mode 100644
index 0000000000..09098aac3a
--- /dev/null
+++ b/arch/arm/dts/ns3.dtsi
@@ -0,0 +1,34 @@
+// SPDX-License-Identifier:      GPL-2.0+
+/*
+ * Copyright (C) 2020 Broadcom
+ */
+
+#include "skeleton64.dtsi"
+
+/ {
+	compatible = "brcm,ns3";
+	#address-cells = <2>;
+	#size-cells = <2>;
+
+	memory {
+		device_type = "memory";
+		reg = <0x0 0x80000000 0x0 0x80000000>,
+			<0x8 0x80000000 0x1 0x80000000>;
+	};
+
+	hsls {
+		compatible = "simple-bus";
+		dma-ranges;
+		#address-cells = <1>;
+		#size-cells = <1>;
+		ranges = <0x0 0x0 0x68900000 0x17700000>;
+
+		uart1: uart at 110000 {
+			compatible = "snps,dw-apb-uart";
+			reg = <0x00110000 0x1000>;
+			reg-shift = <2>;
+			clock-frequency = <25000000>;
+			status = "disabled";
+		};
+	};
+};
diff --git a/board/broadcom/bcmns3/Kconfig b/board/broadcom/bcmns3/Kconfig
new file mode 100644
index 0000000000..8ce21f980d
--- /dev/null
+++ b/board/broadcom/bcmns3/Kconfig
@@ -0,0 +1,15 @@
+if TARGET_BCMNS3
+
+config SYS_BOARD
+	default "bcmns3"
+
+config SYS_VENDOR
+	default "broadcom"
+
+config SYS_SOC
+	default "bcmns3"
+
+config SYS_CONFIG_NAME
+	default "bcm_ns3"
+
+endif
diff --git a/board/broadcom/bcmns3/Makefile b/board/broadcom/bcmns3/Makefile
new file mode 100644
index 0000000000..3404260148
--- /dev/null
+++ b/board/broadcom/bcmns3/Makefile
@@ -0,0 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0+
+#
+# Copyright 2020 Broadcom.
+
+obj-y	:= ns3.o
diff --git a/board/broadcom/bcmns3/ns3.c b/board/broadcom/bcmns3/ns3.c
new file mode 100644
index 0000000000..0b9af6ad9b
--- /dev/null
+++ b/board/broadcom/bcmns3/ns3.c
@@ -0,0 +1,65 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright 2020 Broadcom.
+ *
+ */
+
+#include <asm/io.h>
+#include <common.h>
+#include <asm/armv8/mmu.h>
+#include <asm/system.h>
+#include <fdtdec.h>
+
+static struct mm_region ns3_mem_map[] = {
+	{
+		.virt = 0x0UL,
+		.phys = 0x0UL,
+		.size = 0x80000000UL,
+		.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
+			 PTE_BLOCK_NON_SHARE |
+			 PTE_BLOCK_PXN | PTE_BLOCK_UXN
+	}, {
+		.virt = 0x80000000UL,
+		.phys = 0x80000000UL,
+		.size = 0x80000000UL,
+		.attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
+			 PTE_BLOCK_INNER_SHARE
+	}, {
+		/* List terminator */
+		0,
+	}
+};
+
+struct mm_region *mem_map = ns3_mem_map;
+
+DECLARE_GLOBAL_DATA_PTR;
+
+int board_init(void)
+{
+	return 0;
+}
+
+int board_late_init(void)
+{
+	return 0;
+}
+
+int dram_init(void)
+{
+	if (fdtdec_setup_mem_size_base() != 0)
+		return -EINVAL;
+
+	return 0;
+}
+
+int dram_init_banksize(void)
+{
+	fdtdec_setup_memory_banksize();
+
+	return 0;
+}
+
+void reset_cpu(ulong addr)
+{
+	psci_system_reset();
+}
diff --git a/configs/bcm_ns3_defconfig b/configs/bcm_ns3_defconfig
new file mode 100644
index 0000000000..a81541e394
--- /dev/null
+++ b/configs/bcm_ns3_defconfig
@@ -0,0 +1,20 @@
+CONFIG_ARM=y
+CONFIG_TARGET_BCMNS3=y
+CONFIG_SYS_TEXT_BASE=0xFF000000
+CONFIG_ENV_SIZE=0x80000
+CONFIG_NR_DRAM_BANKS=2
+CONFIG_LOGLEVEL=7
+CONFIG_SILENT_CONSOLE=y
+CONFIG_SILENT_U_BOOT_ONLY=y
+# CONFIG_SILENT_CONSOLE_UPDATE_ON_SET is not set
+CONFIG_SUPPORT_RAW_INITRD=y
+# CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_HUSH_PARSER=y
+CONFIG_SYS_PROMPT="u-boot> "
+CONFIG_SYS_XTRACE="n"
+# CONFIG_CMD_SOURCE is not set
+CONFIG_OF_CONTROL=y
+CONFIG_DEFAULT_DEVICE_TREE="ns3-board"
+CONFIG_DM=y
+CONFIG_DM_SERIAL=y
+CONFIG_SYS_NS16550=y
diff --git a/include/configs/bcm_ns3.h b/include/configs/bcm_ns3.h
new file mode 100644
index 0000000000..02a736456a
--- /dev/null
+++ b/include/configs/bcm_ns3.h
@@ -0,0 +1,40 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright 2020 Broadcom.
+ *
+ */
+
+#ifndef __BCM_NS3_H
+#define __BCM_NS3_H
+
+#include <linux/sizes.h>
+
+#define CONFIG_HOSTNAME			"NS3"
+
+/* Physical Memory Map */
+#define V2M_BASE			0x80000000
+#define PHYS_SDRAM_1			V2M_BASE
+
+#define CONFIG_SYS_SDRAM_BASE		PHYS_SDRAM_1
+#define CONFIG_SYS_LOAD_ADDR		(PHYS_SDRAM_1 + 0x80000)
+
+/*
+ * Initial SP before reloaction is placed at end of first DRAM bank,
+ * which is 0x1_0000_0000.
+ * Just before re-loaction, new SP is updated and re-location happens.
+ * So pointing the initial SP to end of 2GB DDR is not a problem
+ */
+#define CONFIG_SYS_INIT_SP_ADDR		(PHYS_SDRAM_1 + 0x80000000)
+/* 12MB Malloc size */
+#define CONFIG_SYS_MALLOC_LEN		(SZ_8M + SZ_4M)
+
+/* console configuration */
+#define CONFIG_SYS_NS16550_CLK		25000000
+
+#define CONFIG_SYS_CBSIZE		SZ_1K
+#define CONFIG_SYS_PBSIZE		(CONFIG_SYS_CBSIZE + \
+					 sizeof(CONFIG_SYS_PROMPT) + 16)
+#define CONFIG_SYS_MAXARGS		64
+#define CONFIG_SYS_BARGSIZE		CONFIG_SYS_CBSIZE
+
+#endif /* __BCM_NS3_H */
-- 
2.17.1

[PATCH v1 02/49] arm: cpu: armv8: add L3 memory flush support

[Rayagonda Kokatanur]

Add L3 memory flush support for NS3.

Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com>
---
 arch/arm/cpu/armv8/Makefile          |  1 +
 arch/arm/cpu/armv8/bcmns3/Makefile   |  5 ++
 arch/arm/cpu/armv8/bcmns3/lowlevel.S | 90 ++++++++++++++++++++++++++++
 3 files changed, 96 insertions(+)
 create mode 100644 arch/arm/cpu/armv8/bcmns3/Makefile
 create mode 100644 arch/arm/cpu/armv8/bcmns3/lowlevel.S

diff --git a/arch/arm/cpu/armv8/Makefile b/arch/arm/cpu/armv8/Makefile
index b349b13f49..75d866f4d7 100644
--- a/arch/arm/cpu/armv8/Makefile
+++ b/arch/arm/cpu/armv8/Makefile
@@ -35,3 +35,4 @@ obj-$(CONFIG_S32V234) += s32v234/
 obj-$(CONFIG_TARGET_HIKEY) += hisilicon/
 obj-$(CONFIG_ARMV8_PSCI) += psci.o
 obj-$(CONFIG_ARCH_SUNXI) += lowlevel_init.o
+obj-$(CONFIG_TARGET_BCMNS3) += bcmns3/
diff --git a/arch/arm/cpu/armv8/bcmns3/Makefile b/arch/arm/cpu/armv8/bcmns3/Makefile
new file mode 100644
index 0000000000..a35e29d11a
--- /dev/null
+++ b/arch/arm/cpu/armv8/bcmns3/Makefile
@@ -0,0 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0+
+#
+# Copyright 2020 Broadcom.
+
+obj-y	+= lowlevel.o
diff --git a/arch/arm/cpu/armv8/bcmns3/lowlevel.S b/arch/arm/cpu/armv8/bcmns3/lowlevel.S
new file mode 100644
index 0000000000..202286248e
--- /dev/null
+++ b/arch/arm/cpu/armv8/bcmns3/lowlevel.S
@@ -0,0 +1,90 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright 2020 Broadcom
+ *
+ * Extracted from fsl-layerscape/lowlevel.S
+ */
+
+#include <asm/macro.h>
+#include <linux/linkage.h>
+
+hnf_pstate_poll:
+	/* x0 has the desired status, return 0 for success, 1 for timeout
+	 * clobber x1, x2, x3, x4, x6, x7
+	 */
+	mov	x1, x0
+	mov	x7, #0			/* flag for timeout */
+	mrs	x3, cntpct_el0		/* read timer */
+	mov	w0, #600
+	mov	w6, #1000
+	mul	w0, w0, w6
+	add	x3, x3, x0		/* timeout after 100 microseconds */
+	mov	x0, #0x18
+	movk	x0, #0x6120, lsl #16	/* HNF0_PSTATE_STATUS */
+	mov	w6, #4			/* HN-F node count */
+1:
+	ldr	x2, [x0]
+	cmp	x2, x1			/* check status */
+	b.eq	2f
+	mrs	x4, cntpct_el0
+	cmp	x4, x3
+	b.ls	1b
+	mov	x7, #1			/* timeout */
+	b	3f
+2:
+	add	x0, x0, #0x10000	/* move to next node */
+	subs	w6, w6, #1
+	cbnz	w6, 1b
+3:
+	mov	x0, x7
+	ret
+
+hnf_set_pstate:
+	/* x0 has the desired state, clobber x1, x2, x6 */
+	mov	x1, x0
+	/* power state to SFONLY */
+	mov	w6, #4			/* HN-F node count */
+	mov	x0, #0x10
+	movk x0, #0x6120, lsl #16		/* HNF0_PSTATE_REQ */
+1:	/* set pstate to sfonly */
+	ldr	x2, [x0]
+	and	x2, x2, #0xfffffffffffffffc	/* & HNFPSTAT_MASK */
+	orr	x2, x2, x1
+	str	x2, [x0]
+	add	x0, x0, #0x10000	/* move to next node */
+	subs	w6, w6, #1
+	cbnz	w6, 1b
+
+	ret
+
+ENTRY(__asm_flush_l3_dcache)
+	/*
+	 * Return status in x0
+	 *    success 0
+	 *    timeout 1 for setting SFONLY, 2 for FAM, 3 for both
+	 */
+	mov	x29, lr
+	mov	x8, #0
+
+	dsb	sy
+	mov	x0, #0x1		/* HNFPSTAT_SFONLY */
+	bl	hnf_set_pstate
+
+	mov	x0, #0x4		/* SFONLY status */
+	bl	hnf_pstate_poll
+	cbz	x0, 1f
+	mov	x8, #1			/* timeout */
+1:
+	dsb	sy
+	mov	x0, #0x3		/* HNFPSTAT_FAM */
+	bl	hnf_set_pstate
+
+	mov	x0, #0xc		/* FAM status */
+	bl	hnf_pstate_poll
+	cbz	x0, 1f
+	add	x8, x8, #0x2
+1:
+	mov	x0, x8
+	mov	lr, x29
+	ret
+ENDPROC(__asm_flush_l3_dcache)
-- 
2.17.1

[PATCH v1 03/49] configs: ns3: enable clock subsystem

[Rayagonda Kokatanur]

Enable clock subsystem for ns3.

Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com>
---
 configs/bcm_ns3_defconfig | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/configs/bcm_ns3_defconfig b/configs/bcm_ns3_defconfig
index a81541e394..7e51a926f7 100644
--- a/configs/bcm_ns3_defconfig
+++ b/configs/bcm_ns3_defconfig
@@ -16,5 +16,7 @@ CONFIG_SYS_XTRACE="n"
 CONFIG_OF_CONTROL=y
 CONFIG_DEFAULT_DEVICE_TREE="ns3-board"
 CONFIG_DM=y
+CONFIG_CLK=y
+CONFIG_CLK_CCF=y
 CONFIG_DM_SERIAL=y
 CONFIG_SYS_NS16550=y
-- 
2.17.1

[PATCH v1 04/49] arm: dts: ns3: add clock dt node

[Rayagonda Kokatanur]

Add clock dt node for ns3.

Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com>
---
 arch/arm/dts/ns3-clock.dtsi | 34 ++++++++++++++++++++++++++++++++++
 1 file changed, 34 insertions(+)
 create mode 100644 arch/arm/dts/ns3-clock.dtsi

diff --git a/arch/arm/dts/ns3-clock.dtsi b/arch/arm/dts/ns3-clock.dtsi
new file mode 100644
index 0000000000..faa5194607
--- /dev/null
+++ b/arch/arm/dts/ns3-clock.dtsi
@@ -0,0 +1,34 @@
+// SPDX-License-Identifier:      GPL-2.0+
+/*
+ * Copyright (C) 2020 Broadcom
+ */
+
+	osc: oscillator {
+		#clock-cells = <0>;
+		compatible = "fixed-clock";
+		clock-frequency = <50000000>;
+	};
+
+	crmu_ref25m: crmu_ref25m {
+		#clock-cells = <0>;
+		compatible = "fixed-factor-clock";
+		clocks = <&osc>;
+		clock-div = <2>;
+		clock-mult = <1>;
+	};
+
+	hsls_25m_clk: hsls_25m_clk {
+		#clock-cells = <0>;
+		compatible = "fixed-factor-clock";
+		clocks = <&crmu_ref25m>;
+		clock-div = <1>;
+		clock-mult = <1>;
+	};
+
+	hsls_25m_div2_clk: hsls_25m_div2_clk {
+		#clock-cells = <0>;
+		compatible = "fixed-factor-clock";
+		clocks = <&hsls_25m_clk>;
+		clock-div = <2>;
+		clock-mult = <1>;
+	};
-- 
2.17.1

[PATCH v1 05/49] configs: ns3: enable pinctrl driver

[Rayagonda Kokatanur]

Enable pinctrl driver for ns3.

Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com>
---
 configs/bcm_ns3_defconfig | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/configs/bcm_ns3_defconfig b/configs/bcm_ns3_defconfig
index 7e51a926f7..438e929b4b 100644
--- a/configs/bcm_ns3_defconfig
+++ b/configs/bcm_ns3_defconfig
@@ -12,11 +12,14 @@ CONFIG_SUPPORT_RAW_INITRD=y
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PROMPT="u-boot> "
 CONFIG_SYS_XTRACE="n"
+# CONFIG_CMD_PINMUX is not set
 # CONFIG_CMD_SOURCE is not set
 CONFIG_OF_CONTROL=y
 CONFIG_DEFAULT_DEVICE_TREE="ns3-board"
 CONFIG_DM=y
 CONFIG_CLK=y
 CONFIG_CLK_CCF=y
+CONFIG_PINCTRL=y
+CONFIG_PINCTRL_SINGLE=y
 CONFIG_DM_SERIAL=y
 CONFIG_SYS_NS16550=y
-- 
2.17.1

[PATCH v1 06/49] dt-bindings: pinctrl: add ns3 pads definition

[Rayagonda Kokatanur]

Add NS3 pads definitions.

Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com>
---
 .../dt-bindings/pinctrl/brcm,pinctrl-ns3.h    | 41 +++++++++++++++++++
 1 file changed, 41 insertions(+)
 create mode 100644 include/dt-bindings/pinctrl/brcm,pinctrl-ns3.h

diff --git a/include/dt-bindings/pinctrl/brcm,pinctrl-ns3.h b/include/dt-bindings/pinctrl/brcm,pinctrl-ns3.h
new file mode 100644
index 0000000000..81ebd58ca5
--- /dev/null
+++ b/include/dt-bindings/pinctrl/brcm,pinctrl-ns3.h
@@ -0,0 +1,41 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright 2020 Broadcom.
+ */
+
+#ifndef __DT_BINDINGS_PINCTRL_BRCM_STINGRAY_H__
+#define __DT_BINDINGS_PINCTRL_BRCM_STINGRAY_H__
+
+/* Alternate functions available in MUX controller */
+#define MODE_NITRO				0
+#define MODE_NAND				1
+#define MODE_PNOR				2
+#define MODE_GPIO				3
+
+/* Pad configuration attribute */
+#define PAD_SLEW_RATE_ENA			BIT(0)
+#define PAD_SLEW_RATE_ENA_MASK			BIT(0)
+
+#define PAD_DRIVE_STRENGTH_2_MA			(0 << 1)
+#define PAD_DRIVE_STRENGTH_4_MA			BIT(1)
+#define PAD_DRIVE_STRENGTH_6_MA			(2 << 1)
+#define PAD_DRIVE_STRENGTH_8_MA			(3 << 1)
+#define PAD_DRIVE_STRENGTH_10_MA		(4 << 1)
+#define PAD_DRIVE_STRENGTH_12_MA		(5 << 1)
+#define PAD_DRIVE_STRENGTH_14_MA		(6 << 1)
+#define PAD_DRIVE_STRENGTH_16_MA		(7 << 1)
+#define PAD_DRIVE_STRENGTH_MASK			(7 << 1)
+
+#define PAD_PULL_UP_ENA				BIT(4)
+#define PAD_PULL_UP_ENA_MASK			BIT(4)
+
+#define PAD_PULL_DOWN_ENA			BIT(5)
+#define PAD_PULL_DOWN_ENA_MASK			BIT(5)
+
+#define PAD_INPUT_PATH_DIS			BIT(6)
+#define PAD_INPUT_PATH_DIS_MASK			BIT(6)
+
+#define PAD_HYSTERESIS_ENA			BIT(7)
+#define PAD_HYSTERESIS_ENA_MASK			BIT(7)
+
+#endif
-- 
2.17.1

[PATCH v1 07/49] arm: dts: ns3: add pinctrl node

[Rayagonda Kokatanur]

Add pinctrl dt node for ns3.

Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com>
---
 arch/arm/dts/ns3-pinctrl.dtsi | 321 ++++++++++++++++++++++++++++++++++
 arch/arm/dts/ns3.dtsi         |   2 +
 2 files changed, 323 insertions(+)
 create mode 100644 arch/arm/dts/ns3-pinctrl.dtsi

diff --git a/arch/arm/dts/ns3-pinctrl.dtsi b/arch/arm/dts/ns3-pinctrl.dtsi
new file mode 100644
index 0000000000..dfc13c7014
--- /dev/null
+++ b/arch/arm/dts/ns3-pinctrl.dtsi
@@ -0,0 +1,321 @@
+// SPDX-License-Identifier:      GPL-2.0+
+/*
+ * Copyright (C) 2020 Broadcom
+ */
+
+#include <dt-bindings/pinctrl/brcm,pinctrl-ns3.h>
+
+		pinconf: pinconf at 140000 {
+			compatible = "pinconf-single";
+			reg = <0x00140000 0x250>;
+			pinctrl-single,register-width = <32>;
+
+			/* pinconf functions */
+		};
+
+		pinmux: pinmux at 14029c {
+			ranges;
+			compatible = "pinctrl-single";
+			reg = <0x0014029c 0x250>;
+			#address-cells = <1>;
+			#size-cells = <1>;
+			pinctrl-single,register-width = <32>;
+			pinctrl-single,function-mask = <0xf>;
+
+			pinctrl-single,gpio-range = <
+				&range 0  91 MODE_GPIO
+				&range 95 60 MODE_GPIO
+				>;
+			range: gpio-range {
+				#pinctrl-single,gpio-range-cells = <3>;
+			};
+
+			/* pinctrl functions */
+			tsio_pins: pinmux_gpio_14 {
+				pinctrl-single,pins = <
+					0x038 MODE_NITRO /* tsio_0 */
+					0x03c MODE_NITRO /* tsio_1 */
+				>;
+			};
+
+			nor_pins: pinmux_pnor_adv_n {
+				pinctrl-single,pins = <
+					0x0ac MODE_PNOR /* nand_ce1_n */
+					0x0b0 MODE_PNOR /* nand_ce0_n */
+					0x0b4 MODE_PNOR /* nand_we_n */
+					0x0b8 MODE_PNOR /* nand_wp_n */
+					0x0bc MODE_PNOR /* nand_re_n */
+					0x0c0 MODE_PNOR /* nand_rdy_bsy_n */
+					0x0c4 MODE_PNOR /* nand_io0_0 */
+					0x0c8 MODE_PNOR /* nand_io1_0 */
+					0x0cc MODE_PNOR /* nand_io2_0 */
+					0x0d0 MODE_PNOR /* nand_io3_0 */
+					0x0d4 MODE_PNOR /* nand_io4_0 */
+					0x0d8 MODE_PNOR /* nand_io5_0 */
+					0x0dc MODE_PNOR /* nand_io6_0 */
+					0x0e0 MODE_PNOR /* nand_io7_0 */
+					0x0e4 MODE_PNOR /* nand_io8_0 */
+					0x0e8 MODE_PNOR /* nand_io9_0 */
+					0x0ec MODE_PNOR /* nand_io10_0 */
+					0x0f0 MODE_PNOR /* nand_io11_0 */
+					0x0f4 MODE_PNOR /* nand_io12_0 */
+					0x0f8 MODE_PNOR /* nand_io13_0 */
+					0x0fc MODE_PNOR /* nand_io14_0 */
+					0x100 MODE_PNOR /* nand_io15_0 */
+					0x104 MODE_PNOR /* nand_ale_0 */
+					0x108 MODE_PNOR /* nand_cle_0 */
+					0x040 MODE_PNOR /* pnor_adv_n */
+					0x044 MODE_PNOR /* pnor_baa_n */
+					0x048 MODE_PNOR /* pnor_bls_0_n */
+					0x04c MODE_PNOR /* pnor_bls_1_n */
+					0x050 MODE_PNOR /* pnor_cre */
+					0x054 MODE_PNOR /* pnor_cs_2_n */
+					0x058 MODE_PNOR /* pnor_cs_1_n */
+					0x05c MODE_PNOR /* pnor_cs_0_n */
+					0x060 MODE_PNOR /* pnor_we_n */
+					0x064 MODE_PNOR /* pnor_oe_n */
+					0x068 MODE_PNOR /* pnor_intr */
+					0x06c MODE_PNOR /* pnor_dat_0 */
+					0x070 MODE_PNOR /* pnor_dat_1 */
+					0x074 MODE_PNOR /* pnor_dat_2 */
+					0x078 MODE_PNOR /* pnor_dat_3 */
+					0x07c MODE_PNOR /* pnor_dat_4 */
+					0x080 MODE_PNOR /* pnor_dat_5 */
+					0x084 MODE_PNOR /* pnor_dat_6 */
+					0x088 MODE_PNOR /* pnor_dat_7 */
+					0x08c MODE_PNOR /* pnor_dat_8 */
+					0x090 MODE_PNOR /* pnor_dat_9 */
+					0x094 MODE_PNOR /* pnor_dat_10 */
+					0x098 MODE_PNOR /* pnor_dat_11 */
+					0x09c MODE_PNOR /* pnor_dat_12 */
+					0x0a0 MODE_PNOR /* pnor_dat_13 */
+					0x0a4 MODE_PNOR /* pnor_dat_14 */
+					0x0a8 MODE_PNOR /* pnor_dat_15 */
+				>;
+			};
+
+			nand_pins: pinmux_nand_ce1_n {
+				pinctrl-single,pins = <
+					0x0ac MODE_NAND /* nand_ce1_n */
+					0x0b0 MODE_NAND /* nand_ce0_n */
+					0x0b4 MODE_NAND /* nand_we_n */
+					0x0b8 MODE_NAND /* nand_wp_n */
+					0x0bc MODE_NAND /* nand_re_n */
+					0x0c0 MODE_NAND /* nand_rdy_bsy_n */
+					0x0c4 MODE_NAND /* nand_io0_0 */
+					0x0c8 MODE_NAND /* nand_io1_0 */
+					0x0cc MODE_NAND /* nand_io2_0 */
+					0x0d0 MODE_NAND /* nand_io3_0 */
+					0x0d4 MODE_NAND /* nand_io4_0 */
+					0x0d8 MODE_NAND /* nand_io5_0 */
+					0x0dc MODE_NAND /* nand_io6_0 */
+					0x0e0 MODE_NAND /* nand_io7_0 */
+					0x0e4 MODE_NAND /* nand_io8_0 */
+					0x0e8 MODE_NAND /* nand_io9_0 */
+					0x0ec MODE_NAND /* nand_io10_0 */
+					0x0f0 MODE_NAND /* nand_io11_0 */
+					0x0f4 MODE_NAND /* nand_io12_0 */
+					0x0f8 MODE_NAND /* nand_io13_0 */
+					0x0fc MODE_NAND /* nand_io14_0 */
+					0x100 MODE_NAND /* nand_io15_0 */
+					0x104 MODE_NAND /* nand_ale_0 */
+					0x108 MODE_NAND /* nand_cle_0 */
+				>;
+			};
+
+			pwm0_pins: pinmux_pwm_0 {
+				pinctrl-single,pins = <
+					0x10c MODE_NITRO
+				>;
+			};
+
+			pwm1_pins: pinmux_pwm_1 {
+				pinctrl-single,pins = <
+					0x110 MODE_NITRO
+				>;
+			};
+
+			pwm2_pins: pinmux_pwm_2 {
+				pinctrl-single,pins = <
+					0x114 MODE_NITRO
+				>;
+			};
+
+			pwm3_pins: pinmux_pwm_3 {
+				pinctrl-single,pins = <
+					0x118 MODE_NITRO
+				>;
+			};
+
+			dbu_rxd_pins: pinmux_uart1_sin_nitro {
+				pinctrl-single,pins = <
+					0x11c MODE_NITRO /* dbu_rxd */
+					0x120 MODE_NITRO /* dbu_txd */
+				>;
+			};
+
+			uart1_pins: pinmux_uart1_sin_nand {
+				pinctrl-single,pins = <
+					0x11c MODE_NAND /* uart1_sin */
+					0x120 MODE_NAND /* uart1_out */
+				>;
+			};
+
+			uart2_pins: pinmux_uart2_sin {
+				pinctrl-single,pins = <
+					0x124 MODE_NITRO /* uart2_sin */
+					0x128 MODE_NITRO /* uart2_out */
+				>;
+			};
+
+			uart3_pins: pinmux_uart3_sin {
+				pinctrl-single,pins = <
+					0x12c MODE_NITRO /* uart3_sin */
+					0x130 MODE_NITRO /* uart3_out */
+				>;
+			};
+
+			i2s_pins: pinmux_i2s_bitclk {
+				pinctrl-single,pins = <
+					0x134 MODE_NITRO /* i2s_bitclk */
+					0x138 MODE_NITRO /* i2s_sdout */
+					0x13c MODE_NITRO /* i2s_sdin */
+					0x140 MODE_NITRO /* i2s_ws */
+					0x144 MODE_NITRO /* i2s_mclk */
+					0x148 MODE_NITRO /* i2s_spdif_out */
+				>;
+			};
+
+			qspi_pins: pinumx_qspi_hold_n {
+				pinctrl-single,pins = <
+					0x14c MODE_NAND /* qspi_hold_n */
+					0x150 MODE_NAND /* qspi_wp_n */
+					0x154 MODE_NAND /* qspi_sck */
+					0x158 MODE_NAND /* qspi_cs_n */
+					0x15c MODE_NAND /* qspi_mosi */
+					0x160 MODE_NAND /* qspi_miso */
+				>;
+			};
+
+			mdio_pins: pinumx_ext_mdio {
+				pinctrl-single,pins = <
+					0x164 MODE_NITRO /* ext_mdio */
+					0x168 MODE_NITRO /* ext_mdc */
+				>;
+			};
+
+			i2c0_pins: pinmux_i2c0_sda {
+				pinctrl-single,pins = <
+					0x16c MODE_NITRO /* i2c0_sda */
+					0x170 MODE_NITRO /* i2c0_scl */
+				>;
+			};
+
+			i2c1_pins: pinmux_i2c1_sda {
+				pinctrl-single,pins = <
+					0x174 MODE_NITRO /* i2c1_sda */
+					0x178 MODE_NITRO /* i2c1_scl */
+				>;
+			};
+
+			sdio0_pins: pinmux_sdio0_cd_l {
+				pinctrl-single,pins = <
+					0x17c MODE_NITRO /* sdio0_cd_l */
+					0x180 MODE_NITRO /* sdio0_clk_sdcard */
+					0x184 MODE_NITRO /* sdio0_data0 */
+					0x188 MODE_NITRO /* sdio0_data1 */
+					0x18c MODE_NITRO /* sdio0_data2 */
+					0x190 MODE_NITRO /* sdio0_data3 */
+					0x194 MODE_NITRO /* sdio0_data4 */
+					0x198 MODE_NITRO /* sdio0_data5 */
+					0x19c MODE_NITRO /* sdio0_data6 */
+					0x1a0 MODE_NITRO /* sdio0_data7 */
+					0x1a4 MODE_NITRO /* sdio0_cmd */
+					0x1a8 MODE_NITRO /* sdio0_emmc_rst_n */
+					0x1ac MODE_NITRO /* sdio0_led_on */
+					0x1b0 MODE_NITRO /* sdio0_wp */
+				>;
+			};
+
+			sdio1_pins: pinmux_sdio1_cd_l {
+				pinctrl-single,pins = <
+					0x1b4 MODE_NITRO /* sdio1_cd_l */
+					0x1b8 MODE_NITRO /* sdio1_clk_sdcard */
+					0x1bc MODE_NITRO /* sdio1_data0 */
+					0x1c0 MODE_NITRO /* sdio1_data1 */
+					0x1c4 MODE_NITRO /* sdio1_data2 */
+					0x1c8 MODE_NITRO /* sdio1_data3 */
+					0x1cc MODE_NITRO /* sdio1_data4 */
+					0x1d0 MODE_NITRO /* sdio1_data5 */
+					0x1d4 MODE_NITRO /* sdio1_data6 */
+					0x1d8 MODE_NITRO /* sdio1_data7 */
+					0x1dc MODE_NITRO /* sdio1_cmd */
+					0x1e0 MODE_NITRO /* sdio1_emmc_rst_n */
+					0x1e4 MODE_NITRO /* sdio1_led_on */
+					0x1e8 MODE_NITRO /* sdio1_wp */
+				>;
+			};
+
+			spi0_pins: pinmux_spi0_sck_nand {
+				pinctrl-single,pins = <
+					0x1ec MODE_NITRO /* spi0_sck */
+					0x1f0 MODE_NITRO /* spi0_rxd */
+					0x1f4 MODE_NITRO /* spi0_fss */
+					0x1f8 MODE_NITRO /* spi0_txd */
+				>;
+			};
+
+			spi1_pins: pinmux_spi1_sck_nand {
+				pinctrl-single,pins = <
+					0x1fc MODE_NITRO /* spi1_sck */
+					0x200 MODE_NITRO /* spi1_rxd */
+					0x204 MODE_NITRO /* spi1_fss */
+					0x208 MODE_NITRO /* spi1_txd */
+				>;
+			};
+
+			nuart_pins: pinmux_uart0_sin_nitro {
+				pinctrl-single,pins = <
+					0x20c MODE_NITRO /* nuart_rxd */
+					0x210 MODE_NITRO /* nuart_txd */
+				>;
+			};
+
+			uart0_pins: pinumux_uart0_sin_nand {
+				pinctrl-single,pins = <
+					0x20c MODE_NAND /* uart0_sin */
+					0x210 MODE_NAND /* uart0_out */
+					0x214 MODE_NAND /* uart0_rts */
+					0x218 MODE_NAND /* uart0_cts */
+					0x21c MODE_NAND /* uart0_dtr */
+					0x220 MODE_NAND /* uart0_dcd */
+					0x224 MODE_NAND /* uart0_dsr */
+					0x228 MODE_NAND /* uart0_ri */
+				>;
+			};
+
+			drdu2_pins: pinmux_drdu2_overcurrent {
+				pinctrl-single,pins = <
+					0x22c MODE_NITRO /* drdu2_overcurrent */
+					0x230 MODE_NITRO /* drdu2_vbus_ppc */
+					0x234 MODE_NITRO /* drdu2_vbus_present */
+					0x238 MODE_NITRO /* drdu2_id */
+				>;
+			};
+
+			drdu3_pins: pinmux_drdu3_overcurrent {
+				pinctrl-single,pins = <
+					0x23c MODE_NITRO /* drdu3_overcurrent */
+					0x240 MODE_NITRO /* drdu3_vbus_ppc */
+					0x244 MODE_NITRO /* drdu3_vbus_present */
+					0x248 MODE_NITRO /* drdu3_id */
+				>;
+			};
+
+			usb3h_pins: pinmux_usb3h_overcurrent {
+				pinctrl-single,pins = <
+					0x24c MODE_NITRO /* usb3h_overcurrent */
+					0x250 MODE_NITRO /* usb3h_vbus_ppc */
+				>;
+			};
+		};
diff --git a/arch/arm/dts/ns3.dtsi b/arch/arm/dts/ns3.dtsi
index 09098aac3a..a21455515d 100644
--- a/arch/arm/dts/ns3.dtsi
+++ b/arch/arm/dts/ns3.dtsi
@@ -23,6 +23,8 @@
 		#size-cells = <1>;
 		ranges = <0x0 0x0 0x68900000 0x17700000>;
 
+		#include "ns3-pinctrl.dtsi"
+
 		uart1: uart at 110000 {
 			compatible = "snps,dw-apb-uart";
 			reg = <0x00110000 0x1000>;
-- 
2.17.1

[PATCH v1 08/49] arm: dts: ns3: add gpio node

[Rayagonda Kokatanur]

Add IPROC GPIO node for NS3.

Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com>
---
 arch/arm/dts/ns3-board.dts |  1 +
 arch/arm/dts/ns3.dtsi      | 23 +++++++++++++++++++++++
 2 files changed, 24 insertions(+)

diff --git a/arch/arm/dts/ns3-board.dts b/arch/arm/dts/ns3-board.dts
index 54e56879a5..92699910cb 100644
--- a/arch/arm/dts/ns3-board.dts
+++ b/arch/arm/dts/ns3-board.dts
@@ -12,6 +12,7 @@
 
 	aliases {
 		serial0 = &uart1;
+		gpio0 = &gpio_hsls;
 	};
 
 	chosen {
diff --git a/arch/arm/dts/ns3.dtsi b/arch/arm/dts/ns3.dtsi
index a21455515d..84464add9a 100644
--- a/arch/arm/dts/ns3.dtsi
+++ b/arch/arm/dts/ns3.dtsi
@@ -32,5 +32,28 @@
 			clock-frequency = <25000000>;
 			status = "disabled";
 		};
+
+		gpio_hsls: gpio at d0000 {
+			compatible = "brcm,iproc-gpio";
+			reg = <0x000d0000 0x864>;
+			ngpios = <151>;
+			#gpio-cells = <2>;
+			gpio-controller;
+			gpio-ranges = <&pinmux 0 0 16>,
+					<&pinmux 16 71 2>,
+					<&pinmux 18 131 8>,
+					<&pinmux 26 83 6>,
+					<&pinmux 32 123 4>,
+					<&pinmux 36 43 24>,
+					<&pinmux 60 89 2>,
+					<&pinmux 62 73 4>,
+					<&pinmux 66 95 28>,
+					<&pinmux 94 127 4>,
+					<&pinmux 98 139 10>,
+					<&pinmux 108 16 27>,
+					<&pinmux 135 77 6>,
+					<&pinmux 141 67 4>,
+					<&pinmux 145 149 6>;
+		};
 	};
 };
-- 
2.17.1

[PATCH v1 09/49] gpio: do not include <asm/arch/gpio.h> on TARGET_BCMNS3

[Rayagonda Kokatanur]

As no gpio.h is defined for this architecture, to avoid
compilation failure, do not include <asm/arch/gpio.h> for
arch bcmns3.

Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com>
---
 arch/arm/include/asm/gpio.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/include/asm/gpio.h b/arch/arm/include/asm/gpio.h
index 333e407b66..c067eeb649 100644
--- a/arch/arm/include/asm/gpio.h
+++ b/arch/arm/include/asm/gpio.h
@@ -6,7 +6,7 @@
 	!defined(CONFIG_ARCH_LS1088A) && !defined(CONFIG_ARCH_ASPEED) && \
 	!defined(CONFIG_ARCH_LS1012A) && !defined(CONFIG_ARCH_LS1043A) && \
 	!defined(CONFIG_ARCH_LS1046A) && !defined(CONFIG_ARCH_U8500) && \
-	!defined(CONFIG_CORTINA_PLATFORM)
+	!defined(CONFIG_CORTINA_PLATFORM) && !defined(CONFIG_TARGET_BCMNS3)
 #include <asm/arch/gpio.h>
 #endif
 #include <asm-generic/gpio.h>
-- 
2.17.1

[PATCH v1 10/49] configs: ns3: enable BCM IPROC mmc driver

[Rayagonda Kokatanur]

Enable BCM IPROC mmc driver ns3.
Enable DMA for MMC Host to have better reads and writes.

Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com>
---
 configs/bcm_ns3_defconfig | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/configs/bcm_ns3_defconfig b/configs/bcm_ns3_defconfig
index 438e929b4b..f94e7426c7 100644
--- a/configs/bcm_ns3_defconfig
+++ b/configs/bcm_ns3_defconfig
@@ -19,6 +19,10 @@ CONFIG_DEFAULT_DEVICE_TREE="ns3-board"
 CONFIG_DM=y
 CONFIG_CLK=y
 CONFIG_CLK_CCF=y
+CONFIG_DM_MMC=y
+CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_SDMA=y
+CONFIG_MMC_SDHCI_IPROC=y
 CONFIG_PINCTRL=y
 CONFIG_PINCTRL_SINGLE=y
 CONFIG_DM_SERIAL=y
-- 
2.17.1

[PATCH v1 11/49] arm: dts: ns3: add emmc node

[Rayagonda Kokatanur]

From: Pramod Kumar <pramod.kumar@broadcom.com>

Add emmc dt nodes for ns3.

Signed-off-by: Pramod Kumar <pramod.kumar@broadcom.com>
Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com>
---
 arch/arm/dts/ns3-board.dts |  4 ++++
 arch/arm/dts/ns3.dtsi      | 18 ++++++++++++++++++
 2 files changed, 22 insertions(+)

diff --git a/arch/arm/dts/ns3-board.dts b/arch/arm/dts/ns3-board.dts
index 92699910cb..afce01de8a 100644
--- a/arch/arm/dts/ns3-board.dts
+++ b/arch/arm/dts/ns3-board.dts
@@ -23,3 +23,7 @@
 &uart1 {
 	status = "okay";
 };
+
+&sdio0 {
+	status = "okay";
+};
diff --git a/arch/arm/dts/ns3.dtsi b/arch/arm/dts/ns3.dtsi
index 84464add9a..7f94b922fc 100644
--- a/arch/arm/dts/ns3.dtsi
+++ b/arch/arm/dts/ns3.dtsi
@@ -33,6 +33,24 @@
 			status = "disabled";
 		};
 
+		sdio0: sdhci at 3f1000 {
+			compatible = "brcm,iproc-sdhci";
+			reg = <0x003f1000 0x100>;
+			bus-width = <8>;
+			clock-freq-min-max = <400000 200000000>;
+			index = <0>;
+			status = "disabled";
+		};
+
+		sdio1: sdhci at 3f2000 {
+			compatible = "brcm,iproc-sdhci";
+			reg = <0x003f2000 0x100>;
+			bus-width = <8>;
+			clock-freq-min-max = <400000 200000000>;
+			index = <1>;
+			status = "disabled";
+		};
+
 		gpio_hsls: gpio at d0000 {
 			compatible = "brcm,iproc-gpio";
 			reg = <0x000d0000 0x864>;
-- 
2.17.1

[PATCH v1 12/49] configs: ns3: enable mmc commands

[Rayagonda Kokatanur]

Enable mmc commands for NS3.

Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com>
---
 configs/bcm_ns3_defconfig | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/configs/bcm_ns3_defconfig b/configs/bcm_ns3_defconfig
index f94e7426c7..f8a20122ea 100644
--- a/configs/bcm_ns3_defconfig
+++ b/configs/bcm_ns3_defconfig
@@ -12,6 +12,8 @@ CONFIG_SUPPORT_RAW_INITRD=y
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PROMPT="u-boot> "
 CONFIG_SYS_XTRACE="n"
+CONFIG_CMD_MMC=y
+CONFIG_CMD_MMC_SWRITE=y
 # CONFIG_CMD_PINMUX is not set
 # CONFIG_CMD_SOURCE is not set
 CONFIG_OF_CONTROL=y
-- 
2.17.1

[PATCH v1 13/49] arm: dts: ns3: add qspi node

[Rayagonda Kokatanur]

Add QSPI node and qspi NOR flash node for NS3.

Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com>
---
 arch/arm/dts/ns3-board.dts | 16 ++++++++++++++++
 arch/arm/dts/ns3.dtsi      |  9 +++++++++
 2 files changed, 25 insertions(+)

diff --git a/arch/arm/dts/ns3-board.dts b/arch/arm/dts/ns3-board.dts
index afce01de8a..6565f90f22 100644
--- a/arch/arm/dts/ns3-board.dts
+++ b/arch/arm/dts/ns3-board.dts
@@ -12,6 +12,7 @@
 
 	aliases {
 		serial0 = &uart1;
+		spi0 = &qspi;
 		gpio0 = &gpio_hsls;
 	};
 
@@ -24,6 +25,21 @@
 	status = "okay";
 };
 
+&qspi {
+	#address-cells = <1>;
+	#size-cells = <0>;
+	status = "okay";
+	spi_nor_flash: spi_flash at 0 {
+		compatible = "jedec,spi-nor";
+		reg = <0>;
+		spi-max-frequency = <12500000>;
+		spi-cpol;
+		spi-cpha;
+		spi-tx-bus-width = <1>;
+		spi-rx-bus-width = <4>;
+	};
+};
+
 &sdio0 {
 	status = "okay";
 };
diff --git a/arch/arm/dts/ns3.dtsi b/arch/arm/dts/ns3.dtsi
index 7f94b922fc..7681bbc673 100644
--- a/arch/arm/dts/ns3.dtsi
+++ b/arch/arm/dts/ns3.dtsi
@@ -33,6 +33,15 @@
 			status = "disabled";
 		};
 
+		qspi: spi at 370000 {
+			compatible = "brcm,iproc-qspi";
+			reg = <0x00370000 0x100>,
+			      <0x00370100 0x100>,
+			      <0x00370200 0x200>;
+			reg-names = "bspi", "bspi_raf", "mspi";
+			status = "disabled";
+		};
+
 		sdio0: sdhci at 3f1000 {
 			compatible = "brcm,iproc-sdhci";
 			reg = <0x003f1000 0x100>;
-- 
2.17.1

[PATCH v1 14/49] dt-bindings: memory: ns3: add memory definitions

[Rayagonda Kokatanur]

Add NS3 memory definitions.

Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com>
---
 include/dt-bindings/memory/bcm-ns3-mc.h | 34 +++++++++++++++++++++++++
 1 file changed, 34 insertions(+)
 create mode 100644 include/dt-bindings/memory/bcm-ns3-mc.h

diff --git a/include/dt-bindings/memory/bcm-ns3-mc.h b/include/dt-bindings/memory/bcm-ns3-mc.h
new file mode 100644
index 0000000000..b4f78584a5
--- /dev/null
+++ b/include/dt-bindings/memory/bcm-ns3-mc.h
@@ -0,0 +1,34 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright (C) 2020 Broadcom
+ */
+
+#ifndef DT_BINDINGS_BCM_NS3_MC_H
+#define DT_BINDINGS_BCM_NS3_MC_H
+
+/*
+ * Reserved Memory Map : SHMEM & TZDRAM.
+ * +--------+----------+ 0x8D000000
+ * | SHMEM (NS)         | 16 MB
+ * +-------------------+ 0x8E000000
+ * |        | TEE_RAM(S)| 4MB
+ * + TZDRAM +----------+ 0x8E400000
+ * |        | TA_RAM(S) | 12MB
+ * +--------+----------+ 0x8F000000
+ * | BL31 + TMON + LPM  |
+ * | memory             | 1MB
+ * +-------------------+ 0x8F100000
+ */
+
+#define BCM_NS3_MEM_SHARE_START    0x8D000000
+#define BCM_NS3_MEM_SHARE_LEN      0x020FFFFF
+
+/* ATF/U-boot/Linux error logs */
+#define BCM_NS3_MEM_ELOG_START     0x8F113000
+#define BCM_NS3_MEM_ELOG_LEN       0x00100000
+
+/* CRMU Page table memroy */
+#define BCM_NS3_MEM_CRMU_PT_START  0x880000000
+#define BCM_NS3_MEM_CRMU_PT_LEN    0x200000
+
+#endif
-- 
2.17.1

[PATCH v1 15/49] arm: dts: ns3: add i2c node

[Rayagonda Kokatanur]

Add IPROC I2C node for NS3.

Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com>
---
 arch/arm/dts/ns3-board.dts | 1 +
 arch/arm/dts/ns3.dtsi      | 6 ++++++
 2 files changed, 7 insertions(+)

diff --git a/arch/arm/dts/ns3-board.dts b/arch/arm/dts/ns3-board.dts
index 6565f90f22..1155ff3ef1 100644
--- a/arch/arm/dts/ns3-board.dts
+++ b/arch/arm/dts/ns3-board.dts
@@ -13,6 +13,7 @@
 	aliases {
 		serial0 = &uart1;
 		spi0 = &qspi;
+		i2c0 = &i2c0;
 		gpio0 = &gpio_hsls;
 	};
 
diff --git a/arch/arm/dts/ns3.dtsi b/arch/arm/dts/ns3.dtsi
index 7681bbc673..adb1277471 100644
--- a/arch/arm/dts/ns3.dtsi
+++ b/arch/arm/dts/ns3.dtsi
@@ -60,6 +60,12 @@
 			status = "disabled";
 		};
 
+		i2c0:i2c at b0000 {
+			compatible = "brcm,iproc-i2c";
+			reg = <0xb0000 0x100>;
+			bus-frequency = <100000>;
+		};
+
 		gpio_hsls: gpio at d0000 {
 			compatible = "brcm,iproc-gpio";
 			reg = <0x000d0000 0x864>;
-- 
2.17.1

[PATCH v1 16/49] arm: dts: ns3: add PAXB PCIe host and phy node

[Rayagonda Kokatanur]

From: Srinath Mannam <srinath.mannam@broadcom.com>

Add PAXB PCIe host controller and phy node for NS3.

Signed-off-by: Srinath Mannam <srinath.mannam@broadcom.com>
Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com>
---
 arch/arm/dts/ns3-board.dts |  36 +++++++++
 arch/arm/dts/ns3.dtsi      | 158 +++++++++++++++++++++++++++++++++++++
 2 files changed, 194 insertions(+)

diff --git a/arch/arm/dts/ns3-board.dts b/arch/arm/dts/ns3-board.dts
index 1155ff3ef1..ce5012dc52 100644
--- a/arch/arm/dts/ns3-board.dts
+++ b/arch/arm/dts/ns3-board.dts
@@ -44,3 +44,39 @@
 &sdio0 {
 	status = "okay";
 };
+
+&pcie0 {
+	status = "okay";
+};
+
+&pcie1 {
+	status = "okay";
+};
+
+&pcie2 {
+	status = "okay";
+};
+
+&pcie3 {
+	status = "okay";
+};
+
+&pcie4 {
+	status = "okay";
+};
+
+&pcie5 {
+	status = "okay";
+};
+
+&pcie6 {
+	status = "okay";
+};
+
+&pcie7 {
+	status = "okay";
+};
+
+&pcie8 {
+	status = "okay";
+};
diff --git a/arch/arm/dts/ns3.dtsi b/arch/arm/dts/ns3.dtsi
index adb1277471..9fd59a855e 100644
--- a/arch/arm/dts/ns3.dtsi
+++ b/arch/arm/dts/ns3.dtsi
@@ -5,6 +5,11 @@
 
 #include "skeleton64.dtsi"
 
+#define PCIE_DMA_RANGES dma-ranges = < \
+	0x43000000 0x00 0x80000000 0x00 0x80000000 0x00 0x80000000 \
+	0x43000000 0x08 0x00000000 0x08 0x00000000 0x08 0x00000000 \
+	0x43000000 0x80 0x00000000 0x80 0x00000000 0x80 0x00000000>
+
 / {
 	compatible = "brcm,ns3";
 	#address-cells = <2>;
@@ -89,4 +94,157 @@
 					<&pinmux 145 149 6>;
 		};
 	};
+
+	pcie0: pcie at 48000000 {
+		compatible = "brcm,iproc-pcie-paxb-v2";
+		reg = <0 0x48000000 0 0x4000>;
+		bus-range = <0x0 0xff>;
+		#address-cells = <3>;
+		#size-cells = <2>;
+		device_type = "pci";
+		ranges = <0x83000000 0x0 0x42000000 0x0 0x42000000 0 0x2000000>,
+			<0x43000000 0x4 0x00000000 0x4 0x00000000 0 0x80000000>;
+		brcm,pcie-ob;
+		PCIE_DMA_RANGES;
+		phys = <&pcie_phy 0>;
+		phy-names = "pcie-phy";
+		status = "disabled";
+	};
+
+	pcie1: pcie at 48004000 {
+		compatible = "brcm,iproc-pcie-paxb-v2";
+		reg = <0 0x48004000 0 0x4000>;
+		bus-range = <0x0 0xff>;
+		#address-cells = <3>;
+		#size-cells = <2>;
+		device_type = "pci";
+		ranges = <0x83000000 0x0 0x44000000 0x0 0x44000000 0 0x2000000>,
+			<0x43000000 0x4 0x80000000 0x4 0x80000000 0 0x80000000>;
+		brcm,pcie-ob;
+		PCIE_DMA_RANGES;
+		phys = <&pcie_phy 1>;
+		phy-names = "pcie-phy";
+		status = "disabled";
+	};
+
+	pcie2: pcie at 48008000 {
+		compatible = "brcm,iproc-pcie-paxb-v2";
+		reg = <0 0x48008000 0 0x4000>;
+		bus-range = <0x0 0xff>;
+		#address-cells = <3>;
+		#size-cells = <2>;
+		device_type = "pci";
+		ranges = <0x83000000 0x0 0x4a000000 0x0 0x4a000000 0 0x2000000>,
+			<0x43000000 0x5 0x00000000 0x5 0x00000000 0 0x80000000>;
+		brcm,pcie-ob;
+		PCIE_DMA_RANGES;
+		phys = <&pcie_phy 2>;
+		phy-names = "pcie-phy";
+		status = "disabled";
+	};
+
+	pcie3: pcie at 4800c000 {
+		compatible = "brcm,iproc-pcie-paxb-v2";
+		reg = <0 0x4800c000 0 0x4000>;
+		bus-range = <0x0 0xff>;
+		#address-cells = <3>;
+		#size-cells = <2>;
+		device_type = "pci";
+		brcm,pcie-ob;
+		ranges = <0x83000000 0x0 0x4c000000 0x0 0x4c000000 0 0x2000000>,
+			<0x43000000 0x5 0x80000000 0x5 0x80000000 0 0x80000000>;
+		PCIE_DMA_RANGES;
+		phys = <&pcie_phy 3>;
+		phy-names = "pcie-phy";
+		status = "disabled";
+	};
+
+	pcie4: pcie at 48010000 {
+		compatible = "brcm,iproc-pcie-paxb-v2";
+		reg = <0 0x48010000 0 0x4000>;
+		bus-range = <0x0 0xff>;
+		#address-cells = <3>;
+		#size-cells = <2>;
+		device_type = "pci";
+		brcm,pcie-ob;
+		ranges = <0x83000000 0x0 0x52000000 0x0 0x52000000 0 0x2000000>,
+			<0x43000000 0x6 0x00000000 0x6 0x00000000 0 0x80000000>;
+		PCIE_DMA_RANGES;
+		phys = <&pcie_phy 4>;
+		phy-names = "pcie-phy";
+		status = "disabled";
+	};
+
+	pcie5: pcie at 48014000 {
+		compatible = "brcm,iproc-pcie-paxb-v2";
+		reg = <0 0x48014000 0 0x4000>;
+		bus-range = <0x0 0xff>;
+		#address-cells = <3>;
+		#size-cells = <2>;
+		device_type = "pci";
+		brcm,pcie-ob;
+		ranges = <0x83000000 0x0 0x54000000 0x0 0x54000000 0 0x2000000>,
+			<0x43000000 0x6 0x80000000 0x6 0x80000000 0 0x80000000>;
+		PCIE_DMA_RANGES;
+		phys = <&pcie_phy 5>;
+		phy-names = "pcie-phy";
+		status = "disabled";
+	};
+
+	pcie6: pcie at 48018000 {
+		compatible = "brcm,iproc-pcie-paxb-v2";
+		reg = <0 0x48018000 0 0x4000>;
+		bus-range = <0x0 0xff>;
+		#address-cells = <3>;
+		#size-cells = <2>;
+		device_type = "pci";
+		brcm,pcie-ob;
+		ranges = <0x83000000 0x0 0x5a000000 0x0 0x5a000000 0 0x2000000>,
+			<0x43000000 0x7 0x00000000 0x7 0x00000000 0 0x80000000>;
+		PCIE_DMA_RANGES;
+		phys = <&pcie_phy 6>;
+		phy-names = "pcie-phy";
+		status = "disabled";
+	};
+
+	pcie7: pcie at 4801c000 {
+		compatible = "brcm,iproc-pcie-paxb-v2";
+		reg = <0 0x4801c000 0 0x4000>;
+		bus-range = <0x0 0xff>;
+		#address-cells = <3>;
+		#size-cells = <2>;
+		device_type = "pci";
+		brcm,pcie-ob;
+		ranges = <0x83000000 0x0 0x5c000000 0x0 0x5c000000 0 0x2000000>,
+			<0x43000000 0x8 0x00000000 0x8 0x00000000 0 0x80000000>;
+		PCIE_DMA_RANGES;
+		phys = <&pcie_phy 7>;
+		phy-names = "pcie-phy";
+		status = "disabled";
+	};
+
+	pcie8: pcie at 60400000 {
+		compatible = "brcm,iproc-pcie-paxc-v2";
+		reg = <0 0x60400000 0 0x1000>;
+		bus-range = <0x0 0x1>;
+		#address-cells = <3>;
+		#size-cells = <2>;
+		device_type = "pci";
+		ranges = <0x83000000 0 0x10000000 0 0x10000000 0 0x20000000>;
+		status = "disabled";
+		pci at 0,0 {
+			compatible = "pci-bridge";
+			reg = <0x0000 0 0 0 0>;
+		};
+	};
+
+	pcie_phy: phy at 0 {
+		compatible = "brcm,sr-pcie-phy";
+		reg = <0 0x40000000 0 0x200>,
+		      <0 0x6641d000 0 0x100>;
+		reg-names = "reg_base", "cdru_base";
+		#address-cells = <3>;
+		#size-cells = <2>;
+		#phy-cells = <1>;
+	};
 };
-- 
2.17.1

[PATCH v1 17/49] configs: ns3: enable gpt commands

[Rayagonda Kokatanur]

Enable gpt commands for ns3.

Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com>
---
 configs/bcm_ns3_defconfig | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/configs/bcm_ns3_defconfig b/configs/bcm_ns3_defconfig
index f8a20122ea..3af8c91a4d 100644
--- a/configs/bcm_ns3_defconfig
+++ b/configs/bcm_ns3_defconfig
@@ -12,6 +12,8 @@ CONFIG_SUPPORT_RAW_INITRD=y
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PROMPT="u-boot> "
 CONFIG_SYS_XTRACE="n"
+CONFIG_CMD_GPT=y
+CONFIG_CMD_GPT_RENAME=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_MMC_SWRITE=y
 # CONFIG_CMD_PINMUX is not set
-- 
2.17.1

[PATCH v1 18/49] configs: ns3: enable EXT4 and FAT fs support

[Rayagonda Kokatanur]

Enable EXT4 and FAT fs support for ns3.

Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com>
---
 configs/bcm_ns3_defconfig | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/configs/bcm_ns3_defconfig b/configs/bcm_ns3_defconfig
index 3af8c91a4d..5ee5bea336 100644
--- a/configs/bcm_ns3_defconfig
+++ b/configs/bcm_ns3_defconfig
@@ -18,6 +18,10 @@ CONFIG_CMD_MMC=y
 CONFIG_CMD_MMC_SWRITE=y
 # CONFIG_CMD_PINMUX is not set
 # CONFIG_CMD_SOURCE is not set
+CONFIG_CMD_EXT4=y
+CONFIG_CMD_EXT4_WRITE=y
+CONFIG_CMD_FAT=y
+# CONFIG_DOS_PARTITION is not set
 CONFIG_OF_CONTROL=y
 CONFIG_DEFAULT_DEVICE_TREE="ns3-board"
 CONFIG_DM=y
@@ -31,3 +35,4 @@ CONFIG_PINCTRL=y
 CONFIG_PINCTRL_SINGLE=y
 CONFIG_DM_SERIAL=y
 CONFIG_SYS_NS16550=y
+CONFIG_FAT_WRITE=y
-- 
2.17.1

[PATCH v1 19/49] configs: ns3: enable sp805 watchdog driver

[Rayagonda Kokatanur]

Enable sp805 watchdog driver for ns3.

Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com>
---
 configs/bcm_ns3_defconfig | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/configs/bcm_ns3_defconfig b/configs/bcm_ns3_defconfig
index 5ee5bea336..a3ba55d163 100644
--- a/configs/bcm_ns3_defconfig
+++ b/configs/bcm_ns3_defconfig
@@ -36,3 +36,6 @@ CONFIG_PINCTRL_SINGLE=y
 CONFIG_DM_SERIAL=y
 CONFIG_SYS_NS16550=y
 CONFIG_FAT_WRITE=y
+# CONFIG_WATCHDOG is not set
+CONFIG_WDT=y
+CONFIG_WDT_SP805=y
-- 
2.17.1

[PATCH v1 20/49] arm: dts: ns3: add sp805 watchdog node

[Rayagonda Kokatanur]

From: Pramod Kumar <pramod.kumar@broadcom.com>

Add sp805 watchdog dts node for ns3.

Signed-off-by: Pramod Kumar <pramod.kumar@broadcom.com>
Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com>
---
 arch/arm/dts/ns3.dtsi | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/arch/arm/dts/ns3.dtsi b/arch/arm/dts/ns3.dtsi
index 9fd59a855e..6962e658d3 100644
--- a/arch/arm/dts/ns3.dtsi
+++ b/arch/arm/dts/ns3.dtsi
@@ -29,6 +29,14 @@
 		ranges = <0x0 0x0 0x68900000 0x17700000>;
 
 		#include "ns3-pinctrl.dtsi"
+		#include "ns3-clock.dtsi"
+
+		wdt0: watchdog at c0000 {
+			compatible = "arm,sp805-wdt";
+			reg = <0x000c0000 0x1000>;
+			timeout-sec = <60>;
+			clocks = <&hsls_25m_div2_clk>;
+		};
 
 		uart1: uart at 110000 {
 			compatible = "snps,dw-apb-uart";
-- 
2.17.1

[PATCH v1 21/49] board: ns3: start sp805 watchdog service

[Rayagonda Kokatanur]

Start sp805 watchdog service.

Parse wdt timeout from env and dts, give precedence to env
timeout if defined. Set default timeout to 60s if both env
and dts doesn't specifiy timeout.

Stop the WDT in board late init and start the
WDT service before giving control to Linux.

Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com>
Signed-off-by: Bharat Kumar Reddy Gooty <bharat.gooty@broadcom.com>
Signed-off-by: Pramod Kumar <pramod.kumar@broadcom.com>
---
 board/broadcom/bcmns3/ns3.c | 62 +++++++++++++++++++++++++++++++++++++
 1 file changed, 62 insertions(+)

diff --git a/board/broadcom/bcmns3/ns3.c b/board/broadcom/bcmns3/ns3.c
index 0b9af6ad9b..80f6a516e3 100644
--- a/board/broadcom/bcmns3/ns3.c
+++ b/board/broadcom/bcmns3/ns3.c
@@ -8,7 +8,10 @@
 #include <common.h>
 #include <asm/armv8/mmu.h>
 #include <asm/system.h>
+#include <dm/device.h>
+#include <dm/uclass.h>
 #include <fdtdec.h>
+#include <wdt.h>
 
 static struct mm_region ns3_mem_map[] = {
 	{
@@ -41,6 +44,13 @@ int board_init(void)
 
 int board_late_init(void)
 {
+#if CONFIG_IS_ENABLED(WDT)
+	/*
+	 * Default WDT service is started with 60 sec time out.
+	 * Disable it and start before giving control to Linux.
+	 */
+	wdt_stop(gd->watchdog_dev);
+#endif
 	return 0;
 }
 
@@ -63,3 +73,55 @@ void reset_cpu(ulong addr)
 {
 	psci_system_reset();
 }
+
+#ifdef CONFIG_OF_BOARD_SETUP
+#if CONFIG_IS_ENABLED(WDT)
+
+#ifndef CONFIG_WATCHDOG_TIMEOUT_MSECS
+#define CONFIG_WATCHDOG_TIMEOUT_MSECS	(60 * 1000)
+#endif
+#define DEF_TIMEOUT_SEC	(CONFIG_WATCHDOG_TIMEOUT_MSECS / 1000)
+
+static int start_wdt(void)
+{
+	u32 timeout = DEF_TIMEOUT_SEC;
+	struct udevice *udev;
+	int rc = 0;
+	u32 wdt_enable;
+
+	wdt_enable = env_get_ulong("wdt_enable", 16, 0);
+	printf("wdt_enable :%u\n", wdt_enable);
+	if (!wdt_enable)
+		return rc;
+
+	rc = uclass_get_device(UCLASS_WDT, 0, &udev);
+	if (rc) {
+		printf("Failed to get wdt rc:%d\n", rc);
+	} else {
+		timeout = env_get_ulong("wdt_timeout_sec", 10, 0);
+		if (!timeout) {
+			if (CONFIG_IS_ENABLED(OF_CONTROL))
+				timeout = dev_read_u32_default(gd->watchdog_dev,
+							       "timeout-sec",
+							       DEF_TIMEOUT_SEC);
+		}
+		wdt_start(udev, timeout * 1000, 0);
+		printf("Started wdt (%ds timeout)\n", timeout);
+	}
+
+	return rc;
+}
+#else
+static int start_wdt(void)
+{
+	return 0;
+}
+#endif /* CONFIG_WDT */
+
+int ft_board_setup(void *fdt, bd_t *bd)
+{
+	start_wdt();
+
+	return 0;
+}
+#endif /* CONFIG_OF_BOARD_SETUP */
-- 
2.17.1

[PATCH v1 22/49] board: ns3: add api to save boot parameters passed from BL31

[Rayagonda Kokatanur]

From: Abhishek Shah <abhishek.shah@broadcom.com>

Add API to save boot parameters passed from BL31

Use assembly implementation of save_boot_params instead of c function.
Because generally ATF does not set up SP_EL2 on exiting.
Thus, usage of a C function immediately after exiting with no stack
setup done by ATF explicitly, may cause SP_EL2 to be not sane,
which in turn causes a crash if this boot was not lucky to get
an SP_EL2 in valid range. Replace C implementation with assembly one
which does not use stack this early, and let u-boot to set up its stack
later.

Signed-off-by: Abhishek Shah <abhishek.shah@broadcom.com>
Signed-off-by: Rajesh Ravi <rajesh.ravi@broadcom.com>
Signed-off-by: Vladimir Olovyannikov <vladimir.olovyannikov@broadcom.com>
Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com>
---
 arch/arm/cpu/armv8/bcmns3/lowlevel.S         |  9 +++++++
 arch/arm/include/asm/arch-bcmns3/bl33_info.h | 26 ++++++++++++++++++++
 board/broadcom/bcmns3/ns3.c                  | 10 ++++++++
 3 files changed, 45 insertions(+)
 create mode 100644 arch/arm/include/asm/arch-bcmns3/bl33_info.h

diff --git a/arch/arm/cpu/armv8/bcmns3/lowlevel.S b/arch/arm/cpu/armv8/bcmns3/lowlevel.S
index 202286248e..9d8eb7f117 100644
--- a/arch/arm/cpu/armv8/bcmns3/lowlevel.S
+++ b/arch/arm/cpu/armv8/bcmns3/lowlevel.S
@@ -88,3 +88,12 @@ ENTRY(__asm_flush_l3_dcache)
 	mov	lr, x29
 	ret
 ENDPROC(__asm_flush_l3_dcache)
+
+ENTRY(save_boot_params)
+/*
+ * void set_boot_params(uint64_t x0, uint64_t x1, uint64_t x2, uint64_t x3)
+ */
+	adr	x4, bl33_info
+	str	x0, [x4]
+	b	save_boot_params_ret
+ENDPROC(save_boot_params)
diff --git a/arch/arm/include/asm/arch-bcmns3/bl33_info.h b/arch/arm/include/asm/arch-bcmns3/bl33_info.h
new file mode 100644
index 0000000000..bbc95b0186
--- /dev/null
+++ b/arch/arm/include/asm/arch-bcmns3/bl33_info.h
@@ -0,0 +1,26 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright 2020 Broadcom.
+ *
+ */
+
+#ifndef BL33_INFO_H
+#define BL33_INFO_H
+#include <asm/io.h>
+
+/* Increase version number each time this file is modified */
+#define BL33_INFO_VERSION	1
+
+struct chip_info {
+	unsigned int chip_id;
+	unsigned int rev_id;
+};
+
+struct bl33_info {
+	unsigned int version;
+	struct chip_info chip;
+};
+
+extern struct bl33_info *bl33_info;
+
+#endif
diff --git a/board/broadcom/bcmns3/ns3.c b/board/broadcom/bcmns3/ns3.c
index 80f6a516e3..fa98ed18cd 100644
--- a/board/broadcom/bcmns3/ns3.c
+++ b/board/broadcom/bcmns3/ns3.c
@@ -4,6 +4,7 @@
  *
  */
 
+#include <asm/arch-bcmns3/bl33_info.h>
 #include <asm/io.h>
 #include <common.h>
 #include <asm/armv8/mmu.h>
@@ -37,8 +38,17 @@ struct mm_region *mem_map = ns3_mem_map;
 
 DECLARE_GLOBAL_DATA_PTR;
 
+/*
+ * Force the bl33_info to the data-section, as .bss will not be valid
+ * when save_boot_params is invoked.
+ */
+struct bl33_info *bl33_info __section(".data");
+
 int board_init(void)
 {
+	if (bl33_info->version != BL33_INFO_VERSION)
+		printf("*** warning: ATF BL31 and u-boot not in sync! ***\n");
+
 	return 0;
 }
 
-- 
2.17.1

[PATCH v1 23/49] board: ns3: default reset type to L3

[Rayagonda Kokatanur]

From: Rajesh Ravi <rajesh.ravi@broadcom.com>

Default "reset" from u-boot to L3 reset.
"reset" command with argument will trigger L1 reset.

Signed-off-by: Rajesh Ravi <rajesh.ravi@broadcom.com>
Signed-off-by: Bharat Kumar Reddy Gooty <bharat.gooty@broadcom.com>
Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com>
---
 board/broadcom/bcmns3/ns3.c | 20 ++++++++++++++++++--
 1 file changed, 18 insertions(+), 2 deletions(-)

diff --git a/board/broadcom/bcmns3/ns3.c b/board/broadcom/bcmns3/ns3.c
index fa98ed18cd..ae4da977b6 100644
--- a/board/broadcom/bcmns3/ns3.c
+++ b/board/broadcom/bcmns3/ns3.c
@@ -79,9 +79,25 @@ int dram_init_banksize(void)
 	return 0;
 }
 
-void reset_cpu(ulong addr)
+void reset_cpu(ulong level)
 {
-	psci_system_reset();
+#define L3_RESET 30
+	u32 reset_level, strap_val;
+
+	/* Default reset type is L3 reset */
+	if (!level) {
+		/*
+		 * Encoding: u-boot reset command expects decimal argument
+		 * strap val = 1st decimal digit;reset level = 2nd decimal digit
+		 */
+		strap_val = L3_RESET % 10;
+		level = L3_RESET / 10;
+		reset_level = level % 10;
+		psci_system_reset2(reset_level, strap_val);
+	} else {
+		/* U-boot cmd "reset" with any arg will trigger L1 reset */
+		psci_system_reset();
+	}
 }
 
 #ifdef CONFIG_OF_BOARD_SETUP
-- 
2.17.1

[PATCH v1 24/49] dt-bindings: memory: ns3: update GIC LPI address

[Rayagonda Kokatanur]

Update NS3 GIC LPI address.

Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com>
---
 include/dt-bindings/memory/bcm-ns3-mc.h | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/include/dt-bindings/memory/bcm-ns3-mc.h b/include/dt-bindings/memory/bcm-ns3-mc.h
index b4f78584a5..d6e7717ba2 100644
--- a/include/dt-bindings/memory/bcm-ns3-mc.h
+++ b/include/dt-bindings/memory/bcm-ns3-mc.h
@@ -31,4 +31,7 @@
 #define BCM_NS3_MEM_CRMU_PT_START  0x880000000
 #define BCM_NS3_MEM_CRMU_PT_LEN    0x200000
 
+#define BCM_NS3_GIC_LPI_BASE      0x8AD70000
+#define BCM_NS3_GIC_LPI_SIZE      0x90000
+
 #endif
-- 
2.17.1

[PATCH v1 25/49] board: ns3: program GIC LPI tables

[Rayagonda Kokatanur]

From: Bharat Kumar Reddy Gooty <bharat.gooty@broadcom.com>

U-boot programs the GIC LPI configuration tables and enables
the LPI table.

Signed-off-by: Bharat Kumar Reddy Gooty <bharat.gooty@broadcom.com>
Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com>
---
 board/broadcom/bcmns3/ns3.c | 4 ++++
 include/configs/bcm_ns3.h   | 6 ++++++
 2 files changed, 10 insertions(+)

diff --git a/board/broadcom/bcmns3/ns3.c b/board/broadcom/bcmns3/ns3.c
index ae4da977b6..7d0a63f370 100644
--- a/board/broadcom/bcmns3/ns3.c
+++ b/board/broadcom/bcmns3/ns3.c
@@ -8,9 +8,12 @@
 #include <asm/io.h>
 #include <common.h>
 #include <asm/armv8/mmu.h>
+#include <asm/gic.h>
+#include <asm/gic-v3.h>
 #include <asm/system.h>
 #include <dm/device.h>
 #include <dm/uclass.h>
+#include <dt-bindings/memory/bcm-ns3-mc.h>
 #include <fdtdec.h>
 #include <wdt.h>
 
@@ -146,6 +149,7 @@ static int start_wdt(void)
 
 int ft_board_setup(void *fdt, bd_t *bd)
 {
+	gic_lpi_tables_init(BCM_NS3_GIC_LPI_BASE, MAX_GIC_REDISTRIBUTORS);
 	start_wdt();
 
 	return 0;
diff --git a/include/configs/bcm_ns3.h b/include/configs/bcm_ns3.h
index 02a736456a..a17b9d51c0 100644
--- a/include/configs/bcm_ns3.h
+++ b/include/configs/bcm_ns3.h
@@ -37,4 +37,10 @@
 #define CONFIG_SYS_MAXARGS		64
 #define CONFIG_SYS_BARGSIZE		CONFIG_SYS_CBSIZE
 
+/* Generic Interrupt Controller Definitions */
+#define GICD_BASE			0x63C00000
+#define GICR_BASE			0x63E00000
+/* Number of GIC re-distributors */
+#define MAX_GIC_REDISTRIBUTORS		8
+
 #endif /* __BCM_NS3_H */
-- 
2.17.1

[PATCH v1 26/49] configs: ns3: enable GIC ITS LPI table programing

[Rayagonda Kokatanur]

Enables the GIC_V3 ITS LPI configuration table and
LPI table.

Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com>
Signed-off-by: Bharat Kumar Reddy Gooty <bharat.gooty@broadcom.com>
---
 configs/bcm_ns3_defconfig | 1 +
 1 file changed, 1 insertion(+)

diff --git a/configs/bcm_ns3_defconfig b/configs/bcm_ns3_defconfig
index a3ba55d163..209b98083e 100644
--- a/configs/bcm_ns3_defconfig
+++ b/configs/bcm_ns3_defconfig
@@ -1,4 +1,5 @@
 CONFIG_ARM=y
+CONFIG_GIC_V3_ITS=y
 CONFIG_TARGET_BCMNS3=y
 CONFIG_SYS_TEXT_BASE=0xFF000000
 CONFIG_ENV_SIZE=0x80000
-- 
2.17.1

[PATCH v1 27/49] dt-bindings: memory: ns3: add ddr memory definition

[Rayagonda Kokatanur]

Add ddr memory definitions.

Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com>
---
 include/dt-bindings/memory/bcm-ns3-mc.h | 30 ++++++++++++++++++++++++-
 1 file changed, 29 insertions(+), 1 deletion(-)

diff --git a/include/dt-bindings/memory/bcm-ns3-mc.h b/include/dt-bindings/memory/bcm-ns3-mc.h
index d6e7717ba2..d04b842d19 100644
--- a/include/dt-bindings/memory/bcm-ns3-mc.h
+++ b/include/dt-bindings/memory/bcm-ns3-mc.h
@@ -7,7 +7,8 @@
 #define DT_BINDINGS_BCM_NS3_MC_H
 
 /*
- * Reserved Memory Map : SHMEM & TZDRAM.
+ * +--------+----------+ 0x8B000000
+ * | NITRO CRASH DUMP  |  32MB
  * +--------+----------+ 0x8D000000
  * | SHMEM (NS)         | 16 MB
  * +-------------------+ 0x8E000000
@@ -20,6 +21,10 @@
  * +-------------------+ 0x8F100000
  */
 
+#define BCM_NS3_MEM_NITRO_CRASH_START  0x8AE00000
+#define BCM_NS3_MEM_NITRO_CRASH_LEN    0x21fffff
+#define BCM_NS3_MEM_NITRO_CRASH_SIZE   0x2200000
+
 #define BCM_NS3_MEM_SHARE_START    0x8D000000
 #define BCM_NS3_MEM_SHARE_LEN      0x020FFFFF
 
@@ -31,7 +36,30 @@
 #define BCM_NS3_MEM_CRMU_PT_START  0x880000000
 #define BCM_NS3_MEM_CRMU_PT_LEN    0x200000
 
+/* default memory starting address and length */
+#define BCM_NS3_MEM_START          0x80000000UL
+#define BCM_NS3_MEM_LEN            0x80000000UL
+#define BCM_NS3_MEM_END            (BCM_NS3_MEM_START + BCM_NS3_MEM_LEN)
+
+/* memory starting address and length for BANK_1 */
+#define BCM_NS3_BANK_1_MEM_START   0x880000000UL
+#define BCM_NS3_BANK_1_MEM_LEN     0x180000000UL
+
+/* memory layout information */
+#define BCM_NS3_DDR_INFO_BASE      0x8F220000
+#define BCM_NS3_DDR_INFO_RSVD_LEN  0x1000
+#define BCM_NS3_DDR_INFO_LEN       73
+#define BCM_NS3_DDR_INFO_SIG       0x42434d44
+#define BCM_NS3_MAX_NR_BANKS       4
+
 #define BCM_NS3_GIC_LPI_BASE      0x8AD70000
 #define BCM_NS3_GIC_LPI_SIZE      0x90000
 
+#define BCM_NS3_MEM_RSVE_START    BCM_NS3_GIC_LPI_BASE
+#define BCM_NS3_MEM_RSVE_END      ((BCM_NS3_MEM_ELOG_START + \
+				   BCM_NS3_MEM_ELOG_LEN) - \
+				   BCM_NS3_MEM_RSVE_START)
+
+#define BCM_NS3_CRMU_PGT_START    0x880000000UL
+#define BCM_NS3_CRMU_PGT_SIZE     0x100000
 #endif
-- 
2.17.1

[PATCH v1 28/49] board: ns3: define ddr memory layout

[Rayagonda Kokatanur]

From: Ray Jui <ray.jui@broadcom.com>

Add both DRAM banks memory information and
the corresponding MMU page table mappings.

Signed-off-by: Bharat Kumar Reddy Gooty <bharat.gooty@broadcom.com>
Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com>
---
 arch/arm/dts/ns3-board.dts  | 23 ++++++++++
 board/broadcom/bcmns3/ns3.c | 84 +++++++++++++++++++++++++++++++++++--
 configs/bcm_ns3_defconfig   |  2 +
 3 files changed, 106 insertions(+), 3 deletions(-)

diff --git a/arch/arm/dts/ns3-board.dts b/arch/arm/dts/ns3-board.dts
index ce5012dc52..460ed39132 100644
--- a/arch/arm/dts/ns3-board.dts
+++ b/arch/arm/dts/ns3-board.dts
@@ -5,6 +5,29 @@
 
 /dts-v1/;
 
+#include <dt-bindings/memory/bcm-ns3-mc.h>
+
+/*
+ * Single mem reserve region which includes the following:
+ * Components name	Start Addr	Size
+ * ------------------------------------------------
+ * GIC LPI tables	0x8AD7_0000	0x0009_0000
+ * Nitro FW		0x8AE0_0000	0x0020_0000
+ * Nitro Crash dump	0x8B00_0000	0x0200_0000
+ * OPTEE OS		0x8D00_0000	0x0200_0000
+ * BL31 services	0x8F00_0000	0x0010_0000
+ * Tmon			0x8F10_0000	0x0000_1000
+ * LPM/reserved		0x8F10_1000	0x0000_1000
+ * ATF to Bl33 info	0x8F10_2000	0x0000_1000
+ * ATF error logs	0x8F10_3000	0x0001_0000
+ * Error log parser	0x8F11_3000	0x0010_0000
+ */
+
+/memreserve/ BCM_NS3_MEM_RSVE_START BCM_NS3_MEM_RSVE_END;
+
+/* CRMU page tables */
+/memreserve/ BCM_NS3_CRMU_PGT_START BCM_NS3_CRMU_PGT_SIZE;
+
 #include "ns3.dtsi"
 
 / {
diff --git a/board/broadcom/bcmns3/ns3.c b/board/broadcom/bcmns3/ns3.c
index 7d0a63f370..c4e36a61d2 100644
--- a/board/broadcom/bcmns3/ns3.c
+++ b/board/broadcom/bcmns3/ns3.c
@@ -15,8 +15,11 @@
 #include <dm/uclass.h>
 #include <dt-bindings/memory/bcm-ns3-mc.h>
 #include <fdtdec.h>
+#include <fdt_support.h>
 #include <wdt.h>
 
+#define BANK_OFFSET(bank)      ((u64)BCM_NS3_DDR_INFO_BASE + 8 + ((bank) * 16))
+
 static struct mm_region ns3_mem_map[] = {
 	{
 		.virt = 0x0UL,
@@ -26,9 +29,15 @@ static struct mm_region ns3_mem_map[] = {
 			 PTE_BLOCK_NON_SHARE |
 			 PTE_BLOCK_PXN | PTE_BLOCK_UXN
 	}, {
-		.virt = 0x80000000UL,
-		.phys = 0x80000000UL,
-		.size = 0x80000000UL,
+		.virt = BCM_NS3_MEM_START,
+		.phys = BCM_NS3_MEM_START,
+		.size = BCM_NS3_MEM_LEN,
+		.attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
+			 PTE_BLOCK_INNER_SHARE
+	}, {
+		.virt = BCM_NS3_BANK_1_MEM_START,
+		.phys = BCM_NS3_BANK_1_MEM_START,
+		.size = BCM_NS3_BANK_1_MEM_LEN,
 		.attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
 			 PTE_BLOCK_INNER_SHARE
 	}, {
@@ -47,6 +56,72 @@ DECLARE_GLOBAL_DATA_PTR;
  */
 struct bl33_info *bl33_info __section(".data");
 
+/*
+ * Run modulo 256 checksum calculation and return the calculated checksum
+ */
+static u8 checksum_calc(u8 *p, unsigned int len)
+{
+	unsigned int i;
+	u8 chksum = 0;
+
+	for (i = 0; i < len; i++)
+		chksum += p[i];
+
+	return chksum;
+}
+
+/*
+ * This function parses the memory layout informaion from a reserved area in
+ * DDR, and then fix up the FDT before passing it to Linux.
+ *
+ * In the case of error, do nothing and the default memory layout in DT will
+ * be used
+ */
+static void mem_info_parse_fixup(void *fdt)
+{
+	u32 *p32, sig, i, nr_banks;
+	u64 *p64;
+	u64 start[BCM_NS3_MAX_NR_BANKS];
+	u64 len[BCM_NS3_MAX_NR_BANKS];
+
+	/* validate signature */
+	p32 = (u32 *)BCM_NS3_DDR_INFO_BASE;
+	sig = *p32;
+	if (sig != BCM_NS3_DDR_INFO_SIG) {
+		printf("DDR info signature 0x%x invalid\n", sig);
+		return;
+	}
+
+	/* run checksum test to validate data  */
+	if (checksum_calc((u8 *)p32, BCM_NS3_DDR_INFO_LEN) != 0) {
+		printf("Checksum on DDR info failed\n");
+		return;
+	}
+
+	/* parse information for each bank */
+	nr_banks = 0;
+	for (i = 0; i < BCM_NS3_MAX_NR_BANKS; i++) {
+		/* skip banks with a length of zero */
+		p64 = (u64 *)BANK_OFFSET(i);
+		if (*(p64 + 1) == 0)
+			continue;
+
+		start[i] = *p64;
+		len[i] = *(p64 + 1);
+
+		printf("mem[%u] 0x%llx - 0x%llx\n", i, start[i],
+		       start[i] + len[i] - 1);
+		nr_banks++;
+	}
+
+	if (!nr_banks) {
+		printf("No DDR banks detected\n");
+		return;
+	}
+
+	fdt_fixup_memory_banks(fdt, start, len, nr_banks);
+}
+
 int board_init(void)
 {
 	if (bl33_info->version != BL33_INFO_VERSION)
@@ -150,6 +225,9 @@ static int start_wdt(void)
 int ft_board_setup(void *fdt, bd_t *bd)
 {
 	gic_lpi_tables_init(BCM_NS3_GIC_LPI_BASE, MAX_GIC_REDISTRIBUTORS);
+
+	mem_info_parse_fixup(fdt);
+
 	start_wdt();
 
 	return 0;
diff --git a/configs/bcm_ns3_defconfig b/configs/bcm_ns3_defconfig
index 209b98083e..a72a147179 100644
--- a/configs/bcm_ns3_defconfig
+++ b/configs/bcm_ns3_defconfig
@@ -4,6 +4,7 @@ CONFIG_TARGET_BCMNS3=y
 CONFIG_SYS_TEXT_BASE=0xFF000000
 CONFIG_ENV_SIZE=0x80000
 CONFIG_NR_DRAM_BANKS=2
+CONFIG_OF_BOARD_SETUP=y
 CONFIG_LOGLEVEL=7
 CONFIG_SILENT_CONSOLE=y
 CONFIG_SILENT_U_BOOT_ONLY=y
@@ -40,3 +41,4 @@ CONFIG_FAT_WRITE=y
 # CONFIG_WATCHDOG is not set
 CONFIG_WDT=y
 CONFIG_WDT_SP805=y
+CONFIG_SPL_OF_LIBFDT=y
-- 
2.17.1

[PATCH v1 29/49] board: ns3: limit U-boot relocation within 16MB memory

[Rayagonda Kokatanur]

From: Bharat Kumar Reddy Gooty <bharat.gooty@broadcom.com>

By default re-location happens to higher address of DDR,
i.e, DDR start + DDR size.

Limit re-location to happen within 16MB memory,
start 0xFF00_0000 and end 0x1_0000_0000

Signed-off-by: Bharat Kumar Reddy Gooty <bharat.gooty@broadcom.com>
Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com>
---
 board/broadcom/bcmns3/ns3.c | 22 +++++++++++++++++++---
 1 file changed, 19 insertions(+), 3 deletions(-)

diff --git a/board/broadcom/bcmns3/ns3.c b/board/broadcom/bcmns3/ns3.c
index c4e36a61d2..e8f1d1b199 100644
--- a/board/broadcom/bcmns3/ns3.c
+++ b/board/broadcom/bcmns3/ns3.c
@@ -124,6 +124,11 @@ static void mem_info_parse_fixup(void *fdt)
 
 int board_init(void)
 {
+	/* Setup memory using "memory" node from DTB */
+	if (fdtdec_setup_mem_size_base() != 0)
+		return -EINVAL;
+	fdtdec_setup_memory_banksize();
+
 	if (bl33_info->version != BL33_INFO_VERSION)
 		printf("*** warning: ATF BL31 and u-boot not in sync! ***\n");
 
@@ -144,19 +149,30 @@ int board_late_init(void)
 
 int dram_init(void)
 {
-	if (fdtdec_setup_mem_size_base() != 0)
-		return -EINVAL;
+	/*
+	 * Mark ram base as the last 16MB of 2GB DDR, which is 0xFF00_0000.
+	 * So that relocation happens with in the last 16MB memory.
+	 */
+	gd->ram_base = (phys_size_t)(BCM_NS3_MEM_END - SZ_16M);
+	gd->ram_size = (unsigned long)SZ_16M;
 
 	return 0;
 }
 
 int dram_init_banksize(void)
 {
-	fdtdec_setup_memory_banksize();
+	gd->bd->bi_dram[0].start = (BCM_NS3_MEM_END - SZ_16M);
+	gd->bd->bi_dram[0].size = SZ_16M;
 
 	return 0;
 }
 
+/* Limit RAM used by U-Boot to the DDR first bank End region */
+ulong board_get_usable_ram_top(ulong total_size)
+{
+	return BCM_NS3_MEM_END;
+}
+
 void reset_cpu(ulong level)
 {
 #define L3_RESET 30
-- 
2.17.1

[PATCH v1 30/49] configs: ns3: enable FIT config

[Rayagonda Kokatanur]

Enable FIT config for NS3.

Also increase FIT_SIGNATURE_MAX_SIZE to 512MB

When FIT image has initramfs, total fit image size is greater
than 256MB. Increasing the Fit signature max size to 512MB.

Images are loaded at 0x9000_0000 for Image hash validation.
So increasing the FIT signature size to 512MB, the end address
is 0xB000_0000, whihc will not overlap with any binaries.

Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com>
---
 configs/bcm_ns3_defconfig | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/configs/bcm_ns3_defconfig b/configs/bcm_ns3_defconfig
index a72a147179..d6d52d1880 100644
--- a/configs/bcm_ns3_defconfig
+++ b/configs/bcm_ns3_defconfig
@@ -5,6 +5,11 @@ CONFIG_SYS_TEXT_BASE=0xFF000000
 CONFIG_ENV_SIZE=0x80000
 CONFIG_NR_DRAM_BANKS=2
 CONFIG_OF_BOARD_SETUP=y
+CONFIG_FIT=y
+CONFIG_FIT_SIGNATURE=y
+CONFIG_FIT_SIGNATURE_MAX_SIZE=0x20000000
+CONFIG_FIT_VERBOSE=y
+CONFIG_LEGACY_IMAGE_FORMAT=y
 CONFIG_LOGLEVEL=7
 CONFIG_SILENT_CONSOLE=y
 CONFIG_SILENT_U_BOOT_ONLY=y
-- 
2.17.1

[PATCH v1 31/49] board: ns3: add FIT image its file

[Rayagonda Kokatanur]

From: Pramod Kumar <pramod.kumar@broadcom.com>

Add FIT image its file.

Signed-off-by: Pramod Kumar <pramod.kumar@broadcom.com>
Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com>
---
 board/broadcom/bcmns3/fit/multi.its | 59 +++++++++++++++++++++++++++++
 1 file changed, 59 insertions(+)
 create mode 100644 board/broadcom/bcmns3/fit/multi.its

diff --git a/board/broadcom/bcmns3/fit/multi.its b/board/broadcom/bcmns3/fit/multi.its
new file mode 100644
index 0000000000..a0ff4bc908
--- /dev/null
+++ b/board/broadcom/bcmns3/fit/multi.its
@@ -0,0 +1,59 @@
+/*
+ * U-Boot uImage source file with multiple kernels, ramdisks and FDT blobs
+ */
+
+/dts-v1/;
+
+/ {
+	description = "Various kernels, ramdisks and FDT blobs";
+	#address-cells = <1>;
+
+	images {
+		kernel {
+			description = "Linux kernel Image";
+			data = /incbin/("./Image");
+			type = "kernel";
+			arch = "arm64";
+			os = "linux";
+			compression = "none";
+			load = <0x80080000>;
+			entry = <0x80080000>;
+			hash-1 {
+				algo = "sha1";
+			};
+			signature {
+				algo = "sha1,rsa2048";
+				key-name-hint = "dev";
+			};
+		};
+
+		fdt-ns3 {
+			description = "FDT Blob";
+			data = /incbin/("./dt-blob.bin");
+			type = "flat_dt";
+			arch = "arm64";
+			compression = "none";
+			hash-1 {
+				algo = "sha1";
+			};
+			signature {
+				algo = "sha1,rsa2048";
+				key-name-hint = "dev";
+			};
+		};
+	};
+
+	configurations {
+		default = "config-ns3";
+		config-ns3 {
+			description = "FIT1 configuration";
+			kernel = "kernel";
+			fdt = "fdt-ns3";
+			signature {
+				algo = "sha1,rsa2048";
+				key-name-hint = "dev";
+				sign-images = "fdt", "kernel";
+			};
+		};
+	};
+};
-- 
2.17.1

[PATCH v1 32/49] board: ns3: add development keys used in FIT

[Rayagonda Kokatanur]

From: Pramod Kumar <pramod.kumar@broadcom.com>

Add development keys used in FIT.

Signed-off-by: Pramod Kumar <pramod.kumar@broadcom.com>
Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com>
---
 board/broadcom/bcmns3/fit/keys/dev.crt | 21 +++++++++++++++++++
 board/broadcom/bcmns3/fit/keys/dev.key | 28 ++++++++++++++++++++++++++
 2 files changed, 49 insertions(+)
 create mode 100644 board/broadcom/bcmns3/fit/keys/dev.crt
 create mode 100644 board/broadcom/bcmns3/fit/keys/dev.key

diff --git a/board/broadcom/bcmns3/fit/keys/dev.crt b/board/broadcom/bcmns3/fit/keys/dev.crt
new file mode 100644
index 0000000000..75b75db95c
--- /dev/null
+++ b/board/broadcom/bcmns3/fit/keys/dev.crt
@@ -0,0 +1,21 @@
+-----BEGIN CERTIFICATE-----
+MIIDXTCCAkWgAwIBAgIJAJgq/5aiJttEMA0GCSqGSIb3DQEBCwUAMEUxCzAJBgNV
+BAYTAkFVMRMwEQYDVQQIDApTb21lLVN0YXRlMSEwHwYDVQQKDBhJbnRlcm5ldCBX
+aWRnaXRzIFB0eSBMdGQwHhcNMTgwOTE5MDkzMzEwWhcNMTgxMDE5MDkzMzEwWjBF
+MQswCQYDVQQGEwJBVTETMBEGA1UECAwKU29tZS1TdGF0ZTEhMB8GA1UECgwYSW50
+ZXJuZXQgV2lkZ2l0cyBQdHkgTHRkMIIBIjANBgkqhkiG9w0BAQEFAAOCAQ8AMIIB
+CgKCAQEAzeMQ92YqrejtMCfxjDyHvDW34ATozXSlWsudR+AyCSuJVAIoHEenVh+/
+PuT0+/EMiwsUnLXYBeOsIXDW3k3eHgm88ccb+0g9J6mlHqMaN0tXP+Ua2GFEk2Wv
+5Bj5QynorOPoaWL/ecWus2Bvkmyt2pvIpaTjmkUKZ9al3z8WyS6wFlFitXyOWFcK
+7Xkl43cOHxYAfbny5loWYDCgpkV+dgYZOoCEmL+Y9HfrQ+uBKGducpzNKeQjX9bn
+UT9cleCtHZx0uY4wSGNgfmUMy7oUyVZhFpmjlcfjcfNFcBcoVF6StluoL6v1KRbH
+4xJDD/UCn2Uk0S6Zpd7TRc26faOtfwIDAQABo1AwTjAdBgNVHQ4EFgQUZk/KKaWG
+p4BtksPdQ8FLzWL/gAIwHwYDVR0jBBgwFoAUZk/KKaWGp4BtksPdQ8FLzWL/gAIw
+DAYDVR0TBAUwAwEB/zANBgkqhkiG9w0BAQsFAAOCAQEAPNveTvOC2bw91cUN1e+B
+95qFp2Xd5XGiV35F10dT3VN/Iv2dzHlThq7xaJGkA53lHIXgLUUfnDTHJmoluw+t
+UCpG8OWCxM0FbT8ZnXR4SmHK8k4yb7iZa7iu+Ey5B6F3247gJpEl+1iYxus0lqQW
+E9dTwMf1YP9Jdf+dRoLKAAI0n5J1PMuseQkGdlRBNUcEg+kXqBSz5hq0xkuPRtey
+GiAvpg3G93ft84Q4ov7IjAhJkY7whm6WktisU8mFPru3e9EouxjVtAvu6s9gQThm
+pvn6hSL2/3gEOP3v9yBsH6//SOgNdVBGZIdX+HkvD8NZLftbIrDaeL/IfKUm/zXB
+zA==
+-----END CERTIFICATE-----
diff --git a/board/broadcom/bcmns3/fit/keys/dev.key b/board/broadcom/bcmns3/fit/keys/dev.key
new file mode 100644
index 0000000000..55b7033e9f
--- /dev/null
+++ b/board/broadcom/bcmns3/fit/keys/dev.key
@@ -0,0 +1,28 @@
+-----BEGIN PRIVATE KEY-----
+MIIEvwIBADANBgkqhkiG9w0BAQEFAASCBKkwggSlAgEAAoIBAQDN4xD3Ziqt6O0w
+J/GMPIe8NbfgBOjNdKVay51H4DIJK4lUAigcR6dWH78+5PT78QyLCxSctdgF46wh
+cNbeTd4eCbzxxxv7SD0nqaUeoxo3S1c/5RrYYUSTZa/kGPlDKeis4+hpYv95xa6z
+YG+SbK3am8ilpOOaRQpn1qXfPxbJLrAWUWK1fI5YVwrteSXjdw4fFgB9ufLmWhZg
+MKCmRX52Bhk6gISYv5j0d+tD64EoZ25ynM0p5CNf1udRP1yV4K0dnHS5jjBIY2B+
+ZQzLuhTJVmEWmaOVx+Nx80VwFyhUXpK2W6gvq/UpFsfjEkMP9QKfZSTRLpml3tNF
+zbp9o61/AgMBAAECggEBAJ/TZClZk0ob5nyalWVS29/cJ5hs1zgfE/nu1HKmdNEv
+jdS8M9z4Nsuhq3msjQ1Da4RInsCkXUT9H3N6QCKkeggBcT6TXYJs6qRuijLFVKWW
+A+4i8PsGTxDJQIimZmGgF/KWnaWp5z7lmZ+//fzCBxgMFO+Zl+H7NH+1XmB2fj6/
+bfgnxLbiIqq/2oVJfdjA1Zs2ie3SE5U2hPNiE6TIajFS0PxUOGrojsSQ8z+gfqs3
+hyqo9msAqNQciT79vyXp+3HsxZo9rq5Tk5OtCEfgu0GED/d4/FHbDrZT3TorVYXr
+Z3dADxvnnJfBdlQIMetCy/X8z2vKRRXaoWpqg1aiFVECgYEA7Ap5D4nvOie2NXgI
+gMPzuYtpH4uF/cZMLGxTKZ3NG4RH6oVUdd4whETXfzBJdnJbIXDTphoHxjUhpGh8
+Ga+U1iqjp9c6Nd8ueVp/c5T1bD8/2RG0QM4iWgPbZDKtj1MqRg7vwAfpJ3kOIc/5
+bKJ4jAopNJMChL6vAZ9+ShPsRqkCgYEA30vbj6K7/giclJnyWkluQTqS8X/XjdAf
+F5PkCBHGJnYxkDSzWPq7O5E1wYqTAou1U6nNNoUvZZdpRvo39NSrMCaagQ7GE+xA
+j/h7tinD/lPlvoW9N4f4ddqWzsmf7I8OGZtP4IwVi9Pms+zPtrQ7TvuPT4UHTH2E
+eE1hlJtic+cCgYEA6oKdNGr+WvEJfqX7DLOiej2f+89LGI7jL1+QYFB/b09FhCNj
+fpd57G/ZCmyXEC8di2PlY6mI/8vZ2NZWNc7UONO0NRUIqG1MZxUae2MLUrikXq3Q
+QHKMfpJGbo5LEZK29VPxrwAtDSKgf8d5MA1bZwbRWYKVhf1NMnebqU2R+cECgYEA
+kOTKXhP85MR1xj928XtAnfcCLs8D8jOgWU5P46SU7ZQ4aRipYA2ivO5m8WWYK0i4
+qsc+MCiQLt3nJHVtJeNyCdai3yfVBEyDQGi+7d+AHGIYbF6f/46tfNwQi7JtobTa
+M2eCl3SO7qLbytjZl/avnXrC7Zimuc2gzed4cFO7uPUCgYAo66MLtRWLdHqPDTaa
+WhSQZkdKfZxlWNP6XIpBgHnYDIQGZddrjv+zZVFRxLCduh1v8xybbSDKwRkGuXVb
+eTQHP2Nc5XsOopCSsDP0v0dUxaOu14C0jJJG2E+EhJsWJ2Eua7o40LEIX2WY7N7f
+UqR3bLO5Qh/1OOwJj5WbpzkMwA==
+-----END PRIVATE KEY-----
-- 
2.17.1

[PATCH v1 33/49] configs: ns3: enable PXE boot command

[Rayagonda Kokatanur]

This config enables pxe get and pxe boot commands.
'pxe get' command loads configuration file at given RAM offset.
'pxe boot' command interprets this config file and boots Linux.

Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com>
---
 configs/bcm_ns3_defconfig | 1 +
 1 file changed, 1 insertion(+)

diff --git a/configs/bcm_ns3_defconfig b/configs/bcm_ns3_defconfig
index d6d52d1880..43aeac3e82 100644
--- a/configs/bcm_ns3_defconfig
+++ b/configs/bcm_ns3_defconfig
@@ -25,6 +25,7 @@ CONFIG_CMD_MMC=y
 CONFIG_CMD_MMC_SWRITE=y
 # CONFIG_CMD_PINMUX is not set
 # CONFIG_CMD_SOURCE is not set
+CONFIG_CMD_PXE=y
 CONFIG_CMD_EXT4=y
 CONFIG_CMD_EXT4_WRITE=y
 CONFIG_CMD_FAT=y
-- 
2.17.1

[PATCH v1 34/49] configs: ns3: enable RPMB

[Rayagonda Kokatanur]

Enable RPMB feature and corresponding mmc rpmb commands

Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com>
---
 configs/bcm_ns3_defconfig | 1 +
 1 file changed, 1 insertion(+)

diff --git a/configs/bcm_ns3_defconfig b/configs/bcm_ns3_defconfig
index 43aeac3e82..1f565f3ad2 100644
--- a/configs/bcm_ns3_defconfig
+++ b/configs/bcm_ns3_defconfig
@@ -36,6 +36,7 @@ CONFIG_DM=y
 CONFIG_CLK=y
 CONFIG_CLK_CCF=y
 CONFIG_DM_MMC=y
+CONFIG_SUPPORT_EMMC_RPMB=y
 CONFIG_MMC_SDHCI=y
 CONFIG_MMC_SDHCI_SDMA=y
 CONFIG_MMC_SDHCI_IPROC=y
-- 
2.17.1

[PATCH v1 35/49] board: ns3: add optee based bnxt fw load driver

[Rayagonda Kokatanur]

From: Vikas Gupta <vikas.gupta@broadcom.com>

Add optee based bnxt fw load driver.

Signed-off-by: Vikas Gupta <vikas.gupta@broadcom.com>
Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com>
---
 board/broadcom/bcmns3/Kconfig       |   5 +
 board/broadcom/bcmns3/Makefile      |   1 +
 board/broadcom/bcmns3/chimp_optee.c | 154 ++++++++++++++++++++++++++++
 include/brcm/chimp.h                |  40 ++++++++
 4 files changed, 200 insertions(+)
 create mode 100644 board/broadcom/bcmns3/chimp_optee.c
 create mode 100644 include/brcm/chimp.h

diff --git a/board/broadcom/bcmns3/Kconfig b/board/broadcom/bcmns3/Kconfig
index 8ce21f980d..84daad9415 100644
--- a/board/broadcom/bcmns3/Kconfig
+++ b/board/broadcom/bcmns3/Kconfig
@@ -12,4 +12,9 @@ config SYS_SOC
 config SYS_CONFIG_NAME
 	default "bcm_ns3"
 
+config CHIMP_OPTEE
+	bool "Enable secure ChiMP firmware loading"
+	depends on OPTEE
+	default y
+
 endif
diff --git a/board/broadcom/bcmns3/Makefile b/board/broadcom/bcmns3/Makefile
index 3404260148..08e1d7203b 100644
--- a/board/broadcom/bcmns3/Makefile
+++ b/board/broadcom/bcmns3/Makefile
@@ -3,3 +3,4 @@
 # Copyright 2020 Broadcom.
 
 obj-y	:= ns3.o
+obj-$(CONFIG_CHIMP_OPTEE) += chimp_optee.o
diff --git a/board/broadcom/bcmns3/chimp_optee.c b/board/broadcom/bcmns3/chimp_optee.c
new file mode 100644
index 0000000000..edbb7afd91
--- /dev/null
+++ b/board/broadcom/bcmns3/chimp_optee.c
@@ -0,0 +1,154 @@
+// SPDX-License-Identifier: BSD-2-Clause
+/*
+ * Copyright 2020 Broadcom.
+ */
+
+#include <brcm/chimp.h>
+#include <common.h>
+#include <tee.h>
+
+#define CHMIP_BOOT_UUID { 0x6272636D, 0x2019, 0x0716, \
+		   { 0x42, 0x43, 0x4D, 0x5F, 0x53, 0x43, 0x48, 0x49 } }
+
+enum {
+	TEE_CHIMP_FASTBOOT = 0,
+	TEE_CHIMP_HEALTH_STATUS,
+	TEE_CHIMP_HANDSHAKE_STATUS,
+} tee_chmip_cmd;
+
+struct bcm_chimp_data {
+	struct udevice *tee;
+	u32 session;
+} chimp_data;
+
+static int get_open_session(struct bcm_chimp_data *b_data)
+{
+	struct udevice *tee = NULL;
+
+	while (!b_data->tee) {
+		const struct tee_optee_ta_uuid uuid = CHMIP_BOOT_UUID;
+		struct tee_open_session_arg arg;
+		int rc;
+
+		tee = tee_find_device(tee, NULL, NULL, NULL);
+		if (!tee)
+			return -ENODEV;
+
+		memset(&arg, 0, sizeof(arg));
+		tee_optee_ta_uuid_to_octets(arg.uuid, &uuid);
+		rc = tee_open_session(tee, &arg, 0, NULL);
+		if (!rc) {
+			b_data->tee = tee;
+			b_data->session = arg.session;
+		}
+	}
+
+	return 0;
+}
+
+int chimp_handshake_status_optee(u32 timeout, u32 *hs)
+{
+	struct tee_invoke_arg arg;
+	struct tee_param param[1];
+	int ret;
+
+	if (get_open_session(&chimp_data))
+		return BCM_CHIMP_FAILURE;
+
+	memset(&arg, 0, sizeof(arg));
+	arg.func = TEE_CHIMP_HANDSHAKE_STATUS;
+	arg.session = chimp_data.session;
+
+	param[0].attr = TEE_PARAM_ATTR_TYPE_VALUE_INOUT;
+	param[0].u.value.a = timeout;
+
+	if (tee_invoke_func(chimp_data.tee, &arg,
+			    ARRAY_SIZE(param), param)) {
+		printf("Handshake status command failed\n");
+		ret = BCM_CHIMP_FAILURE;
+		goto out;
+	}
+	switch (arg.ret) {
+	case TEE_SUCCESS:
+		*hs = param[0].u.value.a;
+		ret =  BCM_CHIMP_SUCCESS;
+		break;
+	default:
+		ret = BCM_CHIMP_FAILURE;
+		break;
+	}
+out:
+	tee_close_session(chimp_data.tee, chimp_data.session);
+	chimp_data.tee = NULL;
+
+	return ret;
+}
+
+int chimp_health_status_optee(u32 *health)
+{
+	struct tee_invoke_arg arg;
+	struct tee_param param[1];
+	int ret;
+
+	if (get_open_session(&chimp_data))
+		return BCM_CHIMP_FAILURE;
+
+	memset(&arg, 0, sizeof(arg));
+	arg.func = TEE_CHIMP_HEALTH_STATUS;
+	arg.session = chimp_data.session;
+
+	param[0].attr = TEE_PARAM_ATTR_TYPE_VALUE_OUTPUT;
+
+	if (tee_invoke_func(chimp_data.tee, &arg,
+			    ARRAY_SIZE(param), param)) {
+		printf("Helath status command failed\n");
+		ret =  BCM_CHIMP_FAILURE;
+		goto out;
+	}
+	switch (arg.ret) {
+	case TEE_SUCCESS:
+		*health = param[0].u.value.a;
+		ret =  BCM_CHIMP_SUCCESS;
+		break;
+	default:
+		ret = BCM_CHIMP_FAILURE;
+		break;
+	}
+out:
+	tee_close_session(chimp_data.tee, chimp_data.session);
+	chimp_data.tee = NULL;
+
+	return ret;
+}
+
+int chimp_fastboot_optee(void)
+{
+	struct tee_invoke_arg arg;
+	int ret;
+
+	if (get_open_session(&chimp_data))
+		return BCM_CHIMP_FAILURE;
+
+	memset(&arg, 0, sizeof(arg));
+	arg.func = TEE_CHIMP_FASTBOOT;
+	arg.session = chimp_data.session;
+
+	if (tee_invoke_func(chimp_data.tee, &arg, 0, NULL)) {
+		printf("Chimp boot_fail\n");
+		ret =  BCM_CHIMP_FAILURE;
+		goto out;
+	}
+	switch (arg.ret) {
+	case TEE_SUCCESS:
+		ret = BCM_CHIMP_SUCCESS;
+		break;
+	default:
+		ret = BCM_CHIMP_FAILURE;
+		break;
+	}
+out:
+	tee_close_session(chimp_data.tee, chimp_data.session);
+	chimp_data.tee = NULL;
+
+	return ret;
+}
diff --git a/include/brcm/chimp.h b/include/brcm/chimp.h
new file mode 100644
index 0000000000..c3d4594c4b
--- /dev/null
+++ b/include/brcm/chimp.h
@@ -0,0 +1,40 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright 2020 Broadcom.
+ *
+ */
+
+#ifndef __CHIMP_H__
+#define __CHIMP_H__
+
+#include <common.h>
+#include <linux/compiler.h>
+
+#define BCM_CHIMP_SUCCESS	0
+#define BCM_CHIMP_FAILURE	(!BCM_CHIMP_SUCCESS)
+
+#ifdef CONFIG_CHIMP_OPTEE
+int chimp_fastboot_optee(void);
+int chimp_health_status_optee(u32 *status);
+int chimp_handshake_status_optee(u32 timeout, u32 *hstatus);
+#else
+static inline int chimp_handshake_status_optee(u32 timeout, u32 *status)
+{
+	printf("ChiMP handshake status fail (OPTEE not enabled)\n");
+	return BCM_CHIMP_FAILURE;
+}
+
+static inline int chimp_health_status_optee(u32 *status)
+{
+	printf("ChiMP health status fail (OPTEE not enabled)\n");
+	return BCM_CHIMP_FAILURE;
+}
+
+static inline int chimp_fastboot_optee(void)
+{
+	printf("ChiMP secure boot fail (OPTEE not enabled)\n");
+	return BCM_CHIMP_FAILURE;
+}
+#endif
+
+#endif
-- 
2.17.1

[PATCH v1 36/49] configs: ns3: enable tee and optee driver

[Rayagonda Kokatanur]

Enable tee and optee drivers.

Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com>
---
 configs/bcm_ns3_defconfig | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/configs/bcm_ns3_defconfig b/configs/bcm_ns3_defconfig
index 1f565f3ad2..c6e7992b3a 100644
--- a/configs/bcm_ns3_defconfig
+++ b/configs/bcm_ns3_defconfig
@@ -45,6 +45,9 @@ CONFIG_PINCTRL_SINGLE=y
 CONFIG_DM_SERIAL=y
 CONFIG_SYS_NS16550=y
 CONFIG_FAT_WRITE=y
+CONFIG_TEE=y
+CONFIG_OPTEE=y
+# CONFIG_OPTEE_TA_AVB is not set
 # CONFIG_WATCHDOG is not set
 CONFIG_WDT=y
 CONFIG_WDT_SP805=y
-- 
2.17.1

[PATCH v1 37/49] arm: dts: ns3: add optee node

[Rayagonda Kokatanur]

From: Vikas Gupta <vikas.gupta@broadcom.com>

Add support for optee

Signed-off-by: Vikas Gupta <vikas.gupta@broadcom.com>
Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com>
---
 arch/arm/dts/ns3.dtsi | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/arch/arm/dts/ns3.dtsi b/arch/arm/dts/ns3.dtsi
index 6962e658d3..509818e23e 100644
--- a/arch/arm/dts/ns3.dtsi
+++ b/arch/arm/dts/ns3.dtsi
@@ -21,6 +21,13 @@
 			<0x8 0x80000000 0x1 0x80000000>;
 	};
 
+	firmware {
+		optee {
+			compatible = "linaro,optee-tz";
+			method = "smc";
+		};
+	};
+
 	hsls {
 		compatible = "simple-bus";
 		dma-ranges;
-- 
2.17.1

[PATCH v1 38/49] board: ns3: add generic MCU IPC command send API

[Rayagonda Kokatanur]

From: Trac Hoang <trac.hoang@broadcom.com>

Add a generic CRMU IPC command send driver so that
u-boot can access MCU services.

Signed-off-by: Trac Hoang <trac.hoang@broadcom.com>
Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com>
---
 board/broadcom/bcmns3/Makefile  |  1 +
 board/broadcom/bcmns3/mcu_cmd.c | 49 +++++++++++++++++++++++++++++++++
 board/broadcom/bcmns3/mcu_cmd.h | 13 +++++++++
 3 files changed, 63 insertions(+)
 create mode 100644 board/broadcom/bcmns3/mcu_cmd.c
 create mode 100644 board/broadcom/bcmns3/mcu_cmd.h

diff --git a/board/broadcom/bcmns3/Makefile b/board/broadcom/bcmns3/Makefile
index 08e1d7203b..f62da01701 100644
--- a/board/broadcom/bcmns3/Makefile
+++ b/board/broadcom/bcmns3/Makefile
@@ -3,4 +3,5 @@
 # Copyright 2020 Broadcom.
 
 obj-y	:= ns3.o
+obj-y	+= mcu_cmd.o
 obj-$(CONFIG_CHIMP_OPTEE) += chimp_optee.o
diff --git a/board/broadcom/bcmns3/mcu_cmd.c b/board/broadcom/bcmns3/mcu_cmd.c
new file mode 100644
index 0000000000..aff41c3a19
--- /dev/null
+++ b/board/broadcom/bcmns3/mcu_cmd.c
@@ -0,0 +1,49 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright 2020 Broadcom.
+ *
+ */
+
+#include <common.h>
+#include <asm/io.h>
+#include <linux/delay.h>
+
+#include "mcu_cmd.h"
+
+#define MCU_MAILBOX_0 0x66424024
+#define MCU_MAILBOX_1 0x66424028
+
+#define MCU_IPC_CMD_DONE_MASK 0x80000000
+#define MCU_IPC_CMD_REPLY_MASK 0x3fff0000
+#define MCU_IPC_CMD_REPLY_SHIFT 16
+
+int send_crmu_cmd(u32 cmd, u32 param, u32 timeout_msec)
+{
+	u32 val;
+	int ret = CMD_RET_FAILURE;
+
+	writel(cmd, MCU_MAILBOX_0);
+	writel(param, MCU_MAILBOX_1);
+
+	do {
+		mdelay(1);
+		val = readl(MCU_MAILBOX_0);
+		if (val & MCU_IPC_CMD_DONE_MASK) {
+			ret = CMD_RET_SUCCESS;
+			break;
+		}
+
+	} while (timeout_msec--);
+
+	if (ret == CMD_RET_FAILURE) {
+		pr_err("CRMU cmd timeout!\n");
+		return ret;
+	}
+
+	/* Obtain status */
+	val = (val & MCU_IPC_CMD_REPLY_MASK) >> MCU_IPC_CMD_REPLY_SHIFT;
+	if (val)
+		ret = CMD_RET_FAILURE;
+
+	return ret;
+}
diff --git a/board/broadcom/bcmns3/mcu_cmd.h b/board/broadcom/bcmns3/mcu_cmd.h
new file mode 100644
index 0000000000..82f0821248
--- /dev/null
+++ b/board/broadcom/bcmns3/mcu_cmd.h
@@ -0,0 +1,13 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright 2019 Broadcom
+ */
+
+#ifndef __MCU_CMD_H__
+#define __MCU_CMD_H__
+
+#define MCU_CMD_DEFAULT_TIMEOUT_MS 10
+
+int send_crmu_cmd(u32 cmd, u32 param, u32 timeout_msec);
+
+#endif /* __MCU_CMD_H__ */
-- 
2.17.1

[PATCH v1 39/49] include/configs: ns3: add env variables for Linux boot

[Rayagonda Kokatanur]

From: Bharat Gooty <bharat.gooty@broadcom.com>

Add env variables and commands for booting Linux.

Signed-off-by: Bharat Gooty <bharat.gooty@broadcom.com>
Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com>
---
 include/configs/bcm_ns3.h | 366 ++++++++++++++++++++++++++++++++++++++
 1 file changed, 366 insertions(+)

diff --git a/include/configs/bcm_ns3.h b/include/configs/bcm_ns3.h
index a17b9d51c0..5e135ec319 100644
--- a/include/configs/bcm_ns3.h
+++ b/include/configs/bcm_ns3.h
@@ -43,4 +43,370 @@
 /* Number of GIC re-distributors */
 #define MAX_GIC_REDISTRIBUTORS		8
 
+/*
+ * Increase max uncompressed/gunzip size, keeping size same as EMMC linux
+ * partition.
+ */
+#define CONFIG_SYS_BOOTM_LEN		0x01800000
+
+/* Env configuration */
+#define CONFIG_SYS_MMC_ENV_DEV		0
+#define CONFIG_SYS_MMC_ENV_PART		0
+
+/* Access eMMC Boot_1 and Boot_2 partitions */
+#define CONFIG_SUPPORT_EMMC_BOOT
+
+/* enable 64-bit PCI resources */
+#define CONFIG_SYS_PCI_64BIT		1
+
+#define CONSOLE_ARGS "console_args=console=ttyS0,115200n8\0"
+#define MAX_CPUS "max_cpus=maxcpus=8\0"
+#define OS_LOG_LEVEL "log_level=loglevel=7\0"
+#define EXTRA_ARGS "extra_args=earlycon=uart8250,mmio32,0x68A10000 " \
+		   "earlyelog=" __stringify(ELOG_AP_UART_LOG_BASE) ",0x10000 " \
+		   "crashkernel=512M reboot=w\0"
+
+#define PCIE_ARGS "pcie_args=pci=pcie_bus_safe pcie_ports=native vfio_pci.disable_idle_d3=1\0"
+
+#ifdef CONFIG_BCM_SF2_ETH
+#define ETH_ADDR "ethaddr=00:0A:F7:95:65:A4\0"
+#define NET_ARGS "bgmac_platform.ethaddr=${ethaddr} " \
+	"ip=${ipaddr}::${gatewayip}:${netmask}::${ethif}:off"
+#else
+#define ETH_ADDR
+#define NET_ARGS
+#endif
+
+#define RESERVED_MEM "reserved_mem=memmap=0xff000000$0x1000000\0"
+
+#define BASE_ARGS "${console_args} ${extra_args} ${pcie_args}" \
+		  " ${max_cpus}  ${log_level} ${reserved_mem}"
+#define SETBOOTARGS "setbootargs=setenv bootargs " BASE_ARGS " " NET_ARGS "\0"
+
+#define UPDATEME_FLASH_PARAMS "bcm_compat_level=4\0" \
+			      "bcm_need_recovery_rootfs=0\0" \
+			      "bcm_bl_flash_pending_rfs_imgs=0\0"
+
+#define KERNEL_LOADADDR_CFG \
+	"fit_image_loadaddr=0x90000000\0" \
+	"dtb_loadaddr=0x82000000\0"
+
+#define INITRD_ARGS "initrd_args=root=/dev/ram rw\0"
+#define INITRD_LOADADDR "initrd_loadaddr=0x92000000\0"
+#define INITRD_IMAGE "initrd_image=rootfs-lake-bcm958742t.cpio.gz\0"
+#define MMC_DEV "sd_device_number=0\0"
+#define EXEC_STATE "exec_state=normal\0"
+
+#define EXT4RD_ARGS "ext4rd_args="\
+	"root=/dev/mmcblk${sd_device_number}p${gpt_partition_entry} rw rootwait\0"
+
+#define WDT_CNTRL "wdt_enable=1\0" \
+		  "wdt_timeout_sec=0\0"
+
+#define ELOG_SETUP \
+	"mbox0_addr=0x66424024\0"\
+	"elog_setup="\
+	"if logsetup -s ${mbox0_addr}; then "\
+	"else "\
+		"echo ELOG is not supported by this version of the MCU patch.;"\
+		"exit;"\
+	"fi;"\
+	"if logsetup -c ${mbox0_addr}; then "\
+		"echo ELOG is ready;"\
+	"else "\
+		"echo ELOG is supported, but is not set up.;"\
+		"echo Getting setup file from the server ${serverip}...;"\
+		"if tftp ${tftp_dir}elog_src.txt; then "\
+			"echo Setting up ELOG. Please wait...;"\
+			"if logsetup ${loadaddr} ${mbox0_addr} ${filesize}; "\
+				"then "\
+			"else "\
+				"echo [logsetup] ERROR.;"\
+			"fi;"\
+			"if logsetup -c ${mbox0_addr}; then "\
+				"echo ELOG is READY.;"\
+			"else "\
+				"echo ELOG is NOT SET UP.;"\
+			"fi;"\
+		"else "\
+			"echo ELOG setup file is not available on the server.;"\
+		"fi;"\
+	"fi \0"
+
+/* eMMC partition for FIT images */
+#define FIT_MMC_PARTITION \
+	"fit_partitions=" \
+	"uuid_disk=${uuid_gpt_disk};" \
+	"name=env,size=512K,uuid=${uuid_gpt_env};" \
+	"name=Image_rsa.img,size=24MiB,uuid=${uuid_gpt_linux};" \
+	"name=Image1_rsa.img,size=24MiB,uuid=${uuid_gpt_linux1};" \
+	"name=Image2_rsa.img,size=24MiB,uuid=${uuid_gpt_linux2};" \
+	"name=nitro,size=8MiB,uuid=${uuid_gpt_nitro};" \
+	"name=recovery,size=940MiB,uuid=${uuid_gpt_recovery};" \
+	"name=rootfs,size=-,uuid=${uuid_gpt_prootfs}\0"
+
+/*         QSPI layout
+ * |---------------------------|->0x000000
+ * |                           |
+ * |                           |
+ * |        fip.bin            |
+ * |         2MB               |
+ * |                           |
+ * ~                           ~
+ * ~                           ~
+ * |                           |
+ * |                           |
+ * |                           |
+ * |---------------------------|->0x200000
+ * |                           |
+ * |                           |
+ * |                           |
+ * |       fip.bin (Mirror)    |
+ * |        2MB                |
+ * ~                           ~
+ * ~                           ~
+ * |                           |
+ * |                           |
+ * |                           |
+ * |---------------------------|->0x400000
+ * |       Nitro_itb           |
+ * |           +               |
+ * |      Nitro NS3 Config     |
+ * |           +               |
+ * |      Nitro NS3Z Config    |
+ * |          1.5M             |
+ * |                           |
+ * ~                           ~
+ * ~                           ~
+ * |                           |
+ * |---------------------------|->0x580000
+ * |        Nitro_itb          |
+ * |           +               |
+ * |      Nitro NS3 Config     |
+ * |           +               |
+ * |      Nitro NS3Z Config    |
+ * |          1.5M             |
+ * |        (Mirror)           |
+ * ~                           ~
+ * ~                           ~
+ * |                           |
+ * |---------------------------|->0x700000
+ * |   Nitro NS3 bspd Config   |
+ * |        64KB               |
+ * ~                           ~
+ * ~                           ~
+ * |                           |
+ * |---------------------------|->0x710000
+ * |   Nitro NS3 bspd Config   |
+ * |        64KB               |
+ * ~       (Mirror)            ~
+ * ~                           ~
+ * |                           |
+ * |---------------------------|->0x720000
+ * |        SHMOO              |
+ * |        64KB               |
+ * |                           |
+ * ~                           ~
+ * ~                           ~
+ * |---------------------------|->0x730000
+ * |        Meta Data          |
+ * |        832KB              |
+ * |                           |
+ * ~                           ~
+ * ~                           ~
+ * |                           |
+ * |---------------------------|
+ */
+
+#define QSPI_FLASH_NITRO_PARAMS \
+	"spi_nitro_img_bin_start=0x400000\0" \
+	"spi_nitro_img_bin_mirror_start=0x580000\0" \
+	"spi_nitro_bspd_cfg_start=0x700000\0" \
+	"spi_nitro_bspd_mirror_cfg_start=0x710000\0" \
+
+#define QSPI_ACCESS_ENABLE \
+	"qspi_access_en=" \
+	"mw 0x68a403e8 1;" \
+	"mw 0x68a403ec 1;" \
+	"mw 0x68a403f0 1;" \
+	"mw 0x68a403f4 1;" \
+	"mw 0x68a403f8 1;" \
+	"mw 0x68a403fc 1 \0"
+
+#define FUNC_QSPI_PROBE \
+	"func_qspi_probe="\
+	"if run qspi_access_en; then "\
+	"else "\
+		"echo ${errstr} run qspi_access_en ** FAILED **;"\
+		"exit;"\
+	"fi;"\
+	"if sf probe 0; then "\
+	"else "\
+		"echo echo ${errstr} sf probe command ** FAILED **;"\
+		"exit;"\
+	"fi \0"
+
+#define NITRO_FW_IMAGES \
+	"nitro_bin=nitro.img\0" \
+	"nitro_bspd_cfg=nitro_fb_bspd_config.bin\0"
+
+#define FASTBOOT_NITRO_SETUP \
+	"nitro_fastboot_type=1\0" \
+	"nitro_fastboot_secure=1\0" \
+	"nitro_fastboot_img_buffer=0\0" \
+	"nitro_fit_img_loc=0x90000000\0"
+
+#define FASTBOOT_SETUP \
+	"fastboot_nitro_setup=" \
+	"setenv errstr fastboot_setup;" \
+	"run func_qspi_probe;" \
+	/* first load header only */ \
+	"if sf read ${nitro_fit_img_loc} "\
+		   "${spi_nitro_img_bin_start} 0x18; then "\
+	"else "\
+		"echo [fastboot_nitro_setup] sf read "\
+		      "${spi_nitro_img_bin_start} ** FAILED **;"\
+		"exit;"\
+	"fi;"\
+	"if spi_nitro_images_addr ${nitro_fit_img_loc} "\
+				 "${spi_nitro_img_bin_start}; then "\
+	"else "\
+		 "echo [fastboot_nitro_setup] spi_nitro_images_addr "\
+		       "** FAILED **;"\
+		"exit;"\
+	"fi \0"
+
+#define CHECK_CHIMP_HS\
+	"check_chimp_hs=chimp_hs"\
+	"\0"
+
+#define FASTBOOT_NITRO "fastboot_nitro=chimp_ld_secure\0"
+
+#define FIT_IMAGE "fit_image=Image_rsa.img\0"
+#define BOOTCMD_MMC_FIT \
+	"bootcmd_mmc_fit="\
+	"mmc dev ${sd_device_number};"\
+	"if test $exec_state = normal; then " \
+		"setenv use_rootfs rootfs;"\
+	"else " \
+		"setenv use_rootfs recovery;"\
+	"fi;" \
+	"echo used filesystem :${use_rootfs};"\
+	"gpt setenv mmc ${sd_device_number} ${use_rootfs};"\
+	"setenv bootargs_fs ${setbootargs} ${ext4rd_args}; run bootargs_fs;"\
+	"gpt setenv mmc ${sd_device_number} ${fit_image};"\
+	"mmc read ${fit_image_loadaddr} ${gpt_partition_addr} "\
+	"${gpt_partition_size};"\
+	"bootm ${fit_image_loadaddr}\0"
+
+#define BOOTCMD_MMC_FITS \
+	"bootcmd_mmc_fits="\
+	"setenv mmc_fit0 " \
+	"'setenv fit_image Image_rsa.img; run bootcmd_mmc_fit';"\
+	"setenv mmc_fit1 " \
+	"'setenv fit_image Image1_rsa.img; run bootcmd_mmc_fit';"\
+	"setenv mmc_fit2 " \
+	"'setenv fit_image Image2_rsa.img; run bootcmd_mmc_fit';"\
+	"run mmc_fit0 || run mmc_fit1 || run mmc_fit2\0"
+
+#define USBDEV "usbdev=0\0"
+#define BOOTCMD_USB\
+	"bootcmd_usb="\
+	"setenv usb_image_loadaddr 90000000;"\
+	"setenv fit_image Image_rsa.img;"\
+	"setenv bootargs_fs ${setbootargs} ${initrd_args}; run bootargs_fs;"\
+	"if usb dev ${usbdev}; && usb start; then "\
+		"echo Booting from USB...;"\
+		"fatload usb ${usbdev} ${usb_image_loadaddr} ${fit_image};"\
+		"fatload usb ${usbdev} ${initrd_loadaddr} ${initrd_image};"\
+		"bootm ${usb_image_loadaddr} ${initrd_loadaddr}:${filesize};"\
+	"fi;"\
+	"\0"
+
+#define START_PCI\
+	"start_pci=pci e "\
+	"\0"
+
+#define BNXT_LOAD\
+	"bnxt_load=bnxt 0 probe "\
+	"\0"
+
+#define BOOTCMD_PXE\
+	"bootcmd_pxe="\
+	"run check_chimp_hs && "\
+	"run start_pci && "\
+	"run bnxt_load;"\
+	"setenv ethact bnxt_eth0;"\
+	"setenv autoload no;"\
+	"setenv bootargs_fs ${setbootargs} ${initrd_args}; run bootargs_fs;"\
+	"if dhcp; then "\
+		"setenv pxefile_addr_r ${loadaddr};"\
+		"if pxe get; then "\
+			"setenv ramdisk_addr_r ${initrd_loadaddr};"\
+			"setenv kernel_addr_r ${fit_image_loadaddr};"\
+			"pxe boot; "\
+		"fi;"\
+	"fi;"\
+	"\0"
+
+#define FLASH_PENDING_RFS_IMGS \
+	"flash_pending_rfs_imgs=" \
+	"if test $bcm_bl_flash_pending_rfs_imgs = 1; then " \
+		"if test $bl_flash_pending_rfs_imgs = rootfs; then " \
+			"dhcp;" \
+			"run mmc_flash_rootfs;" \
+		"fi;" \
+		"if test $bl_flash_pending_rfs_imgs = recovery; then " \
+			"dhcp;" \
+			"run mmc_flash_recovery;" \
+		"fi;" \
+		"setenv bl_flash_pending_rfs_imgs;" \
+	"fi; \0"
+
+#define CONFIG_BOOTCOMMAND "run flash_pending_rfs_imgs;" \
+			   "run fastboot_nitro && "\
+			   "run bootcmd_mmc_fits || "\
+			   "run bootcmd_usb || "\
+			   "run bootcmd_pxe"
+
+#define ARCH_ENV_SETTINGS \
+	CONSOLE_ARGS \
+	MAX_CPUS \
+	OS_LOG_LEVEL \
+	EXTRA_ARGS \
+	PCIE_ARGS \
+	ETH_ADDR \
+	RESERVED_MEM \
+	SETBOOTARGS \
+	UPDATEME_FLASH_PARAMS \
+	KERNEL_LOADADDR_CFG\
+	INITRD_ARGS \
+	INITRD_LOADADDR \
+	INITRD_IMAGE \
+	MMC_DEV \
+	EXEC_STATE \
+	EXT4RD_ARGS \
+	WDT_CNTRL \
+	ELOG_SETUP \
+	FIT_MMC_PARTITION \
+	QSPI_FLASH_NITRO_PARAMS \
+	QSPI_ACCESS_ENABLE \
+	FUNC_QSPI_PROBE \
+	NITRO_FW_IMAGES \
+	FASTBOOT_NITRO_SETUP \
+	FASTBOOT_SETUP \
+	CHECK_CHIMP_HS \
+	FASTBOOT_NITRO \
+	FIT_IMAGE \
+	BOOTCMD_MMC_FIT \
+	BOOTCMD_MMC_FITS \
+	USBDEV \
+	BOOTCMD_USB \
+	START_PCI \
+	BNXT_LOAD \
+	BOOTCMD_PXE \
+	FLASH_PENDING_RFS_IMGS
+
+#define CONFIG_EXTRA_ENV_SETTINGS \
+	ARCH_ENV_SETTINGS
 #endif /* __BCM_NS3_H */
-- 
2.17.1

[PATCH v1 40/49] configs: ns3: env in mmc

[Rayagonda Kokatanur]

Use uboot env in mmc.

Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com>
---
 configs/bcm_ns3_defconfig | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/configs/bcm_ns3_defconfig b/configs/bcm_ns3_defconfig
index c6e7992b3a..92f148b749 100644
--- a/configs/bcm_ns3_defconfig
+++ b/configs/bcm_ns3_defconfig
@@ -3,6 +3,7 @@ CONFIG_GIC_V3_ITS=y
 CONFIG_TARGET_BCMNS3=y
 CONFIG_SYS_TEXT_BASE=0xFF000000
 CONFIG_ENV_SIZE=0x80000
+CONFIG_ENV_OFFSET=0x4400
 CONFIG_NR_DRAM_BANKS=2
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_FIT=y
@@ -32,6 +33,7 @@ CONFIG_CMD_FAT=y
 # CONFIG_DOS_PARTITION is not set
 CONFIG_OF_CONTROL=y
 CONFIG_DEFAULT_DEVICE_TREE="ns3-board"
+CONFIG_ENV_IS_IN_MMC=y
 CONFIG_DM=y
 CONFIG_CLK=y
 CONFIG_CLK_CCF=y
-- 
2.17.1

[PATCH v1 41/49] include/configs: ns3: add support for flashing images

[Rayagonda Kokatanur]

From: Bharat Gooty <bharat.gooty@broadcom.com>

Add support for flashing images into QSPI and eMMC.

Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com>
---
 include/configs/bcm_ns3.h | 491 +++++++++++++++++++++++++++++++++++++-
 1 file changed, 490 insertions(+), 1 deletion(-)

diff --git a/include/configs/bcm_ns3.h b/include/configs/bcm_ns3.h
index 5e135ec319..d2d140a7df 100644
--- a/include/configs/bcm_ns3.h
+++ b/include/configs/bcm_ns3.h
@@ -369,6 +369,483 @@
 			   "run bootcmd_usb || "\
 			   "run bootcmd_pxe"
 
+/* Flashing commands */
+#define TFTP_QSPI_PARAM \
+	"fip_qspi_addr=0x0\0"\
+	"fip_qspi_mirror_addr=0x200000\0"\
+	"loadaddr=0x90000000\0"\
+	"tftpblocksize=1468\0"\
+	"qspi_flash_fip=fip\0"\
+
+/* Flash fit_GPT partition to eMMC */
+#define MMC_FLASH_FIT_GPT \
+	"mmc_flash_gpt="\
+	"if mmc dev ${sd_device_number}; then "\
+	"else "\
+		"echo [mmc_flash_gpt] mmc dev ${sd_device_number} "\
+		"** FAILED **;"\
+		"exit;"\
+	"fi;"\
+	"if gpt write mmc ${sd_device_number} ${fit_partitions}; then "\
+	"else "\
+		"echo [mmc_flash_gpt] gpt write ${fit_partitions} "\
+		"** FAILED **;"\
+		"exit;"\
+	"fi \0"
+
+#define MMC_FLASH_IMAGE_RSA \
+	"mmc_flash_image_rsa="\
+	"if mmc dev ${sd_device_number}; then "\
+	"else "\
+		"echo [mmc_flash_image_rsa] mmc dev ${sd_device_number} "\
+		"** FAILED **;"\
+		"exit;"\
+	"fi;"\
+	"if gpt setenv mmc ${sd_device_number} ${fit_image}; then "\
+	"else "\
+		"echo [mmc_flash_image_rsa] gpt setenv ${fit_image} "\
+		"** FAILED **;"\
+		"exit;"\
+	"fi;"\
+	"if tftp ${loadaddr} ${tftp_dir}${fit_image}; then "\
+		"if test ${fit_image} = Image_rsa.img; then "\
+			"if setenv tftp_fit_image yes; then "\
+			"else "\
+				"echo [mmc_flash_image_rsa] "\
+				"setenv tftp_fit_image to yes"\
+				"** FAILED **;"\
+				"exit;"\
+			"fi;"\
+		"fi;"\
+	"else "\
+		"if test ${fit_image} = Image_rsa.img; then "\
+			"echo [mmc_flash_image_rsa] tftp "\
+			"${tftp_dir}${fit_image} ** FAILED **;"\
+		"else "\
+			"if test ${tftp_fit_image} = yes; then "\
+				"if mmc write ${loadaddr} "\
+				"${gpt_partition_addr} "\
+				"${fileblocks}; then "\
+				"else "\
+					"echo "\
+					"[mmc_flash_image_rsa] "\
+					"mmc write "\
+					"${gpt_partition_addr} "\
+					"** FAILED **;"\
+					"exit;"\
+				"fi;"\
+			"else "\
+				"echo [mmc_flash_image_rsa] tftp "\
+				"${tftp_dir}${fit_image} "\
+				"** FAILED **;"\
+			"fi;"\
+		"fi;"\
+		"exit;"\
+	"fi;"\
+	"if math add filesize filesize 1FF; then "\
+	"else "\
+		"echo [mmc_flash_image_rsa] math add command ** FAILED **;"\
+		"exit;"\
+	"fi;"\
+	"if math div fileblocks filesize 200; then "\
+	"else "\
+		"echo [mmc_flash_image_rsa] math div command ** FAILED **;"\
+		"exit;"\
+	"fi;"\
+	"if mmc write ${loadaddr} ${gpt_partition_addr} ${fileblocks}; then "\
+	"else "\
+		"echo [mmc_flash_image_rsa] mmc write ${gpt_partition_addr} "\
+		"** FAILED **;"\
+		"exit;"\
+	"fi;"\
+	"if setenv image_sz_blk_cnt ${fileblocks}; then "\
+	"else "\
+		"echo [mmc_flash_image_rsa] setenv image_sz_blk_cnt ** "\
+		"FAILED **;"\
+		"exit;"\
+	"fi;"\
+	"if saveenv; then "\
+	"else "\
+		"echo [mmc_flash_image_rsa] saveenv command ** FAILED **;"\
+		"exit;"\
+	"fi \0"
+
+#define MMC_FLASH_RECOVERY \
+	"mmc_flash_recovery="\
+	"if mmc dev ${sd_device_number}; then "\
+	"else "\
+		"echo [mmc_flash_recovery] mmc dev ${sd_device_number} "\
+		"** FAILED **;"\
+		"exit;"\
+	"fi;"\
+	"if gpt setenv mmc ${sd_device_number} recovery; then "\
+	"else "\
+		"echo [mmc_flash_recovery] gpt setenv recovery ** FAILED **;"\
+		"exit;"\
+	"fi;"\
+	"setenv index 1;"\
+	"while tftp ${loadaddr} "\
+	"${tftp_dir}${gpt_partition_name}/chunk_00${index}; do "\
+		"if math add filesize filesize 1FF; then "\
+		"else "\
+			"echo [mmc_flash_recovery] math add command "\
+			"** FAILED **;"\
+			"exit;"\
+		"fi;"\
+		"if math div fileblocks filesize 200; then "\
+		"else "\
+			"echo [mmc_flash_recovery] math div command "\
+			"** FAILED **;"\
+			"exit;"\
+		"fi;"\
+		"if mmc write ${loadaddr} ${gpt_partition_addr} "\
+		"${fileblocks}; then "\
+		"else "\
+			"echo [mmc_flash_recovery] mmc write "\
+			"${gpt_partition_addr} ** FAILED **;"\
+			"exit;"\
+		"fi;"\
+		"if math add index index 1; then "\
+		"else "\
+			"echo [mmc_flash_recovery] math add command "\
+			"** FAILED **;"\
+			"exit;"\
+		"fi;"\
+		"if math add gpt_partition_addr gpt_partition_addr"\
+		" ${fileblocks}; then "\
+		"else "\
+			"echo [mmc_flash_recovery] math add command"\
+			" ** FAILED **;"\
+			"exit;"\
+		"fi;"\
+	"done;"\
+	"if itest ${index} -ne 1; then "\
+	"else "\
+		"echo [mmc_flash_recovery] "\
+		"${tftp_dir}${gpt_partition_name}/chunk_00${index} file "\
+		"not found ** FAILED **;"\
+		"exit;"\
+	"fi \0"
+
+#define MMC_FLASH_ROOTFS \
+	"mmc_flash_rootfs="\
+	"if mmc dev ${sd_device_number}; then "\
+	"else "\
+		"echo [mmc_flash_rootfs] mmc dev ${sd_device_number} "\
+		"** FAILED **;"\
+		"exit;"\
+	"fi;"\
+	"if gpt setenv mmc ${sd_device_number} rootfs; then "\
+	"else "\
+		"echo [mmc_flash_rootfs] gpt setenv rootfs ** FAILED **;"\
+		"exit;"\
+	"fi;"\
+	"setenv index 1;"\
+	"while tftp ${loadaddr} "\
+	"${tftp_dir}${gpt_partition_name}/chunk_00${index}; do "\
+		"if math add filesize filesize 1FF; then "\
+		"else "\
+			"echo [mmc_flash_rootfs] math add command "\
+			"** FAILED **;"\
+			"exit;"\
+		"fi;"\
+		"if math div fileblocks filesize 200; then "\
+		"else "\
+			"echo [mmc_flash_rootfs] math div command "\
+			"** FAILED **;"\
+			"exit;"\
+		"fi;"\
+		"if mmc write ${loadaddr} ${gpt_partition_addr} "\
+		"${fileblocks}; then "\
+		"else "\
+			"echo [mmc_flash_rootfs] mmc write "\
+			"${gpt_partition_addr} ** FAILED **;"\
+			"exit;"\
+		"fi;"\
+		"if math add index index 1; then "\
+		"else "\
+			"echo [mmc_flash_rootfs] math add command "\
+			"** FAILED **;"\
+			"exit;"\
+		"fi;"\
+		"if math add gpt_partition_addr gpt_partition_addr"\
+		" ${fileblocks}; then "\
+		"else "\
+			"echo [mmc_flash_rootfs] math add command"\
+			" ** FAILED **;"\
+			"exit;"\
+		"fi;"\
+	"done;"\
+	"if itest ${index} -ne 1; then "\
+	"else "\
+		"echo [mmc_flash_rootfs] "\
+		"${tftp_dir}${gpt_partition_name}/chunk_00${index} file "\
+		"not found ** FAILED **;"\
+		"exit;"\
+	"fi \0"
+
+/*
+ * For individual flash commands like mmc_flash_gpt, it is not
+ * necessary to check for errors.
+ * If any of its intermediate commands fails, then next commands
+ * will not execute. Script will exit from the failure command.
+ * For uniformity, checking for mmc_flash_gpt, mmc_flash_image_rsa
+ * mmc_flash_nitro and mmc_flash_rootfs
+ */
+#define MMC_FLASH \
+	"flash_mmc="\
+	"if run mmc_flash_gpt; then "\
+	"else "\
+		"echo [flash_mmc] run mmc_flash_gpt ** FAILED **;"\
+		"exit;"\
+	"fi;"\
+	"if setenv tftp_fit_image no; then "\
+	"else "\
+		"echo [flash_mmc] setenv tftp_fit_image to no "\
+		"** FAILED **;"\
+		"exit;"\
+	"fi;"\
+	"if setenv fit_image Image_rsa.img; then "\
+	"else "\
+		"echo [flash_mmc] setenv fit_image to Image_rsa.img "\
+		"** FAILED **;"\
+		"exit;"\
+	"fi;"\
+	"if run mmc_flash_image_rsa; then "\
+	"else "\
+		"echo [flash_mmc] run mmc_flash_image_rsa ** FAILED **;"\
+		"exit;"\
+	"fi;"\
+	"if setenv fit_image Image1_rsa.img; then "\
+	"else "\
+		"echo [flash_mmc] setenv fit_image to Image1_rsa.img "\
+		"** FAILED **;"\
+		"exit;"\
+	"fi;"\
+	"if run mmc_flash_image_rsa; then "\
+	"else "\
+		"echo [flash_mmc] run mmc_flash_image_rsa "\
+		"for Image1_rsa.img ** FAILED **;"\
+		"exit;"\
+	"fi;"\
+	"if setenv fit_image Image2_rsa.img; then "\
+	"else "\
+		"echo [flash_mmc] setenv fit_image to Image2_rsa.img "\
+		"** FAILED **;"\
+		"exit;"\
+	"fi;"\
+	"if run mmc_flash_image_rsa; then "\
+	"else "\
+		"echo [flash_mmc] run mmc_flash_image_rsa "\
+		"for Image2_rsa.img ** FAILED **;"\
+		"exit;"\
+	"fi;"\
+	"if run mmc_flash_recovery; then "\
+	"else "\
+		"echo [flash_mmc] run mmc_flash_recovery ** FAILED **;"\
+		"exit;"\
+	"fi;"\
+	"if run mmc_flash_rootfs; then "\
+	"else "\
+		"echo [flash_mmc] run mmc_flash_rootfs ** FAILED **;"\
+		"exit;"\
+	"fi \0"
+
+#define FUNC_ALIGN_QSPI_ERASE_BLOCK_SIZE \
+	"align_erase_blk_size=" \
+	"setenv fl_write_size 0;" \
+	"if math add fl_write_size filesize FFFF; then "\
+	"else "\
+		"echo ${errstr} math add command ** FAILED **;"\
+		"exit;"\
+	"fi;"\
+	"if math div fl_write_size fl_write_size 10000; then "\
+	"else "\
+		"echo ${errstr} math div command ** FAILED **;"\
+		"exit;"\
+	"fi;"\
+	"if math mul fl_write_size fl_write_size 10000; then "\
+	"else "\
+		"echo ${errstr} math mul command ** FAILED **;"\
+		"exit;"\
+	"fi \0"
+
+#define QSPI_FLASH_FIP \
+	"flash_fip="\
+	"if run qspi_access_en; then "\
+	"else "\
+		"echo [flash_fip] run qspi_access_en ** FAILED **;"\
+		"exit;"\
+	"fi;"\
+	"if tftp ${loadaddr} ${tftp_dir}fip.bin; then "\
+	"else "\
+		"echo [flash_fip] tftp ${tftp_dir}fip.bin "\
+		"** FAILED **;"\
+		"exit;"\
+	"fi;"\
+	"if math add tmpsize filesize FFFF; then "\
+	"else "\
+		"echo [flash_fip] math add command ** FAILED **;"\
+		"exit;"\
+	"fi;"\
+	"if math div tmpsize tmpsize 10000; then "\
+	"else "\
+		"echo [flash_fip] math div command ** FAILED **;"\
+		"exit;"\
+	"fi;"\
+	"if math mul tmpsize tmpsize 10000; then "\
+	"else "\
+		"echo [flash_fip] math mul command ** FAILED **;"\
+		"exit;"\
+	"fi;"\
+	"if sf probe 0; then "\
+	"else "\
+		"echo [flash_fip] sf probe command ** FAILED **;"\
+		"exit;"\
+	"fi;"\
+	"if sf erase ${fip_qspi_addr} ${tmpsize}; then "\
+	"else "\
+		"echo [flash_fip] sf erase ${fip_qspi_addr} ** FAILED **;"\
+		"exit;"\
+	"fi;"\
+	"if sf write ${loadaddr} ${fip_qspi_addr} ${filesize}; then "\
+	"else "\
+		"echo [flash_fip] sf write ${fip_qspi_addr} ** FAILED **;"\
+		"exit;"\
+	"fi;"\
+	/* Flash mirror FIP image */ \
+	"if sf erase ${fip_qspi_mirror_addr} ${tmpsize}; then "\
+	"else "\
+		"echo [flash_fip] sf erase ${fip_qspi_mirror_addr} "\
+			"** FAILED **;"\
+		"exit;"\
+	"fi;"\
+	"if sf write ${loadaddr} ${fip_qspi_mirror_addr} ${filesize}; then "\
+	"else "\
+		"echo [flash_fip] sf write ${fip_qspi_mirror_addr} "\
+			"** FAILED **;"\
+		"exit;"\
+	"fi \0"
+
+#define QSPI_FLASH_NITRO \
+	"flash_nitro="\
+	"run func_qspi_probe; "\
+	"if tftp ${loadaddr} ${tftp_dir}${nitro_bin}; then "\
+	"else "\
+		"echo [flash_nitro] tftp ${tftp_dir}${nitro_bin} "\
+		"** FAILED **;"\
+		"exit;"\
+	"fi;"\
+	"setenv errstr flash_nitro;" \
+	"run align_erase_blk_size;" \
+	/* Flash Nitro fw fit + configuration */ \
+	"if sf erase ${spi_nitro_img_bin_start} ${fl_write_size}; then "\
+	"else "\
+		"echo [flash_nitro] sf erase ${spi_nitro_img_bin_start} "\
+		"** FAILED **;"\
+		"exit;"\
+	"fi;"\
+	"if sf write ${loadaddr} ${spi_nitro_img_bin_start}" \
+		     " ${fl_write_size}; then "\
+	"else "\
+		"echo [flash_nitro] sf write ${spi_nitro_bin_start} "\
+		"** FAILED **;"\
+		"exit;"\
+	"fi;"\
+	/* Mirror of Flash Nitro fw fit + configuration */ \
+	"if sf erase ${spi_nitro_img_bin_mirror_start} ${fl_write_size}; then "\
+	"else "\
+		"echo [flash_nitro] sf erase "\
+		      "${spi_nitro_img_bin_mirror_start} "\
+		"** FAILED **;"\
+		"exit;"\
+	"fi;"\
+	"if sf write ${loadaddr} ${spi_nitro_img_bin_mirror_start}" \
+		     " ${fl_write_size}; then "\
+	"else "\
+		"echo [flash_nitro] sf write "\
+		      "${spi_nitro_img_bin_mirror_start} "\
+		"** FAILED **;"\
+		"exit;"\
+	"fi \0"
+
+#define QSPI_FLASH_NITRO_BSPD_CONFIG \
+	"flash_nitro_bspd_config="\
+	"run func_qspi_probe; "\
+	/* Flash BSPD configuration */ \
+	"if tftp ${loadaddr} ${tftp_dir}${nitro_bspd_cfg}; then "\
+		"setenv bspd_cfg_avialable 1; "\
+		"setenv errstr flash_nitro_bspd_config; "\
+		"run align_erase_blk_size;" \
+		"if sf erase ${spi_nitro_bspd_cfg_start} "\
+			    "${fl_write_size}; then "\
+		"else "\
+			"echo [flash_nitro] sf erase "\
+				"${spi_nitro_bspd_cfg_start} "\
+				"** FAILED **;"\
+			"exit;"\
+		"fi;"\
+		"if sf write ${loadaddr} ${spi_nitro_bspd_cfg_start} "\
+			    "${fl_write_size}; then "\
+		"else "\
+			"echo [flash_nitro] sf write "\
+				"${spi_nitro_bspd_cfg_start} "\
+				"** FAILED **;"\
+			"exit;"\
+		"fi;" \
+		/* Flash BSPD mirror configuration */ \
+		"if sf erase ${spi_nitro_bspd_mirror_cfg_start} "\
+			    "${fl_write_size}; then "\
+		"else "\
+			"echo [flash_nitro] sf erase "\
+				"${spi_nitro_bspd_mirror_cfg_start} "\
+				"** FAILED **;"\
+			"exit;"\
+		"fi;"\
+		"if sf write ${loadaddr} ${spi_nitro_bspd_mirror_cfg_start} "\
+			"${fl_write_size}; then "\
+		"else "\
+			"echo [flash_nitro] sf write "\
+				"${spi_nitro_bspd_mirror_cfg_start} "\
+				"** FAILED **;"\
+			"exit;"\
+		"fi;" \
+	"else "\
+		"echo [flash_nitro] tftp ${tftp_dir}${nitro_bspd_cfg} "\
+		"** Skip flashing bspd config file **;"\
+	"fi \0"
+
+#define QSPI_FLASH \
+	"flash_qspi="\
+	"if run qspi_access_en; then "\
+	"else "\
+		"echo [flash_qspi] run qspi_access_en ** FAILED **;"\
+		"exit;"\
+	"fi;"\
+	"if run flash_fip; then "\
+	"else "\
+		"echo [flash_qspi] run flash_fip ** FAILED **;"\
+		"exit;"\
+	"fi;"\
+	"if run flash_nitro; then "\
+	"else "\
+		"echo [flash_qspi] run flash_nitro ** FAILED **;"\
+		"exit;"\
+	"fi \0"
+
+#define FLASH_IMAGES \
+	"flash_images=" \
+	"if run flash_qspi; then "\
+	"else "\
+		"echo [flash_images] run flash_qspi ** FAILED **;"\
+		"exit;"\
+	"fi;"\
+	"if run flash_mmc; then "\
+	"else "\
+		"echo [flash_images] run flash_mmc ** FAILED **;"\
+		"exit;"\
+	"fi \0"
+
 #define ARCH_ENV_SETTINGS \
 	CONSOLE_ARGS \
 	MAX_CPUS \
@@ -405,7 +882,19 @@
 	START_PCI \
 	BNXT_LOAD \
 	BOOTCMD_PXE \
-	FLASH_PENDING_RFS_IMGS
+	FLASH_PENDING_RFS_IMGS \
+	TFTP_QSPI_PARAM \
+	MMC_FLASH_FIT_GPT \
+	MMC_FLASH_IMAGE_RSA \
+	MMC_FLASH_RECOVERY \
+	MMC_FLASH_ROOTFS \
+	MMC_FLASH \
+	FUNC_ALIGN_QSPI_ERASE_BLOCK_SIZE \
+	QSPI_FLASH_FIP \
+	QSPI_FLASH_NITRO \
+	QSPI_FLASH_NITRO_BSPD_CONFIG \
+	QSPI_FLASH \
+	FLASH_IMAGES
 
 #define CONFIG_EXTRA_ENV_SETTINGS \
 	ARCH_ENV_SETTINGS
-- 
2.17.1

[PATCH v1 42/49] common: ns3: add error logging support

[Rayagonda Kokatanur]

From: Sheetal Tigadoli <sheetal.tigadoli@broadcom.com>

Add error logging support in uboot for ns3 platform.

We log the bootup msgs from all bootstages(BL2, BL31, BL33, and Linux)
on to DDR. When a watchdog is triggered from any of the bootstages,
CRMU copies these logs to QSPI error logging space.

Later when doing the post-mortem analysis, we parse the QSPI error
log space.

Signed-off-by: Sheetal Tigadoli <sheetal.tigadoli@broadcom.com>
Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com>
---
 common/Kconfig            |  8 +++++++
 common/Makefile           |  1 +
 common/bcm_elog.c         | 49 +++++++++++++++++++++++++++++++++++++++
 common/console.c          | 22 ++++++++++++++++++
 configs/bcm_ns3_defconfig |  3 ++-
 include/bcm_elog.h        | 37 +++++++++++++++++++++++++++++
 6 files changed, 119 insertions(+), 1 deletion(-)
 create mode 100644 common/bcm_elog.c
 create mode 100644 include/bcm_elog.h

diff --git a/common/Kconfig b/common/Kconfig
index 30cba15948..3980ba31e0 100644
--- a/common/Kconfig
+++ b/common/Kconfig
@@ -634,6 +634,14 @@ config SYS_STDIO_DEREGISTER
 	  removed (for example a USB keyboard) then this option can be
 	  enabled to ensure this is handled correctly.
 
+config BCM_ELOG
+	bool "Broadcom error logging support"
+	default n
+	help
+	  Enables broadcom error logging support to be used with brcm
+	  platforms, say Y to this option to enable the logging support.
+	  If unsure, say N.
+
 endmenu
 
 menu "Logging"
diff --git a/common/Makefile b/common/Makefile
index 3471c47be5..0b6880fa7f 100644
--- a/common/Makefile
+++ b/common/Makefile
@@ -95,6 +95,7 @@ else
 obj-$(CONFIG_SPL_SERIAL_SUPPORT) += console.o
 endif
 else
+obj-$(CONFIG_BCM_ELOG) += bcm_elog.o
 obj-y += console.o
 endif # CONFIG_SPL_BUILD
 
diff --git a/common/bcm_elog.c b/common/bcm_elog.c
new file mode 100644
index 0000000000..8e89a500b9
--- /dev/null
+++ b/common/bcm_elog.c
@@ -0,0 +1,49 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright 2020 Broadcom.
+ */
+
+#include <bcm_elog.h>
+
+/* Log one character */
+int log2ddr(const char ch)
+{
+	u32 offset, len;
+	uintptr_t base = BCM_ELOG_UBOOT_BASE;
+
+	offset = readl(base + BCM_ELOG_OFF_OFFSET);
+	len = readl(base + BCM_ELOG_LEN_OFFSET);
+	writeb(ch, base + offset);
+	offset++;
+
+	/* log buffer is now full and need to wrap around */
+	if (offset >= BCM_ELOG_UBOOT_SIZE)
+		offset = BCM_ELOG_HEADER_LEN;
+
+	/* only increment length when log buffer is not full */
+	if (len < BCM_ELOG_UBOOT_SIZE - BCM_ELOG_HEADER_LEN)
+		len++;
+
+	writel(offset, base + BCM_ELOG_OFF_OFFSET);
+	writel(len, base + BCM_ELOG_LEN_OFFSET);
+
+	return 0;
+}
+
+/* Routine to initialize error logging */
+void bcm_elog_init(uintptr_t base, uint32_t size)
+{
+	u32 val;
+
+	/*
+	 * If a valid signature is found, it means logging is already
+	 * initialize. In this case, we should not re-initialize the entry
+	 * header in the designated memory
+	 */
+	val = readl(base + BCM_ELOG_SIG_OFFSET);
+	if (val != BCM_ELOG_SIG_VAL) {
+		writel(base + BCM_ELOG_SIG_OFFSET, BCM_ELOG_SIG_VAL);
+		writel(base + BCM_ELOG_OFF_OFFSET, BCM_ELOG_HEADER_LEN);
+		writel(base + BCM_ELOG_LEN_OFFSET, 0);
+	}
+}
diff --git a/common/console.c b/common/console.c
index e398530a13..a65fdc16c2 100644
--- a/common/console.c
+++ b/common/console.c
@@ -20,6 +20,10 @@
 #include <env_internal.h>
 #include <watchdog.h>
 
+#ifdef CONFIG_BCM_ELOG
+#include <bcm_elog.h>
+#endif
+
 DECLARE_GLOBAL_DATA_PTR;
 
 static int on_console(const char *name, const char *value, enum env_op op,
@@ -536,6 +540,9 @@ void putc(const char c)
 	if (!gd->have_console)
 		return pre_console_putc(c);
 
+#ifdef CONFIG_BCM_ELOG
+	log2ddr(c);
+#endif
 	if (gd->flags & GD_FLG_DEVINIT) {
 		/* Send to the standard output */
 		fputc(stdout, c);
@@ -587,6 +594,17 @@ void puts(const char *s)
 	if (!gd->have_console)
 		return pre_console_puts(s);
 
+#ifdef CONFIG_BCM_ELOG
+	{
+		const char *tmp = s;
+
+		while (*tmp) {
+			int c = *tmp++;
+
+			log2ddr(c);
+		}
+	}
+#endif
 	if (gd->flags & GD_FLG_DEVINIT) {
 		/* Send to the standard output */
 		fputs(stdout, s);
@@ -790,6 +808,10 @@ int console_init_f(void)
 
 	print_pre_console_buffer(PRE_CONSOLE_FLUSHPOINT1_SERIAL);
 
+#ifdef CONFIG_BCM_ELOG
+	bcm_elog_init(BCM_ELOG_UBOOT_BASE, BCM_ELOG_UBOOT_SIZE);
+#endif
+
 	return 0;
 }
 
diff --git a/configs/bcm_ns3_defconfig b/configs/bcm_ns3_defconfig
index 92f148b749..9d4a84af5a 100644
--- a/configs/bcm_ns3_defconfig
+++ b/configs/bcm_ns3_defconfig
@@ -15,6 +15,7 @@ CONFIG_LOGLEVEL=7
 CONFIG_SILENT_CONSOLE=y
 CONFIG_SILENT_U_BOOT_ONLY=y
 # CONFIG_SILENT_CONSOLE_UPDATE_ON_SET is not set
+CONFIG_BCM_ELOG=y
 CONFIG_SUPPORT_RAW_INITRD=y
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_HUSH_PARSER=y
@@ -46,11 +47,11 @@ CONFIG_PINCTRL=y
 CONFIG_PINCTRL_SINGLE=y
 CONFIG_DM_SERIAL=y
 CONFIG_SYS_NS16550=y
-CONFIG_FAT_WRITE=y
 CONFIG_TEE=y
 CONFIG_OPTEE=y
 # CONFIG_OPTEE_TA_AVB is not set
 # CONFIG_WATCHDOG is not set
 CONFIG_WDT=y
 CONFIG_WDT_SP805=y
+CONFIG_FAT_WRITE=y
 CONFIG_SPL_OF_LIBFDT=y
diff --git a/include/bcm_elog.h b/include/bcm_elog.h
new file mode 100644
index 0000000000..7ba99f1cf7
--- /dev/null
+++ b/include/bcm_elog.h
@@ -0,0 +1,37 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright 2020 Broadcom.
+ *
+ */
+
+#ifndef __BCM_ELOG_H__
+#define __BCM_ELOG_H__
+
+#include <asm/io.h>
+#include <linux/types.h>
+
+/* Default AP error logging base address */
+#ifndef ELOG_AP_UART_LOG_BASE
+#define ELOG_AP_UART_LOG_BASE	0x8f110000
+#endif
+
+/* Reserve 16K to store error logs */
+#define BCM_ELOG_UBOOT_BASE	ELOG_AP_UART_LOG_BASE
+#define BCM_ELOG_UBOOT_SIZE	0x4000
+
+/* error logging signature */
+#define BCM_ELOG_SIG_OFFSET	0x0000
+#define BCM_ELOG_SIG_VAL	0x75767971
+
+/* current logging offset that points to where new logs should be added */
+#define BCM_ELOG_OFF_OFFSET	0x0004
+
+/* current logging length (excluding header) */
+#define BCM_ELOG_LEN_OFFSET	0x0008
+
+#define BCM_ELOG_HEADER_LEN	12
+
+int log2ddr(const char ch);
+void bcm_elog_init(uintptr_t base, uint32_t size);
+
+#endif /* __BCM_ELOG_H__ */
-- 
2.17.1

[PATCH v1 43/49] board: ns3: kconfig: extend board kconfig with specific commands

[Rayagonda Kokatanur]

From: Vladimir Olovyannikov <vladimir.olovyannikov@broadcom.com>

Extend Kconfig for the board with board-specific commands selection.

Signed-off-by: Vladimir Olovyannikov <vladimir.olovyannikov@broadcom.com>
Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com>
---
 board/broadcom/bcmns3/Kconfig | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/board/broadcom/bcmns3/Kconfig b/board/broadcom/bcmns3/Kconfig
index 84daad9415..10547f71de 100644
--- a/board/broadcom/bcmns3/Kconfig
+++ b/board/broadcom/bcmns3/Kconfig
@@ -12,6 +12,10 @@ config SYS_SOC
 config SYS_CONFIG_NAME
 	default "bcm_ns3"
 
+config CMD_BCM_EXT_UTILS
+	bool "Enable Broadcom-specific u-boot commands"
+	default y
+
 config CHIMP_OPTEE
 	bool "Enable secure ChiMP firmware loading"
 	depends on OPTEE
-- 
2.17.1

[PATCH v1 44/49] cmd: bcm: add broadcom error log setup command

[Rayagonda Kokatanur]

From: Vladimir Olovyannikov <vladimir.olovyannikov@broadcom.com>

Add broadcom error log setup command.

Some Broadcom platforms have ability to record event logs by SCP.
- Add a logsetup command which is used to perform initial configuration
  of this log.
  Move this command to bcm/ directory to be used for Broadcom-specific
  U-boot commands.
- Add support for Broadcom-specific commands to Kconfig and to Makefile
  in cmd/.

Signed-off-by: Vladimir Olovyannikov <vladimir.olovyannikov@broadcom.com>
Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com>
---
 board/broadcom/bcmns3/Kconfig |   1 +
 cmd/Kconfig                   |   2 +
 cmd/Makefile                  |   2 +
 cmd/bcm/Kconfig               |  12 +
 cmd/bcm/Makefile              |   4 +
 cmd/bcm/elog.h                |  64 +++++
 cmd/bcm/logsetup.c            | 432 ++++++++++++++++++++++++++++++++++
 7 files changed, 517 insertions(+)
 create mode 100644 cmd/bcm/Kconfig
 create mode 100644 cmd/bcm/Makefile
 create mode 100644 cmd/bcm/elog.h
 create mode 100644 cmd/bcm/logsetup.c

diff --git a/board/broadcom/bcmns3/Kconfig b/board/broadcom/bcmns3/Kconfig
index 10547f71de..6a8c7bc7db 100644
--- a/board/broadcom/bcmns3/Kconfig
+++ b/board/broadcom/bcmns3/Kconfig
@@ -15,6 +15,7 @@ config SYS_CONFIG_NAME
 config CMD_BCM_EXT_UTILS
 	bool "Enable Broadcom-specific u-boot commands"
 	default y
+	select CMD_BCM_LOGSETUP
 
 config CHIMP_OPTEE
 	bool "Enable secure ChiMP firmware loading"
diff --git a/cmd/Kconfig b/cmd/Kconfig
index 6ce9e5521c..385e6eb5a5 100644
--- a/cmd/Kconfig
+++ b/cmd/Kconfig
@@ -2200,4 +2200,6 @@ config CMD_UBIFS
 	help
 	  UBIFS is a file system for flash devices which works on top of UBI.
 
+source cmd/bcm/Kconfig
+
 endmenu
diff --git a/cmd/Makefile b/cmd/Makefile
index 6692ed96c6..c0837de859 100644
--- a/cmd/Makefile
+++ b/cmd/Makefile
@@ -190,6 +190,8 @@ obj-$(CONFIG_$(SPL_)CMD_TLV_EEPROM) += tlv_eeprom.o
 # core command
 obj-y += nvedit.o
 
+obj-$(CONFIG_CMD_BCM_EXT_UTILS) += bcm/
+
 obj-$(CONFIG_TI_COMMON_CMD_OPTIONS) += ti/
 
 filechk_data_gz = (echo "static const char data_gz[] ="; cat $< | scripts/bin2c; echo ";")
diff --git a/cmd/bcm/Kconfig b/cmd/bcm/Kconfig
new file mode 100644
index 0000000000..189a45004e
--- /dev/null
+++ b/cmd/bcm/Kconfig
@@ -0,0 +1,12 @@
+menu "Broadcom Extended Utilities"
+
+config CMD_BCM_LOGSETUP
+	bool "Command to setup logging on Broadcom boards"
+	depends on TARGET_BCMNS3
+	default n
+	help
+	   Support specific log setup on Broadcom SoCs. This command
+	   allows checking if logging support is present, and update
+	   log sections.
+
+endmenu
diff --git a/cmd/bcm/Makefile b/cmd/bcm/Makefile
new file mode 100644
index 0000000000..96dc8f7ad7
--- /dev/null
+++ b/cmd/bcm/Makefile
@@ -0,0 +1,4 @@
+# SPDX-License-Identifier: GPL-2.0+
+# Copyright 2020 Broadcom
+
+obj-$(CONFIG_CMD_BCM_LOGSETUP) += logsetup.o
diff --git a/cmd/bcm/elog.h b/cmd/bcm/elog.h
new file mode 100644
index 0000000000..cc36d8739a
--- /dev/null
+++ b/cmd/bcm/elog.h
@@ -0,0 +1,64 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright 2020 Broadcom
+ */
+
+#ifndef __ELOG_H__
+#define __ELOG_H__
+
+#define GLOBAL_META_HDR_SIG	0x45524c47
+#define MAX_REC_COUNT		13
+#define MAX_REC_FORMAT		1
+#define MAX_SRC_TYPE		3
+#define MAX_NVM_TYPE		3
+/* A special type. Use defaults specified in CRMU config */
+#define NVM_DEFAULT		0xff
+
+/* Max. number of cmd parameters per elog spec */
+#define PARAM_COUNT		3
+
+#define REC_DESC_LENGTH		8
+
+enum {
+	LOG_SETUP_CMD_VALIDATE_META,
+	LOG_SETUP_CMD_WRITE_META,
+	LOG_SETUP_CMD_ERASE,
+	LOG_SETUP_CMD_READ,
+	LOG_SETUP_CMD_CHECK
+};
+
+#pragma pack(push, 1)
+
+struct meta_record {
+	u8 record_type;
+	u8 record_format;
+	u8 src_mem_type;
+	u8 alt_src_mem_type;
+	u8 nvm_type;
+	char rec_desc[REC_DESC_LENGTH];
+	u64 src_mem_addr;
+	u64 alt_src_mem_addr;
+	u64 rec_addr;
+	u32 rec_size;
+	u32 sector_size;
+	u8 padding[3];
+};
+
+struct global_header {
+	u32 signature;
+	u32 sector_size;
+	u8 revision;
+	u8 rec_count;
+	u16 padding;
+};
+
+struct log_setup {
+	u32 cmd;
+	u32 params[PARAM_COUNT];
+	u32 result;
+	u32 ret_code;
+};
+
+#pragma pack(pop)
+
+#endif
diff --git a/cmd/bcm/logsetup.c b/cmd/bcm/logsetup.c
new file mode 100644
index 0000000000..271462311d
--- /dev/null
+++ b/cmd/bcm/logsetup.c
@@ -0,0 +1,432 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright 2020 Broadcom
+ */
+
+/*
+ * Create a binary file ready to be flashed
+ * as a global meta for logging, from a source file.
+ */
+
+#include <common.h>
+#include <malloc.h>
+#include <string.h>
+#include <asm/io.h>
+#include <asm/system.h>
+#include <linux/ctype.h>
+#include <linux/delay.h>
+
+#include "elog.h"
+
+#define FILE_LINE_BUF_SIZE	1024
+#define GLOBAL_PARAM_COUNT	3
+#define REC_PARAM_COUNT		11
+
+#define GLOBAL_NAME		"GLOBAL"
+#define RECORD_NAME		"RECORD"
+
+#define MCU_IPC_MCU_CMD_ELOG_SETUP 0x84
+/* SPI write operations can be slow */
+#define DEFAULT_TIMEOUT_MS	10000
+
+#define MCU_IPC_CMD_DONE_MASK	0x80000000
+#define MCU_IPC_CMD_REPLY_MASK	0x3fff0000
+#define MCU_IPC_CMD_REPLY_SHIFT	16
+
+#define MIN_ARGS_COUNT		3
+#define MAX_ARGS_COUNT		5
+#define SEP_STR			","
+#define SUPPORTED_CMD		"-s"
+#define CHK_HDR_CMD		"-c"
+
+enum {
+	PARAM_GLOBAL,
+	PARAM_REC
+};
+
+static uintptr_t crmu_mbox0_address;
+
+/*
+ * Send a logging command to MCU patch for execution.
+ *
+ * Parameters:
+ *   cmd:         an IPC command code
+ *   param:       a pointer to parameters structure for IPC
+ *   is_real_cmd: whether command produces a response in the structure.
+ *                Only "support" command does not.
+ */
+static int send_crmu_log_cmd(u32 cmd, u32 param, int is_real_cmd)
+{
+	u32 timeout;
+	u32 val;
+	int ret = CMD_RET_FAILURE;
+	struct log_setup *setup;
+
+	setup = (struct log_setup *)(uintptr_t)param;
+	timeout = DEFAULT_TIMEOUT_MS;
+
+	writel(cmd, crmu_mbox0_address);
+	writel(param, crmu_mbox0_address + sizeof(u32));
+
+	do {
+		mdelay(1);
+		val = readl(is_real_cmd ? (uintptr_t)&setup->ret_code :
+						crmu_mbox0_address);
+		if (val & MCU_IPC_CMD_DONE_MASK) {
+			ret = CMD_RET_SUCCESS;
+			break;
+		}
+
+	} while (timeout--);
+
+	if (ret == CMD_RET_FAILURE) {
+		pr_err("CRMU cmd timeout!\n");
+		return ret;
+	}
+
+	/* Obtain status */
+	val = (val & MCU_IPC_CMD_REPLY_MASK) >> MCU_IPC_CMD_REPLY_SHIFT;
+	if (val)
+		ret = CMD_RET_FAILURE;
+
+	return ret;
+}
+
+static char *get_next_param(char **str, char *delimiter)
+{
+	char *ret = strsep(str, delimiter);
+
+	if (!ret)
+		return NULL;
+
+	return strim(ret);
+}
+
+static int count_chars(char *str, char delimiter)
+{
+	int count = 0;
+
+	if (!str || (!strlen(str)))
+		return 0;
+
+	do {
+		if (*str == delimiter)
+			count++;
+
+		str++;
+	} while (*str);
+
+	/* Need to consider leftovers (if any) after the last delimiter */
+	count++;
+
+	return count;
+}
+
+static int do_setup(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+{
+	struct global_header global;
+	struct log_setup setup = {0};
+	u8 *temp;
+	u8 *ptr = NULL;
+	char *buf;
+	u32 line_no = 0;
+	u32 expected_meta_size;
+	u32 data_size;
+	u32 log_offset = 0;
+	u32 num_recs = 0;
+	u32 addr;
+	int global_ready = 0;
+	int ret = CMD_RET_FAILURE;
+	int force = 0;
+
+	if (argc < MIN_ARGS_COUNT || argc > MAX_ARGS_COUNT)
+		return CMD_RET_USAGE;
+
+	/* Usage: addr or (-s/-c) mbox0_addr [data_size] [force] */
+	crmu_mbox0_address = simple_strtoul(argv[2], NULL, 16);
+	if (!crmu_mbox0_address) {
+		pr_err("Invalid CRMU mbox0 address\n");
+		return ret;
+	}
+
+	if (argc == MIN_ARGS_COUNT) {
+		if (strncmp(argv[1], SUPPORTED_CMD, 2) == 0)
+			return send_crmu_log_cmd(MCU_IPC_MCU_CMD_ELOG_SETUP,
+						 LOG_SETUP_CMD_CHECK,
+						 0
+						);
+
+		if (strncmp(argv[1], CHK_HDR_CMD, 2) == 0)
+			return send_crmu_log_cmd(MCU_IPC_MCU_CMD_ELOG_SETUP,
+						 (uintptr_t)&setup,
+						 1
+						);
+	}
+
+	/* Expect 1st parameter as a pointer to metadata */
+	addr = simple_strtoul(argv[1], NULL, 16);
+	if (!addr) {
+		pr_err("Address 0x0 is not allowed\n");
+		return ret;
+	}
+
+	data_size = simple_strtoul(argv[3], NULL, 16);
+	if (!data_size) {
+		pr_err("Invalid source size\n");
+		return ret;
+	}
+
+	if (argc == MAX_ARGS_COUNT)
+		force = simple_strtoul(argv[MAX_ARGS_COUNT - 1], NULL, 10);
+
+	memset(&global, 0, sizeof(struct global_header));
+	expected_meta_size = sizeof(struct global_header) +
+				MAX_REC_COUNT * sizeof(struct meta_record);
+
+	temp = (u8 *)malloc(expected_meta_size);
+	if (!temp)
+		return ret;
+
+	memset(temp, 0, expected_meta_size);
+
+	ptr = temp;
+	buf = (char *)(uintptr_t)addr;
+	/* End of file mark */
+	buf[data_size] = '\0';
+
+	do {
+		char  *type_name;
+		u32 entry_type;
+		char *line;
+		char *value;
+
+		line_no++;
+		line = get_next_param(&buf, "\n");
+		if (!line)
+			break;
+
+		if ((!strlen(line)) || line[0] == '#')
+			continue;
+
+		value = get_next_param(&line, "=");
+
+		if (!value || (!strlen(value))) {
+			pr_err("Invalid format of line %d\n", line_no);
+			goto free_params;
+		}
+
+		type_name = GLOBAL_NAME;
+
+		if (!strncasecmp(value, type_name, strlen(GLOBAL_NAME))) {
+			entry_type = PARAM_GLOBAL;
+		} else {
+			type_name = RECORD_NAME;
+			if (!strncasecmp(value,
+					 type_name,
+					 strlen(RECORD_NAME)
+					)
+			   ) {
+				entry_type = PARAM_REC;
+			} else {
+				pr_err("Unknown type %s, line %d\n",
+				       value,
+				       line_no
+				      );
+				goto free_params;
+			}
+		}
+
+		if (global_ready && entry_type == PARAM_GLOBAL) {
+			/* Multiple globals are not allowed */
+			pr_err("Multiple GLOBAL records, line %d\n", line_no);
+			goto free_params;
+		}
+
+		if (entry_type == PARAM_GLOBAL) {
+			/* Parse Global and create global record in outfile */
+			if (count_chars(line, ',') != GLOBAL_PARAM_COUNT) {
+				pr_err("Invalid GLOBAL format, line %d\n",
+				       line_no
+				      );
+				goto free_params;
+			}
+
+			global.sector_size =
+				simple_strtoul
+					(get_next_param(&line, SEP_STR),
+					 NULL,
+					 0
+					);
+			global.revision =
+				(u8)simple_strtoul
+					(get_next_param(&line, SEP_STR),
+					 NULL,
+					 0
+					);
+			log_offset = simple_strtoul
+					(get_next_param(&line, SEP_STR),
+					 NULL,
+					 0
+					);
+
+			if (!global.sector_size) {
+				pr_err("Invalid GLOBAL, line %d\n", line_no);
+				goto free_params;
+			}
+
+			global.signature = GLOBAL_META_HDR_SIG;
+			global_ready = 1;
+
+			/* Shift to the first RECORD header */
+			log_offset += 2 * global.sector_size;
+			ptr += sizeof(struct global_header);
+		} else {
+			struct meta_record rec = {0};
+			char *desc;
+			char *rec_addr_str;
+			int auto_addr = 0;
+
+			if (count_chars(line, ',') != REC_PARAM_COUNT) {
+				pr_err("Invalid RECORD, line %d\n", line_no);
+				goto free_params;
+			}
+
+			rec.record_type = (u8)simple_strtoul
+					(get_next_param(&line, SEP_STR),
+					 NULL,
+					 0
+					);
+			rec.record_format = (u8)simple_strtoul
+					(get_next_param(&line, SEP_STR),
+					 NULL,
+					 0
+					);
+			rec.src_mem_type = (u8)simple_strtoul
+					(get_next_param(&line, SEP_STR),
+					 NULL,
+					 0
+					);
+			rec.alt_src_mem_type = (u8)simple_strtoul
+					(get_next_param(&line, SEP_STR),
+					 NULL,
+					 0
+					);
+			rec.nvm_type = (u8)simple_strtoul
+					(get_next_param(&line, SEP_STR),
+					 NULL,
+					 0
+					);
+			desc = get_next_param(&line, SEP_STR);
+			if (desc)
+				desc = strim(desc);
+
+			rec.src_mem_addr = (u64)simple_strtoul
+					(get_next_param(&line, SEP_STR),
+					 NULL,
+					 0
+					);
+			rec.alt_src_mem_addr = (u64)simple_strtoul
+					(get_next_param(&line, SEP_STR),
+					 NULL,
+					 0
+					);
+			rec_addr_str = get_next_param(&line, SEP_STR);
+			if (rec_addr_str)
+				rec_addr_str = strim(rec_addr_str);
+
+			if (!strcmp(rec_addr_str, "auto"))
+				auto_addr = 1;
+			else
+				rec.rec_addr = (u64)simple_strtoul
+					(rec_addr_str,
+					 NULL,
+					 0
+					);
+
+			rec.rec_size = simple_strtoul
+					(get_next_param(&line, SEP_STR),
+					 NULL,
+					 0
+					);
+			rec.sector_size = simple_strtoul
+					(get_next_param(&line, SEP_STR),
+					 NULL,
+					 0
+					);
+			if (auto_addr) {
+				rec.rec_addr = (u64)log_offset;
+				log_offset += rec.rec_size;
+			}
+
+			/* Sanity checks */
+			if (rec.record_type > MAX_REC_COUNT ||
+			    rec.record_format > MAX_REC_FORMAT ||
+			    (rec.nvm_type > MAX_NVM_TYPE &&
+			     rec.nvm_type != NVM_DEFAULT) ||
+			    !rec.rec_size ||
+			    !rec.sector_size ||
+			    (!desc || !strlen(desc) ||
+			     (strlen(desc) > sizeof(rec.rec_desc) + 1)
+			    )
+			   ) {
+				pr_err("Invalid RECORD %s, line %d\n",
+				       desc ? desc : " (no desc)", line_no
+				      );
+				goto free_params;
+			}
+
+			memset(rec.rec_desc, ' ', sizeof(rec.rec_desc));
+			memcpy(rec.rec_desc, desc, strlen(desc));
+			memcpy(ptr, &rec, sizeof(struct meta_record));
+			ptr += sizeof(struct meta_record);
+			num_recs++;
+		}
+
+	} while (buf && ((uintptr_t)buf < (addr + data_size)));
+
+	if (!num_recs) {
+		pr_err("No RECORD entry!\n");
+		goto free_params;
+	}
+
+	if (!global_ready) {
+		pr_err("Global entry was not found!\n");
+		goto free_params;
+	}
+
+	if (num_recs > MAX_REC_COUNT) {
+		pr_err("Too many records (max %d)\n", MAX_REC_COUNT);
+		goto free_params;
+	}
+
+	/* Recalculate new expected size */
+	if (num_recs != MAX_REC_COUNT) {
+		expected_meta_size = sizeof(struct global_header) +
+			num_recs * sizeof(struct meta_record);
+	}
+
+	global.rec_count = num_recs;
+	memcpy(temp, &global, sizeof(struct global_header));
+
+	setup.params[0] = (uintptr_t)temp;
+	setup.params[1] = expected_meta_size;
+
+	/* Apply the command via CRMU mailboxes and read the result. */
+	setup.cmd = (force) ? LOG_SETUP_CMD_WRITE_META :
+			LOG_SETUP_CMD_VALIDATE_META;
+
+	/* Finally, request the MCU patch to perform the command */
+	ret = send_crmu_log_cmd(MCU_IPC_MCU_CMD_ELOG_SETUP,
+				(uintptr_t)(&setup),
+				1
+			       );
+
+free_params:
+	free(temp);
+
+	return ret;
+}
+
+U_BOOT_CMD(logsetup, 5, 1, do_setup, "setup Broadcom MCU logging subsystem",
+	   "\taddr mbox0_addr [data_size] [force]\nor\n\t -s(or -c) mbox0_addr"
+	  );
-- 
2.17.1

[PATCH v1 45/49] cmd: gpt: add eMMC and GPT support

[Rayagonda Kokatanur]

From: Corneliu Doban <cdoban@broadcom.com>

Add eMMC and GPT support.
- GPT partition list and command to create the GPT added to u-boot
  environment
- eMMC boot commands added to u-boot environment
- new gpt commands (enumarate and setenv) that are used by broadcom
  update scripts and boot commands
- eMMC specific u-boot configurations with environment saved in eMMC
  and GPT support

Signed-off-by: Corneliu Doban <cdoban@broadcom.com>
Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com>
---
 cmd/gpt.c | 95 +++++++++++++++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 95 insertions(+)

diff --git a/cmd/gpt.c b/cmd/gpt.c
index efaf1bcecb..07b711d391 100644
--- a/cmd/gpt.c
+++ b/cmd/gpt.c
@@ -616,6 +616,87 @@ static int gpt_verify(struct blk_desc *blk_dev_desc, const char *str_part)
 	return ret;
 }
 
+/*
+ * Enumerate partition names into environment variable.
+ */
+static int gpt_enumerate(struct blk_desc *blk_dev_desc)
+{
+	disk_partition_t pinfo;
+	struct part_driver *first_drv =
+		ll_entry_start(struct part_driver, part_driver);
+	const int n_drvs = ll_entry_count(struct part_driver, part_driver);
+	struct part_driver *part_drv;
+	char part_list[2048];
+
+	part_list[0] = 0;
+
+	for (part_drv = first_drv; part_drv != first_drv + n_drvs; part_drv++) {
+		int ret;
+		int i;
+
+		for (i = 1; i < part_drv->max_entries; i++) {
+			ret = part_drv->get_info(blk_dev_desc, i, &pinfo);
+			if (ret != 0) {
+				/* no more entries in table */
+				break;
+			}
+			strcat(part_list, (const char *)pinfo.name);
+			strcat(part_list, " ");
+		}
+	}
+	if (strlen(part_list) > 0)
+		part_list[strlen(part_list) - 1] = 0;
+	debug("setenv gpt_partition_list %s\n", part_list);
+	env_set("gpt_partition_list", part_list);
+	return 0;
+}
+
+/*
+ * Dynamically setup environment variables for name, index, offset and size
+ * for partition in GPT table after running "gpt setenv" for a partition name.
+ * gpt_partition_name, gpt_partition_entry, gpt_partition_addr and
+ * gpt_partition_size environment variables will be set.
+ */
+static int gpt_setenv(struct blk_desc *blk_dev_desc, const char *name)
+{
+	disk_partition_t pinfo;
+	struct part_driver *first_drv =
+		ll_entry_start(struct part_driver, part_driver);
+	const int n_drvs = ll_entry_count(struct part_driver, part_driver);
+	struct part_driver *part_drv;
+	char buf[32];
+
+	for (part_drv = first_drv; part_drv != first_drv + n_drvs; part_drv++) {
+		int ret;
+		int i;
+
+		for (i = 1; i < part_drv->max_entries; i++) {
+			ret = part_drv->get_info(blk_dev_desc, i, &pinfo);
+			if (ret != 0) {
+				/* no more entries in table */
+				break;
+			}
+			if (strcmp(name, (const char *)pinfo.name) == 0) {
+				/* match found, setup environment variables */
+				sprintf(buf, LBAF, pinfo.start);
+				debug("setenv gpt_partition_addr %s\n", buf);
+				env_set("gpt_partition_addr", buf);
+				sprintf(buf, LBAF, pinfo.size);
+				debug("setenv gpt_partition_size %s\n", buf);
+				env_set("gpt_partition_size", buf);
+				sprintf(buf, "%d", i);
+				debug("setenv gpt_partition_entry %s\n", buf);
+				env_set("gpt_partition_entry", buf);
+				sprintf(buf, "%s", pinfo.name);
+				debug("setenv gpt_partition_name %s\n", buf);
+				env_set("gpt_partition_name", buf);
+				return 0;
+			}
+		}
+	}
+	return -1;
+}
+
 static int do_disk_guid(struct blk_desc *dev_desc, char * const namestr)
 {
 	int ret;
@@ -824,6 +905,10 @@ static int do_gpt(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 	} else if ((strcmp(argv[1], "verify") == 0)) {
 		ret = gpt_verify(blk_dev_desc, argv[4]);
 		printf("Verify GPT: ");
+	} else if ((strcmp(argv[1], "setenv") == 0)) {
+		ret = gpt_setenv(blk_dev_desc, argv[4]);
+	} else if ((strcmp(argv[1], "enumerate") == 0)) {
+		ret = gpt_enumerate(blk_dev_desc);
 	} else if (strcmp(argv[1], "guid") == 0) {
 		ret = do_disk_guid(blk_dev_desc, argv[4]);
 #ifdef CONFIG_CMD_GPT_RENAME
@@ -854,7 +939,17 @@ U_BOOT_CMD(gpt, CONFIG_SYS_MAXARGS, 1, do_gpt,
 	" to interface\n"
 	" Example usage:\n"
 	" gpt write mmc 0 $partitions\n"
+	"    - write the GPT to device\n"
 	" gpt verify mmc 0 $partitions\n"
+	"    - verify the GPT on device against $partitions\n"
+	" gpt setenv mmc 0 $name\n"
+	"    - setup environment variables for partition $name:\n"
+	"      gpt_partition_addr, gpt_partition_size,\n"
+	"      gpt_partition_name, gpt_partition_entry\n"
+	" gpt enumerate mmc 0\n"
+	"    - store list of partitions to gpt_partition_list environment variable\n"
+	" read <interface> <dev>\n"
+	"    - read GPT into a data structure for manipulation\n"
 	" gpt guid <interface> <dev>\n"
 	"    - print disk GUID\n"
 	" gpt guid <interface> <dev> <varname>\n"
-- 
2.17.1

[PATCH v1 46/49] cmd: bcm: add nitro boot command

[Rayagonda Kokatanur]

From: Trac Hoang <trac.hoang@broadcom.com>

Add command to boot nitro.

Signed-off-by: Trac Hoang <trac.hoang@broadcom.com>
Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com>
---
 cmd/bcm/Makefile     |  1 +
 cmd/bcm/chimp_boot.c | 36 ++++++++++++++++++++++++++++++++++++
 include/brcm/chimp.h |  2 ++
 3 files changed, 39 insertions(+)
 create mode 100644 cmd/bcm/chimp_boot.c

diff --git a/cmd/bcm/Makefile b/cmd/bcm/Makefile
index 96dc8f7ad7..dc274f6b96 100644
--- a/cmd/bcm/Makefile
+++ b/cmd/bcm/Makefile
@@ -2,3 +2,4 @@
 # Copyright 2020 Broadcom
 
 obj-$(CONFIG_CMD_BCM_LOGSETUP) += logsetup.o
+obj-y += chimp_boot.o
diff --git a/cmd/bcm/chimp_boot.c b/cmd/bcm/chimp_boot.c
new file mode 100644
index 0000000000..dcab9a5bcb
--- /dev/null
+++ b/cmd/bcm/chimp_boot.c
@@ -0,0 +1,36 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright 2020 Broadcom
+ */
+
+#include <command.h>
+#include <common.h>
+#include <brcm/chimp.h>
+
+static int do_chimp_fastboot_secure(cmd_tbl_t *cmdtp, int flag, int argc,
+				    char *const argv[])
+{
+	u32 health = 0;
+
+	if (chimp_health_status_optee(&health) != BCM_CHIMP_SUCCESS) {
+		pr_err("Chimp health command fail\n");
+		return CMD_RET_FAILURE;
+	}
+
+	if (health == BCM_CHIMP_RUNNIG_GOOD) {
+		printf("skip fastboot...\n");
+		return CMD_RET_SUCCESS;
+	}
+
+	if (chimp_fastboot_optee() != BCM_CHIMP_SUCCESS) {
+		pr_err("Failed to load secure ChiMP image\n");
+		return CMD_RET_FAILURE;
+	}
+	return CMD_RET_SUCCESS;
+}
+
+U_BOOT_CMD
+	(chimp_ld_secure, 1, 0, do_chimp_fastboot_secure,
+	 "Invoke chimp fw load via optee",
+	 "chimp_ld_secure\n"
+);
diff --git a/include/brcm/chimp.h b/include/brcm/chimp.h
index c3d4594c4b..9099a70ef5 100644
--- a/include/brcm/chimp.h
+++ b/include/brcm/chimp.h
@@ -13,6 +13,8 @@
 #define BCM_CHIMP_SUCCESS	0
 #define BCM_CHIMP_FAILURE	(!BCM_CHIMP_SUCCESS)
 
+#define BCM_CHIMP_RUNNIG_GOOD	0x8000
+
 #ifdef CONFIG_CHIMP_OPTEE
 int chimp_fastboot_optee(void);
 int chimp_health_status_optee(u32 *status);
-- 
2.17.1

[PATCH v1 47/49] cmd: bcm: add nitro image load commands

[Rayagonda Kokatanur]

From: Vikas Gupta <vikas.gupta@broadcom.com>

Add nitro image load commands.

Signed-off-by: Vikas Gupta <vikas.gupta@broadcom.com>
Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com>
---
 cmd/bcm/Makefile           |  1 +
 cmd/bcm/nitro_image_load.c | 99 ++++++++++++++++++++++++++++++++++++++
 2 files changed, 100 insertions(+)
 create mode 100644 cmd/bcm/nitro_image_load.c

diff --git a/cmd/bcm/Makefile b/cmd/bcm/Makefile
index dc274f6b96..671c0fbd43 100644
--- a/cmd/bcm/Makefile
+++ b/cmd/bcm/Makefile
@@ -3,3 +3,4 @@
 
 obj-$(CONFIG_CMD_BCM_LOGSETUP) += logsetup.o
 obj-y += chimp_boot.o
+obj-y += nitro_image_load.o
diff --git a/cmd/bcm/nitro_image_load.c b/cmd/bcm/nitro_image_load.c
new file mode 100644
index 0000000000..e460b91338
--- /dev/null
+++ b/cmd/bcm/nitro_image_load.c
@@ -0,0 +1,99 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright 2020 Broadcom
+ */
+
+#include <command.h>
+#include <common.h>
+
+#define NITRO_FW_IMAGE_SIG 0xFF123456
+#define NITRO_NS3_CFG_IMAGE_SIG 0xCF54321A
+
+/*structure for Nitro bin file
+ *  signature: Nitro fw itb file
+ *  size: Nitro fw itb file
+ *  signature: Nitro NS3 config file
+ *  size: Nitro NS3 config file
+ *  Data: Nitro fw itb file
+ *  ............................
+ *  ............................
+ *  Data: Nitro NS3 config file
+ *  ............................
+ *  ............................
+ */
+
+static struct nitro_img_header {
+	u32 nitro_fw_bin_sig;
+	u32 nitro_fw_bin_size;
+	u32 nitro_fw_cfg1_sig;
+	u32 nitro_fw_cfg1_size;
+	u32 nitro_fw_cfg2_sig;
+	u32 nitro_fw_cfg2_size;
+} *img_header;
+
+static int do_spi_nitro_images_addr(cmd_tbl_t *cmdtp, int flag, int argc,
+				    char *const argv[])
+{
+	uintptr_t images_load_addr;
+	uintptr_t spi_load_addr;
+	u32 len;
+	u32 spi_data_offset = sizeof(struct nitro_img_header);
+
+	if (argc != 3)
+		return CMD_RET_USAGE;
+
+	/* convert command parameter to fastboot address (base 16), i.e. hex */
+	images_load_addr = (uintptr_t)simple_strtoul(argv[1], NULL, 16);
+	if (!images_load_addr) {
+		pr_err("Invalid load address\n");
+		return CMD_RET_USAGE;
+	}
+
+	spi_load_addr = (uintptr_t)simple_strtoul(argv[2], NULL, 16);
+	if (!spi_load_addr) {
+		pr_err("Invalid spi load address\n");
+		return CMD_RET_USAGE;
+	}
+
+	img_header = (struct nitro_img_header *)images_load_addr;
+
+	if (img_header->nitro_fw_bin_sig != NITRO_FW_IMAGE_SIG) {
+		pr_err("Invalid Nitro bin file\n");
+		return CMD_RET_FAILURE;
+	}
+
+	env_set_hex("spi_nitro_fw_itb_start_addr", (ulong)0);
+	env_set_hex("spi_nitro_fw_itb_len", (ulong)0);
+	env_set_hex("spi_nitro_fw_ns3_cfg_start_addr", (ulong)0);
+	env_set_hex("spi_nitro_fw_ns3_cfg_len", (ulong)0);
+
+	len = img_header->nitro_fw_bin_size;
+
+	env_set_hex("spi_nitro_fw_itb_start_addr", (ulong)
+		   (spi_load_addr + spi_data_offset));
+	env_set_hex("spi_nitro_fw_itb_len", (ulong)
+		    img_header->nitro_fw_bin_size);
+
+	spi_data_offset += len;
+
+	if (img_header->nitro_fw_cfg1_sig == NITRO_NS3_CFG_IMAGE_SIG) {
+		len = img_header->nitro_fw_cfg1_size;
+
+		env_set_hex("spi_nitro_fw_ns3_cfg_start_addr", (ulong)
+			   (spi_load_addr + spi_data_offset));
+		env_set_hex("spi_nitro_fw_ns3_cfg_len", (ulong)len);
+
+		spi_data_offset += len;
+	}
+
+	/* disable nitro secure boot */
+	env_set_hex("nitro_fastboot_secure", (ulong)0);
+
+	return CMD_RET_SUCCESS;
+}
+
+U_BOOT_CMD
+	(spi_nitro_images_addr, 3, 1, do_spi_nitro_images_addr,
+	 "Load the nitro bin header and sets envs ",
+	 "spi_nitro_images_addr <load_addr> <spi_base_addr>\n"
+);
-- 
2.17.1

[PATCH v1 48/49] cmd: bcm: add command for chimp hand shake

[Rayagonda Kokatanur]

From: Bharat Kumar Reddy Gooty <bharat.gooty@broadcom.com>

Add command for chimp handshake.

Signed-off-by: Bharat Kumar Reddy Gooty <bharat.gooty@broadcom.com>
Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com>
---
 cmd/bcm/Makefile          |  1 +
 cmd/bcm/chimp_handshake.c | 32 ++++++++++++++++++++++++++++++++
 include/brcm/chimp.h      |  6 ++++++
 3 files changed, 39 insertions(+)
 create mode 100644 cmd/bcm/chimp_handshake.c

diff --git a/cmd/bcm/Makefile b/cmd/bcm/Makefile
index 671c0fbd43..49a3f38357 100644
--- a/cmd/bcm/Makefile
+++ b/cmd/bcm/Makefile
@@ -3,4 +3,5 @@
 
 obj-$(CONFIG_CMD_BCM_LOGSETUP) += logsetup.o
 obj-y += chimp_boot.o
+obj-y += chimp_handshake.o
 obj-y += nitro_image_load.o
diff --git a/cmd/bcm/chimp_handshake.c b/cmd/bcm/chimp_handshake.c
new file mode 100644
index 0000000000..7b9c766dd3
--- /dev/null
+++ b/cmd/bcm/chimp_handshake.c
@@ -0,0 +1,32 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright 2020 Broadcom
+ */
+
+#include <brcm/chimp.h>
+#include <common.h>
+
+/* This command should be called after loading the nitro binaries */
+static int do_chimp_hs(cmd_tbl_t *cmdtp, int flag, int argc,
+		       char *const argv[])
+{
+	int ret = CMD_RET_USAGE;
+	u32 hstatus;
+
+	/* Returns 1, if handshake call is success */
+	if (chimp_handshake_status_optee(0, &hstatus) == BCM_CHIMP_SUCCESS)
+		ret = CMD_RET_SUCCESS;
+
+	if (hstatus == CHIMP_HANDSHAKE_SUCCESS)
+		printf("ChiMP Handshake successful\n");
+	else
+		printf("ERROR: ChiMP Handshake status 0x%x\n", hstatus);
+
+	return ret;
+}
+
+U_BOOT_CMD
+	(chimp_hs, 1, 1, do_chimp_hs,
+	 "Command to verify the Chimp hand shake",
+	 "chimp_hs\n"
+);
diff --git a/include/brcm/chimp.h b/include/brcm/chimp.h
index 9099a70ef5..f384603dc7 100644
--- a/include/brcm/chimp.h
+++ b/include/brcm/chimp.h
@@ -15,6 +15,12 @@
 
 #define BCM_CHIMP_RUNNIG_GOOD	0x8000
 
+enum {
+	CHIMP_HANDSHAKE_SUCCESS = 0,
+	CHIMP_HANDSHAKE_WAIT_ERROR,
+	CHIMP_HANDSHAKE_WAIT_TIMEOUT,
+};
+
 #ifdef CONFIG_CHIMP_OPTEE
 int chimp_fastboot_optee(void);
 int chimp_health_status_optee(u32 *status);
-- 
2.17.1

[PATCH v1 49/49] board: ns3: check chimp handshake status

[Rayagonda Kokatanur]

Add support to check chimp handshake status.

Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com>
---
 board/broadcom/bcmns3/ns3.c | 14 +++++++++++++-
 1 file changed, 13 insertions(+), 1 deletion(-)

diff --git a/board/broadcom/bcmns3/ns3.c b/board/broadcom/bcmns3/ns3.c
index e8f1d1b199..791baa904e 100644
--- a/board/broadcom/bcmns3/ns3.c
+++ b/board/broadcom/bcmns3/ns3.c
@@ -12,6 +12,7 @@
 #include <asm/gic-v3.h>
 #include <asm/system.h>
 #include <dm/device.h>
+#include <brcm/chimp.h>
 #include <dm/uclass.h>
 #include <dt-bindings/memory/bcm-ns3-mc.h>
 #include <fdtdec.h>
@@ -240,10 +241,21 @@ static int start_wdt(void)
 
 int ft_board_setup(void *fdt, bd_t *bd)
 {
-	gic_lpi_tables_init(BCM_NS3_GIC_LPI_BASE, MAX_GIC_REDISTRIBUTORS);
+	u32 chimp_hs;
 
+	gic_lpi_tables_init(BCM_NS3_GIC_LPI_BASE, MAX_GIC_REDISTRIBUTORS);
 	mem_info_parse_fixup(fdt);
 
+	/*
+	 * check for chimp handshake status. 0 timeout value will actually
+	 * fall to default timeout value
+	 */
+	chimp_handshake_status_optee(0, &chimp_hs);
+	if (chimp_hs == CHIMP_HANDSHAKE_SUCCESS)
+		printf("ChiMP Handshake successful\n");
+	else
+		printf("ERROR: ChiMP Handshake status 0x%x\n", chimp_hs);
+
 	start_wdt();
 
 	return 0;
-- 
2.17.1