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From: Ansuel Smith <ansuelsmth@gmail.com>
To: Bjorn Andersson <bjorn.andersson@linaro.org>
Cc: Ansuel Smith <ansuelsmth@gmail.com>,
	Sham Muthayyan <smuthayy@codeaurora.org>,
	stable@vger.kernel.org, Andy Gross <agross@kernel.org>,
	Bjorn Helgaas <bhelgaas@google.com>,
	Rob Herring <robh+dt@kernel.org>,
	Mark Rutland <mark.rutland@arm.com>,
	Stanimir Varbanov <svarbanov@mm-sol.com>,
	Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
	Andrew Murray <amurray@thegoodpenguin.co.uk>,
	Philipp Zabel <p.zabel@pengutronix.de>,
	linux-arm-msm@vger.kernel.org, linux-pci@vger.kernel.org,
	devicetree@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: [PATCH v3 01/11] PCI: qcom: add missing ipq806x clocks in PCIe driver
Date: Fri,  1 May 2020 00:06:08 +0200	[thread overview]
Message-ID: <20200430220619.3169-2-ansuelsmth@gmail.com> (raw)
In-Reply-To: <20200430220619.3169-1-ansuelsmth@gmail.com>

Aux and Ref clk are missing in PCIe qcom driver.
Add support in the driver to fix PCIe initialization in ipq806x.

Fixes: 82a823833f4e PCI: qcom: Add Qualcomm PCIe controller driver
Signed-off-by: Sham Muthayyan <smuthayy@codeaurora.org>
Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
Cc: stable@vger.kernel.org # v4.5+
---
 drivers/pci/controller/dwc/pcie-qcom.c | 44 ++++++++++++++++++++++----
 1 file changed, 38 insertions(+), 6 deletions(-)

diff --git a/drivers/pci/controller/dwc/pcie-qcom.c b/drivers/pci/controller/dwc/pcie-qcom.c
index 5ea527a6bd9f..2a39dfdccfc8 100644
--- a/drivers/pci/controller/dwc/pcie-qcom.c
+++ b/drivers/pci/controller/dwc/pcie-qcom.c
@@ -88,6 +88,8 @@ struct qcom_pcie_resources_2_1_0 {
 	struct clk *iface_clk;
 	struct clk *core_clk;
 	struct clk *phy_clk;
+	struct clk *aux_clk;
+	struct clk *ref_clk;
 	struct reset_control *pci_reset;
 	struct reset_control *axi_reset;
 	struct reset_control *ahb_reset;
@@ -246,6 +248,14 @@ static int qcom_pcie_get_resources_2_1_0(struct qcom_pcie *pcie)
 	if (IS_ERR(res->phy_clk))
 		return PTR_ERR(res->phy_clk);
 
+	res->aux_clk = devm_clk_get_optional(dev, "aux");
+	if (IS_ERR(res->aux_clk))
+		return PTR_ERR(res->aux_clk);
+
+	res->ref_clk = devm_clk_get_optional(dev, "ref");
+	if (IS_ERR(res->ref_clk))
+		return PTR_ERR(res->ref_clk);
+
 	res->pci_reset = devm_reset_control_get_exclusive(dev, "pci");
 	if (IS_ERR(res->pci_reset))
 		return PTR_ERR(res->pci_reset);
@@ -278,6 +288,8 @@ static void qcom_pcie_deinit_2_1_0(struct qcom_pcie *pcie)
 	clk_disable_unprepare(res->iface_clk);
 	clk_disable_unprepare(res->core_clk);
 	clk_disable_unprepare(res->phy_clk);
+	clk_disable_unprepare(res->aux_clk);
+	clk_disable_unprepare(res->ref_clk);
 	regulator_bulk_disable(ARRAY_SIZE(res->supplies), res->supplies);
 }
 
@@ -307,16 +319,32 @@ static int qcom_pcie_init_2_1_0(struct qcom_pcie *pcie)
 		goto err_assert_ahb;
 	}
 
+	ret = clk_prepare_enable(res->core_clk);
+	if (ret) {
+		dev_err(dev, "cannot prepare/enable core clock\n");
+		goto err_clk_core;
+	}
+
 	ret = clk_prepare_enable(res->phy_clk);
 	if (ret) {
 		dev_err(dev, "cannot prepare/enable phy clock\n");
 		goto err_clk_phy;
 	}
 
-	ret = clk_prepare_enable(res->core_clk);
-	if (ret) {
-		dev_err(dev, "cannot prepare/enable core clock\n");
-		goto err_clk_core;
+	if (res->aux_clk) {
+		ret = clk_prepare_enable(res->aux_clk);
+		if (ret) {
+			dev_err(dev, "cannot prepare/enable aux clock\n");
+			goto err_clk_aux;
+		}
+	}
+
+	if (res->ref_clk) {
+		ret = clk_prepare_enable(res->ref_clk);
+		if (ret) {
+			dev_err(dev, "cannot prepare/enable ref clock\n");
+			goto err_clk_ref;
+		}
 	}
 
 	ret = reset_control_deassert(res->ahb_reset);
@@ -372,10 +400,14 @@ static int qcom_pcie_init_2_1_0(struct qcom_pcie *pcie)
 	return 0;
 
 err_deassert_ahb:
-	clk_disable_unprepare(res->core_clk);
-err_clk_core:
+	clk_disable_unprepare(res->ref_clk);
+err_clk_ref:
+	clk_disable_unprepare(res->aux_clk);
+err_clk_aux:
 	clk_disable_unprepare(res->phy_clk);
 err_clk_phy:
+	clk_disable_unprepare(res->core_clk);
+err_clk_core:
 	clk_disable_unprepare(res->iface_clk);
 err_assert_ahb:
 	regulator_bulk_disable(ARRAY_SIZE(res->supplies), res->supplies);
-- 
2.25.1


  reply	other threads:[~2020-04-30 22:06 UTC|newest]

Thread overview: 32+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-04-30 22:06 [PATCH v3 00/11] Multiple fixes in PCIe qcom driver Ansuel Smith
2020-04-30 22:06 ` Ansuel Smith [this message]
2020-05-06 23:42   ` [PATCH v3 01/11] PCI: qcom: add missing ipq806x clocks in PCIe driver Sasha Levin
2020-05-07 17:54   ` Rob Herring
2020-05-08 11:51   ` Stanimir Varbanov
2020-04-30 22:06 ` [PATCH v3 02/11] devicetree: bindings: pci: add missing clks to qcom,pcie Ansuel Smith
2020-04-30 22:06 ` [PATCH v3 03/11] PCI: qcom: change duplicate PCI reset to phy reset Ansuel Smith
2020-05-07 17:57   ` Rob Herring
2020-04-30 22:06 ` [PATCH v3 04/11] PCI: qcom: add missing reset for ipq806x Ansuel Smith
2020-05-07 18:00   ` Rob Herring
2020-05-08  7:20   ` Philipp Zabel
2020-04-30 22:06 ` [PATCH v3 05/11] devicetree: bindings: pci: add ext reset to qcom,pcie Ansuel Smith
2020-04-30 22:06 ` [PATCH v3 06/11] PCI: qcom: introduce qcom_clear_and_set_dword Ansuel Smith
2020-05-07 18:07   ` Rob Herring
2020-04-30 22:06 ` [PATCH v3 07/11] PCI: qcom: add support for defining some PARF params Ansuel Smith
2020-04-30 22:06 ` [PATCH v3 08/11] devicetree: bindings: pci: document PARF params bindings Ansuel Smith
2020-05-07 18:10   ` Rob Herring
2020-05-07 19:34     ` R: " ansuelsmth
2020-05-12 15:45       ` Rob Herring
2020-05-13 11:43         ` Stanimir Varbanov
2020-05-13 12:56           ` R: " ansuelsmth
2020-05-20 10:01             ` Stanimir Varbanov
2020-04-30 22:06 ` [PATCH v3 09/11] PCI: qcom: add ipq8064 rev2 variant and set tx term offset Ansuel Smith
2020-05-07 18:13   ` Rob Herring
2020-05-08 22:00     ` R: " ansuelsmth
2020-05-13 11:37   ` Stanimir Varbanov
2020-05-13 12:54     ` R: " ansuelsmth
2020-05-13 13:49       ` Stanimir Varbanov
2020-04-30 22:06 ` [PATCH v3 10/11] devicetree: bindings: pci: add ipq8064 rev 2 variant to qcom,pcie Ansuel Smith
2020-05-07 18:14   ` Rob Herring
2020-04-30 22:06 ` [PATCH v3 11/11] PCI: qcom: add Force GEN1 support Ansuel Smith
2020-05-01 17:07 ` [PATCH v3 00/11] Multiple fixes in PCIe qcom driver Bjorn Helgaas

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