From: Luke Nelson <lukenels@cs.washington.edu> To: bpf@vger.kernel.org Cc: "Luke Nelson" <luke.r.nels@gmail.com>, "Xi Wang" <xi.wang@gmail.com>, "Björn Töpel" <bjorn.topel@gmail.com>, "Paul Walmsley" <paul.walmsley@sifive.com>, "Palmer Dabbelt" <palmer@dabbelt.com>, "Albert Ou" <aou@eecs.berkeley.edu>, "Alexei Starovoitov" <ast@kernel.org>, "Daniel Borkmann" <daniel@iogearbox.net>, "Martin KaFai Lau" <kafai@fb.com>, "Song Liu" <songliubraving@fb.com>, "Yonghong Song" <yhs@fb.com>, "Andrii Nakryiko" <andriin@fb.com>, "John Fastabend" <john.fastabend@gmail.com>, "KP Singh" <kpsingh@chromium.org>, netdev@vger.kernel.org, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH bpf-next 3/4] bpf, riscv: Optimize BPF_JMP BPF_K when imm == 0 on RV64 Date: Tue, 5 May 2020 17:03:19 -0700 [thread overview] Message-ID: <20200506000320.28965-4-luke.r.nels@gmail.com> (raw) In-Reply-To: <20200506000320.28965-1-luke.r.nels@gmail.com> This patch adds an optimization to BPF_JMP (32- and 64-bit) BPF_K for when the BPF immediate is zero. When the immediate is zero, the code can directly use the RISC-V zero register instead of loading a zero immediate to a temporary register first. Co-developed-by: Xi Wang <xi.wang@gmail.com> Signed-off-by: Xi Wang <xi.wang@gmail.com> Signed-off-by: Luke Nelson <luke.r.nels@gmail.com> --- arch/riscv/net/bpf_jit_comp64.c | 15 ++++++++++----- 1 file changed, 10 insertions(+), 5 deletions(-) diff --git a/arch/riscv/net/bpf_jit_comp64.c b/arch/riscv/net/bpf_jit_comp64.c index c3ce9a911b66..b07cef952019 100644 --- a/arch/riscv/net/bpf_jit_comp64.c +++ b/arch/riscv/net/bpf_jit_comp64.c @@ -796,7 +796,13 @@ int bpf_jit_emit_insn(const struct bpf_insn *insn, struct rv_jit_context *ctx, case BPF_JMP32 | BPF_JSET | BPF_K: rvoff = rv_offset(i, off, ctx); s = ctx->ninsns; - emit_imm(RV_REG_T1, imm, ctx); + if (imm) { + emit_imm(RV_REG_T1, imm, ctx); + rs = RV_REG_T1; + } else { + /* If imm is 0, simply use zero register. */ + rs = RV_REG_ZERO; + } if (!is64) { if (is_signed_bpf_cond(BPF_OP(code))) emit_sext_32_rd(&rd, ctx); @@ -811,11 +817,10 @@ int bpf_jit_emit_insn(const struct bpf_insn *insn, struct rv_jit_context *ctx, if (BPF_OP(code) == BPF_JSET) { /* Adjust for and */ rvoff -= 4; - emit(rv_and(RV_REG_T1, rd, RV_REG_T1), ctx); - emit_branch(BPF_JNE, RV_REG_T1, RV_REG_ZERO, rvoff, - ctx); + emit(rv_and(rs, rd, rs), ctx); + emit_branch(BPF_JNE, rs, RV_REG_ZERO, rvoff, ctx); } else { - emit_branch(BPF_OP(code), rd, RV_REG_T1, rvoff, ctx); + emit_branch(BPF_OP(code), rd, rs, rvoff, ctx); } break; -- 2.17.1
WARNING: multiple messages have this Message-ID (diff)
From: Luke Nelson <lukenels@cs.washington.edu> To: bpf@vger.kernel.org Cc: "Song Liu" <songliubraving@fb.com>, "Albert Ou" <aou@eecs.berkeley.edu>, "Daniel Borkmann" <daniel@iogearbox.net>, "Luke Nelson" <luke.r.nels@gmail.com>, "Björn Töpel" <bjorn.topel@gmail.com>, "John Fastabend" <john.fastabend@gmail.com>, "Alexei Starovoitov" <ast@kernel.org>, linux-kernel@vger.kernel.org, netdev@vger.kernel.org, "Palmer Dabbelt" <palmer@dabbelt.com>, "Paul Walmsley" <paul.walmsley@sifive.com>, "KP Singh" <kpsingh@chromium.org>, "Yonghong Song" <yhs@fb.com>, linux-riscv@lists.infradead.org, "Andrii Nakryiko" <andriin@fb.com>, "Martin KaFai Lau" <kafai@fb.com>, "Xi Wang" <xi.wang@gmail.com> Subject: [PATCH bpf-next 3/4] bpf, riscv: Optimize BPF_JMP BPF_K when imm == 0 on RV64 Date: Tue, 5 May 2020 17:03:19 -0700 [thread overview] Message-ID: <20200506000320.28965-4-luke.r.nels@gmail.com> (raw) In-Reply-To: <20200506000320.28965-1-luke.r.nels@gmail.com> This patch adds an optimization to BPF_JMP (32- and 64-bit) BPF_K for when the BPF immediate is zero. When the immediate is zero, the code can directly use the RISC-V zero register instead of loading a zero immediate to a temporary register first. Co-developed-by: Xi Wang <xi.wang@gmail.com> Signed-off-by: Xi Wang <xi.wang@gmail.com> Signed-off-by: Luke Nelson <luke.r.nels@gmail.com> --- arch/riscv/net/bpf_jit_comp64.c | 15 ++++++++++----- 1 file changed, 10 insertions(+), 5 deletions(-) diff --git a/arch/riscv/net/bpf_jit_comp64.c b/arch/riscv/net/bpf_jit_comp64.c index c3ce9a911b66..b07cef952019 100644 --- a/arch/riscv/net/bpf_jit_comp64.c +++ b/arch/riscv/net/bpf_jit_comp64.c @@ -796,7 +796,13 @@ int bpf_jit_emit_insn(const struct bpf_insn *insn, struct rv_jit_context *ctx, case BPF_JMP32 | BPF_JSET | BPF_K: rvoff = rv_offset(i, off, ctx); s = ctx->ninsns; - emit_imm(RV_REG_T1, imm, ctx); + if (imm) { + emit_imm(RV_REG_T1, imm, ctx); + rs = RV_REG_T1; + } else { + /* If imm is 0, simply use zero register. */ + rs = RV_REG_ZERO; + } if (!is64) { if (is_signed_bpf_cond(BPF_OP(code))) emit_sext_32_rd(&rd, ctx); @@ -811,11 +817,10 @@ int bpf_jit_emit_insn(const struct bpf_insn *insn, struct rv_jit_context *ctx, if (BPF_OP(code) == BPF_JSET) { /* Adjust for and */ rvoff -= 4; - emit(rv_and(RV_REG_T1, rd, RV_REG_T1), ctx); - emit_branch(BPF_JNE, RV_REG_T1, RV_REG_ZERO, rvoff, - ctx); + emit(rv_and(rs, rd, rs), ctx); + emit_branch(BPF_JNE, rs, RV_REG_ZERO, rvoff, ctx); } else { - emit_branch(BPF_OP(code), rd, RV_REG_T1, rvoff, ctx); + emit_branch(BPF_OP(code), rd, rs, rvoff, ctx); } break; -- 2.17.1
next prev parent reply other threads:[~2020-05-06 0:03 UTC|newest] Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top 2020-05-06 0:03 [PATCH bpf-next 0/4] RV64 BPF JIT Optimizations Luke Nelson 2020-05-06 0:03 ` Luke Nelson 2020-05-06 0:03 ` [PATCH bpf-next 1/4] bpf, riscv: Enable missing verifier_zext optimizations on RV64 Luke Nelson 2020-05-06 0:03 ` Luke Nelson 2020-05-06 0:03 ` [PATCH bpf-next 2/4] bpf, riscv: Optimize FROM_LE using verifier_zext " Luke Nelson 2020-05-06 0:03 ` Luke Nelson 2020-05-06 0:03 ` Luke Nelson [this message] 2020-05-06 0:03 ` [PATCH bpf-next 3/4] bpf, riscv: Optimize BPF_JMP BPF_K when imm == 0 " Luke Nelson 2020-05-06 0:03 ` [PATCH bpf-next 4/4] bpf, riscv: Optimize BPF_JSET BPF_K using andi " Luke Nelson 2020-05-06 0:03 ` Luke Nelson 2020-05-06 7:08 ` [PATCH bpf-next 0/4] RV64 BPF JIT Optimizations Björn Töpel 2020-05-06 7:08 ` Björn Töpel 2020-05-06 8:08 ` Daniel Borkmann 2020-05-06 8:08 ` Daniel Borkmann
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