[PATCH 1/3] net: sun8i_emac: Use consistent clock bitfield definitions

[PATCH 1/3] net: sun8i_emac: Use consistent clock bitfield definitions

[Samuel Holland]

While the R40 uses a different register for EMAC clock configuration
than other chips, the register has a very similar layout. Reuse the
existing bitfield definitions in this file, since they match.

This allows the driver to compile on the H6 platform, where the
CCM_GMAC_CTRL definitions are not present.

Signed-off-by: Samuel Holland <samuel@sholland.org>
---
 drivers/net/sun8i_emac.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/net/sun8i_emac.c b/drivers/net/sun8i_emac.c
index 1ae776b446..dcd18833a2 100644
--- a/drivers/net/sun8i_emac.c
+++ b/drivers/net/sun8i_emac.c
@@ -296,9 +296,9 @@ static int sun8i_emac_set_syscon(struct sun8i_eth_pdata *pdata,
 	if (priv->variant == R40_GMAC) {
 		/* Select RGMII for R40 */
 		reg = readl(priv->sysctl_reg + 0x164);
-		reg |= CCM_GMAC_CTRL_TX_CLK_SRC_INT_RGMII |
-		       CCM_GMAC_CTRL_GPIT_RGMII |
-		       CCM_GMAC_CTRL_TX_CLK_DELAY(CONFIG_GMAC_TX_DELAY);
+		reg |= SC_ETCS_INT_GMII |
+		       SC_EPIT |
+		       (CONFIG_GMAC_TX_DELAY << SC_ETXDC_OFFSET);
 
 		writel(reg, priv->sysctl_reg + 0x164);
 		return 0;
-- 
2.24.1

[PATCH 2/3] net: sun8i_emac: Add support for the H6 variant

[Samuel Holland]

The H6 EMAC is very similar to the H3 variant, except that it uses the
same pinmux as R40. Add support for it.

Signed-off-by: Samuel Holland <samuel@sholland.org>
---
 drivers/net/sun8i_emac.c | 14 ++++++++++----
 1 file changed, 10 insertions(+), 4 deletions(-)

diff --git a/drivers/net/sun8i_emac.c b/drivers/net/sun8i_emac.c
index dcd18833a2..7ad5070b44 100644
--- a/drivers/net/sun8i_emac.c
+++ b/drivers/net/sun8i_emac.c
@@ -107,6 +107,7 @@ enum emac_variant {
 	H3_EMAC,
 	A64_EMAC,
 	R40_GMAC,
+	H6_EMAC,
 };
 
 struct emac_dma_desc {
@@ -306,14 +307,16 @@ static int sun8i_emac_set_syscon(struct sun8i_eth_pdata *pdata,
 
 	reg = readl(priv->sysctl_reg + 0x30);
 
-	if (priv->variant == H3_EMAC) {
+	if (priv->variant == H3_EMAC || priv->variant == H6_EMAC) {
 		ret = sun8i_emac_set_syscon_ephy(priv, &reg);
 		if (ret)
 			return ret;
 	}
 
 	reg &= ~(SC_ETCS_MASK | SC_EPIT);
-	if (priv->variant == H3_EMAC || priv->variant == A64_EMAC)
+	if (priv->variant == H3_EMAC ||
+	    priv->variant == A64_EMAC ||
+	    priv->variant == H6_EMAC)
 		reg &= ~SC_RMII_EN;
 
 	switch (priv->interface) {
@@ -325,7 +328,8 @@ static int sun8i_emac_set_syscon(struct sun8i_eth_pdata *pdata,
 		break;
 	case PHY_INTERFACE_MODE_RMII:
 		if (priv->variant == H3_EMAC ||
-		    priv->variant == A64_EMAC) {
+		    priv->variant == A64_EMAC ||
+		    priv->variant == H6_EMAC) {
 			reg |= SC_RMII_EN | SC_ETCS_EXT_GMII;
 		break;
 		}
@@ -531,7 +535,7 @@ static int parse_phy_pins(struct udevice *dev)
 
 		if (priv->variant == H3_EMAC)
 			sunxi_gpio_set_cfgpin(pin, SUN8I_IOMUX_H3);
-		else if (priv->variant == R40_GMAC)
+		else if (priv->variant == R40_GMAC || priv->variant == H6_EMAC)
 			sunxi_gpio_set_cfgpin(pin, SUN8I_IOMUX_R40);
 		else
 			sunxi_gpio_set_cfgpin(pin, SUN8I_IOMUX);
@@ -1028,6 +1032,8 @@ static const struct udevice_id sun8i_emac_eth_ids[] = {
 		.data = (uintptr_t)A83T_EMAC },
 	{.compatible = "allwinner,sun8i-r40-gmac",
 		.data = (uintptr_t)R40_GMAC },
+	{.compatible = "allwinner,sun50i-h6-emac",
+		.data = (uintptr_t)H6_EMAC },
 	{ }
 };
 
-- 
2.24.1

[PATCH 3/3] sunxi: H6: Enable Ethernet on the Pine H64

[Samuel Holland]

Now that the EMAC driver supports the H6 SoC, we can enable the Ethernet
hardware on the Pine H64 board.

Signed-off-by: Samuel Holland <samuel@sholland.org>
---
 configs/pine_h64_defconfig | 1 +
 1 file changed, 1 insertion(+)

diff --git a/configs/pine_h64_defconfig b/configs/pine_h64_defconfig
index 8937c51bd0..87871fd19f 100644
--- a/configs/pine_h64_defconfig
+++ b/configs/pine_h64_defconfig
@@ -10,5 +10,6 @@ CONFIG_SPL_SPI_SUNXI=y
 # CONFIG_PSCI_RESET is not set
 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
 CONFIG_DEFAULT_DEVICE_TREE="sun50i-h6-pine-h64"
+CONFIG_SUN8I_EMAC=y
 CONFIG_USB_EHCI_HCD=y
 CONFIG_USB_OHCI_HCD=y
-- 
2.24.1

[PATCH 1/3] net: sun8i_emac: Use consistent clock bitfield definitions

[Jagan Teki]

On Fri, May 8, 2020 at 4:40 AM Samuel Holland <samuel@sholland.org> wrote:
>
> While the R40 uses a different register for EMAC clock configuration
> than other chips, the register has a very similar layout. Reuse the
> existing bitfield definitions in this file, since they match.
>
> This allows the driver to compile on the H6 platform, where the
> CCM_GMAC_CTRL definitions are not present.
>
> Signed-off-by: Samuel Holland <samuel@sholland.org>
> ---

Applied to u-boot-sunxi/master